diff options
| author | Yue Du <daviddu@us.ibm.com> | 2018-08-23 09:12:42 -0500 |
|---|---|---|
| committer | hostboot <hostboot@us.ibm.com> | 2018-08-25 10:32:52 -0500 |
| commit | 5e5285bdc7cae115b0eb6cb893fd087701ee7b31 (patch) | |
| tree | 7c5a1a563f87b9b48c6a0cb28c45360143ac0b5e | |
| parent | 054ef762ef58721190c80aa2ac2feb1e1975275e (diff) | |
| download | talos-hcode-5e5285bdc7cae115b0eb6cb893fd087701ee7b31.tar.gz talos-hcode-5e5285bdc7cae115b0eb6cb893fd087701ee7b31.zip | |
STOP: Fix Spwu Auto to Manual mode Signals Sync up.
Key_Cronus_Test=PM_REGRESS
Change-Id: I23702ac9c23485b65e77c8454ccbd43e4e4bb0da
CQ: SW443007
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/65076
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: RAHUL BATRA <rbatra@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
| -rw-r--r-- | import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_init.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_init.c b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_init.c index 71fdeee6..e714ddf1 100644 --- a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_init.c +++ b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_init.c @@ -147,6 +147,10 @@ p9_cme_stop_init() PK_TRACE_DBG("Setup: SPWU Interrupt Polority[%d]", G_cme_stop_record.core_in_spwu); out32(G_CME_LCL_EIPR_CLR, (G_cme_stop_record.core_in_spwu << SHIFT32(15))); out32(G_CME_LCL_EIPR_OR, (((~G_cme_stop_record.core_in_spwu) & CME_MASK_BC) << SHIFT32(15))); + out32(G_CME_LCL_SICR_OR, ((G_cme_stop_record.core_in_spwu << SHIFT32(5)) | + (G_cme_stop_record.core_in_spwu << SHIFT32(17)))); + out32(G_CME_LCL_SICR_CLR, ((((~G_cme_stop_record.core_in_spwu) & CME_MASK_BC) << SHIFT32(5)) | + (((~G_cme_stop_record.core_in_spwu) & CME_MASK_BC) << SHIFT32(17)))); PK_TRACE("Assert auto spwu disable, disable auto spwu via LMCR[12/13]"); out32(G_CME_LCL_LMCR_OR, BITS32(12, 2)); |

