From 5e5285bdc7cae115b0eb6cb893fd087701ee7b31 Mon Sep 17 00:00:00 2001 From: Yue Du Date: Thu, 23 Aug 2018 09:12:42 -0500 Subject: STOP: Fix Spwu Auto to Manual mode Signals Sync up. Key_Cronus_Test=PM_REGRESS Change-Id: I23702ac9c23485b65e77c8454ccbd43e4e4bb0da CQ: SW443007 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/65076 Reviewed-by: Gregory S. Still Reviewed-by: RAHUL BATRA Tested-by: Jenkins Server Reviewed-by: Jennifer A. Stofer --- import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_init.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_init.c b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_init.c index 71fdeee6..e714ddf1 100644 --- a/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_init.c +++ b/import/chips/p9/procedures/ppe_closed/cme/stop_cme/p9_cme_stop_init.c @@ -147,6 +147,10 @@ p9_cme_stop_init() PK_TRACE_DBG("Setup: SPWU Interrupt Polority[%d]", G_cme_stop_record.core_in_spwu); out32(G_CME_LCL_EIPR_CLR, (G_cme_stop_record.core_in_spwu << SHIFT32(15))); out32(G_CME_LCL_EIPR_OR, (((~G_cme_stop_record.core_in_spwu) & CME_MASK_BC) << SHIFT32(15))); + out32(G_CME_LCL_SICR_OR, ((G_cme_stop_record.core_in_spwu << SHIFT32(5)) | + (G_cme_stop_record.core_in_spwu << SHIFT32(17)))); + out32(G_CME_LCL_SICR_CLR, ((((~G_cme_stop_record.core_in_spwu) & CME_MASK_BC) << SHIFT32(5)) | + (((~G_cme_stop_record.core_in_spwu) & CME_MASK_BC) << SHIFT32(17)))); PK_TRACE("Assert auto spwu disable, disable auto spwu via LMCR[12/13]"); out32(G_CME_LCL_LMCR_OR, BITS32(12, 2)); -- cgit v1.2.3