diff options
author | Yue Du <daviddu@us.ibm.com> | 2018-01-09 01:43:54 -0600 |
---|---|---|
committer | hostboot <hostboot@us.ibm.com> | 2018-08-22 17:55:37 -0500 |
commit | 55f1962e961138f15cfd68d6bef40ca3c3edf31d (patch) | |
tree | 5241c25007b1de7c904e34837fe32757a7b3d987 | |
parent | d520bc71a0807a0caa444adeade84bbe9603801e (diff) | |
download | talos-hcode-55f1962e961138f15cfd68d6bef40ca3c3edf31d.tar.gz talos-hcode-55f1962e961138f15cfd68d6bef40ca3c3edf31d.zip |
STOP: Fix SGPE stop servicing wakeups
Key_Cronus_Test=PM_REGRESS
Change-Id: Ic0c720bbac219294f9e7690fd88d6149c143b5e9
Original-Change-Id: Icb6b9fcf030a9389bf4571c5b9b3c44d72a8cb3f
CQ: SW413317
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/51662
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Tested-by: Cronus HW CI <cronushw-ci+hostboot@us.ibm.com>
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Michael S. Floyd <mfloyd@us.ibm.com>
Reviewed-by: Gregory S. Still <stillgs@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
-rw-r--r-- | import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop.h | 7 | ||||
-rw-r--r-- | import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c | 13 |
2 files changed, 16 insertions, 4 deletions
diff --git a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop.h b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop.h index d4d67c48..0a6cf2fb 100644 --- a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop.h +++ b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop.h @@ -264,6 +264,13 @@ enum SGPE_STOP_VECTOR_INDEX }; +enum VECTOR_RCLKE_QUAD_OFFSETS +{ + RCLK_DIS_REQ_OFFSET = 0, + RCLK_DIS_DONE_OFFSET = 8, + QUAD_IN_STOP11_OFFSET = 16 +}; + enum SCOM_RESTORE_CONST { SCOM_ENTRY_MARK = 0xDEADDEAD, diff --git a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c index 8b09c7a4..8128b59f 100644 --- a/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c +++ b/import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_entry.c @@ -151,9 +151,10 @@ p9_sgpe_stop_entry() #else // if resonant clock disable is completed, process stop11 entry - if (G_sgpe_stop_record.group.quad[VECTOR_RCLKE] & BIT32((qloop + 16))) + if (G_sgpe_stop_record.group.quad[VECTOR_RCLKE] & BIT32((qloop + RCLK_DIS_DONE_OFFSET))) { - G_sgpe_stop_record.group.quad[VECTOR_RCLKE] &= ~BIT32((qloop + 16)); + G_sgpe_stop_record.group.quad[VECTOR_RCLKE] &= ~BIT32((qloop + RCLK_DIS_DONE_OFFSET)); + G_sgpe_stop_record.group.quad[VECTOR_RCLKE] |= BIT32((qloop + QUAD_IN_STOP11_OFFSET)); // if during resonant clock disable, any exit occured, re-assert them, // but we are going to complete the stop11 entry prior to process it @@ -183,10 +184,10 @@ p9_sgpe_stop_entry() } // if stop11 entry qualifies, hold on processing it but first // send DB to Quad-Manager to disable the resonant clock - else + else if (!(G_sgpe_stop_record.group.quad[VECTOR_RCLKE] & BIT32((qloop + QUAD_IN_STOP11_OFFSET)))) { // from this point on, only process wakeup when stop11 is entered - G_sgpe_stop_record.group.quad[VECTOR_RCLKE] |= BIT32(qloop); + G_sgpe_stop_record.group.quad[VECTOR_RCLKE] |= BIT32((qloop + RCLK_DIS_REQ_OFFSET)); // assume ex0 core0 is good cindex = (qloop << 2); @@ -219,6 +220,8 @@ p9_sgpe_stop_entry() BIT64(CME_FLAGS_RCLK_OPERABLE)); } + PK_TRACE_INF("DB2 MessageID 2(Rclk Entry) sent to core %d", cindex); + #if NIMBUS_DD_LEVEL != 10 GPE_PUTSCOM(GPE_SCOM_ADDR_CORE(CPPM_CMEDB2, cindex), BIT64(6)); @@ -823,6 +826,8 @@ p9_sgpe_stop_entry() // send DB2 with msgid 0x3 to the first good core // to trigger Quad Manager to enable resonant clock again + PK_TRACE_INF("DB2 MessageID 3(Rclk Entry Abort) sent to core %d", cindex); + #if NIMBUS_DD_LEVEL != 10 GPE_PUTSCOM(GPE_SCOM_ADDR_CORE(CPPM_CMEDB2, cindex), BITS64(6, 2)); |