Major refactor for P9:

- cleaned up package organization
- added html summary
- breakout parts library into seperate files
- added support for external parts library
- cleaned up MVC cheats
- removed unused methods

124 files changed, 65313 insertions, 16849 deletions

diff --git a/.classpath b/.classpath
index 6e9cf0f..9c44d6c 100644
--- a/.classpath
+++ b/.classpath
@@ -2,11 +2,15 @@
 <classpath>

 	<classpathentry kind="src" path="src"/>

 	<classpathentry exported="true" kind="con" path="org.eclipse.jdt.launching.JRE_CONTAINER/org.eclipse.jdt.internal.debug.ui.launcher.StandardVMType/JavaSE-1.7"/>

-	<classpathentry exported="true" kind="lib" path="C:/Users/IBM_ADMIN/Documents/git/serverwiz/lib/swt_win64.jar"/>

-	<classpathentry exported="true" kind="lib" path="C:/eclipse/plugins/org.eclipse.jface_3.10.2.v20141021-1035.jar"/>

-	<classpathentry exported="true" kind="lib" path="C:/Users/IBM_ADMIN/Documents/git/serverwiz/lib/json-simple-1.1.1.jar"/>

-	<classpathentry kind="lib" path="C:/eclipse/plugins/org.eclipse.core.commands_3.6.100.v20140528-1422.jar"/>

-	<classpathentry kind="lib" path="C:/eclipse/plugins/org.eclipse.core.runtime_3.10.0.v20140318-2214.jar"/>

-	<classpathentry kind="lib" path="C:/eclipse/plugins/org.eclipse.equinox.common_3.6.200.v20130402-1505.jar"/>

+	<classpathentry exported="true" kind="lib" path="lib/json-simple-1.1.1.jar"/>

+	<classpathentry exported="true" kind="lib" path="lib/swt_win64.jar"/>

+	<classpathentry kind="lib" path="lib/swt_linux32.jar"/>

+	<classpathentry kind="lib" path="lib/swt_linux64.jar"/>

+	<classpathentry kind="lib" path="lib/swt_win32.jar"/>

+	<classpathentry kind="lib" path="lib/swt_macosx.jar"/>

+	<classpathentry kind="lib" path="lib/org.eclipse.core.commands_3.6.100.v20140528-1422.jar"/>

+	<classpathentry kind="lib" path="lib/org.eclipse.core.runtime-3.10.0-v20140318-2214.jar"/>

+	<classpathentry kind="lib" path="lib/org.eclipse.equinox.common-3.6.200.v20130402-1505.jar"/>

+	<classpathentry kind="lib" path="lib/org.eclipse.jface_3.10.2.v20141021-1035.jar"/>

 	<classpathentry kind="output" path="bin"/>

 </classpath>

diff --git a/build.xml b/build.xml
index a554c5c..2bc5dba 100644
--- a/build.xml
+++ b/build.xml
@@ -25,8 +25,8 @@
 	        	</main>
 	        	<lib>
 	        		<fileset file="lib/json-simple-1.1.1.jar"/>
-	        		<fileset file="${plugin.dir}/org.eclipse.core.runtime_3.10.0.v20140318-2214.jar"/>
-	        		<fileset file="${plugin.dir}/org.eclipse.core.commands_3.6.100.v20140528-1422.jar"/>
+	        		<fileset file="lib/org.eclipse.core.runtime_3.10.0.v20140318-2214.jar"/>
+	        		<fileset file="lib/org.eclipse.core.commands_3.6.100.v20140528-1422.jar"/>
 	        	</lib>
 	        </one-jar>
 	    	<one-jar destfile="build/serverwiz2_win64.jar" onejarmainclass="com.ibm.ServerWizard2.ServerWizard2">
@@ -36,10 +36,7 @@
 	        	<lib>
 	        		<fileset file="lib/swt_win64.jar"/>
 	        		<fileset file="lib/json-simple-1.1.1.jar"/>
-	        		<fileset file="${plugin.dir}/org.eclipse.jface_3.10.2.v20141021-1035.jar"/>
-	        		<fileset file="${plugin.dir}/org.eclipse.core.runtime_3.10.0.v20140318-2214.jar"/>
-	        		<fileset file="${plugin.dir}/org.eclipse.core.commands_3.6.100.v20140528-1422.jar"/>
-	        		<fileset file="${plugin.dir}/org.eclipse.equinox.common_3.6.200.v20130402-1505.jar"/>
+	        		<fileset file="lib/org.eclipse*.jar"/>
 	        	</lib>
 	        </one-jar>
 		    <one-jar destfile="build/serverwiz2_linux64.jar" onejarmainclass="com.ibm.ServerWizard2.ServerWizard2">
@@ -49,10 +46,7 @@
 		        	<lib>
 		        		<fileset file="lib/swt_linux64.jar"/>
 		        		<fileset file="lib/json-simple-1.1.1.jar"/>
-			        	<fileset file="${plugin.dir}/org.eclipse.jface_3.10.2.v20141021-1035.jar"/>
-			        	<fileset file="${plugin.dir}/org.eclipse.core.runtime_3.10.0.v20140318-2214.jar"/>
-			        	<fileset file="${plugin.dir}/org.eclipse.core.commands_3.6.100.v20140528-1422.jar"/>
-			        	<fileset file="${plugin.dir}/org.eclipse.equinox.common_3.6.200.v20130402-1505.jar"/>
+		        		<fileset file="lib/org.eclipse*.jar"/>
 		        	</lib>
 		    </one-jar>
 	        <one-jar destfile="build/serverwiz2_win32.jar" onejarmainclass="com.ibm.ServerWizard2.ServerWizard2">
@@ -62,10 +56,7 @@
 	        	<lib>
 	        		<fileset file="lib/swt_win32.jar"/>
 	        		<fileset file="lib/json-simple-1.1.1.jar"/>
-		        	<fileset file="${plugin.dir}/org.eclipse.jface_3.10.2.v20141021-1035.jar"/>
-		        	<fileset file="${plugin.dir}/org.eclipse.core.runtime_3.10.0.v20140318-2214.jar"/>
-		        	<fileset file="${plugin.dir}/org.eclipse.core.commands_3.6.100.v20140528-1422.jar"/>
-		        	<fileset file="${plugin.dir}/org.eclipse.equinox.common_3.6.200.v20130402-1505.jar"/>
+	        		<fileset file="lib/org.eclipse*.jar"/>
 	        	</lib>
 	        </one-jar>
 	        <one-jar destfile="build/serverwiz2_macosx64.jar" onejarmainclass="com.ibm.ServerWizard2.ServerWizard2">
@@ -75,20 +66,11 @@
 	        	<lib>
 	        		<fileset file="lib/swt_macosx.jar"/>
 	        		<fileset file="lib/json-simple-1.1.1.jar"/>
-		        	<fileset file="${plugin.dir}/org.eclipse.jface_3.10.2.v20141021-1035.jar"/>
-		        	<fileset file="${plugin.dir}/org.eclipse.core.runtime_3.10.0.v20140318-2214.jar"/>
-		        	<fileset file="${plugin.dir}/org.eclipse.core.commands_3.6.100.v20140528-1422.jar"/>
-		        	<fileset file="${plugin.dir}/org.eclipse.equinox.common_3.6.200.v20130402-1505.jar"/>
+	        		<fileset file="lib/org.eclipse*.jar"/>
 	        	</lib>
 	        </one-jar>
 	    	<zip destfile="build/serverwiz2_lib.zip">
-	    	    <zipfileset dir="${hbxml.dir}/" includes="attribute_types.xml" fullpath="xml/attribute_types.xml"/>
-	    		<zipfileset dir="${hbxml.dir}/" includes="attribute_types_hb.xml" fullpath="xml/attribute_types_hb.xml"/>
-	    		<zipfileset dir="xml/" includes="attribute_types_mrw.xml" fullpath="xml/attribute_types_mrw.xml"/>
-	    		<zipfileset dir="xml/" includes="target_types_mrw.xml" fullpath="xml/target_types_mrw.xml"/>
-	    		<zipfileset dir="xml/" includes="target_instances_v3.xml" fullpath="xml/target_instances_v3.xml"/>
-	    		<zipfileset dir="scripts/" includes="processMrw.pl" fullpath="scripts/processMrw.pl"/>
-	    		<zipfileset dir="scripts/" includes="Targets.pm" fullpath="scripts/Targets.pm"/>
+	    		<zipfileset dir="xml" prefix="xml"/>
 	    	</zip>
 	    </target>
 </project>
diff --git a/lib/org.eclipse.core.commands_3.6.100.v20140528-1422.jar b/lib/org.eclipse.core.commands_3.6.100.v20140528-1422.jar
new file mode 100644
index 0000000..e2b5b15
--- /dev/null
+++ b/lib/org.eclipse.core.commands_3.6.100.v20140528-1422.jar
diff --git a/lib/org.eclipse.core.runtime-3.10.0-v20140318-2214.jar b/lib/org.eclipse.core.runtime-3.10.0-v20140318-2214.jar
new file mode 100644
index 0000000..ef56d1e
--- /dev/null
+++ b/lib/org.eclipse.core.runtime-3.10.0-v20140318-2214.jar
diff --git a/lib/org.eclipse.equinox.common-3.6.200.v20130402-1505.jar b/lib/org.eclipse.equinox.common-3.6.200.v20130402-1505.jar
new file mode 100644
index 0000000..ebd2bf4
--- /dev/null
+++ b/lib/org.eclipse.equinox.common-3.6.200.v20130402-1505.jar
diff --git a/lib/org.eclipse.jface_3.10.2.v20141021-1035.jar b/lib/org.eclipse.jface_3.10.2.v20141021-1035.jar
new file mode 100644
index 0000000..78ecaf3
--- /dev/null
+++ b/lib/org.eclipse.jface_3.10.2.v20141021-1035.jar
diff --git a/lib/swt_macosx.jar b/lib/swt_macosx.jar
new file mode 100644
index 0000000..c9196b5
--- /dev/null
+++ b/lib/swt_macosx.jar
diff --git a/scripts/Targets.pm b/scripts/Targets.pm
index dffb5fa..2c0876f 100644
--- a/scripts/Targets.pm
+++ b/scripts/Targets.pm
@@ -45,7 +45,7 @@ sub new
         version      => "",
         errorsExist  => 0,
         NUM_PROCS    => 0,
-        TOP_LEVEL    => "sys-0",
+        TOP_LEVEL    => "sys",
         TOPOLOGY     => undef,
         report_log   => "",
         vpd_num      => 0,
@@ -87,8 +87,9 @@ sub loadXML
     print "Loading MRW XML: $filename\n";
     $self->{xml} =
       XMLin($filename,forcearray => [ 'child_id', 'hidden_child_id', 'bus',
-                                      'property' ]);
+                                      'property', 'field','attribute' ]);
     $self->storeEnumerations();
+    $self->storeGroups();
     $self->buildHierarchy($self->{TOP_LEVEL});
     $self->buildAffinity();
     $self->{report_filename}=$filename.".rpt";
@@ -232,17 +233,27 @@ sub storeEnumerations
 {
     my $self = shift;
 
-    foreach my $enumType (keys(%{ $self->{xml}->{enumerationType} }))
+    foreach my $enumType (keys(%{ $self->{xml}->{enumerationTypes}->{enumerationType} }))
     {
         foreach my $enum (
-            keys(%{$self->{xml}->{enumerationType}->{$enumType}->{enumerator}}))
+            keys(%{$self->{xml}->{enumerationTypes}->{enumerationType}->{$enumType}->{enumerator}}))
         {
             $self->{enumeration}->{$enumType}->{$enum} =
-              $self->{xml}->{enumerationType}->{$enumType}->{enumerator}
+              $self->{xml}->{enumerationTypes}->{enumerationType}->{$enumType}->{enumerator}
               ->{$enum}->{value};
         }
     }
 }
+sub storeGroups
+{
+    my $self = shift;
+	foreach my $grp (keys(%{ $self->{xml}->{attributeGroups}->{attributeGroup} }))
+    {
+       	foreach my $attr (@{$self->{xml}->{attributeGroups}->{attributeGroup}->{$grp}->{'attribute'}}) {
+       		$self->{groups}->{$grp}->{$attr} = 1;
+       	}
+    }
+}
 
 ####################################################
 ## build target hierarchy recursively
@@ -278,13 +289,24 @@ sub buildHierarchy
     my $self   = shift;
     my $target = shift;
 
-    my $old_path        = $self->{data}->{INSTANCE_PATH};
-    my $target_xml      = $self->{xml}->{'targetInstance'}{$target};
-    my $affinity_target = $target;
-    my $key             = $self->{data}->{INSTANCE_PATH} . "/" . $target;
-
     my $instance_path = $self->{data}->{INSTANCE_PATH};
-    $instance_path = "instance:" . substr($instance_path, 1);
+    if (!defined $instance_path)
+    { 
+    	$instance_path = "";
+    }
+
+    my $old_path        = $instance_path;
+    my $target_xml      = $self->{xml}->{'targetInstances'}->{'targetInstance'}{$target};
+    my $affinity_target = $target;
+    my $key             = $instance_path . "/" . $target;
+	
+	if ($instance_path ne "") 
+	{
+    	$instance_path = "instance:" . substr($instance_path, 1);
+	} else
+	{
+		$instance_path = "instance:";
+	}
     $self->setAttribute($key, "INSTANCE_PATH", $instance_path);
     $self->{data}->{TARGETS}->{$key}->{TARGET} = $target_xml;
     $self->{data}->{INSTANCE_PATH} = $old_path . "/" . $target;
@@ -322,9 +344,9 @@ sub buildHierarchy
         }
     }
     ## global attributes overwrite local
-    foreach my $prop (keys %{$self->{xml}->{globalSetting}->{$key}->{property}})
+    foreach my $prop (keys %{$self->{xml}->{globalSettings}->{globalSetting}->{$key}->{property}})
     {
-        my $val=$self->{xml}->{globalSetting}->{$key}->{property}->
+        my $val=$self->{xml}->{globalSettings}->{globalSetting}->{$key}->{property}->
                        {$prop}->{value};
         $self->setAttribute($key, $prop, $val);
     }
@@ -413,8 +435,8 @@ sub buildAffinity
             $node = -1;
 
             $self->{targeting}{SYS}[0]{KEY} = $target;
-            $self->setAttribute($target, "AFFINITY_PATH", "affinity:sys-0");
-            $self->setAttribute($target, "PHYS_PATH",     "physical:sys-0");
+            $self->setAttribute($target, "AFFINITY_PATH", "affinity:sys");
+            $self->setAttribute($target, "PHYS_PATH",     "physical:sys");
             $self->setAttribute($target, "ENTITY_INSTANCE","0");
         }
         elsif ($type eq "NODE")
@@ -424,13 +446,13 @@ sub buildAffinity
             $self->{dimm_tpos} = 0;
             $self->{membuf_inst_num}=0;
             $node++;
-            $node_phys = "physical:sys-0/node-$node";
-            $node_aff  = "affinity:sys-0/node-$node";
+            $node_phys = "physical:sys/node-$node";
+            $node_aff  = "affinity:sys/node-$node";
             $self->{targeting}{SYS}[0]{NODES}[$node]{KEY} = $target;
             $self->setAttribute($target, "AFFINITY_PATH",
-                "affinity:sys-0/node-$node");
+                "affinity:sys/node-$node");
             $self->setAttribute($target, "PHYS_PATH",
-                "physical:sys-0/node-$node");
+                "physical:sys/node-$node");
             $self->setHuid($target, 0, $node);
             $self->setAttribute($target, "ENTITY_INSTANCE",$node);
         }
@@ -458,8 +480,8 @@ sub buildAffinity
             $self->setHuid($target, 0, $node);
             my $socket = $self->getTargetParent(
                          $self->getTargetParent($target));
-            my $parent_affinity = "affinity:sys-0/node-$node/proc-$proc";
-            my $parent_physical = "physical:sys-0/node-$node/proc-$proc";
+            my $parent_affinity = "affinity:sys/node-$node/proc-$proc";
+            my $parent_physical = "physical:sys/node-$node/proc-$proc";
             $self->setAttribute($target, "AFFINITY_PATH",  $parent_affinity);
             $self->setAttribute($target, "PHYS_PATH",      $parent_physical);
             $self->setAttribute($target, "POSITION",       $proc);
@@ -609,7 +631,7 @@ sub processMcs
         $self->setAttribute($unit, "DMI_REFCLOCK_SWIZZLE",$fsi_port);
         my $dmi_swizzle =
              $dmi_bus->{bus_attribute}->{DMI_REFCLOCK_SWIZZLE}->{default};
-        my $dmi_swizzle =
+        $dmi_swizzle =
              $self->getBusAttribute($unit,0,"DMI_REFCLOCK_SWIZZLE");
         if ($dmi_swizzle ne "")
         {
@@ -963,7 +985,7 @@ sub isBadAttribute
     {
         return 1;
     }
-    if ($target_ptr->{ATTRIBUTES}->{$attribute}->{default} eq $badvalue)
+    if (defined $badvalue && $target_ptr->{ATTRIBUTES}->{$attribute}->{default} eq $badvalue)
     {
         return 1;
     }
@@ -1018,7 +1040,6 @@ sub getAttribute
         printf("ERROR: getAttribute(%s,%s) | Attribute not defined\n",
             $target, $attribute);
 
-        #print Dumper($target_ptr);
         $self->myExit(4);
     }
     if (ref($target_ptr->{ATTRIBUTES}->{$attribute}->{default}) eq "HASH")
@@ -1027,6 +1048,31 @@ sub getAttribute
     }
     return $target_ptr->{ATTRIBUTES}->{$attribute}->{default};
 }
+
+sub getAttributeGroup
+{
+    my $self       = shift;
+    my $target     = shift;
+    my $group      = shift;
+    my $target_ptr = $self->getTarget($target);
+    if (!defined($self->{groups}->{$group})) {
+ 
+        printf("ERROR: getAttributeGroup(%s,%s) | Group not defined\n",
+            $target, $group);
+        $self->myExit(4);    	
+    }
+    my %attr;
+    foreach my $attribute (keys(%{$self->{groups}->{$group}}))
+    {
+        if (defined($target_ptr->{ATTRIBUTES}->{$attribute}->{default}))
+    	{
+        	$attr{$attribute} = $target_ptr->{ATTRIBUTES}->{$attribute};
+    	}
+    }
+    return \%attr;
+}
+
+
 ## renames a target attribute
 sub renameAttribute
 {
@@ -1130,6 +1176,8 @@ sub getBusAttribute
     return $target_ptr->{CONNECTION}->{BUS}->[$busnum]->{bus_attribute}->{$attr}
       ->{default};
 }
+
+
 ## returns a pointer to an array of children target names
 sub getTargetChildren
 {
@@ -1205,7 +1253,7 @@ sub setMruid
 
     my $type          = $self->getType($target);
     my $mru_prefix_id = $self->{enumeration}->{MRU_PREFIX}->{$type};
-    if ($mru_prefix_id eq "") { $mru_prefix_id = "0xFFFF"; }
+    if (!defined $mru_prefix_id || $mru_prefix_id eq "") { $mru_prefix_id = "0xFFFF"; }
     if ($mru_prefix_id eq "0xFFFF") { return; }
     my $index = 0;
     if (defined($self->{mru_idx}->{$node}->{$type}))
@@ -1341,7 +1389,7 @@ There are no arguments for the constructor.
 C<TARGET> is a pointer to data structure containing all target information.
 C<TARGET_STRING> is the hierarchical target string used as key for data
 structure.  An example for C<TARGET_STRING> would be:
-C</sys-0/node-0/motherboard-0/dimm-0>
+C</sys/node-0/motherboard-0/dimm-0>
 
 =over 4
 
@@ -1474,5 +1522,4 @@ Prints to stdout log message is debug mode is turned on.
 
 Norman James <njames@us.ibm.com>
 
-=cut
-
+=cut
\ No newline at end of file
diff --git a/scripts/gen_html.pl b/scripts/gen_html.pl
new file mode 100644
index 0000000..3a53429
--- /dev/null
+++ b/scripts/gen_html.pl
@@ -0,0 +1,258 @@
+#! /usr/bin/perl
+# IBM_PROLOG_BEGIN_TAG
+# This is an automatically generated prolog.
+#
+# $Source: src/usr/targeting/common/processMrw.pl $
+#
+# OpenPOWER HostBoot Project
+#
+# Contributors Listed Below - COPYRIGHT 2015,2016
+# [+] International Business Machines Corp.
+#
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+# implied. See the License for the specific language governing
+# permissions and limitations under the License.
+#
+# IBM_PROLOG_END_TAG
+
+use strict;
+use HTML::Table;
+use XML::Simple;
+use Data::Dumper;
+use Targets;
+use Math::BigInt;
+use Getopt::Long;
+use File::Basename;
+
+my $VERSION = "1.0.0";
+
+my $force          = 0;
+my $serverwiz_file = "";
+my $version        = 0;
+my $debug          = 0;
+my $report         = 0;
+my $sdr_file       = "";
+my $htmlfile       = "";
+
+GetOptions(
+	"f"   => \$force,             # numeric
+	"x=s" => \$serverwiz_file,    # string
+	"d"   => \$debug,
+	"v"   => \$version,
+	"o=s"   => \$htmlfile,
+	"r"   => \$report,
+  )                               # flag
+  or printUsage();
+
+if ( $version == 1 ) {
+	die "\nprocessMrw.pl\tversion $VERSION\n";
+}
+
+if ( $serverwiz_file eq "" ) {
+	printUsage();
+}
+
+$XML::Simple::PREFERRED_PARSER = 'XML::Parser';
+
+my $targetObj = Targets->new;
+if ( $force == 1 ) {
+	$targetObj->{force} = 1;
+}
+if ( $debug == 1 ) {
+	$targetObj->{debug} = 1;
+}
+
+$targetObj->setVersion($VERSION);
+my $xmldir = dirname($serverwiz_file);
+$targetObj->loadXML($serverwiz_file);
+
+my $attribute_lookup = {
+	'SOURCE' => {
+		'FSICM' => ['FSI_PORT','FSI_ENGINE'],
+		'FSIM' => ['FSI_PORT','FSI_ENGINE'],
+		'GPIO' => ['DIRECTION','GPIO_TYPE'],
+		'POWER' => ['RAIL_NAME'],
+	},
+	'DEST' => {
+		'I2C'  => ['I2C_ADDRESS'],
+		'POWER' => ['RAIL_NAME'],
+	},
+
+	'BUS' => {
+		'I2C'  => ['I2C_ADDRESS','I2C_SPEED'],
+	}
+};
+
+
+my %summary;
+foreach my $target ( sort keys %{ $targetObj->getAllTargets() } ) {
+	my $num_conns = $targetObj->getNumConnections($target);
+	if ( $num_conns == 0 ) { next; }
+
+	my $parent_chip = findChipTarget($targetObj,$target);
+	my $parent_target = $targetObj->getTargetParent($target);
+	my $parent_type = $targetObj->getTargetType($parent_target);
+	my $bus_type = $targetObj->getBusType($target);
+	my $source_target = $target;
+	my $source_ptr = $targetObj->getTarget($target);
+	
+	$source_target=~s/$parent_chip\///;
+	$summary{$bus_type}{$parent_chip}{'TYPE'} = $targetObj->getTargetType($parent_chip);
+	$summary{$bus_type}{$parent_chip}{'SOURCE'}{$source_target}{'TYPE'} = $targetObj->getTargetType($target);
+	$summary{$bus_type}{$parent_chip}{'SOURCE'}{$source_target}{'NAME'} = getPinName($targetObj,$target);
+	for ( my $i = 0 ; $i < $num_conns ; $i++ ) {
+		my $dest_target = $targetObj->getConnectionDestination( $target, $i );
+		my $bus_target = $targetObj->getConnectionBus( $target, $i );
+		my $dest_chip = findChipTarget($targetObj,$dest_target);
+		my $dest_instance = getPinName($targetObj,$dest_target);
+		
+		$summary{$bus_type}{$parent_chip}{'SOURCE'}{$target}{'DEST'}{$dest_target}{'CHIP'} = $dest_chip;
+		$summary{$bus_type}{$parent_chip}{'SOURCE'}{$target}{'DEST'}{$dest_target}{'NAME'} = $dest_instance;
+		if (defined $attribute_lookup->{'SOURCE'}->{$bus_type}) {
+			foreach my $attr (@{$attribute_lookup->{'SOURCE'}->{$bus_type}}) {
+				if (!$targetObj->isBadAttribute($target,$attr)) {
+					$summary{$bus_type}{$parent_chip}{'SOURCE'}{$target}{'DEST'}{$dest_target}{'ATTRIBUTES'}{$attr} = $targetObj->getAttribute($target,$attr);
+				}
+			}
+		}	
+		if (defined $attribute_lookup->{'DEST'}->{$bus_type}) {
+			foreach my $attr (@{$attribute_lookup->{'DEST'}->{$bus_type}}) {
+				if (!$targetObj->isBadAttribute($dest_target,$attr)) {
+					$summary{$bus_type}{$parent_chip}{'SOURCE'}{$target}{'DEST'}{$dest_target}{'ATTRIBUTES'}{$attr} = $targetObj->getAttribute($dest_target,$attr);
+				}
+			}
+		}
+		if (defined $attribute_lookup->{'BUS'}->{$bus_type}) {
+			foreach my $attr (@{$attribute_lookup->{'BUS'}->{$bus_type}}) {
+				if (defined $source_ptr->{CONNECTION}->{BUS}->[$i]->{'bus_attribute'}->{$attr}->{'default'} &&
+				       $source_ptr->{CONNECTION}->{BUS}->[$i]->{'bus_attribute'}->{$attr}->{'default'} ne "" &&
+				       ref($source_ptr->{CONNECTION}->{BUS}->[$i]->{'bus_attribute'}->{$attr}->{'default'}) ne "HASH") {
+					$summary{$bus_type}{$parent_chip}{'SOURCE'}{$source_target}{'DEST'}{$dest_target}{'ATTRIBUTES'}{$attr} = 
+						"(b)".$source_ptr->{CONNECTION}->{BUS}->[$i]->{'bus_attribute'}->{$attr}->{default};
+				}
+			}
+		}
+	}
+}
+
+my $outfile = $htmlfile;
+if ($outfile eq "") {
+	$outfile = $serverwiz_file;
+	$outfile =~ s/\.xml//;
+	$outfile = $outfile.".html";
+}
+open(my $html,"> $outfile") || die "Unable to create $outfile\n";
+
+print $html "<head><title>$outfile</title></head>\n";
+
+print $html "<body>\n";
+
+print $html "<a href=\"#targets\"><h2>Targets</h2></a>";
+print $html "<a href=\"#connections\"><h2>Connections by Bus Type</h2></a>";
+print $html "<hr>";
+print $html "<h2 id=\"targets\">Targets:</h2>\n";
+getHier($html,$targetObj,"/sys");
+print $html "<ul>\n";
+
+print $html "<h2 id=\"connections\">Connections by Bus Type:</h2>\n";
+foreach my $bustype (sort(keys(%summary))) {
+	print $html "<li><a href=\"#$bustype\">$bustype</a>\n";
+}
+print $html "</ul><hr>";
+
+foreach my $bustype (sort(keys(%summary))) {
+	print $html "<hr><p><h3 id=\"$bustype\">$bustype</h3>\n";
+	
+	foreach my $parent_chip (sort(keys(%{$summary{$bustype}}))) {
+		print $html "<p>\n";
+		my $table = new HTML::Table(-cols=>4,-rules=>'all',-border=>3,-width=>'1400',-spacing=>0,-padding=>10);
+		
+		my $parent_ptr = $summary{$bustype}{$parent_chip};
+		my $chip = $parent_chip." (".$parent_ptr->{'TYPE'}.")";
+		$table->addRow("<b>$chip</b>");
+		$table->setCellColSpan($table->getTableRows(),1,4);
+		foreach my $source (sort(keys(%{$parent_ptr->{'SOURCE'}}))) {
+			my $source_ptr = $parent_ptr->{'SOURCE'}->{$source}{'DEST'};
+
+			foreach my $dest (sort(keys(%{$source_ptr}))) {
+				my $source_attr = $source_ptr->{$dest}{'ATTRIBUTES'};
+				my $attrs = "<ul>";
+				foreach my $attr (sort(keys(%{$source_attr}))) {
+					$attrs = $attrs."<li>".$attr."=".$source_attr->{$attr}."\n";
+				}
+				$attrs = $attrs."</ul>";
+				$table->addRow($source,$dest,$attrs);
+			}						
+		}
+		print $html $table->getTable();
+	}
+	
+}
+print $html "</body>\n";
+close $html;
+
+print "HTML File Written: $outfile\n";
+
+sub getHier {
+	my $file = shift;
+	my $targetObj = shift;
+	my $target = shift;
+	my $level = shift;
+	$level++;
+
+	my $cls = $targetObj->getAttribute($target,"CLASS");	
+	if ($cls eq "UNIT" || $cls eq "") { return; }
+	my @parts = split(/\//,$target);
+	my $inst = $parts[scalar(@parts)-1];
+	my $tg = "";
+	my $etg = "";
+	if ($cls eq "CONNECTOR") { $tg="<i>"; $etg = "</i>"}
+	if ($cls eq "CARD") { $tg="<b>"; $etg = "</b>"}
+	my $type = $targetObj->getTargetType($target);
+	print $file "<li>$tg$type : $inst$etg</li>\n";
+	my $children = $targetObj->getTargetChildren($target);
+	if (defined $children) {
+		print $file "<ul>\n";
+		foreach my $c (@{$children}) {
+			getHier($file,$targetObj,$c,$level);
+		}
+		print $file "</ul>\n";
+	}
+}
+
+sub getPinName { 
+	my $targetObj = shift;
+	my $target = shift;
+	
+	my @line = split(/\./,$targetObj->getInstanceName($target));
+	my $i  = scalar(@line);
+	return $line[$i-1];
+}
+sub findChipTarget {
+	my $targetObj = shift;
+	my $target = shift;
+
+	my $cls = "";
+	my $parent = "";
+	while ($cls ne "CHIP" && defined $parent && $cls ne "LED" && $cls ne "CARD") {
+		$parent = $targetObj->getTargetParent($target);
+		if (defined $parent && $parent ne "") {
+			if ($targetObj->isBadAttribute($parent,"CLASS")) {
+				$cls = $targetObj->getAttribute( $parent, "MRW_TYPE" );
+			} else { 
+				$cls = $targetObj->getAttribute( $parent, "CLASS" );
+			}
+		}
+		$target = $parent;
+	}
+	return $parent;
+}
\ No newline at end of file
diff --git a/src/com/ibm/ServerWizard2/Launcher.java b/src/com/ibm/ServerWizard2/Launcher.java
index 6acffd3..4f15e99 100644
--- a/src/com/ibm/ServerWizard2/Launcher.java
+++ b/src/com/ibm/ServerWizard2/Launcher.java
@@ -16,6 +16,11 @@ import java.util.zip.ZipFile;
 
 import javax.swing.JOptionPane;
 
+import com.ibm.ServerWizard2.utility.GithubFile;
+import com.ibm.ServerWizard2.utility.MyLogFormatter;
+import com.ibm.ServerWizard2.view.DialogHandler;
+import com.ibm.ServerWizard2.view.MessagePopup;
+
 public class Launcher {
 	public final static String JAR_NAME = "serverwiz2";
 	public final static String ZIP_NAME = "serverwiz2_lib.zip";
diff --git a/src/com/ibm/ServerWizard2/LibraryFile.java b/src/com/ibm/ServerWizard2/LibraryFile.java
deleted file mode 100644
index 5d64f8b..0000000
--- a/src/com/ibm/ServerWizard2/LibraryFile.java
+++ /dev/null
@@ -1,45 +0,0 @@
-package com.ibm.ServerWizard2;
-
-import java.io.File;
-
-public class LibraryFile {
-	private File localFile;
-	private String filepath;
-	private FileTypes type;
-	private long localFileSize=0;
-
-	public enum FileTypes {
-		ATTRIBUTE_TYPE_XML, TARGET_TYPE_XML, TARGET_INSTANCES_XML, SCRIPT
-	}
-
-	public LibraryFile(String filepath,FileTypes type) {
-		this.filepath=filepath;
-		this.type=type;
-		this.init();
-	}
-	public static String getWorkingDir() {
-		// gets working directory whether running as jar or from eclipse
-		File f = new File("").getAbsoluteFile();
-		String workingDir = f.getAbsolutePath() + System.getProperty("file.separator");
-		return workingDir;
-	}
-	public boolean localFileExists() {
-		return this.localFileSize > 0;
-	}
-	public void init() {
-		String workingDir=LibraryFile.getWorkingDir();
-		this.localFile = new File(workingDir+filepath);
-		if (this.localFile.exists()) {
-			localFileSize = this.localFile.length();
-		}
-	}
-	public String getPath() {
-		return localFile.getPath();
-	}
-	public String getFilename() {
-		return localFile.getName();
-	}
-	public FileTypes getType() {
-		return type;
-	}
-}
diff --git a/src/com/ibm/ServerWizard2/LibraryManager.java b/src/com/ibm/ServerWizard2/LibraryManager.java
deleted file mode 100644
index fae64c9..0000000
--- a/src/com/ibm/ServerWizard2/LibraryManager.java
+++ /dev/null
@@ -1,30 +0,0 @@
-package com.ibm.ServerWizard2;
-
-import com.ibm.ServerWizard2.LibraryFile.FileTypes;
-
-
-public class LibraryManager {
-	LibraryFile files[] = new LibraryFile[5];
-
-	public void loadModel(SystemModel model) throws Exception {
-		for (LibraryFile libFile : files) {
-			if (libFile.getType() == LibraryFile.FileTypes.ATTRIBUTE_TYPE_XML) {
-				model.loadAttributes(new XmlHandler(), libFile.getPath());
-			}
-			if (libFile.getType() == LibraryFile.FileTypes.TARGET_TYPE_XML) {
-				model.loadTargetTypes(new XmlHandler(), libFile.getPath());
-			}
-			if (libFile.getType() == LibraryFile.FileTypes.TARGET_INSTANCES_XML) {
-				model.loadTargetInstances(libFile.getPath());
-			}
-		}
-	}
-
-	public void init() {
-		files[0] = new LibraryFile("xml/attribute_types.xml",FileTypes.ATTRIBUTE_TYPE_XML);
-		files[1] = new LibraryFile("xml/attribute_types_hb.xml",FileTypes.ATTRIBUTE_TYPE_XML);
-		files[2] = new LibraryFile("xml/attribute_types_mrw.xml",FileTypes.ATTRIBUTE_TYPE_XML);
-		files[3] = new LibraryFile("xml/target_types_mrw.xml",FileTypes.TARGET_TYPE_XML);
-		files[4] = new LibraryFile("xml/target_instances_v3.xml",FileTypes.TARGET_INSTANCES_XML);
-	}
-}
diff --git a/src/com/ibm/ServerWizard2/SdrRecord.java b/src/com/ibm/ServerWizard2/SdrRecord.java
deleted file mode 100644
index bb593d8..0000000
--- a/src/com/ibm/ServerWizard2/SdrRecord.java
+++ /dev/null
@@ -1,64 +0,0 @@
-package com.ibm.ServerWizard2;
-
-import org.w3c.dom.Element;
-
-public class SdrRecord {
-	private String name = "";
-	private String sdrName = "";
-	private Integer sensorId = 0x00;
-	private Integer entityId = 0x00;
-	private Integer entityInstance = 0x00;
-	private Integer sensorType = 0x00;
-	private Target target = null;
-	private String entityName = "";
-
-	public String getAttributeValue() {
-		return String.format("0x%02X%02X,0x%02X", sensorType,entityId,sensorId);
-	}
-	public void setTarget(Target target) {
-		this.target=target;
-	}
-	public Target getTarget() {
-		return target;
-	}
-	public String getName() {
-		return name;
-	}
-	public String getSdrName() {
-		return sdrName;
-	}
-	public Integer getSensorId() {
-		return sensorId;
-	}
-	public Integer getSensorType() {
-		return sensorType;
-	}
-
-	public Integer getEntityId() {
-		return entityId;
-	}
-	public Integer getEntityInstance() {
-		return entityInstance;
-	}
-	public void setEntityName(String entityName) {
-		this.entityName=entityName;
-	}
-	public String getEntityName() {
-		return this.entityName;
-	}
-
-	public void readXML(Element t) throws Exception {
-		name = SystemModel.getElement(t, "name");
-		try {
-			sensorId = Integer.decode(SystemModel.getElement(t, "sensor_id"));
-			entityId = Integer.decode(SystemModel.getElement(t, "entity_id"));
-			sensorType = Integer.decode(SystemModel.getElement(t, "sensor_type"));
-			entityInstance = Integer.decode(SystemModel.getElement(t, "entity_instance"));
-		} catch (Exception e) {
-			throw new Exception("Invalid SDR entry for: "+name);
-		}
-	}
-	public String toString() {
-		return String.format("%30s (%3d) Entity Id=%3d; Entity Inst=%3d; Sensor Type=%3d",name,sensorId,entityId,entityInstance,sensorType);
-	}
-}
diff --git a/src/com/ibm/ServerWizard2/ServerWizard2.java b/src/com/ibm/ServerWizard2/ServerWizard2.java
index 3119483..ff4ee02 100644
--- a/src/com/ibm/ServerWizard2/ServerWizard2.java
+++ b/src/com/ibm/ServerWizard2/ServerWizard2.java
@@ -2,21 +2,33 @@ package com.ibm.ServerWizard2;
 import java.util.logging.ConsoleHandler;
 import java.util.logging.Level;
 import java.util.logging.Logger;
+
+import com.ibm.ServerWizard2.controller.TargetWizardController;
+import com.ibm.ServerWizard2.model.SystemModel;
+import com.ibm.ServerWizard2.utility.MyLogFormatter;
+import com.ibm.ServerWizard2.view.MainDialog;
 public class ServerWizard2 {
 
 	/**
 	 * @param args
 	 */
 	public final static Logger LOGGER = Logger.getLogger(ServerWizard2.class.getName());
-	public static void printUsage() {
+	public final static int VERSION_MAJOR = 2;
+	public final static int VERSION_MINOR = 1;
+
+	public static String getVersionString() {
+		return VERSION_MAJOR+"."+VERSION_MINOR;
+	}
+	private static void printUsage() {
 		System.out.println("Usage:");
 		System.out.println("   -i [xml filename]");
 		System.out.println("   -v [update to version]");
+		System.out.println("   -f = run xml clean up");
 		System.out.println("   -h = print this usage");
 	}
 	public static void main(String[] args) {
 		String inputFilename="";
-		String version="";
+		Boolean cleanupMode = false;
 		for (int i=0;i<args.length;i++) {
 			if (args[i].equals("-i")) {
 				if (i==args.length-1) {
@@ -30,12 +42,14 @@ public class ServerWizard2 {
 					printUsage();
 					System.exit(3);
 				}
-				version=args[i+1];
 			}
 			if (args[i].equals("-h")) {
 				printUsage();
 				System.exit(0);
 			}
+			if (args[i].equals("-f")) {
+				cleanupMode = true;
+			}
 		}
 		LOGGER.setLevel(Level.CONFIG);
 		LOGGER.setUseParentHandlers(false);
@@ -44,30 +58,19 @@ public class ServerWizard2 {
 		LOGGER.addHandler(logConsole);
 		MyLogFormatter formatter = new MyLogFormatter();
 		logConsole.setFormatter(formatter);
-		/*
-		try {
-			FileHandler logFile = new FileHandler("serverwiz2.%u.%g.log",20000,2,true);
-			LOGGER.addHandler(logFile);
-			logFile.setFormatter(formatter);
-			logFile.setLevel(Level.CONFIG);
-		} catch (IOException e) {
-			System.err.println("Unable to create logfile");
-			System.exit(3);
-		}
-		*/
+
 		LOGGER.config("======================================================================");
-		LOGGER.config("ServerWiz2 Starting...");
+		LOGGER.config("ServerWiz2 Version "+getVersionString()+" Starting...");
 		TargetWizardController tc = new TargetWizardController();
 		SystemModel systemModel = new SystemModel();
 	    MainDialog view = new MainDialog(null);
 	    tc.setView(view);
 	    tc.setModel(systemModel);
-	    systemModel.addPropertyChangeListener(tc);
 	    view.setController(tc);
+	    systemModel.cleanupMode = cleanupMode;
 		if (!inputFilename.isEmpty()) {
 			view.mrwFilename=inputFilename;
 		}
 	    view.open();
-	    //d.dispose();
 	}
 }
diff --git a/src/com/ibm/ServerWizard2/SystemModel.java b/src/com/ibm/ServerWizard2/SystemModel.java
deleted file mode 100644
index 4e801cc..0000000
--- a/src/com/ibm/ServerWizard2/SystemModel.java
+++ /dev/null
@@ -1,505 +0,0 @@
-package com.ibm.ServerWizard2;
-
-import java.beans.PropertyChangeListener;
-import java.beans.PropertyChangeSupport;
-import java.io.BufferedWriter;
-import java.io.FileWriter;
-import java.io.IOException;
-import java.io.Writer;
-import java.util.Collection;
-import java.util.Collections;
-import java.util.HashMap;
-import java.util.Map;
-import java.util.TreeMap;
-import java.util.Vector;
-
-import javax.xml.parsers.DocumentBuilder;
-import javax.xml.parsers.DocumentBuilderFactory;
-import javax.xml.parsers.ParserConfigurationException;
-
-import org.w3c.dom.Document;
-import org.w3c.dom.Element;
-import org.w3c.dom.Node;
-import org.w3c.dom.NodeList;
-import org.xml.sax.SAXException;
-import org.xml.sax.helpers.DefaultHandler;
-
-public class SystemModel {
-	// public Target rootTarget;
-	public Vector<Target> rootTargets = new Vector<Target>();
-	private DocumentBuilder builder;
-
-	// From target instances
-	private HashMap<String, Target> targetInstances = new HashMap<String, Target>();
-	private Vector<Target> targetUnitList = new Vector<Target>();
-
-	// From target types
-	private TreeMap<String, Target> targetModels = new TreeMap<String, Target>();
-	public HashMap<String, Vector<Target>> childTargetTypes = new HashMap<String, Vector<Target>>();
-
-	// From attribute types
-	public TreeMap<String, Enumerator> enumerations = new TreeMap<String, Enumerator>();
-	public HashMap<String, Attribute> attributes = new HashMap<String, Attribute>();
-
-	// List of targets in current system
-	private Vector<Target> targetList = new Vector<Target>();
-	private HashMap<String, Target> targetLookup = new HashMap<String, Target>();
-
-	private Vector<Target> busTypes = new Vector<Target>();
-	private PropertyChangeSupport changes = new PropertyChangeSupport(this);
-
-	private TreeMap<String, TreeMap<String, Field>> globalSettings = new TreeMap<String, TreeMap<String, Field>>();
-
-	public String logData;
-
-	public void addPropertyChangeListener(PropertyChangeListener l) {
-		changes.addPropertyChangeListener(l);
-	}
-
-	public Vector<Target> getBusTypes() {
-		return busTypes;
-	}
-
-	public Target getTarget(String t) {
-		return targetLookup.get(t);
-	}
-
-	public HashMap<String, Target> getTargetLookup() {
-		return this.targetLookup;
-	}
-
-	public Vector<Target> getTargetList() {
-		return this.targetList;
-	}
-
-	public Collection<Target> getTargetInstances() {
-		return targetInstances.values();
-	}
-
-	public Vector<Target> getConnectionCapableTargets() {
-		Vector<Target> cards = new Vector<Target>();
-		for (Target target : targetList) {
-			if (target.isCard() || target.isSystem() || target.isNode()) {
-				//if (!target.isLibraryTarget) {
-					cards.add(target);
-				//}
-			}
-		}
-		return cards;
-	}
-
-	public void initBusses(Target target) {
-		target.initBusses(busTypes);
-	}
-
-	public Vector<Target> getChildTargetTypes(String targetType) {
-		if (targetType.equals("")) {
-			Vector<Target> a = new Vector<Target>();
-			for (Target t : this.targetModels.values()) {
-				a.add(t);
-			}
-			return a;
-		}
-		if (childTargetTypes.get(targetType) != null) {
-			Collections.sort(childTargetTypes.get(targetType));
-		}
-		return childTargetTypes.get(targetType);
-	}
-
-	public Integer getEnumValue(String enumerator, String value) {
-		Enumerator e = enumerations.get(enumerator);
-		return e.getEnumInt(value);
-	}
-
-	public String getEnumValueStr(String enumerator, String value) {
-		Enumerator e = enumerations.get(enumerator);
-		return e.getEnumStr(value);
-	}
-
-	public static String getElement(Element a, String e) {
-		Node n = a.getElementsByTagName(e).item(0);
-		if (n != null) {
-			Node cn = n.getChildNodes().item(0);
-			if (cn == null) {
-				return "";
-			}
-			return n.getChildNodes().item(0).getNodeValue();
-		}
-		return "";
-	}
-
-	public static Boolean isElementDefined(Element a, String e) {
-		Node n = a.getElementsByTagName(e).item(0);
-		if (n != null) {
-			Node cn = n.getChildNodes().item(0);
-			if (cn == null) {
-				return true;
-			}
-			return true;
-		}
-		return false;
-	}
-
-	public TreeMap<String, Target> getTargetModels() {
-		return targetModels;
-	}
-
-	public Target getTargetModel(String t) {
-		return targetModels.get(t);
-	}
-
-	public void deleteAllInstances() {
-		this.targetList.clear();
-		this.targetLookup.clear();
-		this.rootTargets.clear();
-		this.globalSettings.clear();
-	}
-
-	public void deleteTarget(Target deleteTarget) {
-		targetList.remove(deleteTarget);
-		for (Target t : targetList) {
-			t.removeChildren(deleteTarget.getName());
-		}
-		this.targetLookup.remove(deleteTarget.getName());
-		changes.firePropertyChange("DELETE_TARGET", "", "");
-	}
-
-	// Reads a previously saved MRW
-	public void readXML(String filename) throws Exception {
-		DocumentBuilderFactory factory = DocumentBuilderFactory.newInstance();
-		// delete all existing instances
-		this.deleteAllInstances();
-		this.addUnitInstances();
-		DocumentBuilder builder = factory.newDocumentBuilder();
-		builder.setErrorHandler(new XmlHandler());
-		Document document = builder.parse(filename);
-
-		NodeList settingList = document.getElementsByTagName("globalSetting");
-		for (int i = 0; i < settingList.getLength(); ++i) {
-			Element t = (Element) settingList.item(i);
-			this.readGlobalSettings(t);
-		}
-
-		NodeList targetInstanceList = document.getElementsByTagName("targetInstance");
-		for (int i = 0; i < targetInstanceList.getLength(); ++i) {
-			Element t = (Element) targetInstanceList.item(i);
-			String type = SystemModel.getElement(t, "type");
-			if (type.length() > 0) {
-				Target targetModel = this.getTargetModel(type);
-				if (targetModel == null) {
-					ServerWizard2.LOGGER.severe("Invalid target type: " + type);
-					throw new Exception("Invalid target type: " + type);
-				} else {
-					Target target = new Target(targetModel);
-					target.initBusses(busTypes);
-					target.readInstanceXML(t, targetModels);
-					//if (this.targetLookup.containsKey(target.getName())) {
-						// ServerWizard2.LOGGER.warning("Duplicate Target: "+target.getName());
-					//} else {
-						this.targetLookup.put(target.getName(), target);
-						this.targetList.add(target);
-					//}
-					if (target.getAttribute("CLASS").equals("SYS")) {
-						this.rootTargets.add(target);
-					}
-					///////
-					// Check to see if new children defined in model
-					Target targetInst = this.targetInstances.get(target.getType());
-					if (targetInst != null) {
-						HashMap <String,Boolean> childTest = new HashMap<String,Boolean>();
-						for (String child : target.getAllChildren()) {
-							childTest.put(child, true);
-						}
-						for (String child : targetInst.getChildren()) {
-							if (childTest.get(child)==null) {
-								target.addChild(child, false);
-								if (!this.targetLookup.containsKey(child)) {
-									this.targetLookup.put(child, target);
-									this.targetList.add(target);
-								}
-								childTest.put(child, true);
-							}
-						}
-						for (String child : targetInst.getHiddenChildren()) {
-							if (childTest.get(child)==null) {
-								target.addChild(child, true);
-								if (!this.targetLookup.containsKey(child)) {
-									this.targetLookup.put(child,target);
-									this.targetList.add(target);
-								}
-								childTest.put(child, true);
-							}
-						}
-					}
-				}
-			} else {
-				throw new Exception("Empty Target Type");
-			}
-		}
-	}
-
-	public void writeEnumeration(Writer out) throws Exception {
-		for (String enumeration : enumerations.keySet()) {
-			Enumerator e = enumerations.get(enumeration);
-			out.write("<enumerationType>\n");
-			out.write("\t<id>" + enumeration + "</id>\n");
-			for (Map.Entry<String, String> entry : e.enumValues.entrySet()) {
-				out.write("\t\t<enumerator>\n");
-				out.write("\t\t<name>" + entry.getKey() + "</name>\n");
-				out.write("\t\t<value>" + entry.getValue() + "</value>\n");
-				out.write("\t\t</enumerator>\n");
-			}
-			out.write("</enumerationType>\n");
-		}
-	}
-
-	public Field setGlobalSetting(String path, String attribute, String value) {
-		TreeMap<String, Field> s = globalSettings.get(path);
-		if (s == null) {
-			s = new TreeMap<String, Field>();
-			globalSettings.put(path, s);
-		}
-		Field f = s.get(attribute);
-		if (f == null) {
-			f = new Field();
-			f.attributeName = attribute;
-			s.put(attribute, f);
-		}
-		f.value = value;
-		return f;
-	}
-
-	public Boolean isGlobalSetting(String path, String attribute) {
-		TreeMap<String, Field> s = globalSettings.get(path);
-		if (s == null) {
-			return false;
-		}
-		Field f=s.get(attribute);
-		if (f==null) {
-			return false;
-		}
-		return true;
-	}
-
-	public Field getGlobalSetting(String path, String attribute) {
-		TreeMap<String, Field> s = globalSettings.get(path);
-		if (s == null) {
-			Field f=this.setGlobalSetting(path, attribute, "");
-			return f;
-		}
-		Field f=s.get(attribute);
-		if (f==null) {
-			f=this.setGlobalSetting(path, attribute, "");
-		}
-		return f;
-	}
-
-	public TreeMap<String, Field> getGlobalSettings(String path) {
-		TreeMap<String, Field> s = globalSettings.get(path);
-		return s;
-	}
-
-	public void writeGlobalSettings(Writer out) throws Exception {
-		for (Map.Entry<String, TreeMap<String, Field>> entry : this.globalSettings.entrySet()) {
-			out.write("<globalSetting>\n");
-			out.write("\t<id>" + entry.getKey() + "</id>\n");
-			for (Map.Entry<String, Field> setting : entry.getValue().entrySet()) {
-				out.write("\t<property>\n");
-				out.write("\t<id>" + setting.getKey() + "</id>\n");
-				out.write("\t<value>" + setting.getValue().value + "</value>\n");
-				out.write("\t</property>\n");
-			}
-			out.write("</globalSetting>\n");
-		}
-	}
-
-	public void readGlobalSettings(Element setting) {
-		String targetId = SystemModel.getElement(setting, "id");
-		NodeList propertyList = setting.getElementsByTagName("property");
-		for (int i = 0; i < propertyList.getLength(); ++i) {
-			Element t = (Element) propertyList.item(i);
-			String property = SystemModel.getElement(t, "id");
-			String value = SystemModel.getElement(t, "value");
-			this.setGlobalSetting(targetId, property, value);
-		}
-	}
-
-	// Writes MRW to file
-	public void writeXML(String filename) throws Exception {
-		Writer out = new BufferedWriter(new FileWriter(filename));
-		out.write("<targetInstances>\n");
-		this.writeEnumeration(out);
-		this.writeGlobalSettings(out);
-		HashMap<String, Boolean> targetWritten = new HashMap<String, Boolean>();
-		for (Target target : targetList) {
-			target.writeInstanceXML(out, targetLookup, targetWritten);
-		}
-		out.write("</targetInstances>\n");
-		out.close();
-	}
-
-	public void addTarget(Target parentTarget, Target newTarget) throws Exception {
-		if (parentTarget == null) {
-			this.rootTargets.add(newTarget);
-		} else {
-			parentTarget.addChild(newTarget.getName(), false);
-		}
-		this.updateTargetList(newTarget);
-		initBusses(newTarget);
-		changes.firePropertyChange("ADD_TARGET", "", "");
-	}
-
-	public Target getTargetInstance(String type) {
-		return targetInstances.get(type);
-	}
-
-	// Add target to target database.
-	// only contains targets that user has added
-	// not library targets
-	public void updateTargetList(Target target) throws Exception {
-		String id = target.getName();
-		if (!this.targetLookup.containsKey(id)) {
-			this.targetLookup.put(id, target);
-			this.targetList.add(target);
-		} else {
-			String msg="Duplicate Target: "+target.getName();
-			ServerWizard2.LOGGER.warning(msg);
-			throw new Exception(msg);
-		}
-	}
-
-	public void addParentAttributes(Target childTarget, Target t) {
-		if (t == null) {
-			return;
-		}
-		Target parent = targetModels.get(t.parent);
-		if (parent == null) {
-			return;
-		}
-		childTarget.copyAttributesFromParent(parent);
-		addParentAttributes(childTarget, parent);
-	}
-
-	public void loadTargetTypes(DefaultHandler errorHandler, String fileName) throws SAXException,
-			IOException, ParserConfigurationException {
-		ServerWizard2.LOGGER.info("Loading Target Types: " + fileName);
-
-		DocumentBuilderFactory factory = DocumentBuilderFactory.newInstance();
-		builder = factory.newDocumentBuilder();
-		builder.setErrorHandler(errorHandler);
-
-		Document document = builder.parse(fileName);
-		NodeList targetList = document.getElementsByTagName("targetType");
-		for (int i = 0; i < targetList.getLength(); ++i) {
-			Element t = (Element) targetList.item(i);
-			Target target = new Target();
-			target.readModelXML(t, attributes);
-			targetModels.put(target.getType(), target);
-			Vector<String> parentTypes = target.getParentType();
-			for (int j = 0; j < parentTypes.size(); j++) {
-				String parentType = parentTypes.get(j);
-				Vector<Target> childTypes = childTargetTypes.get(parentType);
-				if (childTypes == null) {
-					childTypes = new Vector<Target>();
-					childTargetTypes.put(parentType, childTypes);
-				}
-				childTypes.add(target);
-			}
-		}
-		for (Map.Entry<String, Target> entry : targetModels.entrySet()) {
-			Target target = entry.getValue();
-
-			// add inherited attributes
-			addParentAttributes(target, target);
-			if (target.getAttribute("CLASS").equals("BUS")) {
-				busTypes.add(target);
-			}
-		}
-	}
-
-	public void loadAttributes(DefaultHandler errorHandler, String fileName) throws SAXException,
-			IOException, ParserConfigurationException {
-		ServerWizard2.LOGGER.info("Loading Attributes: " + fileName);
-
-		DocumentBuilderFactory factory = DocumentBuilderFactory.newInstance();
-		builder = factory.newDocumentBuilder();
-		builder.setErrorHandler(errorHandler);
-
-		Document document = builder.parse(fileName);
-		NodeList enumList = document.getElementsByTagName("enumerationType");
-		for (int i = 0; i < enumList.getLength(); ++i) {
-			Element t = (Element) enumList.item(i);
-			Enumerator en = new Enumerator();
-			en.readXML(t);
-			enumerations.put(en.id, en);
-		}
-		NodeList attrList = document.getElementsByTagName("attribute");
-		for (int i = 0; i < attrList.getLength(); ++i) {
-			Element t = (Element) attrList.item(i);
-			Attribute a = new Attribute();
-			a.readModelXML(t);
-			attributes.put(a.name, a);
-
-			if (a.getValue().getType().equals("enumeration")) {
-				a.getValue().setEnumerator(enumerations.get(a.name));
-			}
-		}
-	}
-
-	public void loadTargetInstances(String filename) throws Exception {
-		ServerWizard2.LOGGER.info("Loading Instances: " + filename);
-		DocumentBuilderFactory factory = DocumentBuilderFactory.newInstance();
-		DocumentBuilder builder = factory.newDocumentBuilder();
-		builder.setErrorHandler(new XmlHandler());
-		Document document = builder.parse(filename);
-		NodeList targetInstanceList = document.getElementsByTagName("targetInstance");
-		for (int i = 0; i < targetInstanceList.getLength(); ++i) {
-			Element t = (Element) targetInstanceList.item(i);
-			String type = SystemModel.getElement(t, "type");
-			if (type.length() > 0) {
-				Target targetModel = this.getTargetModel(type);
-				if (targetModel == null) {
-					ServerWizard2.LOGGER.severe("Invalid target type: " + type);
-					throw new Exception("Invalid target type: " + type);
-				} else {
-					Target target = new Target(targetModel);
-					target.readInstanceXML(t, targetModels);
-					if (target.instanceModel) {
-						targetInstances.put(type, target);
-						target.isLibraryTarget = true;
-					} else {
-						// this.targetLookup.put(target.getName(), target);
-						this.targetUnitList.add(target);
-						target.isLibraryTarget = true;
-					}
-				}
-			} else {
-				throw new Exception("Empty Target Type");
-			}
-		}
-	}
-
-	public void addUnitInstances() {
-		for (Target target : this.targetUnitList) {
-			this.targetLookup.put(target.getName(), target);
-		}
-	}
-
-	public void updateTargetPosition(Target target, Target parentTarget, int position) {
-		if (position > 0) {
-			target.setPosition(position);
-			return;
-		}
-		int p = -1;
-		// set target position to +1 of any target found of same type
-		for (Target t : targetList) {
-			if (t.getType().equals(target.getType())) {
-				if (t.getPosition() >= p) {
-					p = t.getPosition();
-				}
-			}
-		}
-		target.setPosition(p + 1);
-		target.setSpecialAttributes();
-	}
-}
diff --git a/src/com/ibm/ServerWizard2/TargetWizardController.java b/src/com/ibm/ServerWizard2/TargetWizardController.java
deleted file mode 100644
index 0a6f0a1..0000000
--- a/src/com/ibm/ServerWizard2/TargetWizardController.java
+++ /dev/null
@@ -1,264 +0,0 @@
-package com.ibm.ServerWizard2;
-
-import java.beans.PropertyChangeEvent;
-import java.beans.PropertyChangeListener;
-import java.io.File;
-import java.io.IOException;
-import java.io.InputStreamReader;
-import java.io.StringWriter;
-import java.nio.file.Files;
-import java.nio.file.StandardCopyOption;
-import java.util.HashMap;
-import java.util.TreeMap;
-import java.util.Vector;
-
-import javax.xml.parsers.DocumentBuilder;
-import javax.xml.parsers.DocumentBuilderFactory;
-
-import org.eclipse.jface.dialogs.MessageDialog;
-import org.eclipse.swt.widgets.TreeItem;
-import org.w3c.dom.Document;
-import org.w3c.dom.Element;
-import org.w3c.dom.NodeList;
-
-public class TargetWizardController implements PropertyChangeListener {
-	SystemModel model;
-	MainDialog view;
-	LibraryManager xmlLib = new LibraryManager();
-	private final String PROCESSING_SCRIPT="scripts/processMrw.pl";
-
-	public TargetWizardController() {
-	}
-
-	public void init() {
-		xmlLib.init();
-		try {
-			//xmlLib.update(version);
-			xmlLib.loadModel(model);
-			this.initModel();
-		} catch (Exception e) {
-			ServerWizard2.LOGGER.severe(e.toString());
-			MessageDialog.openError(null, "Error",e.toString());
-			e.printStackTrace();
-			System.exit(4);
-		}
-	}
-	public void initModel() throws Exception {
-		model.deleteAllInstances();
-		model.addUnitInstances();
-
-		String parentTargetName = "sys-sys-power8";
-		Target parentTarget = model.getTargetModels().get(parentTargetName);
-		if (parentTarget == null) {
-			throw new Exception("Parent model " + parentTargetName
-					+ " is not valid");
-		}
-		// Create root instance
-		Target sys = new Target(parentTarget);
-		sys.setPosition(0);
-		this.addTargetInstance(sys, null, null, "");
-		//model.addTarget(null, sys);
-	}
-
-	public Target getTargetModel(String type) {
-		return model.getTargetModel(type);
-	}
-	public void setView(MainDialog view) {
-		this.view = view;
-	}
-
-	public void setModel(SystemModel model) {
-		this.model = model;
-	}
-
-	public Vector<String> getEnums(String e) {
-		if (model.enumerations.get(e)==null) {
-			ServerWizard2.LOGGER.severe("Enum not found: "+e);
-			return null;
-		}
-		return model.enumerations.get(e).enumList;
-	}
-	public Boolean isEnum(String e) {
-		if (model.enumerations.get(e)==null) {
-			return false;
-		}
-		return true;
-	}
-
-
-	public void deleteTarget(Target target) {
-		//model.deleteTarget(target, model.rootTarget);
-		model.deleteTarget(target);
-	}
-
-	public void addTargetInstance(Target targetModel, Target parentTarget,
-			TreeItem parentItem,String nameOverride) {
-
-		Target targetInstance;
-		Target instanceCheck = model.getTargetInstance(targetModel.getType());
-		if (instanceCheck!=null) {
-			//target instance found of this model type
-			targetInstance = new Target(instanceCheck);
-			targetInstance.copyChildren(instanceCheck);
-		} else {
-			targetInstance = new Target(targetModel);
-		}
-		targetInstance.setName(nameOverride);
-		model.updateTargetPosition(targetInstance, parentTarget, -1);
-		try {
-			model.addTarget(parentTarget, targetInstance);
-			view.updateInstanceTree(targetInstance, parentItem);
-		} catch (Exception e) {
-			MessageDialog.openError(null, "Add Target Error", e.getMessage());
-		}
-	}
-	public Target copyTargetInstance(Target target, Target parentTarget,Boolean incrementPosition) {
-		Target newTarget = new Target(target);
-		if (incrementPosition) {
-			newTarget.setPosition(newTarget.getPosition()+1);
-			newTarget.setSpecialAttributes();
-		}
-		try {
-			model.addTarget(parentTarget, newTarget);
-			newTarget.copyChildren(target);
-		} catch (Exception e) {
-			MessageDialog.openError(null, "Add Target Error", e.getMessage());
-			newTarget=null;
-		}
-		return newTarget;
-	}
-	public void deleteConnection(Target target,Target busTarget,Connection conn) {
-		target.deleteConnection(busTarget,conn);
-	}
-	public Vector<Target> getRootTargets() {
-		return model.rootTargets;
-	}
-
-	public void writeXML(String filename) {
-		try {
-			String tmpFilename=filename+".tmp";
-			model.writeXML(tmpFilename);
-			File from = new File(tmpFilename);
-			File to = new File(filename);
-			Files.copy( from.toPath(), to.toPath(),StandardCopyOption.REPLACE_EXISTING );
-			Files.delete(from.toPath());
-			ServerWizard2.LOGGER.info(filename + " Saved");
-		} catch (Exception exc) {
-			MessageDialog.openError(null, "Error", exc.getMessage());
-			exc.printStackTrace();
-		}
-	}
-
-	public void readXML(String filename) {
-		try {
-			model.readXML(filename);
-		} catch (Exception e) {
-			MessageDialog.openError(null, "Error", e.getMessage());
-			e.printStackTrace();
-		}
-	}
-	public Vector<Target> getConnectionCapableTargets() {
-		return model.getConnectionCapableTargets();
-	}
-	public void setGlobalSetting(String path,String attribute,String value) {
-		model.setGlobalSetting(path, attribute, value);
-	}
-	public Field getGlobalSetting(String path,String attribute) {
-		return model.getGlobalSetting(path, attribute);
-	}
-	public TreeMap<String,Field> getGlobalSettings(String path) {
-		return model.getGlobalSettings(path);
-	}
-	public Vector<Target> getChildTargets(Target target) {
-		//if (target.instanceModel) {
-		//	return model.getChildTargetTypes("");
-		//}
-		return model.getChildTargetTypes(target.getType());
-	}
-
-	public void hideBusses(Target target) {
-		target.hideBusses(model.getTargetLookup());
-	}
-	public Vector<Target> getVisibleChildren(Target target,boolean showHidden) {
-		Vector<Target> children = new Vector<Target>();
-		for (String c : target.getChildren()) {
-			Target t = model.getTarget(c);
-			if (t==null) {
-				String msg="Invalid Child target id: "+c;
-				ServerWizard2.LOGGER.severe(msg);
-			}
-			children.add(t);
-		}
-		if (showHidden) {
-			for (String c : target.getHiddenChildren()) {
-				Target t = model.getTarget(c);
-				if (t==null) {
-					String msg="Invalid Child target id: "+c;
-					ServerWizard2.LOGGER.severe(msg);
-				}
-				children.add(t);
-			}
-		}
-		return children;
-	}
-
-	public void initBusses(Target target) {
-		model.initBusses(target);
-	}
-	public Vector<Target> getBusTypes() {
-		return model.getBusTypes();
-	}
-	public void runChecks(String filename) {
-		String commandLine[] = {
-				"perl",
-				"-I",
-				LibraryFile.getWorkingDir(),
-				LibraryFile.getWorkingDir()+PROCESSING_SCRIPT,
-				"-x",
-				filename,
-				"-f"
-		};
-		String commandLineStr="";
-		for (int i=0;i<commandLine.length;i++) {
-			commandLineStr=commandLineStr+commandLine[i]+" ";
-		}
-		ServerWizard2.LOGGER.info("Running: "+commandLineStr);
-		try {
-			final ProcessBuilder builder = new ProcessBuilder(commandLine).redirectErrorStream(true);
-
-			final Process process = builder.start();
-			final StringWriter writer = new StringWriter();
-
-			new Thread(new Runnable() {
-			public void run() {
-				char[] buffer = new char[1024];
-				int len;
-				InputStreamReader in = new InputStreamReader(process.getInputStream());
-
-				try {
-					while ((len = in.read(buffer)) != -1) {
-					    writer.write(buffer, 0, len);
-					}
-				} catch (IOException e) {
-					// TODO Auto-generated catch block
-					e.printStackTrace();
-				}
-			}
-			}).start();
-
-			final int exitValue = process.waitFor();
-			final String processOutput = writer.toString();
-			ServerWizard2.LOGGER.info(processOutput);
-			ServerWizard2.LOGGER.info("Return Code: "+exitValue);
-			LogViewerDialog dlg = new LogViewerDialog(null);
-			dlg.setData(processOutput);
-			dlg.open();
-		} catch (Exception e){
-			e.printStackTrace();
-		}
-	}
-
-	public void propertyChange(PropertyChangeEvent arg0) {
-		//view.setDirtyState(true);
-	}
-}
\ No newline at end of file
diff --git a/src/com/ibm/ServerWizard2/controller/TargetWizardController.java b/src/com/ibm/ServerWizard2/controller/TargetWizardController.java
new file mode 100644
index 0000000..2302412
--- /dev/null
+++ b/src/com/ibm/ServerWizard2/controller/TargetWizardController.java
@@ -0,0 +1,267 @@
+package com.ibm.ServerWizard2.controller;
+
+import java.io.File;
+import java.io.IOException;
+import java.io.InputStreamReader;
+import java.io.StringWriter;
+import java.nio.file.Files;
+import java.nio.file.StandardCopyOption;
+import java.util.Vector;
+
+import org.eclipse.jface.dialogs.MessageDialog;
+import org.eclipse.swt.widgets.TreeItem;
+
+import com.ibm.ServerWizard2.ServerWizard2;
+import com.ibm.ServerWizard2.model.Connection;
+import com.ibm.ServerWizard2.model.Field;
+import com.ibm.ServerWizard2.model.SystemModel;
+import com.ibm.ServerWizard2.model.Target;
+import com.ibm.ServerWizard2.view.LogViewerDialog;
+import com.ibm.ServerWizard2.view.MainDialog;
+
+public class TargetWizardController {
+	private SystemModel model;
+	private MainDialog view;
+	private Boolean modelCreationMode = false;
+
+	private String PROCESSING_SCRIPT = "scripts/gen_html.pl";
+
+	public TargetWizardController() {
+	}
+
+	public void setModelCreationMode() {
+		this.modelCreationMode = true;
+	}
+	public Boolean getModelCreationMode() {
+		return this.modelCreationMode;
+	}
+
+	public void init() {
+		try {
+			//xmlLib.init();
+			//xmlLib.loadModel(model);
+			model.loadLibrary("xml");
+			this.initModel();
+		} catch (Exception e) {
+			ServerWizard2.LOGGER.severe(e.toString());
+			MessageDialog.openError(null, "Error", e.toString());
+			e.printStackTrace();
+			System.exit(4);
+		}
+	}
+
+	public void initModel() throws Exception {
+		this.modelCreationMode = false;
+		model.deleteAllInstances();
+		model.addUnitInstances();
+	}
+
+	public void deepCopyAttributes(Target t) {
+		t.deepCopyAttributes(model.getUnitTargetModel(), model.getTargetLookup());
+	}
+	public void setView(MainDialog view) {
+		this.view = view;
+	}
+
+	public void setModel(SystemModel model) {
+		this.model = model;
+	}
+
+	public void deleteTarget(Target target) {
+		model.deleteTarget(target);
+	}
+
+	public void addTargetInstance(Target targetModel, Target parentTarget,
+			TreeItem parentItem, String nameOverride) {
+
+		Target targetInstance;
+		Target instanceCheck = model.getTargetInstance(targetModel.getType());
+		if (instanceCheck != null) {
+			// target instance found of this model type
+			targetInstance = new Target(instanceCheck);
+			targetInstance.copyChildren(instanceCheck);
+		} else {
+			targetInstance = new Target(targetModel);
+		}
+		targetInstance.setName(nameOverride);
+		model.updateTargetPosition(targetInstance, parentTarget, -1);
+		try {
+			model.addTarget(parentTarget, targetInstance, modelCreationMode);
+			view.updateInstanceTree(targetInstance, parentItem);
+		} catch (Exception e) {
+			MessageDialog.openError(null, "Add Target Error", e.getMessage());
+		}
+	}
+
+	public Target copyTargetInstance(Target target, Target parentTarget,
+			Boolean incrementPosition) {
+		Target newTarget = new Target(target);
+		if (incrementPosition) {
+			newTarget.setPosition(newTarget.getPosition() + 1);
+			newTarget.setSpecialAttributes();
+		}
+		try {
+			model.addTarget(parentTarget, newTarget, false);
+			newTarget.copyChildren(target);
+		} catch (Exception e) {
+			MessageDialog.openError(null, "Add Target Error", e.getMessage());
+			newTarget = null;
+		}
+		return newTarget;
+	}
+
+	public void deleteConnection(Target target, Target busTarget,
+			Connection conn) {
+		target.deleteConnection(busTarget, conn);
+	}
+
+	public Vector<Target> getRootTargets() {
+		return model.rootTargets;
+	}
+
+	public void writeXML(String filename) {
+		try {
+			String tmpFilename = filename + ".tmp";
+			model.writeXML(tmpFilename, this.modelCreationMode);
+			File from = new File(tmpFilename);
+			File to = new File(filename);
+			Files.copy(from.toPath(), to.toPath(),
+					StandardCopyOption.REPLACE_EXISTING);
+			Files.delete(from.toPath());
+			ServerWizard2.LOGGER.info(filename + " Saved");
+		} catch (Exception exc) {
+			MessageDialog.openError(null, "Error", exc.getMessage());
+			exc.printStackTrace();
+		}
+	}
+
+	public Boolean readXML(String filename) {
+		Boolean rtn = false;
+		try {
+			model.readXML(filename);
+			this.modelCreationMode = model.partsMode;
+			rtn = model.errataUpdated;
+		} catch (Exception e) {
+			MessageDialog.openError(null, "Error", e.getMessage());
+			e.printStackTrace();
+		}
+		return rtn;
+	}
+
+	public Vector<Target> getConnectionCapableTargets() {
+		return model.getConnectionCapableTargets();
+	}
+
+	public void setGlobalSetting(String path, String attribute, String value) {
+		model.setGlobalSetting(path, attribute, value);
+	}
+
+	public Field getGlobalSetting(String path, String attribute) {
+		return model.getGlobalSetting(path, attribute);
+	}
+
+	public Boolean isGlobalSettings(String path, String attribute) {
+		return model.isGlobalSetting(path, attribute);
+	}
+	public Vector<Target> getChildTargets(Target target) {
+
+		if (target == null) {
+			return model.getTopLevelTargets();
+		}
+		if (this.modelCreationMode) {
+			Boolean override = false;
+			if (target.getType().startsWith("targetoverride")) { override = true; }
+			return model.getUnitTargets(override);
+		}
+		return model.getChildTargetTypes(target.getType());
+	}
+
+	public void hideBusses(Target target) {
+		target.hideBusses(model.getTargetLookup());
+	}
+
+	public Vector<Target> getVisibleChildren(Target target, boolean showHidden) {
+		Vector<Target> children = new Vector<Target>();
+		for (String c : target.getChildren()) {
+			Target t = model.getTarget(c);
+			if (t == null) {
+				String msg = "Invalid Child target id: " + c;
+				ServerWizard2.LOGGER.severe(msg);
+			}
+			children.add(t);
+		}
+		if (showHidden) {
+			for (String c : target.getHiddenChildren()) {
+				Target t = model.getTarget(c);
+				if (t == null) {
+					String msg = "Invalid Child target id: " + c;
+					ServerWizard2.LOGGER.severe(msg);
+				}
+				children.add(t);
+			}
+		}
+		return children;
+	}
+
+	public Vector<Target> getBusTypes() {
+		return model.getBusTypes();
+	}
+	public String getWorkingDir() {
+		File f = new File("").getAbsoluteFile();
+		String workingDir = f.getAbsolutePath() + System.getProperty("file.separator");
+		return workingDir;
+	}
+	public void loadLibrary(String path) {
+		try {
+			model.loadLibrary(path);
+		} catch (Exception e) {
+			ServerWizard2.LOGGER.severe("Unable to load library: "+path);
+		}
+	}
+	public void runChecks(String xmlFile, String htmlFile) {
+
+		String workingDir = this.getWorkingDir();
+		String commandLine[] = { "perl", "-I", workingDir + "/scripts",
+				workingDir + PROCESSING_SCRIPT, "-x",
+				xmlFile, "-f", "-o", htmlFile };
+		String commandLineStr = "";
+		for (int i = 0; i < commandLine.length; i++) {
+			commandLineStr = commandLineStr + commandLine[i] + " ";
+		}
+		ServerWizard2.LOGGER.info("Running: " + commandLineStr);
+		try {
+			final ProcessBuilder builder = new ProcessBuilder(commandLine)
+					.redirectErrorStream(true);
+
+			final Process process = builder.start();
+			final StringWriter writer = new StringWriter();
+
+			new Thread(new Runnable() {
+				public void run() {
+					char[] buffer = new char[1024];
+					int len;
+					InputStreamReader in = new InputStreamReader(
+							process.getInputStream());
+
+					try {
+						while ((len = in.read(buffer)) != -1) {
+							writer.write(buffer, 0, len);
+						}
+					} catch (IOException e) {
+						e.printStackTrace();
+					}
+				}
+			}).start();
+
+			final int exitValue = process.waitFor();
+			final String processOutput = writer.toString();
+			ServerWizard2.LOGGER.info(processOutput);
+			ServerWizard2.LOGGER.info("Return Code: " + exitValue);
+			LogViewerDialog dlg = new LogViewerDialog(null);
+			dlg.setData(processOutput);
+			dlg.open();
+		} catch (Exception e) {
+			e.printStackTrace();
+		}
+	}
+}
\ No newline at end of file
diff --git a/src/com/ibm/ServerWizard2/Attribute.java b/src/com/ibm/ServerWizard2/model/Attribute.java
index 3dca54c..17b346c 100644
--- a/src/com/ibm/ServerWizard2/Attribute.java
+++ b/src/com/ibm/ServerWizard2/model/Attribute.java
@@ -1,4 +1,4 @@
-package com.ibm.ServerWizard2;
+package com.ibm.ServerWizard2.model;
 
 import java.io.Writer;
 
@@ -8,10 +8,12 @@ import org.w3c.dom.Node;
 public class Attribute implements java.io.Serializable {
 	private static final long serialVersionUID = 1L;
 	public String name = "";
+	public String group = "";
 	public AttributeValue value;
 
 	public String inherited = "";
 	public String desc = "";
+	public String compareStr = "";
 	public Boolean readable = false;
 	public Boolean writeable = false;
 	public Boolean readonly = false;
@@ -30,6 +32,7 @@ public class Attribute implements java.io.Serializable {
 	public Attribute(Attribute a) {
 		this.name = a.name;
 		this.desc = a.desc;
+		this.group = a.group;
 		this.persistency = a.persistency;
 		this.readable = a.readable;
 		this.writeable = a.writeable;
@@ -66,12 +69,10 @@ public class Attribute implements java.io.Serializable {
 		return hide;
 	}
 
-	public Boolean isBitmask() {
-		return bitmask;
-	}
 	public boolean isGlobal() {
 		return this.global;
 	}
+	
 	public String toString() {
 		String rtn="Attribute: "+name+" = ";
 		rtn="Attribute: "+name+" = "+value.toString()+" inherited="+this.inherited;
@@ -102,9 +103,9 @@ public class Attribute implements java.io.Serializable {
 		
 	}
 	public void readModelXML(Element attribute) {
-		//name = attribute.getElementsByTagName("id").item(0).getChildNodes().item(0).getNodeValue();
 		name = SystemModel.getElement(attribute, "id");
 		desc = SystemModel.getElement(attribute,"description");
+		group = SystemModel.getElement(attribute,"group");
 		
 		String p = SystemModel.getElement(attribute,"persistency");
 		if (!p.isEmpty()) { setPersistence(p); }
@@ -159,5 +160,10 @@ public class Attribute implements java.io.Serializable {
 		out.write("\t\t<id>"+name+"</id>\n");
 		value.writeInstanceXML(out);
 		out.write("\t</attribute>\n");
+	}
+
+	public String compare(Object o) {
+		Attribute a = (Attribute) o;
+		return value.compare(a.getValue());
 	}	
 }
diff --git a/src/com/ibm/ServerWizard2/AttributeValue.java b/src/com/ibm/ServerWizard2/model/AttributeValue.java
index 18eb28d..f155c58 100644
--- a/src/com/ibm/ServerWizard2/AttributeValue.java
+++ b/src/com/ibm/ServerWizard2/model/AttributeValue.java
@@ -1,4 +1,4 @@
-package com.ibm.ServerWizard2;
+package com.ibm.ServerWizard2.model;
 
 import java.io.Writer;
 import java.util.Vector;
@@ -20,6 +20,8 @@ public abstract class AttributeValue {
 	public abstract void setValue(String value);
 	public abstract String toString();
 	public abstract Boolean isEmpty();
+	public abstract String compare(Object o);
+	
 	public void setEnumerator(Enumerator enumerator) {
 		for (Field f : fields) {
 			f.enumerator=enumerator;
diff --git a/src/com/ibm/ServerWizard2/AttributeValueComplex.java b/src/com/ibm/ServerWizard2/model/AttributeValueComplex.java
index c4db2c3..9b96f07 100644
--- a/src/com/ibm/ServerWizard2/AttributeValueComplex.java
+++ b/src/com/ibm/ServerWizard2/model/AttributeValueComplex.java
@@ -1,4 +1,4 @@
-package com.ibm.ServerWizard2;
+package com.ibm.ServerWizard2.model;
 
 import java.io.Writer;
 import java.util.Vector;
@@ -25,6 +25,7 @@ public class AttributeValueComplex extends AttributeValue {
 			f.name = SystemModel.getElement((Element) fieldList.item(i), "name");
 			f.desc = SystemModel
 					.getElement((Element) fieldList.item(i), "description");
+			f.group = SystemModel.getElement((Element) fieldList.item(i), "group");
 			f.type = SystemModel.getElement((Element) fieldList.item(i), "type");
 			f.bits = SystemModel.getElement((Element) fieldList.item(i), "bits");
 			f.defaultv = SystemModel.getElement((Element) fieldList.item(i), "default");
@@ -59,7 +60,6 @@ public class AttributeValueComplex extends AttributeValue {
 
 	@Override
 	public String getValue() {
-		// TODO Auto-generated method stub
 		return "complex";
 	}
 
@@ -90,4 +90,23 @@ public class AttributeValueComplex extends AttributeValue {
 			fields.add(f);
 		}
 	}
+	@Override
+	public String compare(Object o) {
+		AttributeValueComplex a = (AttributeValueComplex) o;
+		String cmp = "";
+		for (Field f : fields) {
+			Boolean found = false;
+			for (Field fc : a.fields) {
+				if (f.name.equals(fc.name)) {
+					found = true;
+					if (!f.value.equals(fc.value)) {
+						cmp = cmp + f.attributeName +"(" +f.name +")" +" : "+f.value+" != "+fc.value+"\n";
+						;
+					}
+				}
+			}
+			if (!found) { return "invalid attribute"; }
+		}
+		return cmp;
+	}
 }
diff --git a/src/com/ibm/ServerWizard2/AttributeValueNative.java b/src/com/ibm/ServerWizard2/model/AttributeValueNative.java
index bb9a4d4..df8688e 100644
--- a/src/com/ibm/ServerWizard2/AttributeValueNative.java
+++ b/src/com/ibm/ServerWizard2/model/AttributeValueNative.java
@@ -1,4 +1,4 @@
-package com.ibm.ServerWizard2;
+package com.ibm.ServerWizard2.model;
 
 import java.io.Writer;
 
@@ -12,6 +12,7 @@ public class AttributeValueNative extends AttributeValue {
 		field = new Field();
 		field.attributeName=a.name;
 		field.desc=a.desc;
+		field.group=a.group;
 		fields.add(field);
 	}
 	public AttributeValueNative(AttributeValueNative a) {
@@ -59,25 +60,14 @@ public class AttributeValueNative extends AttributeValue {
 		field.value = n.field.value;
 		field.name = n.field.name;
 	}
-/*
-	@Override
-	public Control getEditor(Table table, AttributeTableItem item) {
-		Text text = new Text(table, SWT.NONE);
-		text.setData(item);
-		text.setText(value);
-		text.setSelection(text.getText().length());
-		text.addModifyListener(new ModifyListener() {
 
-			@Override
-			public void modifyText(ModifyEvent e) {
-				Text text = (Text) e.getSource();
-				AttributeTableItem a = (AttributeTableItem) text.getData();
-				AttributeValueSimple v = (AttributeValueSimple) a.getAttribute();
-				v.value = text.getText();
-				a.getItem().setText(2, v.value);
-			}
-		});
-		return text;
+	@Override
+	public String compare(Object o) {
+		String cmp = "";
+		AttributeValueNative s = (AttributeValueNative) o;
+		if (!field.value.equals(s.field.value)) {
+			cmp = field.attributeName +" : "+field.value + " != "+s.field.value;
+		}
+		return cmp;
 	}
-	*/
 }
diff --git a/src/com/ibm/ServerWizard2/AttributeValueSimple.java b/src/com/ibm/ServerWizard2/model/AttributeValueSimple.java
index be17a41..434efb2 100644
--- a/src/com/ibm/ServerWizard2/AttributeValueSimple.java
+++ b/src/com/ibm/ServerWizard2/model/AttributeValueSimple.java
@@ -1,4 +1,4 @@
-package com.ibm.ServerWizard2;
+package com.ibm.ServerWizard2.model;
 
 import java.io.Writer;
 
@@ -14,6 +14,7 @@ public class AttributeValueSimple extends AttributeValue {
 		field = new Field();
 		field.attributeName = a.name;
 		field.desc=a.desc;
+		field.group=a.group;
 		fields.add(field);
 	}
 	public AttributeValueSimple(AttributeValueSimple a) {
@@ -77,7 +78,7 @@ public class AttributeValueSimple extends AttributeValue {
 	@Override
 	public String toString() {
 		// TODO Auto-generated method stub
-		return field.value + " (" + type + ")";
+		return "Simple: "+field.value + " (" + type + ")";
 	}
 
 	@Override
@@ -96,4 +97,13 @@ public class AttributeValueSimple extends AttributeValue {
 		field.value = n.field.value;
 		field.name = n.field.name;
 	}
+	@Override
+	public String compare(Object o) {
+		String cmp = "";
+		AttributeValueSimple s = (AttributeValueSimple) o;
+		if (!field.value.equals(s.field.value)) {
+			cmp = field.attributeName +" : "+field.value + " != "+s.field.value;
+		}
+		return cmp;
+	}
 }
diff --git a/src/com/ibm/ServerWizard2/Connection.java b/src/com/ibm/ServerWizard2/model/Connection.java
index 5c9cfe8..cbb6497 100644
--- a/src/com/ibm/ServerWizard2/Connection.java
+++ b/src/com/ibm/ServerWizard2/model/Connection.java
@@ -1,4 +1,4 @@
-package com.ibm.ServerWizard2;
+package com.ibm.ServerWizard2.model;
 
 import java.io.Writer;
 import java.util.Map;
@@ -6,6 +6,8 @@ import java.util.Map;
 import org.w3c.dom.Element;
 import org.w3c.dom.NodeList;
 
+import com.ibm.ServerWizard2.ServerWizard2;
+
 
 public class Connection {
 	public int id = 0;
diff --git a/src/com/ibm/ServerWizard2/ConnectionEndpoint.java b/src/com/ibm/ServerWizard2/model/ConnectionEndpoint.java
index 90b7e21..21c893b 100644
--- a/src/com/ibm/ServerWizard2/ConnectionEndpoint.java
+++ b/src/com/ibm/ServerWizard2/model/ConnectionEndpoint.java
@@ -1,4 +1,4 @@
-package com.ibm.ServerWizard2;
+package com.ibm.ServerWizard2.model;
 
 public class ConnectionEndpoint {
 	//private Target target;
diff --git a/src/com/ibm/ServerWizard2/Enumerator.java b/src/com/ibm/ServerWizard2/model/Enumerator.java
index 815459f..e0c56e6 100644
--- a/src/com/ibm/ServerWizard2/Enumerator.java
+++ b/src/com/ibm/ServerWizard2/model/Enumerator.java
@@ -1,4 +1,4 @@
-package com.ibm.ServerWizard2;
+package com.ibm.ServerWizard2.model;
 
 import java.util.HashMap;
 import java.util.Vector;
@@ -9,6 +9,7 @@ import org.w3c.dom.NodeList;
 public class Enumerator {
 	public String id="";
 	public String desc="";
+	public String group="";
 	public HashMap<String,String> enumValues = new HashMap<String,String>();
 	public Vector<String> enumList = new Vector<String>();
 	
@@ -20,6 +21,7 @@ public class Enumerator {
 	public void readXML(Element e) {
 		id = SystemModel.getElement(e, "id");
 		desc = SystemModel.getElement(e,"description");
+		group = SystemModel.getElement(e,"group");
 	    NodeList enumList = e.getElementsByTagName("enumerator");
 	    for (int i = 0; i < enumList.getLength(); ++i) {
 	    	Element en=(Element)enumList.item(i);
diff --git a/src/com/ibm/ServerWizard2/model/Errata.java b/src/com/ibm/ServerWizard2/model/Errata.java
new file mode 100644
index 0000000..30093ab
--- /dev/null
+++ b/src/com/ibm/ServerWizard2/model/Errata.java
@@ -0,0 +1,87 @@
+package com.ibm.ServerWizard2.model;

+

+import java.util.HashMap;

+import java.util.Vector;

+

+import org.eclipse.jface.dialogs.MessageDialog;

+import org.w3c.dom.Element;

+import org.w3c.dom.NodeList;

+

+public class Errata {

+	private String id = "";

+	private String desc = "";

+	private Boolean applied = false;

+	private Vector<Attribute> attributes = new Vector<Attribute>();

+	private String compareDetail = "";

+	private Vector<Target> targets = new Vector<Target>();

+	private String targetType = "";

+

+	public Errata() {

+		

+	}

+	public Errata(Errata e) {

+		id = e.id;

+		desc = e.desc;

+		applied = e.applied;

+		targetType = e.targetType;

+		//don't deep copy attributes

+		attributes = e.attributes;

+	}

+	public void addTarget(Target t) {

+		targets.add(t);

+	}

+	public String getDetail() {

+		return compareDetail;

+	}

+	public void setDetail(String d) {

+		this.compareDetail = d;

+	}

+	public void setApplied(Boolean applied) {

+		this.applied = applied;

+	}

+	public Boolean isApplied() { 

+		return applied;

+	}

+	public String getTargetType() {

+		return this.targetType;

+	}

+	public void updateAttributes() {

+		for (Target t : targets) {

+			for (Attribute a : attributes) {

+				Attribute attrNew = new Attribute(a);

+				t.getAttributes().put(attrNew.name,attrNew);

+			}

+		}

+	}

+	public void read(Element t, HashMap<String, Attribute> attributeModel) {

+		attributes.removeAllElements();

+		this.id = SystemModel.getElement(t, "errata_id");

+		this.desc = SystemModel.getElement(t, "description");

+		this.targetType = SystemModel.getElement(t, "target_type");

+		NodeList attributeList = t.getElementsByTagName("attribute");

+		for (int j = 0; j < attributeList.getLength(); ++j) {

+			String attrId = SystemModel.getElement((Element) attributeList.item(j), "id");

+			Attribute aModel = attributeModel.get(attrId);

+			if (aModel == null) {

+				MessageDialog.openError(null, "Error", "Invalid attribute " + attrId + " in Errata: " + id);

+				return;

+			} else {

+				Attribute a = new Attribute(aModel);

+				a.value.readInstanceXML((Element) attributeList.item(j));

+				attributes.add(a);

+			}

+		}

+	}

+	public String getId() { 

+		return id;

+	}

+	public String getDesc() {

+		return desc;

+	}

+	public Vector<Attribute> getAttributes() {

+		return attributes;

+	}

+	public void readInstance() {

+

+	}

+}

diff --git a/src/com/ibm/ServerWizard2/Field.java b/src/com/ibm/ServerWizard2/model/Field.java
index 3d8c56f..e616642 100644
--- a/src/com/ibm/ServerWizard2/Field.java
+++ b/src/com/ibm/ServerWizard2/model/Field.java
@@ -1,10 +1,12 @@
-package com.ibm.ServerWizard2;
+package com.ibm.ServerWizard2.model;
+
 
 
 public class Field {
 	public String attributeName="";
 	public String name="";
 	public String desc="";
+	public String group="";
 	public String type="";
 	public String bits="";
 	public String defaultv="";
@@ -20,6 +22,7 @@ public class Field {
 		attributeName = f.attributeName;
 		name=f.name;
 		desc=f.desc;
+		group=f.group;
 		type=f.type;
 		bits=f.bits;
 		value=f.value;
diff --git a/src/com/ibm/ServerWizard2/model/SystemModel.java b/src/com/ibm/ServerWizard2/model/SystemModel.java
new file mode 100644
index 0000000..b2470ce
--- /dev/null
+++ b/src/com/ibm/ServerWizard2/model/SystemModel.java
@@ -0,0 +1,834 @@
+package com.ibm.ServerWizard2.model;
+
+import java.io.BufferedWriter;
+import java.io.File;
+import java.io.FileWriter;
+import java.io.IOException;
+import java.io.Writer;
+import java.util.Collection;
+import java.util.Collections;
+import java.util.HashMap;
+import java.util.Map;
+import java.util.TreeMap;
+import java.util.Vector;
+
+import javax.xml.parsers.DocumentBuilder;
+import javax.xml.parsers.DocumentBuilderFactory;
+import javax.xml.parsers.ParserConfigurationException;
+
+import org.eclipse.jface.dialogs.Dialog;
+import org.eclipse.jface.dialogs.MessageDialog;
+import org.w3c.dom.Document;
+import org.w3c.dom.Element;
+import org.w3c.dom.Node;
+import org.w3c.dom.NodeList;
+import org.xml.sax.SAXException;
+
+import com.ibm.ServerWizard2.ServerWizard2;
+import com.ibm.ServerWizard2.view.ErrataViewer;
+
+public class SystemModel {
+	// public Target rootTarget;
+	public Vector<Target> rootTargets = new Vector<Target>();
+	private DocumentBuilder builder;
+
+	// From target instances
+	private HashMap<String, Target> targetInstances = new HashMap<String, Target>();
+	private Vector<Target> targetUnitList = new Vector<Target>();
+	private HashMap<String, Target> targetUnitModels = new HashMap<String,Target>();
+
+	// From target types
+	private TreeMap<String, Target> targetModels = new TreeMap<String, Target>();
+	private HashMap<String, Vector<Target>> childTargetTypes = new HashMap<String, Vector<Target>>();
+
+	// From attribute types
+	public TreeMap<String, Enumerator> enumerations = new TreeMap<String, Enumerator>();
+	private HashMap<String, Attribute> attributes = new HashMap<String, Attribute>();
+	private TreeMap<String, Vector<String>> attributeGroups = new TreeMap<String, Vector<String>>();
+	private TreeMap<String, Errata> errata = new TreeMap<String, Errata>();
+
+	// List of targets in current system
+	private Vector<Target> targetList = new Vector<Target>();
+	private HashMap<String, Target> targetLookup = new HashMap<String, Target>();
+	private TreeMap<String, Errata> errataList = new TreeMap<String, Errata>();
+
+	private TreeMap<String, Target> busTypesTree = new TreeMap<String, Target>();
+	private Vector<Target> busTypes = new Vector<Target>();
+
+	private TreeMap<String, TreeMap<String, Field>> globalSettings = new TreeMap<String, TreeMap<String, Field>>();
+
+	public Boolean partsMode = false;
+	public Boolean cleanupMode = false;
+	public Boolean errataUpdated = false;
+	
+
+	public Vector<Target> getBusTypes() {
+		return busTypes;
+	}
+
+	public Target getTarget(String t) {
+		return targetLookup.get(t);
+	}
+
+	public HashMap<String, Target> getTargetLookup() {
+		return this.targetLookup;
+	}
+
+	public Vector<Target> getTargetList() {
+		return this.targetList;
+	}
+
+	public Collection<Target> getTargetInstances() {
+		return targetInstances.values();
+	}
+
+	public Target getRootTarget() {
+		return rootTargets.get(0);
+	}
+	
+	public Vector<Target> getTopLevelTargets() {
+		//TODO: need a better way to determine top level targets
+		Vector<Target> topLevel = new Vector<Target>();
+		for (Target target : targetModels.values()) {
+			String type = target.getType();
+			if (type.equals("chip") || type.startsWith("sys") || type.equals("targetoverride")) {
+				topLevel.add(target);
+			}
+		}
+		return topLevel;
+	}
+	
+	public Vector<Target> getUnitTargets(Boolean override) {
+		//TODO: need a better way to determine top level targets
+		Vector<Target> topLevel = new Vector<Target>();
+		for (Target target : targetModels.values()) {
+			if (override == false) {
+				if (target.isUnit()) { topLevel.add(target); }
+			} else {
+				if (target.isOverride()) {
+					topLevel.add(target);
+				}
+			}
+		}
+		return topLevel;
+	}
+	
+	public Vector<Target> getConnectionCapableTargets() {
+		Vector<Target> cards = new Vector<Target>();
+		for (Target target : targetList) {
+			if (target.isCard() || target.isSystem() || target.isNode()) {
+					cards.add(target);
+			}
+		}
+		return cards;
+	}
+
+	public void initBusses(Target target) {
+		target.initBusses(busTypes);
+	}
+
+	public Vector<Target> getChildTargetTypes(String targetType) {
+		if (targetType.equals("")) {
+			Vector<Target> a = new Vector<Target>();
+			for (Target t : this.targetModels.values()) {
+				a.add(t);
+			}
+			return a;
+		}
+		if (childTargetTypes.get(targetType) != null) {
+			Collections.sort(childTargetTypes.get(targetType));
+		}
+		return childTargetTypes.get(targetType);
+	}
+	
+	
+	private void writeErrata(Writer out) throws Exception {
+		out.write("<appliedErratas>\n");
+		for (String e : errataList.keySet()) {
+			out.write("<appliedErrata>");
+			out.write("\t<id>" + e + "</id>");
+			out.write("\t<is_applied>" + errataList.get(e).isApplied() + "</is_applied>");
+			out.write("</appliedErrata>\n");
+		}
+		out.write("</appliedErratas>\n");
+	}
+	
+
+	private void writeGroups(Writer out) throws Exception {
+		out.write("<attributeGroups>\n");
+		for (String group : attributeGroups.keySet()) {
+			out.write("<attributeGroup>\n");
+			out.write("\t<id>" + group + "</id>\n");
+			for (String attribute : attributeGroups.get(group)) {
+				out.write("\t<attribute>" + attribute + "</attribute>\n");
+			}
+			out.write("</attributeGroup>\n");
+		}
+		out.write("</attributeGroups>\n");
+	}
+	private void writeEnumeration(Writer out) throws Exception {
+		out.write("<enumerationTypes>\n");
+		for (String enumeration : enumerations.keySet()) {
+			Enumerator e = enumerations.get(enumeration);
+			out.write("<enumerationType>\n");
+			out.write("\t<id>" + enumeration + "</id>\n");
+			for (Map.Entry<String, String> entry : e.enumValues.entrySet()) {
+				out.write("\t\t<enumerator>\n");
+				out.write("\t\t<name>" + entry.getKey() + "</name>\n");
+				out.write("\t\t<value>" + entry.getValue() + "</value>\n");
+				out.write("\t\t</enumerator>\n");
+			}
+			out.write("</enumerationType>\n");
+		}
+		out.write("</enumerationTypes>\n");
+	}
+
+	private NodeList isXMLValid(Document document, String tag) {
+		NodeList n = document.getElementsByTagName(tag);
+		if (n != null) { 
+			if (n.item(0) != null) {
+				String version = SystemModel.getElement((Element)n.item(0), "version");
+				if (!version.isEmpty()) {
+					ServerWizard2.LOGGER.info("XML Version found: "+version);
+					if (Double.valueOf(version) >= ServerWizard2.VERSION_MAJOR) {
+						return n;
+					}
+				}
+			}
+		}
+		return null;
+	}
+	public void loadLibrary(String path) throws Exception {
+		File xmlDir = new File(path);
+		File[] filesList = xmlDir.listFiles();
+		if (filesList == null) {
+			ServerWizard2.LOGGER.warning("No library loaded");
+		} else {
+			for (File file : filesList) {
+			    if (file.isFile() && file.getAbsolutePath().endsWith(".xml")) {
+			    	if (file.getName().startsWith("attribute_types")) {
+			    		this.loadAttributes(file.getPath());
+			    	}
+			    	if (file.getName().startsWith("target_types")) {
+			    		this.loadTargetTypes(file.getPath());
+			    	}
+			    }
+			}	
+		}
+		File partsDir = new File(path+File.separator+"parts"+File.separator);
+		filesList = partsDir.listFiles();
+		if (filesList == null) {
+			ServerWizard2.LOGGER.warning("No parts loaded");
+		} else {		
+			for (File file : filesList) {
+			    if (file.isFile() && file.getAbsolutePath().endsWith(".xml")) {
+			    	this.loadTargets(file.getPath());
+			    }
+			}
+		}
+	}
+		
+	// Reads a previously saved MRW
+	public void readXML(String filename) throws Exception {
+		ServerWizard2.LOGGER.info("Reading XML: "+filename);
+		File f = new File(filename);
+		this.loadLibrary(f.getParent());
+		long startTime = System.currentTimeMillis();
+		DocumentBuilderFactory factory = DocumentBuilderFactory.newInstance();
+		// delete all existing instances
+		this.deleteAllInstances();
+		this.addUnitInstances();
+		
+		DocumentBuilder builder = factory.newDocumentBuilder();
+		builder.setErrorHandler(new XmlHandler());
+		Document document = builder.parse(filename);
+		
+		NodeList system = isXMLValid(document,"systemInstance");
+		NodeList part = isXMLValid(document,"partInstance");
+		if (system == null && part == null) {
+			String msg = "ServerWiz cannot read this version of XML: "+filename;
+			ServerWizard2.LOGGER.severe(msg);
+			MessageDialog.openError(null, "XML Load Error", msg);
+		}
+		partsMode = false;
+		String targetTag = "targetInstance";
+		if (part != null) { 
+			partsMode = true;
+			targetTag = "targetPart";
+			ServerWizard2.LOGGER.info("Setting Parts mode");
+		}
+
+		NodeList settingList = document.getElementsByTagName("globalSettings");
+		Element t = (Element) settingList.item(0);
+		if (t != null) {
+			NodeList settingList2 = t.getElementsByTagName("globalSetting");
+			for (int j = 0; j < settingList2.getLength(); ++j) {
+				Element t2 = (Element) settingList2.item(j);
+				this.readGlobalSettings(t2);
+			}
+		}
+		NodeList errataList = document.getElementsByTagName("appliedErratas");
+		Element te = (Element) errataList.item(0);
+		if (te != null) {
+			NodeList errataList2 = te.getElementsByTagName("appliedErrata");
+			for (int j = 0; j < errataList2.getLength(); ++j) {
+				Element t2 = (Element) errataList2.item(j);
+				this.readErrata(t2);
+			}
+		}
+		NodeList targetInstances = document.getElementsByTagName("targetInstances");
+		t = (Element) targetInstances.item(0);
+		NodeList targetInstanceList = t.getElementsByTagName(targetTag);
+
+		for (int i = 0; i < targetInstanceList.getLength(); ++i) {
+			t = (Element) targetInstanceList.item(i);
+			String type = SystemModel.getElement(t, "type");
+			if (type.length() > 0) {
+				Target targetModel = this.getTargetModel(type);
+				if (targetModel == null) {
+					ServerWizard2.LOGGER.severe("Invalid target type: " + type);
+					throw new Exception("Invalid target type: " + type);
+				} else {
+					Target target = new Target(targetModel);
+					target.initBusses(busTypes);
+					target.readInstanceXML(t, targetModels);
+					this.targetLookup.put(target.getName(), target);
+					this.targetList.add(target);
+
+					if (target.isRoot()) {
+						this.rootTargets.add(target);
+					}
+					///////
+					// Check to see if new children defined in model
+					Target targetInst = this.targetInstances.get(target.getType());
+					if (targetInst != null) {
+						HashMap <String,Boolean> childTest = new HashMap<String,Boolean>();
+						for (String child : target.getAllChildren()) {
+							childTest.put(child, true);
+						}
+						for (String child : targetInst.getChildren()) {
+							if (childTest.get(child)==null) {
+								target.addChild(child, false);
+								if (!this.targetLookup.containsKey(child)) {
+									this.targetLookup.put(child, target);
+									this.targetList.add(target);
+								}
+								childTest.put(child, true);
+							}
+						}
+						for (String child : targetInst.getHiddenChildren()) {
+							if (childTest.get(child)==null) {
+								target.addChild(child, true);
+								if (!this.targetLookup.containsKey(child)) {
+									this.targetLookup.put(child,target);
+									this.targetList.add(target);
+								}
+								childTest.put(child, true);
+							}
+						}
+					}
+				}
+			} else {
+				throw new Exception("Empty Target Type");
+			}
+		}
+		if (cleanupMode) { this.xmlCleanup(); }
+		long endTime = System.currentTimeMillis();
+		ServerWizard2.LOGGER.info("Loaded XML in " + (endTime - startTime) + " milliseconds");
+		
+		checkErrata();
+	}
+	
+	public void checkErrata() {
+		Vector<Errata> errataNew = new Vector<Errata>();
+		
+		//Determine errata that has not been acknowledged
+		for (String errata_id : errata.keySet()) {
+			if (!errataList.containsKey(errata_id)) {
+				Errata e = new Errata(errata.get(errata_id));
+				errataNew.add(e);
+			}
+		}
+		
+		HashMap<String,Errata> errataCheck = new HashMap<String,Errata>();
+		for (Target tchk : this.targetLookup.values()) {
+			for (Errata e : errataNew) {
+				if (e.getTargetType().equals(tchk.getType())) {
+					Boolean found = false;
+					String cmpSummary = e.getDesc()+"\n===========================================\n";
+					for (Attribute errataAttr : e.getAttributes()) {
+						if (tchk.attributeExists(errataAttr.name)) {
+							Attribute currentAttr = tchk.getAttributes().get(errataAttr.name);
+							String cmp = errataAttr.compare(currentAttr);
+							if (!cmp.isEmpty()) {
+								cmpSummary = cmpSummary + cmp +"\n";
+								errataCheck.put(e.getId(), e);
+								e.setDetail(cmpSummary);
+								found = true;
+							}
+						}
+					}
+					if (found) { e.addTarget(tchk); }
+				}
+			}
+		}
+		Vector<Errata> errataV = new Vector<Errata>();
+		for (Errata e : errataCheck.values()) {
+			errataV.add(e);
+		}
+		if (errataCheck.size() > 0) {
+			ErrataViewer dlg = new ErrataViewer(null,errataV);
+			int rtn = dlg.open();
+			if (rtn == Dialog.OK) {
+				for (Errata e : errataV) {
+					if (e.isApplied()) {
+						e.updateAttributes();
+					}
+					errataUpdated = true;
+					errataList.put(e.getId(), e);
+				}
+			}
+		}
+	}
+	
+	///////////////////////////////////////////////
+	// global settings
+	
+	public Field setGlobalSetting(String path, String attribute, String value) {
+		TreeMap<String, Field> s = globalSettings.get(path);
+		if (s == null) {
+			s = new TreeMap<String, Field>();
+			globalSettings.put(path, s);
+		}
+		Field f = s.get(attribute);
+		if (f == null) {
+			f = new Field();
+			f.attributeName = attribute;
+			s.put(attribute, f);
+		}
+		f.value = value;
+		return f;
+	}
+
+	public Boolean isGlobalSetting(String path, String attribute) {
+		TreeMap<String, Field> s = globalSettings.get(path);
+		if (s == null) {
+			return false;
+		}
+		Field f=s.get(attribute);
+		if (f==null) {
+			return false;
+		}
+		return true;
+	}
+
+	public Field getGlobalSetting(String path, String attribute) {
+		TreeMap<String, Field> s = globalSettings.get(path);
+		if (s == null) {
+			if (s == null) {
+				s = new TreeMap<String, Field>();
+				globalSettings.put(path, s);
+			}			
+			return null;
+		}
+		Field f=s.get(attribute);
+		return f;
+	}
+
+	public TreeMap<String, Field> getGlobalSettings(String path) {
+		TreeMap<String, Field> s = globalSettings.get(path);
+		return s;
+	}
+
+	private void writeGlobalSettings(Writer out) throws Exception {
+		out.write("<globalSettings>\n");
+		for (Map.Entry<String, TreeMap<String, Field>> entry : this.globalSettings.entrySet()) {
+			out.write("<globalSetting>\n");
+			out.write("\t<id>" + entry.getKey() + "</id>\n");
+			for (Map.Entry<String, Field> setting : entry.getValue().entrySet()) {
+				out.write("\t<property>\n");
+				out.write("\t<id>" + setting.getKey() + "</id>\n");
+				out.write("\t<value>" + setting.getValue().value + "</value>\n");
+				out.write("\t</property>\n");
+			}
+			out.write("</globalSetting>\n");
+		}
+		out.write("</globalSettings>\n");
+	}
+
+	private void readGlobalSettings(Element setting) {
+		String targetId = SystemModel.getElement(setting, "id");
+		NodeList propertyList = setting.getElementsByTagName("property");
+		for (int i = 0; i < propertyList.getLength(); ++i) {
+			Element t = (Element) propertyList.item(i);
+			String property = SystemModel.getElement(t, "id");
+			String value = SystemModel.getElement(t, "value");
+			this.setGlobalSetting(targetId, property, value);
+		}
+	}
+	private void readErrata(Element setting) {
+		String errata_id = SystemModel.getElement(setting, "id");
+		if (this.errata.containsKey(errata_id)) {
+			Errata e = new Errata(this.errata.get(errata_id));
+			errataList.put(errata_id, e);
+		}
+	}
+	
+	/////////////////////////////////////////////////
+	// Writes MRW to file
+	public void writeXML(String filename, Boolean partsMode) throws Exception {
+		Writer out = new BufferedWriter(new FileWriter(filename));
+		String topTag = "systemInstance";
+		if (partsMode) { topTag = "partInstance"; }
+		
+		out.write("<"+topTag+">\n");
+		out.write("<version>"+ServerWizard2.getVersionString()+"</version>\n");
+		if (!partsMode) {
+			this.writeEnumeration(out);
+			this.writeGlobalSettings(out);
+			this.writeGroups(out);
+			this.writeErrata(out);
+		}
+		out.write("<targetInstances>\n");
+		HashMap<String, Boolean> targetWritten = new HashMap<String, Boolean>();
+		for (Target target : targetList) {
+			if (partsMode) {
+				target.writeTargetXML(out, targetLookup, targetWritten);
+			} else {
+				target.writeInstanceXML(out, targetLookup, targetWritten);
+			}
+		}
+		out.write("</targetInstances>\n");
+		out.write("</"+topTag+">\n");
+		out.close();
+	}
+
+	public void addTarget(Target parentTarget, Target newTarget,Boolean pathMode) throws Exception {
+		if (parentTarget == null) {
+			this.rootTargets.add(newTarget);
+			newTarget.setRoot();
+			if (pathMode) {
+				newTarget.parent = newTarget.getType();
+				newTarget.setType(newTarget.parent+"-"+newTarget.getRawName());
+			}
+		} else {
+			newTarget.clearRoot();
+			if (pathMode) {
+				String name = newTarget.getRawName();
+				if (name.isEmpty()) { name = newTarget.getIdPrefix(); }
+				newTarget.setName(parentTarget.getName()+"."+name);
+			}
+			parentTarget.addChild(newTarget.getName(), false);
+		}
+		this.updateTargetList(newTarget);
+		initBusses(newTarget);
+	}
+	public void loadTargetTypes(String fileName) throws SAXException,
+			IOException, ParserConfigurationException {
+		ServerWizard2.LOGGER.info("Loading Target Types: " + fileName);
+
+		DocumentBuilderFactory factory = DocumentBuilderFactory.newInstance();
+		builder = factory.newDocumentBuilder();
+		builder.setErrorHandler(new XmlHandler());
+
+		Document document = builder.parse(fileName);
+		NodeList targetList = document.getElementsByTagName("targetType");
+		for (int i = 0; i < targetList.getLength(); ++i) {
+			Element t = (Element) targetList.item(i);
+			Target target = new Target();
+			target.readModelXML(t, attributes);
+			targetModels.put(target.getType(), target);
+		}
+		for (Map.Entry<String, Target> entry : targetModels.entrySet()) {
+			Target target = entry.getValue();
+
+			// add inherited attributes
+			addParentAttributes(target, target);
+			if (target.getAttribute("CLASS").equals("BUS")) {
+				busTypesTree.put(entry.getKey(),target);
+			}
+		}
+		busTypes.removeAllElements();
+		for (Target t : busTypesTree.values()) {
+			busTypes.add(t);
+		}
+	}
+
+	public void loadAttributes(String fileName) throws SAXException,
+			IOException, ParserConfigurationException {
+		ServerWizard2.LOGGER.info("Loading Attributes: " + fileName);
+
+		DocumentBuilderFactory factory = DocumentBuilderFactory.newInstance();
+		builder = factory.newDocumentBuilder();
+		builder.setErrorHandler(new XmlHandler());
+
+		Document document = builder.parse(fileName);
+		NodeList enumList = document.getElementsByTagName("enumerationType");
+		for (int i = 0; i < enumList.getLength(); ++i) {
+			Element t = (Element) enumList.item(i);
+			Enumerator en = new Enumerator();
+			en.readXML(t);
+			enumerations.put(en.id, en);
+		}
+		NodeList attrList = document.getElementsByTagName("attribute");
+		for (int i = 0; i < attrList.getLength(); ++i) {
+			Element t = (Element) attrList.item(i);
+			Attribute a = new Attribute();
+			a.readModelXML(t);
+			attributes.put(a.name, a);
+			
+			if (!a.group.isEmpty()) {
+				Vector<String> grp = attributeGroups.get(a.group);
+				if (grp == null) {
+					grp = new Vector<String>();
+					attributeGroups.put(a.group, grp);
+				}
+				grp.add(a.name);
+			}
+
+			if (a.getValue().getType().equals("enumeration")) {
+				a.getValue().setEnumerator(enumerations.get(a.value.getFields().get(0).name));
+			}
+		}
+	}
+
+	public void loadTargets(String filename) throws Exception {
+		ServerWizard2.LOGGER.info("Loading Part: " + filename);
+		DocumentBuilderFactory factory = DocumentBuilderFactory.newInstance();
+		DocumentBuilder builder = factory.newDocumentBuilder();
+		builder.setErrorHandler(new XmlHandler());
+		Document document = builder.parse(filename);
+		NodeList targetInstanceList = document.getElementsByTagName("targetPart");
+		for (int i = 0; i < targetInstanceList.getLength(); ++i) {
+			Element t = (Element) targetInstanceList.item(i);
+			String type = SystemModel.getElement(t, "type");
+			Target tmodel = targetModels.get(type);
+			Target target = null;
+			if (tmodel == null) {
+				target = new Target();
+			} else {
+				target = new Target(tmodel);
+			}
+			target.readTargetXML(t, targetModels, attributes);
+			addParentAttributes(target, target);
+			if (target.isRoot()) {
+				target.clearRoot();
+				targetModels.put(target.getType(), target);
+				targetInstances.put(target.getType(), target);
+				Vector<String> parentTypes = target.getParentType();
+				for (int j = 0; j < parentTypes.size(); j++) {
+					String parentType = parentTypes.get(j);
+					
+					Vector<Target> childTypes = childTargetTypes.get(parentType);
+					if (childTypes == null) {
+						childTypes = new Vector<Target>();
+						childTargetTypes.put(parentType, childTypes);
+					}
+					childTypes.add(target);
+				}				
+			} else {
+				if (!targetUnitModels.containsKey(target.getName())) {
+					this.targetUnitList.add(target);
+					this.targetUnitModels.put(target.getName(), target);
+				}
+				if (!targetModels.containsKey(target.getType())) {
+					targetModels.put(target.getType(), target);
+				}
+			}
+		}
+	}
+	public void loadErrata(String filename) throws Exception {
+		ServerWizard2.LOGGER.info("Loading Errata: " + filename);
+		DocumentBuilderFactory factory = DocumentBuilderFactory.newInstance();
+		DocumentBuilder builder = factory.newDocumentBuilder();
+		builder.setErrorHandler(new XmlHandler());
+		Document document = builder.parse(filename);
+		NodeList list = document.getElementsByTagName("errata");
+		for (int i = 0; i < list.getLength(); ++i) {
+			Element t = (Element) list.item(i);
+			Errata e = new Errata();
+			e.read(t, attributes);
+			errata.put(e.getId(), e);
+		}	
+	}
+	
+	////////////////////////////////////////////////////////////////////////
+	// Target manipulation
+	public Target getTargetInstance(String type) {
+		return targetInstances.get(type);
+	}
+	
+	public HashMap<String,Target> getUnitTargetModel() {
+		return this.targetUnitModels;
+	}
+	// Add target to target database.
+	// only contains targets that user has added
+	// not library targets
+	private void updateTargetList(Target target) throws Exception {
+		String id = target.getName();
+		if (!this.targetLookup.containsKey(id)) {
+			this.targetLookup.put(id, target);
+			this.targetList.add(target);
+		} else {
+			String msg="Duplicate Target: "+target.getName();
+			ServerWizard2.LOGGER.warning(msg);
+			throw new Exception(msg);
+		}
+	}
+
+	private void addParentAttributes(Target childTarget, Target t) {
+		if (t == null) {
+			return;
+		}
+		if (t.parent == null || t.parent.isEmpty()) {
+			return;
+		}
+		Target parent = targetModels.get(t.parent);
+		if (parent == null) {
+			MessageDialog.openError(null, "Error", "Invalid parent target: "+t.parent );
+		}
+		childTarget.copyAttributesFromParent(parent);
+		addParentAttributes(childTarget, parent);
+	}
+	
+	public void addUnitInstances() {
+		for (Target target : this.targetUnitList) {
+			this.targetLookup.put(target.getName(), target);
+		}
+	}
+
+	public void updateTargetPosition(Target target, Target parentTarget, int position) {
+		if (position > 0) {
+			target.setPosition(position);
+			return;
+		}
+		if (parentTarget == null) {
+			target.setName(target.getIdPrefix());
+			target.setPosition(-1);
+			return;
+		}
+		int p = -1;
+		// set target position to +1 of any target found of same type
+		for (Target t : targetList) {
+			if (t.getType().equals(target.getType())) {
+				if (t.getPosition() >= p) {
+					p = t.getPosition();
+				}
+			}
+		}
+		target.setPosition(p + 1);
+		target.setSpecialAttributes();
+	}
+	public TreeMap<String, Target> getTargetModels() {
+		return targetModels;
+	}
+
+	public Target getTargetModel(String t) {
+		return targetModels.get(t);
+	}
+
+	public void deleteAllInstances() {
+		errataUpdated = false;
+		this.targetList.clear();
+		this.targetLookup.clear();
+		this.rootTargets.clear();
+		this.globalSettings.clear();
+		this.errataList.clear();
+	}
+
+	public void deleteTarget(Target deleteTarget) {
+		//if (deleteTarget == null) {
+		//	return;
+		//}
+		targetList.remove(deleteTarget);
+		//Vector<String> children = deleteTarget.getAllChildren();
+		//for (String s : children) {
+		//	Target d = targetLookup.get(s);
+		//	deleteTarget(d);
+		//}
+		
+		for (Target t : targetList) {
+			t.removeChildren(deleteTarget.getName());
+		}
+		this.targetLookup.remove(deleteTarget.getName());
+	}
+	
+	/////////////////////////////////////////////////////////////////
+	// Utility static methods
+	public static String getElement(Element a, String e) {
+		Node n = a.getElementsByTagName(e).item(0);
+		if (n != null) {
+			Node cn = n.getChildNodes().item(0);
+			if (cn == null) {
+				return "";
+			}
+			return cn.getNodeValue();
+		}
+		return "";
+	}
+
+	public static Boolean isElementDefined(Element a, String e) {
+		Node n = a.getElementsByTagName(e).item(0);
+		if (n != null) {
+			Node cn = n.getChildNodes().item(0);
+			if (cn == null) {
+				return true;
+			}
+			return true;
+		}
+		return false;
+	}
+
+	//////////////////////////////////////////////////////////////////////////////
+	// Special method to cleanup past bugs
+	private void targetWalk(Target target, String path, HashMap<String,Target> targets) {
+		targets.put(path, target);
+		for (String child : target.getChildren()) {
+			Target childTarget = getTarget(child);
+			targetWalk(childTarget, path + "/" + child, targets);
+		}
+	}
+	
+	private void xmlCleanup() {
+		String path = "/"+this.getRootTarget().getName();
+		HashMap<String,Target> targets = new HashMap<String,Target>();
+		targetWalk(this.getRootTarget(),path,targets);
+		
+		ServerWizard2.LOGGER.info("Running XML cleanup...");
+		
+		// IO_CONFIG_SELECT bug
+		TreeMap<String, TreeMap<String,Field>> tmpSettings = new TreeMap<String, TreeMap<String,Field>>(globalSettings);
+		
+		for (Map.Entry<String, TreeMap<String,Field>> settings : tmpSettings.entrySet()) {
+			TreeMap<String,Field> tmpFields = new TreeMap<String,Field>(settings.getValue());
+			Target t = targets.get(settings.getKey());
+			if (t == null) {
+				ServerWizard2.LOGGER.warning("Target not found, removing: "+settings.getKey());
+				globalSettings.remove(settings.getKey());
+			} else {
+				for (Field f : tmpFields.values()) {
+					Attribute a = t.getAttributes().get(f.attributeName);
+					if (a == null) {
+						ServerWizard2.LOGGER.info("Not an attribute in target, removing: "+f.attributeName);
+						globalSettings.get(settings.getKey()).remove(f.attributeName);
+					} else {
+						if (!a.isGlobal()) {
+							globalSettings.get(settings.getKey()).remove(f.attributeName);
+							ServerWizard2.LOGGER.info("Removing global property: "+f.attributeName);
+						}
+					}
+				}
+			}
+			TreeMap<String,Field> tmpSettings2 = globalSettings.get(settings.getKey());
+			
+			if (tmpSettings2 != null) {
+				if (tmpSettings2.isEmpty()) {
+					ServerWizard2.LOGGER.info("Removing global target: "+settings.getKey());
+					globalSettings.remove(settings.getKey());
+				}
+			}
+		}
+		// End IO_CONFIG_SELECT bug
+	}
+	
+}
diff --git a/src/com/ibm/ServerWizard2/Target.java b/src/com/ibm/ServerWizard2/model/Target.java
index 0d41e4e..ef452f4 100644
--- a/src/com/ibm/ServerWizard2/Target.java
+++ b/src/com/ibm/ServerWizard2/model/Target.java
@@ -1,4 +1,4 @@
-package com.ibm.ServerWizard2;
+package com.ibm.ServerWizard2.model;
 
 import java.io.Writer;
 import java.util.HashMap;
@@ -9,6 +9,8 @@ import java.util.Vector;
 import org.w3c.dom.Element;
 import org.w3c.dom.NodeList;
 
+import com.ibm.ServerWizard2.ServerWizard2;
+
 public class Target implements Comparable<Target>, java.io.Serializable {
 	private static final long serialVersionUID = 1L;
 
@@ -16,17 +18,15 @@ public class Target implements Comparable<Target>, java.io.Serializable {
 	private String type = "";
 	private int position = -1;
 	public String parent = ""; // says which parent to inherit attributes from
-								// target_types
-	public boolean instanceModel = false;
-	public boolean isLibraryTarget = false;
+								
 	private Vector<String> parentType = new Vector<String>();
 	private TreeMap<String, Attribute> attributes = new TreeMap<String, Attribute>();
-	//private Vector<Target> children = new Vector<Target>();
 	private Vector<String> children = new Vector<String>();
 	private Vector<String> childrenHidden = new Vector<String>();
 	private TreeMap<Target,Vector<Connection>> busses = new TreeMap<Target,Vector<Connection>>();
 	private Boolean busInited=false;
 	private Boolean hidden = false;
+	private Boolean root = false;
 	private HashMap<String,Boolean> childrenBusTypes = new HashMap<String,Boolean>();
 
 	public Target() {
@@ -38,8 +38,8 @@ public class Target implements Comparable<Target>, java.io.Serializable {
 		this.parent = s.parent;
 		this.position = s.position;
 		this.hidden = s.hidden;
+		this.root = s.root;
 		this.parentType.addAll(s.parentType);
-		this.isLibraryTarget=s.isLibraryTarget;
 
 		for (Map.Entry<String, Attribute> entry : s.getAttributes().entrySet()) {
 			String key = new String(entry.getKey());
@@ -51,17 +51,10 @@ public class Target implements Comparable<Target>, java.io.Serializable {
 		return busses;
 	}
 
-	public void hide(Boolean h) {
-		this.hidden=h;
-	}
 	public Boolean isHidden() {
 		return this.hidden;
 	}
 
-	public void linkBusses(Target t){
-		busses=t.getBusses();
-	}
-
 	public String getName() {
 		if (position==-1 && !name.isEmpty()) {
 			return name;
@@ -78,7 +71,15 @@ public class Target implements Comparable<Target>, java.io.Serializable {
 	public void setName(String name) {
 		this.name = name;
 	}
-
+	public void setRoot() { this.root = true; }
+	public void clearRoot() { this.root = false; }
+	public Boolean isRoot() {
+		//this is for backwards compatibility
+		if (this.getAttribute("CLASS").equals("SYS")) {
+			this.root = true;
+		}
+		return this.root;
+	}
 	////////////////////////////////////////////
 	// Target children handling
 	public Vector<String> getChildren() {
@@ -141,6 +142,9 @@ public class Target implements Comparable<Target>, java.io.Serializable {
 	public Vector<String> getParentType() {
 		return this.parentType;
 	}
+	public void addParentType(String parent_type) {
+		this.parentType.add(parent_type);
+	}	
 	public void setType(String type) {
 		this.type = type;
 	}
@@ -150,11 +154,13 @@ public class Target implements Comparable<Target>, java.io.Serializable {
 	}
 
 	public String getIdPrefix() {
-		String t = type.split("-")[1];
-		if (t.equals("processor")) {
-			t = "proc";
+		String s[] = type.split("-");
+		if (s.length == 1) { return this.name; }
+		
+		if (s[1].equals("processor")) {
+			s[1] = "proc";
 		}
-		return t;
+		return s[1];
 	}
 
 	////////////////////////////////////////////////////////
@@ -162,18 +168,24 @@ public class Target implements Comparable<Target>, java.io.Serializable {
 	public TreeMap<String, Attribute> getAttributes() {
 		return attributes;
 	}
-	public void copyAttributes(Target s) {
-		for (Map.Entry<String, Attribute> entry : s.getAttributes().entrySet()) {
+	
+	public void deepCopyAttributes(HashMap<String,Target> model,HashMap<String,Target> instances) {
+		ServerWizard2.LOGGER.info("Defaulting attributes for: "+this.getName());
+		Target source = model.get(this.getName());
+		if (source == null) {
+			source = instances.get(this.getName());
+		}
+		for (Map.Entry<String, Attribute> entry : source.getAttributes().entrySet()) {
 			String key = new String(entry.getKey());
 			Attribute value = new Attribute(entry.getValue());
 			this.attributes.put(key, value);
 		}
+		for (String c : this.getAllChildren()) {
+			Target child = instances.get(c);
+			child.deepCopyAttributes(model, instances);
+		}
 	}
-
-	public void linkAttributes(Target t) {
-		this.attributes.clear();
-		this.attributes = t.getAttributes();
-	}
+	
 	public boolean attributeExists(String attribute) {
 		if (attributes.get(attribute) == null) {
 			return false;
@@ -186,13 +198,8 @@ public class Target implements Comparable<Target>, java.io.Serializable {
 		}
 		return attributes.get(attribute).getValue().getValue();
 	}
-	public boolean isAttribute(String attribute) {
-		if (attributes.get(attribute) == null) {
-			return false;
-		}
-		return true;
-	}
-	public void copyAttributesFromParent(Target s) {
+	
+	void copyAttributesFromParent(Target s) {
 		for (Map.Entry<String, Attribute> entry : s.getAttributes().entrySet()) {
 			String key = entry.getKey();
 			Attribute tmpAttribute = entry.getValue();
@@ -209,24 +216,6 @@ public class Target implements Comparable<Target>, java.io.Serializable {
 		}
 	}
 
-	public void updateAttributeValue(String attributeName, String value) {
-		Attribute attribute = attributes.get(attributeName);
-		if (attribute == null) {
-			throw new NullPointerException("Invalid Attribute " + attributeName + " in Target "
-					+ this.type);
-		}
-		AttributeValue val = attribute.getValue();
-		val.setValue(value);
-	}
-
-	public void updateAttributeValue(String attributeName, AttributeValue value) {
-		Attribute attribute = attributes.get(attributeName);
-		if (attribute == null) {
-			throw new NullPointerException("Invalid Attribute " + attributeName + " in Target "
-					+ this.type);
-		}
-		attribute.getValue().setValue(value);
-	}
 	public Boolean isInput() {
 		String dir = this.getAttribute("DIRECTION");
 		if (dir.equals("IN") || dir.equals("INOUT")) {
@@ -245,7 +234,7 @@ public class Target implements Comparable<Target>, java.io.Serializable {
 	public Boolean isSystem() {
 		return (this.getAttribute("CLASS").equals("SYS"));
 	}
-	public Boolean isCard() {
+	Boolean isCard() {
 		return (this.getAttribute("CLASS").equals("CARD") || this.getAttribute("CLASS").equals(
 				"MOTHERBOARD"));
 	}
@@ -255,8 +244,18 @@ public class Target implements Comparable<Target>, java.io.Serializable {
 	public Boolean isNode() {
 		return (this.getAttribute("CLASS").equals("ENC"));
 	}
-
-	public void setAttributeValue(String attr, String value) {
+	Boolean isUnit() {
+		return (this.getAttribute("CLASS").equals("UNIT") && !this.type.equals("unit") && type.startsWith("unit-"));
+	}
+	Boolean isOverrideGroup() {
+		return (this.getAttribute("MRW_TYPE").equals("TARGET_OVERRIDE_GROUP"));
+	}
+	Boolean isOverride() {
+		return (this.getAttribute("MRW_TYPE").equals("TARGET_OVERRIDE"));
+	}
+	
+	
+	private void setAttributeValue(String attr, String value) {
 		Attribute attribute = this.attributes.get(attr);
 		if (attribute == null) {
 			return;
@@ -268,22 +267,11 @@ public class Target implements Comparable<Target>, java.io.Serializable {
 		this.setAttributeValue("POSITION", String.valueOf(this.getPosition()));
 
 	}
-/*
-	public String toString() {
-		String s = "TARGET: " + this.type;
-		for (Map.Entry<String, Attribute> entry : this.getAttributes().entrySet()) {
-			Attribute attr = new Attribute(entry.getValue());
-			s = s + "\t" + attr.toString() + "\n";
-		}
-		return s;
-	}
-*/
 	public int compareTo(Target arg0) {
 		Target t = (Target)arg0;
 		return this.getType().compareTo(t.getType());
 	}
 
-
 	///////////////////////////////////////////////////
 	// connection/bus handling
 	public Boolean isBusHidden(String busType) {
@@ -372,35 +360,28 @@ public class Target implements Comparable<Target>, java.io.Serializable {
 	}
 
 	public void readInstanceXML(Element t, TreeMap<String, Target> targetModels) throws Exception {
-		instanceModel = true;
 		name = SystemModel.getElement(t, "instance_name");
 		type = SystemModel.getElement(t, "type");
-		String library_target = SystemModel.getElement(t, "library_target");
-		if (library_target.equals("true")) {
-			this.isLibraryTarget=true;
-		} else {
-			this.isLibraryTarget=false;
-		}
+		String rootStr = SystemModel.getElement(t, "is_root");
+		if (rootStr.equals("true")) { this.root = true; }
+
 		if (name.isEmpty()) {
 			name = SystemModel.getElement(t, "id");
-			instanceModel = false;
 		} else {
 			String tmpPos = SystemModel.getElement(t, "position");
 			if (!tmpPos.isEmpty()) {
 				setPosition(tmpPos);
 			}
 		}
-
+		
 		NodeList childList = t.getElementsByTagName("child_id");
 		for (int j = 0; j < childList.getLength(); ++j) {
 			Element attr = (Element) childList.item(j);
-			//TargetName targetName = new TargetName(attr.getFirstChild().getNodeValue(),false);
 			children.add(attr.getFirstChild().getNodeValue());
 		}
 		childList = t.getElementsByTagName("hidden_child_id");
 		for (int j = 0; j < childList.getLength(); ++j) {
 			Element attr = (Element) childList.item(j);
-			//argetName targetName = new TargetName(attr.getFirstChild().getNodeValue(),true);
 			childrenHidden.add(attr.getFirstChild().getNodeValue());
 		}
 
@@ -430,6 +411,7 @@ public class Target implements Comparable<Target>, java.io.Serializable {
 			busses.get(busTarget).add(conn);
 		}
 	}
+
 	public void writeInstanceXML(Writer out,HashMap<String,Target> targetLookup,HashMap<String,Boolean>targetWritten) throws Exception {
 		if (targetWritten.containsKey(this.getName())) {
 			return;
@@ -438,8 +420,9 @@ public class Target implements Comparable<Target>, java.io.Serializable {
 		out.write("<targetInstance>\n");
 		out.write("\t<id>" + this.getName() + "</id>\n");
 		out.write("\t<type>" + this.getType() + "</type>\n");
-		out.write("\t<library_target>" + this.isLibraryTarget + "</library_target>\n");
-		//out.write("\t<class>" + this.getAttribute("CLASS") + "</class>\n");
+		String rootStr = "false";
+		if (this.isRoot()) { rootStr = "true"; }
+		out.write("\t<is_root>" + rootStr + "</is_root>\n");
 		if (!this.name.isEmpty()) {
 			out.write("\t<instance_name>" + this.name + "</instance_name>\n");
 		} else {
@@ -474,4 +457,113 @@ public class Target implements Comparable<Target>, java.io.Serializable {
 			child.writeInstanceXML(out, targetLookup, targetWritten);
 		}
 	}
+	
+	// New format
+	public void readTargetXML(Element t, TreeMap<String, Target> targetModels, HashMap<String, Attribute> attributeModels) throws Exception {
+		name = SystemModel.getElement(t, "instance_name");
+		type = SystemModel.getElement(t, "type");
+		String rootStr = SystemModel.getElement(t, "is_root");
+		if (rootStr.equals("true")) { this.root = true; }
+
+		String tmpPos = SystemModel.getElement(t, "position");
+		if (!tmpPos.isEmpty()) {
+			setPosition(tmpPos);
+		}
+		parent = SystemModel.getElement(t, "parent");
+		parentType.removeAllElements();
+		NodeList parentList = t.getElementsByTagName("parent_type");
+		for (int i = 0; i < parentList.getLength(); i++) {
+			Element e = (Element) parentList.item(i);
+			parentType.add(e.getChildNodes().item(0).getNodeValue());
+		}		
+
+		NodeList childList = t.getElementsByTagName("child_id");
+		for (int j = 0; j < childList.getLength(); ++j) {
+			Element attr = (Element) childList.item(j);
+			children.add(attr.getFirstChild().getNodeValue());
+		}
+		childList = t.getElementsByTagName("hidden_child_id");
+		for (int j = 0; j < childList.getLength(); ++j) {
+			Element attr = (Element) childList.item(j);
+			childrenHidden.add(attr.getFirstChild().getNodeValue());
+		}
+
+		NodeList attrList = t.getElementsByTagName("attribute");
+		for (int j = 0; j < attrList.getLength(); ++j) {
+			Element attr = (Element) attrList.item(j);
+			String id = SystemModel.getElement(attr, "id");
+			Attribute a = attributeModels.get(id);
+			if (a==null) {
+				ServerWizard2.LOGGER.info("Attribute dropped: "+id+" from "+this.getName());
+			} else {
+				Attribute newA = new Attribute(a);
+				attributes.put(newA.name, newA);
+				newA.value.readInstanceXML(attr);
+			}
+		}
+		NodeList busList = t.getElementsByTagName("bus");
+		for (int j = 0; j < busList.getLength(); ++j) {
+			Element bus = (Element) busList.item(j);
+			String busType = SystemModel.getElement(bus, "bus_type");
+			Connection conn = new Connection();
+			conn.busType=busType;
+			Target busTarget=targetModels.get(busType);
+			if (busTarget==null) {
+				throw new Exception("Invalid Bus Type "+busType+" for target "+this.getName());
+			}
+			conn.busTarget = new Target(busTarget);
+			conn.readInstanceXML(bus);
+			busses.get(busTarget).add(conn);
+		}
+	}	
+	public void writeTargetXML(Writer out,HashMap<String,Target> targetLookup, HashMap<String,Boolean>targetWritten) throws Exception {
+		if (targetWritten.containsKey(this.getName())) {
+			return;
+		}
+		targetWritten.put(this.getName(), true);
+		out.write("<targetPart>\n");
+		out.write("\t<id>" + this.getName() + "</id>\n");
+		out.write("\t<type>" + this.getType() + "</type>\n");
+		String rootStr = "false";
+		if (this.isRoot()) { rootStr = "true"; }
+		out.write("\t<is_root>" + rootStr + "</is_root>\n");
+		if (!this.name.isEmpty()) {
+			out.write("\t<instance_name>" + this.name + "</instance_name>\n");
+		} else {
+			out.write("\t<instance_name>" + this.getIdPrefix() + "</instance_name>\n");
+		}
+
+		out.write("\t<position>" + getPosition() + "</position>\n");
+		out.write("\t<parent>" + this.parent + "</parent>\n");
+		for (String p_type : this.parentType) {
+			out.write("\t<parent_type>" + p_type + "</parent_type>\n");
+		}
+		
+		//write children
+		for (String childStr : this.children) {
+			out.write("\t<child_id>"+childStr+"</child_id>\n");
+		}
+		for (String childStr : this.childrenHidden) {
+			out.write("\t<hidden_child_id>"+childStr+"</hidden_child_id>\n");
+		}
+		//write attributes
+		for (Map.Entry<String, Attribute> entry : getAttributes().entrySet()) {
+			Attribute attr = new Attribute(entry.getValue());
+			attr.writeInstanceXML(out);
+
+		}
+		//write busses
+		for (Map.Entry<Target, Vector<Connection>> entry : busses.entrySet()) {
+			for (Connection conn : entry.getValue()) {
+				conn.writeInstanceXML(out);
+			}
+		}
+		out.write("</targetPart>\n");
+
+		//recursively write children
+		for (String childStr : this.getAllChildren()) {
+			Target child = targetLookup.get(childStr);
+			child.writeTargetXML(out, targetLookup, targetWritten);
+		}
+	}
 }
diff --git a/src/com/ibm/ServerWizard2/XmlHandler.java b/src/com/ibm/ServerWizard2/model/XmlHandler.java
index c2c0743..0849ef5 100644
--- a/src/com/ibm/ServerWizard2/XmlHandler.java
+++ b/src/com/ibm/ServerWizard2/model/XmlHandler.java
@@ -1,4 +1,4 @@
-package com.ibm.ServerWizard2;
+package com.ibm.ServerWizard2.model;
 
 import java.util.ArrayList;
 
@@ -7,22 +7,18 @@ import org.xml.sax.SAXParseException;
 import org.xml.sax.helpers.DefaultHandler;
 
 public class XmlHandler extends DefaultHandler {
-	protected boolean validationError = false;
-	protected SAXParseException saxParseException = null;
-	protected ArrayList<String> warnings = new ArrayList<String>();
 	
-	protected String detailedErrorString = "";
+	
+	private ArrayList<String> warnings = new ArrayList<String>();
+	
+	private String detailedErrorString = "";
 
 	public void error(SAXParseException exception) throws SAXException {
 		detailedErrorString += "Line:" + exception.getLineNumber() + " , Col:" + exception.getColumnNumber() + ", Error:" + exception.getMessage() + "\n";
-		validationError = true;
-		saxParseException = exception;
 	}
 
 	public void fatalError(SAXParseException exception) throws SAXException {
 		detailedErrorString += "Line:" + exception.getLineNumber() + " , Col:" + exception.getColumnNumber() + ", Error:" + exception.getMessage() + "\n";
-		validationError = true;
-		saxParseException = exception;
 	}
 
 	public void warning(SAXParseException exception) throws SAXException {
diff --git a/src/com/ibm/ServerWizard2/GithubFile.java b/src/com/ibm/ServerWizard2/utility/GithubFile.java
index 1f36d46..6d14e50 100644
--- a/src/com/ibm/ServerWizard2/GithubFile.java
+++ b/src/com/ibm/ServerWizard2/utility/GithubFile.java
@@ -1,4 +1,4 @@
-package com.ibm.ServerWizard2;
+package com.ibm.ServerWizard2.utility;
 
 import java.io.BufferedReader;
 import java.io.BufferedWriter;
@@ -21,6 +21,8 @@ import javax.swing.ProgressMonitorInputStream;
 import org.eclipse.jface.dialogs.MessageDialog;
 import org.json.simple.parser.JSONParser;
 
+import com.ibm.ServerWizard2.ServerWizard2;
+
 public class GithubFile {
 	private final String API_URL="https://api.github.com/repos/";
 	private static String UPDATE_FILE="serverwiz2.update";
@@ -56,7 +58,7 @@ public class GithubFile {
 	public String getVersion() {
 		return version;
 	}
-	public static String getWorkingDir() {
+	private static String getWorkingDir() {
 		// gets working directory whether running as jar or from eclipse
 		File f = new File("").getAbsoluteFile();
 		String workingDir = f.getAbsolutePath() + System.getProperty("file.separator");
@@ -65,7 +67,7 @@ public class GithubFile {
 	public boolean localFileExists() {
 		return this.localFileSize > 0;
 	}
-	public void init() {
+	private void init() {
 		String subDir=this.subDirectory+System.getProperty("file.separator");
 		String workingDir=GithubFile.getWorkingDir();
 		if (this.isRelease) {
@@ -84,7 +86,7 @@ public class GithubFile {
 			localFileSize = this.localFile.length();
 		}
 	}
-	public void mkdir() throws Exception {
+	private void mkdir() throws Exception {
 		//create local directory
 		File sdir = new File(localDirectory);
 		if (!sdir.exists()) {
diff --git a/src/com/ibm/ServerWizard2/MyLogFormatter.java b/src/com/ibm/ServerWizard2/utility/MyLogFormatter.java
index 2bac399..8de6406 100644
--- a/src/com/ibm/ServerWizard2/MyLogFormatter.java
+++ b/src/com/ibm/ServerWizard2/utility/MyLogFormatter.java
@@ -1,4 +1,4 @@
-package com.ibm.ServerWizard2;
+package com.ibm.ServerWizard2.utility;
 
 import java.text.DateFormat;
 import java.text.SimpleDateFormat;
diff --git a/src/com/ibm/ServerWizard2/ArrayDialogCellEditor.java b/src/com/ibm/ServerWizard2/view/ArrayDialogCellEditor.java
index 12393e9..97d246c 100644
--- a/src/com/ibm/ServerWizard2/ArrayDialogCellEditor.java
+++ b/src/com/ibm/ServerWizard2/view/ArrayDialogCellEditor.java
@@ -1,12 +1,14 @@
-package com.ibm.ServerWizard2;
+package com.ibm.ServerWizard2.view;
 
 import org.eclipse.jface.viewers.DialogCellEditor;
 import org.eclipse.swt.SWT;
 import org.eclipse.swt.widgets.Composite;
 import org.eclipse.swt.widgets.Control;
 
+import com.ibm.ServerWizard2.model.Field;
+
 public class ArrayDialogCellEditor extends DialogCellEditor {
-	Field field;
+	private Field field;
 	
 	public ArrayDialogCellEditor(Composite parent,Field field) {
 		super(parent);
diff --git a/src/com/ibm/ServerWizard2/ArrayEditingSupport.java b/src/com/ibm/ServerWizard2/view/ArrayEditingSupport.java
index afff1b3..8a65f6f 100644
--- a/src/com/ibm/ServerWizard2/ArrayEditingSupport.java
+++ b/src/com/ibm/ServerWizard2/view/ArrayEditingSupport.java
@@ -1,4 +1,4 @@
-package com.ibm.ServerWizard2;
+package com.ibm.ServerWizard2.view;
 
 import java.util.Vector;
 
diff --git a/src/com/ibm/ServerWizard2/ArrayEditorDialog.java b/src/com/ibm/ServerWizard2/view/ArrayEditorDialog.java
index 69ddf44..f4f0ca2 100644
--- a/src/com/ibm/ServerWizard2/ArrayEditorDialog.java
+++ b/src/com/ibm/ServerWizard2/view/ArrayEditorDialog.java
@@ -1,4 +1,4 @@
-package com.ibm.ServerWizard2;
+package com.ibm.ServerWizard2.view;
 
 import java.util.Vector;
 
diff --git a/src/com/ibm/ServerWizard2/ArrayLabelProvider.java b/src/com/ibm/ServerWizard2/view/ArrayLabelProvider.java
index 1f13fb4..77df8aa 100644
--- a/src/com/ibm/ServerWizard2/ArrayLabelProvider.java
+++ b/src/com/ibm/ServerWizard2/view/ArrayLabelProvider.java
@@ -1,4 +1,4 @@
-package com.ibm.ServerWizard2;
+package com.ibm.ServerWizard2.view;
 
 import java.util.Vector;
 
diff --git a/src/com/ibm/ServerWizard2/AttributeEditingSupport.java b/src/com/ibm/ServerWizard2/view/AttributeEditingSupport.java
index 99f7234..6b63098 100644
--- a/src/com/ibm/ServerWizard2/AttributeEditingSupport.java
+++ b/src/com/ibm/ServerWizard2/view/AttributeEditingSupport.java
@@ -1,4 +1,4 @@
-package com.ibm.ServerWizard2;
+package com.ibm.ServerWizard2.view;
 
 import java.util.Vector;
 
@@ -12,18 +12,25 @@ import org.eclipse.jface.viewers.TableViewer;
 import org.eclipse.jface.viewers.TextCellEditor;
 import org.eclipse.swt.SWT;
 
+import com.ibm.ServerWizard2.model.Field;
+
 public class AttributeEditingSupport extends EditingSupport {
 	private CellEditor editor;
 	private TableViewer viewer;
+	private Boolean ignoreReadonly = false;
 
 	public AttributeEditingSupport(TableViewer viewer) {
 		super(viewer);
 		this.viewer=viewer;
 	}
 
+	public void setIgnoreReadonly() {
+		ignoreReadonly = true;
+	}
 	@Override
 	protected boolean canEdit(Object obj) {
 		Field f = (Field)obj;
+		if (this.ignoreReadonly == true) { return true; }
 		return !f.readonly;
 	}
 
@@ -52,8 +59,6 @@ public class AttributeEditingSupport extends EditingSupport {
 			this.editor.addListener(new ICellEditorListener() {
 
 				public void applyEditorValue() {
-					// TODO Auto-generated method stub
-
 				}
 
 				public void cancelEditor() {
@@ -62,7 +67,6 @@ public class AttributeEditingSupport extends EditingSupport {
 				}
 
 				public void editorValueChanged(boolean arg0, boolean arg1) {
-					// TODO Auto-generated method stub
 					if (!arg1) {
 						MessageDialog.openError(null, "Invalid format", editor.getErrorMessage());
 					}
@@ -82,7 +86,10 @@ public class AttributeEditingSupport extends EditingSupport {
 	@Override
 	protected void setValue(Object obj, Object value) {
 		Field f = (Field) obj;
-		f.value = (String) value;
-		this.getViewer().update(obj, null);
+		if (f.value==null || !f.value.equals((String)value)) { 
+			f.value = (String) value;
+			this.getViewer().update(obj, null);
+			this.viewer.getTable().notifyListeners(SWT.CHANGED, null);
+		}
 	}
 }
diff --git a/src/com/ibm/ServerWizard2/AttributeValidator.java b/src/com/ibm/ServerWizard2/view/AttributeValidator.java
index 0a2ff0e..ca20e3f 100644
--- a/src/com/ibm/ServerWizard2/AttributeValidator.java
+++ b/src/com/ibm/ServerWizard2/view/AttributeValidator.java
@@ -1,7 +1,9 @@
-package com.ibm.ServerWizard2;
+package com.ibm.ServerWizard2.view;
 
 import org.eclipse.jface.viewers.ICellEditorValidator;
 
+import com.ibm.ServerWizard2.model.Field;
+
 public class AttributeValidator implements ICellEditorValidator {
 	Field f;
 	public AttributeValidator(Field f) {
diff --git a/src/com/ibm/ServerWizard2/DialogHandler.java b/src/com/ibm/ServerWizard2/view/DialogHandler.java
index 0bfa0a4..9c7a073 100644
--- a/src/com/ibm/ServerWizard2/DialogHandler.java
+++ b/src/com/ibm/ServerWizard2/view/DialogHandler.java
@@ -1,4 +1,4 @@
-package com.ibm.ServerWizard2;
+package com.ibm.ServerWizard2.view;
 
 import java.util.logging.ConsoleHandler;
 import java.util.logging.LogRecord;
diff --git a/src/com/ibm/ServerWizard2/view/ErrataViewer.java b/src/com/ibm/ServerWizard2/view/ErrataViewer.java
new file mode 100644
index 0000000..8c62cbc
--- /dev/null
+++ b/src/com/ibm/ServerWizard2/view/ErrataViewer.java
@@ -0,0 +1,112 @@
+package com.ibm.ServerWizard2.view;

+

+import java.util.Vector;

+

+import org.eclipse.jface.dialogs.Dialog;

+import org.eclipse.jface.dialogs.IDialogConstants;

+import org.eclipse.swt.SWT;

+import org.eclipse.swt.custom.StyledText;

+import org.eclipse.swt.events.SelectionAdapter;

+import org.eclipse.swt.events.SelectionEvent;

+import org.eclipse.swt.graphics.Point;

+import org.eclipse.swt.layout.FillLayout;

+import org.eclipse.swt.widgets.Button;

+import org.eclipse.swt.widgets.Composite;

+import org.eclipse.swt.widgets.Control;

+import org.eclipse.swt.widgets.Event;

+import org.eclipse.swt.widgets.Listener;

+import org.eclipse.swt.widgets.Shell;

+import org.eclipse.swt.widgets.Table;

+import org.eclipse.swt.widgets.TableItem;

+import org.eclipse.wb.swt.SWTResourceManager;

+

+import com.ibm.ServerWizard2.model.Errata;

+

+public class ErrataViewer extends Dialog {

+

+	/**

+	 * Create the dialog.

+	 * 

+	 * @param parentShell

+	 */

+	Vector<Errata> errata = new Vector<Errata>();

+	private Table table;

+	private StyledText styledText;

+	

+	public ErrataViewer(Shell parentShell, Vector<Errata> errata) {

+		super(parentShell);

+		this.errata = errata;

+	}

+

+	/**

+	 * Create contents of the dialog.

+	 * 

+	 * @param parent

+	 */

+	@Override

+	protected Control createDialogArea(Composite parent) {

+		Composite container = (Composite) super.createDialogArea(parent);

+		container.setLayout(new FillLayout(SWT.HORIZONTAL));

+

+		table = new Table(container, SWT.CHECK | SWT.BORDER | SWT.V_SCROLL | SWT.H_SCROLL);

+		table.setSize(100, 100);

+

+		styledText = new StyledText(container, SWT.BORDER);

+		styledText.setFont(SWTResourceManager.getFont("Courier New", 8, SWT.NORMAL));

+		

+		for (int i=errata.size()-1;i>=0;i--) {

+			TableItem item = new TableItem(table, SWT.NONE);

+			item.setText(errata.get(i).getId());

+			item.setData(errata.get(i));

+		}

+		

+		table.addSelectionListener(new SelectionAdapter() {

+			@Override

+			public void widgetSelected(SelectionEvent arg0) {

+				if (table.getSelectionCount() > 0) {

+					TableItem item = table.getSelection()[0];

+					Errata e = (Errata) item.getData();

+					styledText.setText(e.getDetail());

+				}

+			}

+		});

+		

+		table.addListener (SWT.Selection, new Listener() {

+			@Override

+			public void handleEvent(Event event) {

+				TableItem item = (TableItem) event.item;

+				Errata e = (Errata) item.getData();

+				if (item.getChecked()) {

+					e.setApplied(true);

+				} else {

+					e.setApplied(false);

+				}

+			}

+		});

+		

+		return container;

+	}

+

+	/**

+	 * Create contents of the button bar.

+	 * 

+	 * @param parent

+	 */

+	@Override

+	protected void createButtonsForButtonBar(Composite parent) {

+		Button button = createButton(parent, IDialogConstants.OK_ID, IDialogConstants.OK_LABEL, true);

+		createButton(parent, IDialogConstants.CANCEL_ID, IDialogConstants.CANCEL_LABEL, false);

+	}

+

+	/**

+	 * Return the initial size of the dialog.

+	 */

+	@Override

+	protected Point getInitialSize() {

+		return new Point(675, 377);

+	}

+	protected void configureShell(Shell newShell) {

+		super.configureShell(newShell);

+		newShell.setText("Errata Viewer");

+	}

+}

diff --git a/src/com/ibm/ServerWizard2/LogViewerDialog.java b/src/com/ibm/ServerWizard2/view/LogViewerDialog.java
index 6195ee9..7777a1c 100644
--- a/src/com/ibm/ServerWizard2/LogViewerDialog.java
+++ b/src/com/ibm/ServerWizard2/view/LogViewerDialog.java
@@ -1,4 +1,4 @@
-package com.ibm.ServerWizard2;
+package com.ibm.ServerWizard2.view;
 
 import org.eclipse.jface.dialogs.Dialog;
 import org.eclipse.jface.dialogs.IDialogConstants;
diff --git a/src/com/ibm/ServerWizard2/MainDialog.java b/src/com/ibm/ServerWizard2/view/MainDialog.java
index 08c287d..9aa5d30 100644
--- a/src/com/ibm/ServerWizard2/MainDialog.java
+++ b/src/com/ibm/ServerWizard2/view/MainDialog.java
@@ -1,8 +1,6 @@
-package com.ibm.ServerWizard2;
+package com.ibm.ServerWizard2.view;
 
-import java.util.HashMap;
 import java.util.Map;
-import java.util.TreeMap;
 import java.util.Vector;
 
 import org.eclipse.jface.dialogs.Dialog;
@@ -28,6 +26,7 @@ import org.eclipse.swt.widgets.Button;
 import org.eclipse.swt.widgets.Combo;
 import org.eclipse.swt.widgets.Composite;
 import org.eclipse.swt.widgets.Control;
+import org.eclipse.swt.widgets.DirectoryDialog;
 import org.eclipse.swt.widgets.Event;
 import org.eclipse.swt.widgets.FileDialog;
 import org.eclipse.swt.widgets.Label;
@@ -45,6 +44,15 @@ import org.eclipse.swt.widgets.TreeColumn;
 import org.eclipse.swt.widgets.TreeItem;
 import org.eclipse.wb.swt.SWTResourceManager;
 
+import com.ibm.ServerWizard2.ServerWizard2;
+import com.ibm.ServerWizard2.controller.TargetWizardController;
+import com.ibm.ServerWizard2.model.Attribute;
+import com.ibm.ServerWizard2.model.Connection;
+import com.ibm.ServerWizard2.model.ConnectionEndpoint;
+import com.ibm.ServerWizard2.model.Field;
+import com.ibm.ServerWizard2.model.Target;
+import com.ibm.ServerWizard2.utility.GithubFile;
+
 public class MainDialog extends Dialog {
 	private TableViewer viewer;
 	private Tree tree;
@@ -60,14 +68,16 @@ public class MainDialog extends Dialog {
 	private ConnectionEndpoint source;
 	private ConnectionEndpoint dest;
 
-	TargetWizardController controller;
+	private TargetWizardController controller;
 
 	// Buttons
 	private Button btnAddTarget;
 	private Button btnCopyInstance;
+	private Button btnDefaults;
 	private Button btnDeleteTarget;
 	private Button btnSave;
 	private Button btnOpen;
+	private Button btnOpenLib;
 	private Button btnDeleteConnection;
 	private Button btnSaveAs;
 
@@ -83,6 +93,7 @@ public class MainDialog extends Dialog {
 	private Label lblInstanceType;
 	private Composite compositeInstance;
 	private Composite composite;
+	private Composite buttonRow1;
 
 	private Vector<Field> attributes;
 	private Combo cmbBusses;
@@ -100,7 +111,10 @@ public class MainDialog extends Dialog {
 	private Composite compositeDir;
 	private Button btnHideBusses;
 	private Button btnShowHidden;
-
+	
+	private AttributeEditingSupport attributeEditor;
+	private Label label;
+	private Label label_1;
 	/**
 	 * Create the dialog.
 	 *
@@ -129,9 +143,12 @@ public class MainDialog extends Dialog {
 	protected Control createDialogArea(Composite parent) {
 		container = (Composite) super.createDialogArea(parent);
 		container.setFont(SWTResourceManager.getFont("Arial", 9, SWT.NORMAL));
-		container.setLayout(new GridLayout(1, false));
+		GridLayout gl_container = new GridLayout(1, false);
+		gl_container.verticalSpacing = 0;
+		container.setLayout(gl_container);
 
 		composite = new Composite(container, SWT.NONE);
+		
 		RowLayout rl_composite = new RowLayout(SWT.HORIZONTAL);
 		rl_composite.spacing = 20;
 		rl_composite.wrap = false;
@@ -147,7 +164,17 @@ public class MainDialog extends Dialog {
 		gd_sashForm_1.heightHint = 375;
 		gd_sashForm_1.widthHint = 712;
 		sashForm_1.setLayoutData(gd_sashForm_1);
+		
+		buttonRow1 = new Composite(container, SWT.NONE);
+		GridData gd_buttonRow1 = new GridData(SWT.CENTER, SWT.CENTER, false, false, 1, 1);
+		gd_buttonRow1.widthHint = 751;
+		buttonRow1.setLayoutData(gd_buttonRow1);
+		GridLayout rl_buttonRow1 = new GridLayout(18, false);
+		buttonRow1.setLayout(rl_buttonRow1);
 
+		this.createButtonsForButtonBar2(buttonRow1);
+
+		
 		sashForm = new SashForm(sashForm_1, SWT.NONE);
 
 		// Target Instances View
@@ -189,7 +216,7 @@ public class MainDialog extends Dialog {
 		lblInstanceType.setText("Instance Type:");
 		lblInstanceType.setFont(SWTResourceManager.getFont("Arial", 9, SWT.NORMAL));
 
-		combo = new Combo(compositeInstance, SWT.NONE);
+		combo = new Combo(compositeInstance, SWT.READ_ONLY);
 		GridData gd_combo = new GridData(SWT.FILL, SWT.CENTER, true, false, 1, 1);
 		gd_combo.widthHint = 167;
 		combo.setLayoutData(gd_combo);
@@ -216,17 +243,24 @@ public class MainDialog extends Dialog {
 		btnDeleteTarget.setLayoutData(new GridData(SWT.FILL, SWT.CENTER, false, false, 1, 1));
 		btnDeleteTarget.setFont(SWTResourceManager.getFont("Arial", 9, SWT.NORMAL));
 		btnDeleteTarget.setText("Delete Instance");
-				new Label(compositeInstance, SWT.NONE);
-
+		
 				btnShowHidden = new Button(compositeInstance, SWT.CHECK);
+				GridData gd_btnShowHidden = new GridData(SWT.LEFT, SWT.CENTER, false, false, 1, 1);
+				gd_btnShowHidden.heightHint = 10;
+				btnShowHidden.setLayoutData(gd_btnShowHidden);
 				btnShowHidden.setText(" Show Hidden");
-
-				btnCopyInstance = new Button(compositeInstance, SWT.NONE);
-				btnCopyInstance.setLayoutData(new GridData(SWT.CENTER, SWT.CENTER, true, false, 1, 1));
-				btnCopyInstance.setText("Copy Node or Connector");
-				btnCopyInstance.setFont(SWTResourceManager.getFont("Arial", 9, SWT.NORMAL));
-				btnCopyInstance.setEnabled(false);
-		// new Label(compositeInstance, SWT.NONE);
+		
+		btnCopyInstance = new Button(compositeInstance, SWT.NONE);
+		btnCopyInstance.setLayoutData(new GridData(SWT.CENTER, SWT.CENTER, true, false, 1, 1));
+		btnCopyInstance.setText("Copy Node or Connector");
+		btnCopyInstance.setFont(SWTResourceManager.getFont("Arial", 9, SWT.NORMAL));
+		btnCopyInstance.setEnabled(false);
+
+		btnDefaults = new Button(compositeInstance, SWT.NONE);
+		btnDefaults.setLayoutData(new GridData(SWT.CENTER, SWT.CENTER, true, false, 1, 1));
+		btnDefaults.setText("Restore Defaults");
+		btnDefaults.setFont(SWTResourceManager.getFont("Arial", 9, SWT.NORMAL));
+		btnDefaults.setEnabled(false);
 
 		// ////////////////////////////////////////////////////
 		// Add Busses Tab
@@ -279,8 +313,8 @@ public class MainDialog extends Dialog {
 
 		lblInstanceDirections = new Label(compositeDir, SWT.NONE);
 		lblInstanceDirections.setFont(SWTResourceManager.getFont("Arial", 8, SWT.NORMAL));
-		lblInstanceDirections.setText("Steps for adding a new instance\r\n"
-				+ "1. Select parent instance in Instance Tree (sys-0 if just starting)\r\n"
+		lblInstanceDirections.setText("Select 'chip' to create a new part or 'sys-' to create a system\r\n"
+				+ "1. Select parent instance in Instance Tree\r\n"
 				+ "2. Select new instance type in dropdown\r\n"
 				+ "3. (Optional) Enter custom name\r\n" + "4. Click \"Add Instance\"");
 		lblInstanceDirections.setForeground(SWTResourceManager.getColor(SWT.COLOR_BLUE));
@@ -305,7 +339,6 @@ public class MainDialog extends Dialog {
 		this.setDirtyState(false);
 		// load file if passed on command line
 		if (!mrwFilename.isEmpty()) {
-			ServerWizard2.LOGGER.info("Loading MRW: " + mrwFilename);
 			controller.readXML(mrwFilename);
 			setFilename(mrwFilename);
 		}
@@ -317,18 +350,23 @@ public class MainDialog extends Dialog {
 		// columnName.setWidth(200);
 		sashForm.setWeights(new int[] { 1, 1 });
 		columnName.pack();
+		
 		return container;
 	}
 
-	/**
-	 * Create contents of the button bar.
-	 *
-	 * @param parent
-	 */
-	@Override
 	protected void createButtonsForButtonBar(Composite parent) {
-		parent.setFont(SWTResourceManager.getFont("Arial", 9, SWT.NORMAL));
-		Button btnNew = createButton(parent, IDialogConstants.NO_ID, "New", false);
+		parent.setEnabled(false);
+		 GridLayout layout = (GridLayout)parent.getLayout();
+		  layout.marginHeight = 0;
+	}
+	
+	protected void createButtonsForButtonBar2(Composite row1) {
+		row1.setFont(SWTResourceManager.getFont("Arial", 9, SWT.NORMAL));
+		
+		Button btnNew = createButton(row1, IDialogConstants.NO_ID, "New", false);
+		GridData gd_btnNew = new GridData(SWT.LEFT, SWT.CENTER, false, false, 1, 1);
+		gd_btnNew.widthHint = 70;
+		btnNew.setLayoutData(gd_btnNew);
 		btnNew.setFont(SWTResourceManager.getFont("Arial", 9, SWT.NORMAL));
 		btnNew.addSelectionListener(new SelectionAdapter() {
 			@Override
@@ -345,13 +383,20 @@ public class MainDialog extends Dialog {
 					setFilename("");
 					initAll();
 					setDirtyState(false);
+					refreshInstanceTree();
+					refreshConnections();
+					updateView();
+					
 				} catch (Exception e1) {
 					e1.printStackTrace();
 				}
 			}
 		});
 
-		btnOpen = createButton(parent, IDialogConstants.NO_ID, "Open", false);
+		btnOpen = createButton(row1, IDialogConstants.NO_ID, "Open...", false);
+		GridData gd_btnOpen = new GridData(SWT.LEFT, SWT.CENTER, false, false, 1, 1);
+		gd_btnOpen.widthHint = 70;
+		btnOpen.setLayoutData(gd_btnOpen);
 		btnOpen.setFont(SWTResourceManager.getFont("Arial", 9, SWT.NORMAL));
 		btnOpen.addSelectionListener(new SelectionAdapter() {
 			@Override
@@ -371,15 +416,18 @@ public class MainDialog extends Dialog {
 				if (filename == null) {
 					return;
 				}
-				controller.readXML(filename);
+				Boolean dirty = controller.readXML(filename);
 				setFilename(filename);
 				initAll();
-				setDirtyState(false);
+				setDirtyState(dirty);
 			}
 		});
 		btnOpen.setToolTipText("Loads XML from file");
 
-		btnSave = createButton(parent, IDialogConstants.NO_ID, "Save", false);
+		btnSave = createButton(row1, IDialogConstants.NO_ID, "Save", false);
+		GridData gd_btnSave = new GridData(SWT.LEFT, SWT.CENTER, false, false, 1, 1);
+		gd_btnSave.widthHint = 70;
+		btnSave.setLayoutData(gd_btnSave);
 		btnSave.setFont(SWTResourceManager.getFont("Arial", 9, SWT.NORMAL));
 		btnSave.addSelectionListener(new SelectionAdapter() {
 			@Override
@@ -403,7 +451,10 @@ public class MainDialog extends Dialog {
 		});
 		btnSave.setText("Save");
 
-		btnSaveAs = createButton(parent, IDialogConstants.NO_ID, "Save As...", false);
+		btnSaveAs = createButton(row1, IDialogConstants.NO_ID, "Save As...", false);
+		GridData gd_btnSaveAs = new GridData(SWT.LEFT, SWT.CENTER, false, false, 1, 1);
+		gd_btnSaveAs.widthHint = 70;
+		btnSaveAs.setLayoutData(gd_btnSaveAs);
 		btnSaveAs.addSelectionListener(new SelectionAdapter() {
 			@Override
 			public void widgetSelected(SelectionEvent e) {
@@ -424,23 +475,56 @@ public class MainDialog extends Dialog {
 
 		btnSaveAs.setFont(SWTResourceManager.getFont("Arial", 9, SWT.NORMAL));
 		btnSaveAs.setEnabled(true);
-
-		btnRunChecks = createButton(parent, IDialogConstants.NO_ID, "Run Checks", false);
+		
+		label = new Label(buttonRow1, SWT.SEPARATOR | SWT.VERTICAL);
+		GridData gd_sep = new GridData(SWT.LEFT, SWT.CENTER, false, false, 1, 1);
+		gd_sep.heightHint = 30;
+		gd_sep.widthHint = 50;
+		label.setLayoutData(gd_sep);
+
+		btnOpenLib = createButton(row1, IDialogConstants.NO_ID, "Open Lib", false);
+		GridData gd_btnOpenLib = new GridData(SWT.LEFT, SWT.CENTER, false, false, 1, 1);
+		gd_btnOpenLib.widthHint = 74;
+
+		btnOpenLib.setLayoutData(gd_btnOpenLib);
+		btnOpenLib.setFont(SWTResourceManager.getFont("Arial", 9, SWT.NORMAL));
+		btnOpenLib.addSelectionListener(new SelectionAdapter() {
+			@Override
+			public void widgetSelected(SelectionEvent e) {
+				Button b = (Button) e.getSource();
+				DirectoryDialog fdlg = new DirectoryDialog(b.getShell(), SWT.OPEN);
+				fdlg.setFilterPath(controller.getWorkingDir());
+				String libPath = fdlg.open();
+				if (libPath == null) {
+					return;
+				}
+				controller.loadLibrary(libPath);
+			}
+		});
+		btnOpenLib.setToolTipText("Loads External Library");
+		
+		
+		btnRunChecks = createButton(row1, IDialogConstants.NO_ID, "Export HTML", false);
+		GridData gd_btnRunChecks = new GridData(SWT.LEFT, SWT.CENTER, false, false, 1, 1);
+		gd_btnRunChecks.widthHint = 80;
+		btnRunChecks.setLayoutData(gd_btnRunChecks);
 		btnRunChecks.addSelectionListener(new SelectionAdapter() {
 			@Override
 			public void widgetSelected(SelectionEvent arg0) {
 				String tempFile = System.getProperty("java.io.tmpdir")
 						+ System.getProperty("file.separator") + "~temp.xml";
 				controller.writeXML(tempFile);
-				controller.runChecks(tempFile);
+				String htmlFilename = mrwFilename;
+				htmlFilename = htmlFilename.replace(".xml", "") + ".html";
+				controller.runChecks(tempFile,htmlFilename);
 			}
 		});
 		btnRunChecks.setFont(SWTResourceManager.getFont("Arial", 9, SWT.NORMAL));
 
-		Button btnSpacer = createButton(parent, IDialogConstants.NO_ID, "Spacer", false);
-		btnSpacer.setVisible(false);
-
-		Button btnForceUpdate = createButton(parent, IDialogConstants.NO_ID, "Force Update", false);
+		Button btnForceUpdate = createButton(row1, IDialogConstants.NO_ID, "Force Update", false);
+		GridData gd_btnForceUpdate = new GridData(SWT.LEFT, SWT.CENTER, false, false, 1, 1);
+		gd_btnForceUpdate.widthHint = 80;
+		btnForceUpdate.setLayoutData(gd_btnForceUpdate);
 		btnForceUpdate.setFont(SWTResourceManager.getFont("Arial", 9, SWT.NORMAL));
 		btnForceUpdate.addSelectionListener(new SelectionAdapter() {
 			@Override
@@ -448,8 +532,17 @@ public class MainDialog extends Dialog {
 				GithubFile.removeUpdateFile(true);
 			}
 		});
-
-		Button btnExit = createButton(parent, IDialogConstants.CLOSE_ID, "Exit", false);
+		
+		label_1 = new Label(buttonRow1, SWT.SEPARATOR | SWT.VERTICAL);
+		GridData gd_sep2 = new GridData(SWT.LEFT, SWT.CENTER, false, false, 1, 1);
+		gd_sep2.heightHint = 30;
+		gd_sep2.widthHint = 50;
+		label_1.setLayoutData(gd_sep2);
+
+		Button btnExit = createButton(row1, IDialogConstants.CLOSE_ID, "Exit", false);
+		GridData gd_btnExit = new GridData(SWT.LEFT, SWT.CENTER, false, false, 1, 1);
+		gd_btnExit.widthHint = 80;
+		btnExit.setLayoutData(gd_btnExit);
 		btnExit.setFont(SWTResourceManager.getFont("Arial", 9, SWT.NORMAL));
 		btnExit.addSelectionListener(new SelectionAdapter() {
 			@Override
@@ -477,12 +570,12 @@ public class MainDialog extends Dialog {
 		return null;
 	}
 
-	public void initAll() {
+	private void initAll() {
 		tabFolder.setSelection(0);
 		initInstanceMode();
 	}
 
-	public void initBusMode() {
+	private void initBusMode() {
 		busMode = true;
 		this.lblBusDirections.setEnabled(true);
 		this.lblBusDirections.setVisible(true);
@@ -491,19 +584,21 @@ public class MainDialog extends Dialog {
 
 		// update card combo
 		cmbCards.removeAll();
+		this.targetForConnections = null;
 		for (Target target : controller.getConnectionCapableTargets()) {
 			cmbCards.add(target.getName());
 			cmbCards.setData(target.getName(), target);
 		}
 		if (cmbCards.getItemCount() > 0) {
-			cmbCards.select(0);
+			cmbCards.select(-1);
+			//this.targetForConnections = (Target)cmbCards.getData();
 		}
 		for (TreeItem item : tree.getItems()) {
 			Target target = (Target) item.getData();
 			// controller.getRootTarget().hideBusses();
 			controller.hideBusses(target);
 		}
-		this.targetForConnections = null;
+		
 
 		this.source = null;
 		this.dest = null;
@@ -513,7 +608,7 @@ public class MainDialog extends Dialog {
 		this.updateView();
 	}
 
-	public void initInstanceMode() {
+	private void initInstanceMode() {
 		busMode = false;
 		this.lblInstanceDirections.setEnabled(true);
 		this.lblInstanceDirections.setVisible(true);
@@ -543,12 +638,14 @@ public class MainDialog extends Dialog {
 		}
 	}
 
-	public void updateView() {
+	private void updateView() {
 		Target targetInstance = getSelectedTarget();
 		if (targetInstance == null) {
 			btnAddTarget.setEnabled(false);
 			btnDeleteTarget.setEnabled(false);
 			btnCopyInstance.setEnabled(false);
+			btnDefaults.setEnabled(false);
+			updateChildCombo(null);
 			return;
 		}
 		updatePopupMenu(targetInstance);
@@ -568,10 +665,11 @@ public class MainDialog extends Dialog {
 		} else {
 			btnCopyInstance.setEnabled(false);
 		}
+		btnDefaults.setEnabled(true);
 	}
 
 
-	public void updatePopupMenu(Target selectedTarget) {
+	private void updatePopupMenu(Target selectedTarget) {
 		if (selectedTarget == null || tree.getSelectionCount()==0) {
 			return;
 		}
@@ -660,7 +758,6 @@ public class MainDialog extends Dialog {
 		}
 		ConnectionEndpoint ep = getEndpoint(parentItem,null);
 		String path = "/"+ep.getName();
-		controller.setGlobalSetting(path, "INSTANCE_ID", configParentTarget.getName());
 		if (config) {
 			controller.setGlobalSetting(path, "IO_CONFIG_SELECT", configNum);
 		} else {
@@ -674,7 +771,7 @@ public class MainDialog extends Dialog {
 		this.updateInstanceTree(configParentTarget, grandParentItem, parentItem);
 	}
 
-	public ConnectionEndpoint getEndpoint(TreeItem item, String stopCard) {
+	private ConnectionEndpoint getEndpoint(TreeItem item, String stopCard) {
 		ConnectionEndpoint endpoint = new ConnectionEndpoint();
 
 		Target target = (Target) item.getData();
@@ -707,7 +804,7 @@ public class MainDialog extends Dialog {
 		return endpoint;
 	}
 
-	public ConnectionEndpoint getEndpoint(boolean setBold) {
+	private ConnectionEndpoint getEndpoint(boolean setBold) {
 		TreeItem item = tree.getSelection()[0];
 		ConnectionEndpoint endpoint = getEndpoint(item,cmbCards.getText());
 		if (setBold && endpoint != null) {
@@ -730,17 +827,17 @@ public class MainDialog extends Dialog {
 
 			Attribute attribute = entry.getValue();
 			if (!attribute.isHidden()) {
-				if (attribute.isGlobal()) {
+				if (attribute.isGlobal() && !controller.getModelCreationMode()) {
 					if (ep !=null) {
 						String path="/"+ep.getName();
-						TreeMap<String,Field> settings = controller.getGlobalSettings(path);
-						if (settings == null) {
-							controller.setGlobalSetting(path, attribute.name, "");
-							controller.setGlobalSetting(path, "INSTANCE_ID", ep.getTargetName());
-						}
 						Field field = controller.getGlobalSetting(path, attribute.name);
 						if (field==null) {
-							ServerWizard2.LOGGER.severe("Field Null: "+path+"; "+attribute.name);
+							controller.setGlobalSetting(path, attribute.name, "");
+							field = controller.getGlobalSetting(path, attribute.name);
+						}
+						field.type = attribute.getValue().getType();
+						if (field.type.equals("enumeration")) {
+							field.enumerator = attribute.getValue().getFields().get(0).enumerator;
 						}
 						attributes.add(field);
 					}
@@ -753,7 +850,7 @@ public class MainDialog extends Dialog {
 		viewer.refresh();
 	}
 
-	public void clearTreeAll() {
+	private void clearTreeAll() {
 		if (tree.getItemCount() > 0) {
 			clearTree(tree.getItem(0));
 		}
@@ -767,12 +864,15 @@ public class MainDialog extends Dialog {
 		treeitem.removeAll();
 		treeitem.dispose();
 	}
-	public void refreshInstanceTree() {
+	private void refreshInstanceTree() {
 		currentPath="";
 		targetFound = false;
 		for (Target target : controller.getRootTargets()) {
 			this.updateInstanceTree(target, null);
 		}
+		if (controller.getRootTargets().size() == 0) {
+			this.clearTreeAll();
+		}
 		btnAddTarget.setEnabled(false);
 	}
 
@@ -780,7 +880,7 @@ public class MainDialog extends Dialog {
 		this.updateInstanceTree(target, parentItem, null);
 	}
 
-	public void updateInstanceTree(Target target, TreeItem parentItem, TreeItem item) {
+	private void updateInstanceTree(Target target, TreeItem parentItem, TreeItem item) {
 		if (target == null) {
 			return;
 		}
@@ -806,8 +906,8 @@ public class MainDialog extends Dialog {
 				}
 			}
 			if (parentItem != null) {
-				Field cnfgSelect = controller.getGlobalSetting(lastPath, "IO_CONFIG_SELECT");
-				if (cnfgSelect != null) {
+				if (controller.isGlobalSettings(lastPath, "IO_CONFIG_SELECT")) {
+					Field cnfgSelect = controller.getGlobalSetting(lastPath, "IO_CONFIG_SELECT");
 					if (!cnfgSelect.value.isEmpty() && !cnfgSelect.value.equals("0")) {
 						String cnfg = target.getAttribute("IO_CONFIG_NUM");
 						if (!cnfg.equals(cnfgSelect.value)) {
@@ -844,7 +944,9 @@ public class MainDialog extends Dialog {
 				treeitem = new TreeItem(parentItem, SWT.VIRTUAL | SWT.BORDER);
 			}
 		}
-
+		//Just display last part of instance name path
+		//String nameA[] = name.split("\\.");
+		//treeitem.setText(nameA[nameA.length-1]);
 		treeitem.setText(name);
 		treeitem.setData(target);
 
@@ -870,12 +972,12 @@ public class MainDialog extends Dialog {
 		currentPath=lastPath;
 	}
 
-	public void addConnection(Connection conn) {
+	private void addConnection(Connection conn) {
 		listBusses.add(conn.getName());
 		listBusses.setData(conn.getName(), conn);
 	}
 
-	public void refreshConnections() {
+	private void refreshConnections() {
 		this.source=null;
 		this.dest=null;
 		listBusses.removeAll();
@@ -900,7 +1002,7 @@ public class MainDialog extends Dialog {
 		}
 	}
 
-	public void setFontStyle(TreeItem item, int style, boolean selected) {
+	private void setFontStyle(TreeItem item, int style, boolean selected) {
 		if (item.isDisposed()) {
 			return;
 		}
@@ -926,14 +1028,14 @@ public class MainDialog extends Dialog {
 		return super.close();
 	}
 
-	public void addConnection(Boolean cabled) {
+	private void addConnection(Boolean cabled) {
 		Target busTarget = (Target) cmbBusses.getData(cmbBusses.getText());
 		Connection conn = targetForConnections.addConnection(busTarget, source, dest, cabled);
 		this.addConnection(conn);
 		setDirtyState(true);
 	}
 
-	public void deleteConnection() {
+	private void deleteConnection() {
 		if (targetForConnections == null || listBusses.getSelectionCount() == 0) {
 			return;
 		}
@@ -957,11 +1059,13 @@ public class MainDialog extends Dialog {
 
 	public void setFilename(String filename) {
 		this.mrwFilename = filename;
-		this.btnSave.setEnabled(true);
+		if (btnSave != null) {
+			this.btnSave.setEnabled(true);
+		}
 		this.getShell().setText("ServerWiz2 - " + this.mrwFilename);
 	}
 
-	public void addEvents() {
+	private void addEvents() {
 		btnShowHidden.addSelectionListener(new SelectionAdapter() {
 			@Override
 			public void widgetSelected(SelectionEvent arg0) {
@@ -1000,12 +1104,24 @@ public class MainDialog extends Dialog {
 			public void widgetSelected(SelectionEvent e) {
 				Target chk = (Target) combo.getData(combo.getText());
 				if (chk != null) {
-					TreeItem selectedItem = tree.getSelection()[0];
-					Target parentTarget = (Target) selectedItem.getData();
+					TreeItem selectedItem = null;
+					Target parentTarget = null;
+					if (tree.getSelectionCount() > 0) { 
+						selectedItem = tree.getSelection()[0];
+						parentTarget = (Target) selectedItem.getData();
+					}
+					if (chk.getType().equals("chip") || chk.getType().equals("targetoverride")) {
+						ServerWizard2.LOGGER.info("Entering model creation mode");
+						attributeEditor.setIgnoreReadonly();
+						controller.setModelCreationMode();
+						tbtmAddBusses.dispose();
+					}
 					String nameOverride = txtInstanceName.getText();
 					controller.addTargetInstance(chk, parentTarget, selectedItem, nameOverride);
 					txtInstanceName.setText("");
-					selectedItem.setExpanded(true);
+					if (tree.getSelectionCount() > 0) {
+						selectedItem.setExpanded(true);
+					}
 					columnName.pack();
 					setDirtyState(true);
 				}
@@ -1039,6 +1155,23 @@ public class MainDialog extends Dialog {
 				setDirtyState(true);
 			}
 		});
+		btnDefaults.addSelectionListener(new SelectionAdapter() {
+			@Override
+			public void widgetSelected(SelectionEvent arg0) {
+				TreeItem selectedItem = tree.getSelection()[0];
+				if (selectedItem == null) {
+					return;
+				}
+				if (!MessageDialog.openConfirm(null, "Restore Defaults", "Are you sure you want to restore default attribute values on this target and all of it's children?")) {
+					return;
+				}
+				ServerWizard2.LOGGER.info("Restoring Defaults");
+				Target target = (Target) selectedItem.getData();
+				controller.deepCopyAttributes(target);
+				setDirtyState(true);
+			}
+		});
+		
 		cmbCards.addSelectionListener(new SelectionAdapter() {
 			@Override
 			public void widgetSelected(SelectionEvent e) {
@@ -1078,7 +1211,7 @@ public class MainDialog extends Dialog {
 		});
 	}
 
-	public void createAttributeTable() {
+	private void createAttributeTable() {
 		Table table = viewer.getTable();
 
 		table.setHeaderVisible(true);
@@ -1089,7 +1222,7 @@ public class MainDialog extends Dialog {
 				setDirtyState(true);
 			}
 		});
-
+		
 		final TableViewerColumn colName = new TableViewerColumn(viewer, SWT.NONE);
 		colName.getColumn().setWidth(256);
 		colName.getColumn().setText("Attribute");
@@ -1125,8 +1258,9 @@ public class MainDialog extends Dialog {
 				return f.value;
 			}
 		});
-		colValue.setEditingSupport(new AttributeEditingSupport(viewer));
-
+		attributeEditor = new AttributeEditingSupport(viewer);
+		colValue.setEditingSupport(attributeEditor);
+		
 		final TableViewerColumn colDesc = new TableViewerColumn(viewer, SWT.NONE);
 		colDesc.getColumn().setWidth(350);
 		colDesc.getColumn().setText("Description");
@@ -1138,6 +1272,17 @@ public class MainDialog extends Dialog {
 			}
 		});
 
+		final TableViewerColumn colGroup = new TableViewerColumn(viewer, SWT.NONE);
+		colGroup.getColumn().setWidth(120);
+		colGroup.getColumn().setText("Group");
+		colGroup.setLabelProvider(new ColumnLabelProvider() {
+			@Override
+			public String getText(Object element) {
+				Field f = (Field) element;
+				return f.group;
+			}
+		});
+		
 		viewer.setContentProvider(ArrayContentProvider.getInstance());
 		attributes = new Vector<Field>();
 		viewer.setInput(attributes);
diff --git a/src/com/ibm/ServerWizard2/MessagePopup.java b/src/com/ibm/ServerWizard2/view/MessagePopup.java
index 03b277c..6bfef88 100644
--- a/src/com/ibm/ServerWizard2/MessagePopup.java
+++ b/src/com/ibm/ServerWizard2/view/MessagePopup.java
@@ -1,4 +1,4 @@
-package com.ibm.ServerWizard2;
+package com.ibm.ServerWizard2.view;
 
 import java.awt.BorderLayout;
 import java.awt.event.ActionEvent;
diff --git a/xml/attribute_types.xml b/xml/attribute_types.xml
new file mode 100644
index 0000000..ed84050
--- /dev/null
+++ b/xml/attribute_types.xml
@@ -0,0 +1,17138 @@
+<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
+<!-- This is an automatically generated prolog.                             -->
+<!--                                                                        -->
+<!-- $Source: src/usr/targeting/common/xmltohb/attribute_types.xml $        -->
+<!--                                                                        -->
+<!-- OpenPOWER HostBoot Project                                             -->
+<!--                                                                        -->
+<!-- Contributors Listed Below - COPYRIGHT 2012,2015                        -->
+<!-- [+] International Business Machines Corp.                              -->
+<!--                                                                        -->
+<!--                                                                        -->
+<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
+<!-- you may not use this file except in compliance with the License.       -->
+<!-- You may obtain a copy of the License at                                -->
+<!--                                                                        -->
+<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
+<!--                                                                        -->
+<!-- Unless required by applicable law or agreed to in writing, software    -->
+<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
+<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
+<!-- implied. See the License for the specific language governing           -->
+<!-- permissions and limitations under the License.                         -->
+<!--                                                                        -->
+<!-- IBM_PROLOG_END_TAG                                                     -->
+
+<attributes>
+
+<!-- =====================================================================
+     HOST BOOT ATTRIBUTE TYPES
+     Contains the definition of all hostboot attributes which can be synced
+     to/from FSP
+     ================================================================= -->
+
+<enumerationType>
+    <id>CLASS</id>
+    <description>Enumeration indicating the target's class</description>
+    <enumerator>
+        <name>NA</name>
+        <value>0</value>
+    </enumerator>
+    <enumerator>
+        <name>CARD</name>
+        <value>1</value>
+    </enumerator>
+    <enumerator>
+        <name>ENC</name>
+        <value>2</value>
+    </enumerator>
+    <enumerator>
+        <name>CHIP</name>
+        <value>3</value>
+    </enumerator>
+    <enumerator>
+        <name>UNIT</name>
+        <value>4</value>
+    </enumerator>
+    <enumerator>
+        <name>DEV</name>
+        <value>5</value>
+    </enumerator>
+    <enumerator>
+        <name>SYS</name>
+        <value>6</value>
+    </enumerator>
+    <enumerator>
+        <name>LOGICAL_CARD</name>
+        <value>7</value>
+    </enumerator>
+    <enumerator>
+        <name>MAX</name>
+        <value>8</value>
+    </enumerator>
+    <default>NA</default>
+</enumerationType>
+
+<!-- The script genHwsvMrwXml.pl hardcodes the HUID type field to match
+     these values and should be kept in sync. Leave holes in in the range
+     if a type is deleted. Not changing the values keeps the values
+     consistent over builds making them easier to recognize.  -->
+<enumerationType>
+    <id>TYPE</id>
+    <description>Enumeration indicating the target's type</description>
+    <enumerator>
+        <name>NA</name>
+        <value>0</value>
+    </enumerator>
+    <enumerator>
+        <name>SYS</name>
+        <value>1</value>
+    </enumerator>
+    <enumerator>
+        <name>NODE</name>
+        <value>2</value>
+    </enumerator>
+    <enumerator>
+        <name>DIMM</name>
+        <value>3</value>
+    </enumerator>
+    <enumerator>
+        <name>MEMBUF</name>
+        <value>4</value>
+    </enumerator>
+    <enumerator>
+        <name>PROC</name>
+        <value>5</value>
+    </enumerator>
+    <enumerator>
+        <name>EX</name>
+        <value>6</value>
+    </enumerator>
+    <enumerator>
+        <name>CORE</name>
+        <value>7</value>
+    </enumerator>
+    <enumerator>
+        <name>L2</name>
+        <value>8</value>
+    </enumerator>
+    <enumerator>
+        <name>L3</name>
+        <value>9</value>
+    </enumerator>
+    <enumerator>
+        <name>L4</name>
+        <value>10</value>
+    </enumerator>
+    <enumerator>
+        <name>MCS</name>
+        <value>11</value>
+    </enumerator>
+    <enumerator>
+        <name>MBA</name>
+        <value>13</value>
+    </enumerator>
+    <enumerator>
+        <name>XBUS</name>
+        <value>14</value>
+    </enumerator>
+    <enumerator>
+        <name>ABUS</name>
+        <value>15</value>
+    </enumerator>
+    <enumerator>
+        <name>PCI</name>
+        <value>16</value>
+    </enumerator>
+    <enumerator>
+        <name>DPSS</name>
+        <value>17</value>
+    </enumerator>
+    <enumerator>
+        <name>APSS</name>
+        <value>18</value>
+    </enumerator>
+    <enumerator>
+        <name>OCC</name>
+        <value>19</value>
+    </enumerator>
+    <enumerator>
+        <name>PSI</name>
+        <value>20</value>
+    </enumerator>
+    <enumerator>
+        <name>FSP</name>
+        <value>21</value>
+    </enumerator>
+    <enumerator>
+        <name>PNOR</name>
+        <value>22</value>
+    </enumerator>
+    <enumerator>
+        <name>OSC</name>
+        <value>23</value>
+    </enumerator>
+    <enumerator>
+        <name>TODCLK</name>
+        <value>24</value>
+    </enumerator>
+    <enumerator>
+        <name>CONTROL_NODE</name>
+        <value>25</value>
+    </enumerator>
+    <enumerator>
+        <name>OSCREFCLK</name>
+        <value>26</value>
+    </enumerator>
+    <enumerator>
+        <name>OSCPCICLK</name>
+        <value>27</value>
+    </enumerator>
+    <enumerator>
+        <name>REFCLKENDPT</name>
+        <value>28</value>
+    </enumerator>
+    <enumerator>
+        <name>PCICLKENDPT</name>
+        <value>29</value>
+    </enumerator>
+    <enumerator>
+        <name>NX</name>
+        <value>30</value>
+    </enumerator>
+    <enumerator>
+        <name>PORE</name>
+        <value>31</value>
+    </enumerator>
+    <enumerator>
+        <name>PCIESWITCH</name>
+        <value>32</value>
+    </enumerator>
+    <enumerator>
+        <name>CAPP</name>
+        <value>33</value>
+    </enumerator>
+    <enumerator>
+        <name>FSI</name>
+        <value>34</value>
+    </enumerator>
+    <!-- Add P9 targets -->
+    <enumerator>
+        <name>EQ</name>
+        <value>35</value>
+    </enumerator>
+    <enumerator>
+        <name>MCA</name>
+        <value>36</value>
+    </enumerator>
+    <enumerator>
+        <name>MCBIST</name>
+        <value>37</value>
+    </enumerator>
+    <enumerator>
+        <name>MI</name>
+        <value>38</value>
+    </enumerator>
+    <enumerator>
+        <name>DMI</name>
+        <value>39</value>
+    </enumerator>
+    <enumerator>
+        <name>OBUS</name>
+        <value>40</value>
+    </enumerator>
+    <enumerator>
+        <name>NVBUS</name>
+        <value>41</value>
+    </enumerator>
+    <enumerator>
+        <name>SBE</name>
+        <value>42</value>
+    </enumerator>
+    <enumerator>
+        <name>PPE</name>
+        <value>43</value>
+    </enumerator>
+    <enumerator>
+        <name>PERV</name>
+        <value>44</value>
+    </enumerator>
+    <enumerator>
+        <name>PEC</name>
+        <value>45</value>
+    </enumerator>
+    <enumerator>
+        <name>PHB</name>
+        <value>46</value>
+    </enumerator>
+    <!-- add any new types here, and increment TEST_FAIL and LAST_IN_RANGE -->
+    <enumerator>
+        <name>TEST_FAIL</name>
+        <value>47</value>
+    </enumerator>
+    <enumerator>
+        <name>LAST_IN_RANGE</name>
+        <value>48</value>
+    </enumerator>
+    <default>NA</default>
+</enumerationType>
+
+<enumerationType>
+    <id>MODEL</id>
+    <description>Enumeration indicating the target's model</description>
+    <enumerator>
+        <name>NA</name>
+        <value>0</value>
+    </enumerator>
+    <enumerator>
+        <name>RESERVED</name><!-- Left here to keep later values the same -->
+        <value>16</value>
+    </enumerator>
+    <enumerator>
+        <name>VENICE</name>
+    </enumerator>
+    <enumerator>
+        <name>MURANO</name>
+    </enumerator>
+    <enumerator>
+        <name>NAPLES</name>
+    </enumerator>
+    <enumerator>
+        <name>NIMBUS</name>
+    </enumerator>
+    <enumerator>
+        <name>CUMULUS</name>
+    </enumerator>
+    <enumerator>
+        <name>CENTAUR</name>
+        <value>48</value>
+    </enumerator>
+    <enumerator>
+        <name>JEDEC</name>
+        <value>80</value>
+    </enumerator>
+    <enumerator>
+        <name>CDIMM</name>
+    </enumerator>
+    <!-- POWER8 is system/node model, not processor chip level -->
+    <enumerator>
+        <name>POWER8</name>
+        <value>112</value>
+    </enumerator>
+    <!-- POWER9 is system/node model, not processor chip level -->
+    <enumerator>
+        <name>POWER9</name>
+        <value>144</value>
+    </enumerator>
+    <default>NA</default>
+</enumerationType>
+
+<enumerationType>
+    <id>ENGINE_TYPE</id>
+    <description>Enumeration indicating the target's engine type</description>
+    <enumerator>
+        <name>NA</name>
+        <value>0</value>
+    </enumerator>
+    <enumerator>
+        <name>ENGINE_IIC</name>
+        <value>1</value>
+    </enumerator>
+    <enumerator>
+        <name>ENGINE_SCOM</name>
+        <value>2</value>
+    </enumerator>
+    <default>NA</default>
+</enumerationType>
+
+<enumerationType>
+    <id>FSI_MASTER_TYPE</id>
+    <description>Enumeration indicating the master's FSI type</description>
+    <enumerator>
+        <name>MFSI</name>
+        <value>0</value>
+    </enumerator>
+    <enumerator>
+        <name>CMFSI</name>
+        <value>1</value>
+    </enumerator>
+    <enumerator>
+        <name>NO_MASTER</name>
+        <value>2</value>
+    </enumerator>
+    <default>NO_MASTER</default>
+</enumerationType>
+<attribute>
+    <id>CLASS</id>
+    <description>Attribute indicating the target's class</description>
+    <simpleType>
+        <enumeration>
+            <id>CLASS</id>
+        </enumeration>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hasStringConversion/>
+</attribute>
+
+<attribute>
+    <id>TYPE</id>
+    <description>Attribute indicating the target's type</description>
+    <simpleType>
+        <enumeration>
+            <id>TYPE</id>
+        </enumeration>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hasStringConversion/>
+</attribute>
+
+<attribute>
+    <id>MODEL</id>
+    <description>Attribute indicating the target's model</description>
+    <simpleType>
+        <enumeration>
+            <id>MODEL</id>
+        </enumeration>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hasStringConversion/>
+</attribute>
+
+<attribute>
+    <id>ENGINE_TYPE</id>
+    <description>Attribute indicating the target's engine type</description>
+    <simpleType>
+        <enumeration>
+            <id>ENGINE_TYPE</id>
+        </enumeration>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hasStringConversion/>
+</attribute>
+<attribute>
+    <id>SCRATCH_UINT8_1</id>
+    <description>Scratch attribute that can be used for dev/test</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_SCRATCH_UINT8_1</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>SCRATCH_UINT8_2</id>
+    <description>Scratch attribute that can be used for dev/test</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_SCRATCH_UINT8_2</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>SCRATCH_UINT32_1</id>
+    <description>Scratch attribute that can be used for dev/test</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_SCRATCH_UINT32_1</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>SCRATCH_UINT32_2</id>
+    <description>Scratch attribute that can be used for dev/test</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_SCRATCH_UINT32_2</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>SCRATCH_UINT64_1</id>
+    <description>Scratch attribute that can be used for dev/test</description>
+    <simpleType>
+        <uint64_t>
+        </uint64_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_SCRATCH_UINT64_1</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>SCRATCH_UINT64_2</id>
+    <description>Scratch attribute that can be used for dev/test</description>
+    <simpleType>
+        <uint64_t>
+        </uint64_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_SCRATCH_UINT64_2</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>SCRATCH_UINT8_ARRAY_1</id>
+    <description>Scratch attribute that can be used for dev/test</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>32</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_SCRATCH_UINT8_ARRAY_1</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>SCRATCH_UINT8_ARRAY_2</id>
+    <description>Scratch attribute that can be used for dev/test</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2, 3, 4</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_SCRATCH_UINT8_ARRAY_2</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>SCRATCH_UINT32_ARRAY_1</id>
+    <description>Scratch attribute that can be used for dev/test</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+        <array>8</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_SCRATCH_UINT32_ARRAY_1</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>SCRATCH_UINT32_ARRAY_2</id>
+    <description>Scratch attribute that can be used for dev/test</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+        <array>2,3</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_SCRATCH_UINT32_ARRAY_2</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>SCRATCH_UINT64_ARRAY_1</id>
+    <description>Scratch attribute that can be used for dev/test</description>
+    <simpleType>
+        <uint64_t>
+        </uint64_t>
+        <array>4</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_SCRATCH_UINT64_ARRAY_1</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>SCRATCH_UINT64_ARRAY_2</id>
+    <description>Scratch attribute that can be used for dev/test</description>
+    <simpleType>
+        <uint64_t>
+        </uint64_t>
+        <array>2,2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_SCRATCH_UINT64_ARRAY_2</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>DUMMY_RW</id>
+    <description>Dummy attribute with read/write permissions</description>
+    <simpleType>
+        <uint8_t>
+            <default>5</default>
+        </uint8_t>
+        <array>1,3,5</array>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_DUMMY_SCRATCH_PLAT_INIT_UINT8</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>DUMMY_WO</id>
+    <description>Dummy attribute with write-only permissions</description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>DUMMY_RO</id>
+    <description>Dummy attribute with read-only permissions</description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>DUMMY_HEAP_ZERO_DEFAULT</id>
+    <description>Dummy attribute on the heap with zero initialization</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>PHYS_PATH</id>
+    <description>Physical hierarchical path to the target</description>
+    <nativeType>
+        <name>EntityPath</name>
+    </nativeType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>AFFINITY_PATH</id>
+    <description>Hierarchical path to the target with respect to logical affinity</description>
+    <nativeType>
+        <name>EntityPath</name>
+    </nativeType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>POWER_PATH</id>
+    <description>Hierarchical path to the target with respect to power</description>
+    <nativeType>
+        <name>EntityPath</name>
+    </nativeType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>PRIMARY_CAPABILITIES</id>
+    <description>Attribute which describes capabilities of a target</description>
+    <complexType>
+        <description>Structure which defines a target's primary capabilities.
+        A target can only support at most FSI SCOM and one of the other two SCOM
+        types.  Applicable for all targets.  Structure is read-only.
+        </description>
+        <field>
+            <name>supportsFsiScom</name>
+            <description>0b0: Target does not support FSI SCOM;
+            0b1: Target supports FSI SCOM
+            </description>
+            <type>uint8_t</type>
+            <bits>1</bits>
+            <default>0</default>
+        </field>
+        <field>
+            <name>supportsXscom</name>
+            <description>0b0: Target does not support XSCOM;
+            0b1: Target supports FSI XSCOM</description>
+            <type>uint8_t</type>
+            <bits>1</bits>
+            <default>0</default>
+        </field>
+        <field>
+            <name>supportsInbandScom</name>
+            <description>0b0: Target does not support inband SCOM</description>
+            <type>uint8_t</type>
+            <bits>1</bits>
+            <default>0</default>
+        </field>
+        <field>
+            <name>reserved</name>
+            <description>Reserved for future use</description>
+            <type>uint8_t</type>
+            <bits>5</bits>
+            <default>0</default>
+        </field>
+        </complexType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>SCOM_SWITCHES</id>
+    <description>Attribute storing information about which SCOM path to use</description>
+    <complexType>
+        <description>Structure which defines which SCOM to use at a point in
+        time.  Only applicable if target supports one or more SCOM types.  Only
+        one bit (of the first three) can ever be set at any one time.
+        </description>
+        <field>
+            <name>useFsiScom</name>
+            <description>0b0: Do not use FSI SCOM at this time.  0b1: Use FSI
+            SCOM at this time</description>
+            <type>uint8_t</type>
+            <bits>1</bits>
+            <default>0</default>
+        </field>
+        <field>
+            <name>useXscom</name>
+            <description>0b0: Do not use XSCOM at this time.  0b1: Use XSCOM at
+            this time</description>
+            <type>uint8_t</type>
+            <bits>1</bits>
+            <default>0</default>
+        </field>
+        <field>
+            <name>useInbandScom</name>
+            <description>0b0: Do not use inband SCOM at this time.  0b1: Use
+            inband SCOM at this time</description>
+            <type>uint8_t</type>
+            <bits>1</bits>
+            <default>0</default>
+        </field>
+        <field>
+            <name>reserved</name>
+            <description>Reserved for future expansion</description>
+            <type>uint8_t</type>
+            <bits>5</bits>
+            <default>0</default>
+        </field>
+    </complexType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>FSI_MASTER_CHIP</id>
+    <description>Chip which contains the FSI master logic that drives this slave when booting from the default master processor</description>
+    <nativeType>
+        <name>EntityPath</name>
+        <default>physical:sys-0</default>
+    </nativeType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>ALTFSI_MASTER_CHIP</id>
+    <description>Chip which contains the FSI master logic that drives this slave when booting from the alternate master processor</description>
+    <nativeType>
+        <name>EntityPath</name>
+        <default>physical:sys-0</default>
+    </nativeType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>FSI_MASTER_TYPE</id>
+    <description>Type of Master FSI connection to this slave (MFSI or cMFSI)</description>
+    <simpleType>
+        <enumeration>
+            <id>FSI_MASTER_TYPE</id>
+            <default>NO_MASTER</default>
+        </enumeration>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <hasStringConversion/>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>FSI_MASTER_PORT</id>
+    <description>Which port is this chip hanging off of when booting from the default master processor</description>
+    <simpleType>
+        <uint8_t>
+            <default>0xFF</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>ALTFSI_MASTER_PORT</id>
+    <description>Which port is this chip hanging off of when booting from the alternate master processor</description>
+    <simpleType>
+        <uint8_t>
+            <default>0xFF</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>I2C_SLAVE_ADDRESS</id>
+     <description>I2C Slave Address</description>
+     <simpleType>
+       <uint8_t>
+         <default>0x00</default>
+       </uint8_t>
+     </simpleType>
+     <persistency>non-volatile</persistency>
+     <readable/>
+     <hwpfToHbAttrMap>
+        <id>ATTR_I2C_SLAVE_ADDRESS</id>
+        <macro>DIRECT</macro>
+     </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>FSI_SLAVE_CASCADE</id>
+    <description>Slave cascade position</description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>FSI_OPTION_FLAGS</id>
+    <description>
+        Reserved for any special flags we might need to access FSI
+    </description>
+    <complexType>
+        <description>FSI flags</description>
+        <field>
+            <name>flipPort</name>
+            <description>
+                Set on FSI master chips (procs) if that chip uses slaveB
+                to attach to the acting master chip.
+            </description>
+            <type>uint16_t</type>
+            <bits>1</bits>
+            <default>0</default>
+        </field>
+        <field>
+            <name>reserved</name>
+            <description>Reserved for future expansion</description>
+            <type>uint16_t</type>
+            <bits>15</bits>
+            <default>0</default>
+        </field>
+    </complexType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>EXECUTION_PLATFORM</id>
+    <description>
+        Which execution platform the HW Procedure is running on
+        Some HWPs (e.g. special wakeup) use different registers for different
+          platforms to avoid arbitration problems when multiple platforms do
+          the same thing concurrently
+        HOST = 0x01, FSP = 0x02, OCC = 0x03
+    </description>
+    <simpleType><uint8_t></uint8_t></simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EXECUTION_PLATFORM</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>IS_SIMULATION</id>
+    <description>env: 1 = Awan/HWSimulator. 0 = Simics/RealHW.</description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_IS_SIMULATION</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>HWAS_STATE</id>
+    <description>HardWare Availability Service State Attribute.
+        Keeps track of Target values poweredOn, present, functional</description>
+    <complexType>
+        <description>struct - 4 booleans and a PLID</description>
+        <field>
+            <name>deconfiguredByEid</name>
+            <description>if this target was deconfigured,
+                this will be a special DECONFIGURED_BY_ enum,
+                OR it will be the errlog EID that caused it,
+                either directly or by association,
+            </description>
+            <type>uint32_t</type>
+            <default>0</default>
+        </field>
+        <field>
+            <name>poweredOn</name>
+            <description>
+             0b0: Target is not powered on (is off);
+             0b1: Target is powered on;
+            </description>
+            <type>uint8_t</type>
+            <bits>1</bits>
+            <default>0</default>
+        </field>
+        <field>
+            <name>present</name>
+            <description>
+             0b0: Target is not present in the system;
+             0b1: Target is present in the system
+            </description>
+            <type>uint8_t</type>
+            <bits>1</bits>
+            <default>0</default>
+        </field>
+        <field>
+            <name>functional</name>
+            <description>
+             0b0: Target is not functional;
+             0b1: Target is functional
+            </description>
+            <type>uint8_t</type>
+            <bits>1</bits>
+            <default>0</default>
+        </field>
+        <field>
+            <name>dumpfunctional</name>
+            <description>FSP Only, used by DUMP applet;
+             0b0: target is dump capabile;
+             0b1: target is not dump capabile;
+            </description>
+            <type>uint8_t</type>
+            <bits>1</bits>
+            <default>0</default>
+        </field>
+        <field>
+            <name>specdeconfig</name>
+            <description>Set for speculative deconfig;
+             0b0: target not speculative deconfig;
+             0b1: target is speculatively deconfigured;
+            </description>
+            <type>uint8_t</type>
+            <bits>1</bits>
+            <default>0</default>
+        </field>
+    </complexType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>HWAS_STATE_CHANGED_FLAG</id>
+    <description>HardWare Availability Service State Changed Attribute.
+        Keeps track of changedSinceChecked state, indicates if the
+        target has changed since last checked by the appropriate service.
+        This is a bit field of flags (see HWAS_CHANGED_BIT enumeration
+        that follows).
+        </description>
+    <simpleType>
+        <uint64_t>
+            <default>0x0</default>
+        </uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>HWAS_STATE_CHANGED_SUBSCRIPTION_MASK</id>
+    <description>HardWare Availability Service State Changed Mask.
+        Used when a target changes (ie, via HCDB change) to set the
+        HWAS_STATE_CHANGED_FLAG, so that the appropriate services will
+        all handle the change.
+        This is a bit field of flags (see HWAS_CHANGED_BIT enumeration
+        that follows).
+        </description>
+    <simpleType>
+        <uint64_t>
+            <default>0x0</default>
+        </uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<enumerationType>
+    <id>HWAS_CHANGED_BIT</id>
+    <description>Enumeration indicating the services that are concerned
+        with target changes (ie, via HCDB change).
+        The values can be combined using a bitwise 'OR'.
+    </description>
+    <enumerator>
+        <name>GARD</name>
+        <value>0x00000001</value>
+    </enumerator>
+    <enumerator>
+        <name>MEMDIAG</name>
+        <value>0x00000002</value>
+    </enumerator>
+    <enumerator>
+        <name>PSIDIAG</name>
+        <value>0x00000004</value>
+    </enumerator>
+    <!-- combination of all DIAG values -->
+    <!-- if you add a DIAG flag above, add the bit in the mask below -->
+    <enumerator>
+        <name>DIAG_MASK</name>
+        <value>0x00000006</value>
+    </enumerator>
+    <enumerator>
+       <name>HOSTSVC_HBEL</name>
+       <value>0x00000008</value>
+    </enumerator>
+</enumerationType>
+
+<!-- For POD Testing -->
+<attribute>
+    <id>NUMERIC_POD_TYPE_TEST</id>
+    <description>Attribute which tests numeric POD types</description>
+    <complexType>
+        <description>Numeric POD type test structure</description>
+        <field>
+            <name>fsiPath</name>
+            <description>Entity path for testing purposes</description>
+            <type>EntityPath</type>
+            <default>physical:sys-0</default>
+        </field>
+        <field>
+            <name>className</name>
+            <description>Class for testing purposes</description>
+            <type>CLASS</type>
+            <default>CHIP</default>
+        </field>
+        <field>
+            <name>uint8</name>
+            <description>Test uint8</description>
+            <type>uint8_t</type>
+            <default>0xAB</default>
+        </field>
+        <field>
+            <name>uint16</name>
+            <description>Test uint16</description>
+            <type>uint16_t</type>
+            <default>0xABCD</default>
+        </field>
+        <field>
+            <name>uint32</name>
+            <description>Test uint32</description>
+            <type>uint32_t</type>
+            <default>0xABCDEF01</default>
+        </field>
+        <field>
+            <name>uint64</name>
+            <description>Test uint64</description>
+            <type>uint64_t</type>
+            <default>0xABCDEF0123456789</default>
+        </field>
+        <field>
+            <name>int8</name>
+            <description>Test int8</description>
+            <type>int8_t</type>
+            <default>-124</default>
+        </field>
+        <field>
+            <name>int16</name>
+            <description>Test int16</description>
+            <type>int16_t</type>
+            <default>-32764</default>
+        </field>
+        <field>
+            <name>int32</name>
+            <description>Test int32</description>
+            <type>int32_t</type>
+            <default>-2147483644</default>
+        </field>
+        <field>
+            <name>int64</name>
+            <description>Test int64</description>
+            <type>int64_t</type>
+            <default>-9223372036854775804</default>
+        </field>
+        </complexType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>DECONFIG_GARDABLE</id>
+    <description>If the Target is directly deconfigurable and GARDable; target
+    may still be deconfigured in 'by association' processing.</description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>ISTEP_MODE</id>
+    <description>If True, puts HostBoot into SPLess SingleStep mode.</description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>EEPROM_VPD_PRIMARY_INFO</id>
+    <description>Information needed to address the EEPROM slaves</description>
+    <complexType>
+        <description>Structure to define the addressing for an I2C
+                     slave device.</description>
+        <field>
+            <name>i2cMasterPath</name>
+            <description>Entity path to the chip that contains the I2C
+                         master</description>
+            <type>EntityPath</type>
+            <default>physical:sys-0</default>
+        </field>
+        <field>
+            <name>port</name>
+            <description>Port from the I2C Master device. This is a 6-bit
+                         value.</description>
+            <type>uint8_t</type>
+            <default>0x80</default>
+        </field>
+        <field>
+            <name>devAddr</name>
+            <description>Device address on the I2C bus. This is a 7-bit value,
+                         but then shifted 1 bit left.</description>
+            <type>uint8_t</type>
+            <default>0x80</default>
+        </field>
+        <field>
+            <name>engine</name>
+            <description>I2C master engine. This is a 2-bit
+                         value.</description>
+            <type>uint8_t</type>
+            <default>0x80</default>
+        </field>
+        <field>
+            <name>byteAddrOffset</name>
+            <description>The number of bytes a device requires to set its
+                         internal address/offset.</description>
+            <type>uint8_t</type>
+            <default>0x02</default>
+        </field>
+        <field>
+            <name>maxMemorySizeKB</name>
+            <description>The number of kilobytes a device can hold.  'Zero'
+                         value possible for some devices.</description>
+            <type>uint64_t</type>
+            <default>0x0</default>
+        </field>
+        <field>
+            <name>writePageSize</name>
+            <description>The maximum number of bytes that can be written to
+                         a device at one time. 'Zero' value means no maximum
+                         value is expected or checked.</description>
+            <type>uint64_t</type>
+            <default>0x0</default>
+        </field>
+        <field>
+            <name>writeCycleTime</name>
+            <description>The amount of time in milliseconds a device requires
+                         on the completion of a write command to update its
+                         internal memory.</description>
+            <type>uint64_t</type>
+            <default>0x0</default>
+        </field>
+    </complexType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>EEPROM_VPD_BACKUP_INFO</id>
+    <description>Information needed to address the EERPROM slaves</description>
+    <complexType>
+        <description>Structure to define the addressing for an I2C
+                     slave device.</description>
+        <field>
+            <name>i2cMasterPath</name>
+            <description>Entity path to the chip that contains the I2C
+                         master</description>
+            <type>EntityPath</type>
+            <default>physical:sys-0</default>
+        </field>
+        <field>
+            <name>port</name>
+            <description>Port from the I2C Master device. This is a 6-bit
+                         value.</description>
+            <type>uint8_t</type>
+            <default>0x80</default>
+        </field>
+        <field>
+            <name>devAddr</name>
+            <description>Device address on the I2C bus. This is a 7-bit value,
+                         but then shifted 1 bit left.</description>
+            <type>uint8_t</type>
+            <default>0x80</default>
+        </field>
+        <field>
+            <name>engine</name>
+            <description>I2C master engine. This is a 2-bit
+                         value.</description>
+            <type>uint8_t</type>
+            <default>0x80</default>
+        </field>
+        <field>
+            <name>byteAddrOffset</name>
+            <description>The number of bytes a device requires to set its
+                         internal address/offset.</description>
+            <type>uint8_t</type>
+            <default>0x02</default>
+        </field>
+        <field>
+            <name>maxMemorySizeKB</name>
+            <description>The number of kilobytes a device can hold.  'Zero'
+                         value possible for some devices.</description>
+            <type>uint64_t</type>
+            <default>0x0</default>
+        </field>
+        <field>
+            <name>writePageSize</name>
+            <description>The maximum number of bytes that can be written to
+                         a device at one time. 'Zero' value means no maximum
+                         value is expected or checked.</description>
+            <type>uint64_t</type>
+            <default>0x0</default>
+        </field>
+        <field>
+            <name>writeCycleTime</name>
+            <description>The amount of time in milliseconds a device requires
+                         on the completion of a write command to update its
+                         internal memory.</description>
+            <type>uint64_t</type>
+            <default>0x0</default>
+        </field>
+    </complexType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>EEPROM_SBE_PRIMARY_INFO</id>
+    <description>Information needed to address the EERPROM slaves</description>
+    <complexType>
+        <description>Structure to define the addressing for an I2C
+                     slave device.</description>
+        <field>
+            <name>i2cMasterPath</name>
+            <description>Entity path to the chip that contains the I2C
+                         master</description>
+            <type>EntityPath</type>
+            <default>physical:sys-0</default>
+        </field>
+        <field>
+            <name>port</name>
+            <description>Port from the I2C Master device. This is a 6-bit
+                         value.</description>
+            <type>uint8_t</type>
+            <default>0x80</default>
+        </field>
+        <field>
+            <name>devAddr</name>
+            <description>Device address on the I2C bus. This is a 7-bit value,
+                         but then shifted 1 bit left.</description>
+            <type>uint8_t</type>
+            <default>0x80</default>
+        </field>
+        <field>
+            <name>engine</name>
+            <description>I2C master engine. This is a 2-bit
+                         value.</description>
+            <type>uint8_t</type>
+            <default>0x80</default>
+        </field>
+        <field>
+            <name>byteAddrOffset</name>
+            <description>The number of bytes a device requires to set its
+                         internal address/offset.</description>
+            <type>uint8_t</type>
+            <default>0x02</default>
+        </field>
+        <field>
+            <name>maxMemorySizeKB</name>
+            <description>The number of kilobytes a device can hold.  'Zero'
+                         value possible for some devices.</description>
+            <type>uint64_t</type>
+            <default>0x0</default>
+        </field>
+        <field>
+            <name>writePageSize</name>
+            <description>The maximum number of bytes that can be written to
+                         a device at one time. 'Zero' value means no maximum
+                         value is expected or checked.</description>
+            <type>uint64_t</type>
+            <default>0x0</default>
+        </field>
+        <field>
+            <name>writeCycleTime</name>
+            <description>The amount of time in milliseconds a device requires
+                         on the completion of a write command to update its
+                         internal memory.</description>
+            <type>uint64_t</type>
+            <default>0x0</default>
+        </field>
+    </complexType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>EEPROM_SBE_BACKUP_INFO</id>
+    <description>Information needed to address the EERPROM slaves</description>
+    <complexType>
+        <description>Structure to define the addressing for an I2C
+                     slave device.</description>
+        <field>
+            <name>i2cMasterPath</name>
+            <description>Entity path to the chip that contains the I2C
+                         master</description>
+            <type>EntityPath</type>
+            <default>physical:sys-0</default>
+        </field>
+        <field>
+            <name>port</name>
+            <description>Port from the I2C Master device. This is a 6-bit
+                         value.</description>
+            <type>uint8_t</type>
+            <default>0x80</default>
+        </field>
+        <field>
+            <name>devAddr</name>
+            <description>Device address on the I2C bus. This is a 7-bit value,
+                         but then shifted 1 bit left.</description>
+            <type>uint8_t</type>
+            <default>0x80</default>
+        </field>
+        <field>
+            <name>engine</name>
+            <description>I2C master engine. This is a 2-bit
+                         value.</description>
+            <type>uint8_t</type>
+            <default>0x80</default>
+        </field>
+        <field>
+            <name>byteAddrOffset</name>
+            <description>The number of bytes a device requires to set its
+                         internal address/offset.</description>
+            <type>uint8_t</type>
+            <default>0x02</default>
+        </field>
+        <field>
+            <name>maxMemorySizeKB</name>
+            <description>The number of kilobytes a device can hold.  'Zero'
+                         value possible for some devices.</description>
+            <type>uint64_t</type>
+            <default>0x0</default>
+        </field>
+        <field>
+            <name>writePageSize</name>
+            <description>The maximum number of bytes that can be written to
+                         a device at one time. 'Zero' value means no maximum
+                         value is expected or checked.</description>
+            <type>uint64_t</type>
+            <default>0x0</default>
+        </field>
+        <field>
+            <name>writeCycleTime</name>
+            <description>The amount of time in milliseconds a device requires
+                         on the completion of a write command to update its
+                         internal memory.</description>
+            <type>uint64_t</type>
+            <default>0x0</default>
+        </field>
+    </complexType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>TPM_PRIMARY_INFO</id>
+    <description>Information needed to address the TPM slaves</description>
+    <complexType>
+        <description>Structure to define the addressing for an I2C
+                     TPM.</description>
+        <field>
+            <name>tpmEnabled</name>
+            <description>Boolean indicating whether this TPM is available
+              in the system</description>
+            <type>uint8_t</type>
+            <default>0x0</default>
+        </field>
+        <field>
+            <name>i2cMasterPath</name>
+            <description>Entity path to the chip that contains the I2C
+                         master</description>
+            <type>EntityPath</type>
+            <default>physical:sys-0</default>
+        </field>
+        <field>
+            <name>port</name>
+            <description>Port from the I2C Master device. This is a 6-bit
+                         value.</description>
+            <type>uint8_t</type>
+            <default>0x01</default>
+        </field>
+        <field>
+            <name>devAddrLocality0</name>
+            <description>Device address on the I2C bus for Locality 0.
+                         This is a 7-bit value, but then shifted 1
+                         bit left.</description>
+            <type>uint8_t</type>
+            <default>0xAE</default>
+        </field>
+        <field>
+            <name>devAddrLocality4</name>
+            <description>Device address on the I2C bus for Locality 4.
+                         This is a 7-bit value, but then shifted 1
+                         bit left.</description>
+            <type>uint8_t</type>
+            <default>0xFF</default>
+        </field>
+        <field>
+            <name>engine</name>
+            <description>I2C master engine. This is a 2-bit
+                         value.</description>
+            <type>uint8_t</type>
+            <default>0x00</default>
+        </field>
+        <field>
+            <name>byteAddrOffset</name>
+            <description>The number of bytes a device requires to set its
+                         internal address/offset.</description>
+            <type>uint8_t</type>
+            <default>0x01</default>
+        </field>
+    </complexType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>TPM_BACKUP_INFO</id>
+    <description>Information needed to address the TPM slaves</description>
+    <complexType>
+        <description>Structure to define the addressing for an I2C
+                     TPM device.</description>
+        <field>
+            <name>tpmEnabled</name>
+            <description>Boolean indicating whether this TPM is available
+              in the system</description>
+            <type>uint8_t</type>
+            <default>0x0</default>
+        </field>
+        <field>
+            <name>i2cMasterPath</name>
+            <description>Entity path to the chip that contains the I2C
+                         master</description>
+            <type>EntityPath</type>
+            <default>physical:sys-0</default>
+        </field>
+        <field>
+            <name>port</name>
+            <description>Port from the I2C Master device. This is a 6-bit
+                         value.</description>
+            <type>uint8_t</type>
+            <default>0x01</default>
+        </field>
+        <field>
+            <name>devAddrLocality0</name>
+            <description>Device address on the I2C bus for Locality 0.
+                         This is a 7-bit value, but then shifted 1
+                         bit left.</description>
+            <type>uint8_t</type>
+            <default>0xAE</default>
+        </field>
+        <field>
+            <name>devAddrLocality4</name>
+            <description>Device address on the I2C bus for Locality 4.
+                         This is a 7-bit value, but then shifted 1
+                         bit left.</description>
+            <type>uint8_t</type>
+            <default>0xFF</default>
+        </field>
+        <field>
+            <name>engine</name>
+            <description>I2C master engine. This is a 2-bit
+                         value.</description>
+            <type>uint8_t</type>
+            <default>0x00</default>
+        </field>
+        <field>
+            <name>byteAddrOffset</name>
+            <description>The number of bytes a device requires to set its
+                         internal address/offset.</description>
+            <type>uint8_t</type>
+            <default>0x01</default>
+        </field>
+    </complexType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>EC</id>
+    <description>attribute indicating the chip target's EC level</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+       <id>ATTR_EC</id>
+       <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>CHIP_ID</id>
+    <description>attribute indicating the chip's ID</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+       <id>ATTR_CHIP_ID</id>
+       <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>FSI_GP_REG_SCOM_ACCESS</id>
+    <description>attribute indicating if the chip's FSI GP regs have scom access</description>
+    <simpleType><uint8_t></uint8_t></simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+       <id>ATTR_FSI_GP_REG_SCOM_ACCESS</id>
+       <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>L2_R_T0_EPS</id>
+    <description>L2 tier0 read epsilon register value.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_L2_R_T0_EPS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>L2_R_T1_EPS</id>
+    <description>L2 tier1 read epsilon register value.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_L2_R_T1_EPS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>L2_R_T2_EPS</id>
+    <description>L2 tier2 read epsilon register value.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_L2_R_T2_EPS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>L2_FORCE_R_T2_EPS</id>
+    <description>L2 force tier2 read epsilon protect (all tiers).</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_L2_FORCE_R_T2_EPS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>L2_W_EPS</id>
+    <description>L2 write epsilon register value.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_L2_W_EPS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>L3_R_T0_EPS</id>
+    <description>L3 tier0 read epsilon register value.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_L3_R_T0_EPS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>L3_R_T1_EPS</id>
+    <description>L3 tier1 read epsilon register value.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_L3_R_T1_EPS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>L3_R_T2_EPS</id>
+    <description>L3 tier2 read epsilon register value.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_L3_R_T2_EPS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>L3_FORCE_R_T2_EPS</id>
+    <description>L3 force tier2 read epsilon protect (all tiers).</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_L3_FORCE_R_T2_EPS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>L3_W_EPS</id>
+    <description>L3 write epsilon register value.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_L3_W_EPS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>CHIP_UNIT</id>
+    <description>A unit (chiplet) 's  offset number within the chip. </description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_CHIP_UNIT_POS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>POSITION</id>
+    <description>Position of target relative to node</description>
+    <simpleType>
+        <uint16_t>
+            <default>0</default>
+        </uint16_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>MBA_PORT</id>
+    <description>MBA port this DIMM is connected to</description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MBA_PORT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MBA_DIMM</id>
+    <description>MBA port DIMM number of this DIMM</description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MBA_DIMM</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>CEN_DQ_TO_DIMM_CONN_DQ</id>
+    <description>
+        Centaur DQ to DIMM connector DQ mapping for a JEDEC DIMM.
+        Uint8 value for each Centaur DQ (0-79).
+        The value is the corresponding DIMM Connector DQ.
+    </description>
+    <simpleType>
+        <uint8_t>
+            <!-- Default is 1:1 mapping, DQ0-DQ0, DQ1-DQ1 etc -->
+            <!-- Data will eventually come from MRW -->
+            <default>
+                0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,
+                20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,
+                40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,
+                60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79
+            </default>
+        </uint8_t>
+        <array>80</array>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<enumerationType>
+    <id>PROC_EPS_TABLE_TYPE</id>
+    <description>Enumeration indicating the PROC_EPS_TABLE_TYPE</description>
+    <group>SYS_POLICIES</group>
+    <enumerator>
+        <name>EPS_TYPE_LE</name>
+        <value>1</value>
+    </enumerator>
+    <enumerator>
+        <name>EPS_TYPE_HE</name>
+        <value>2</value>
+    </enumerator>
+</enumerationType>
+
+<attribute>
+    <id>PROC_EPS_TABLE_TYPE</id>
+    <description>
+        System attribute.
+        Processor epsilon table type. Used to calculate the processor nest
+        epsilon register values.
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <hasStringConversion/>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_EPS_TABLE_TYPE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<enumerationType>
+    <id>PROC_FABRIC_PUMP_MODE</id>
+    <description>Enumeration indicating the PROC_FABRIC_PUMP_MODE</description>
+    <group>SYS_POLICIES</group>
+    <enumerator>
+        <name>MODE1</name>
+        <value>1</value>
+    </enumerator>
+    <enumerator>
+        <name>MODE2</name>
+        <value>2</value>
+    </enumerator>
+</enumerationType>
+
+<attribute>
+    <id>PROC_FABRIC_PUMP_MODE</id>
+    <description>
+        System attribute.
+        Processor SMP Fabric broadcast scope configuration.
+        MODE1 = default = chip/group/system/remote group/foreign.
+        MODE2 = group/system/remote group/foreign.
+        Provided by the Machine Readable Workbook.
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <hasStringConversion/>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_FABRIC_PUMP_MODE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<enumerationType>
+    <id>PROC_X_BUS_WIDTH</id>
+    <description>Enumeration indicating the PROC_X_BUS_WIDTH</description>
+    <group>SYS_POLICIES</group>
+    <enumerator>
+        <name>W4BYTE</name>
+        <value>1</value>
+    </enumerator>
+    <enumerator>
+        <name>W8BYTE</name>
+        <value>2</value>
+    </enumerator>
+</enumerationType>
+
+<attribute>
+    <id>PROC_X_BUS_WIDTH</id>
+    <description>
+        System attribute.
+        Processor SMP X bus width.
+        Provided by the Machine Readable Workbook.
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <hasStringConversion/>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_X_BUS_WIDTH</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>ALL_MCS_IN_INTERLEAVING_GROUP</id>
+    <description>
+        System attribute.
+        If all MCS chiplets are in an interleaving group (1=true, 0=false).
+        - If true the SMP fabric is setup in normal mode and multiple MCSs
+          are grouped (disallowing systems with memory only under 1 MCS
+          (i.e. systems with a single C-DIMM))
+        - If false the SMP fabric is setup in checkerboard mode.
+        Provided by the Machine Readable Workbook.
+        This attribute is based on Machine-Type-Model (MTM) and is setup by
+          the service processor.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint8_t>
+            <default>0x00</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_ALL_MCS_IN_INTERLEAVING_GROUP</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>FABRIC_NODE_ID</id>
+    <description>
+        Chip attribute.
+        Logical fabric node the chip belongs to.
+        Provided by the Machine Readable Workbook.
+        Can vary across drawers.
+    </description>
+    <simpleType><uint8_t>
+        <default>0</default>
+    </uint8_t></simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_FABRIC_NODE_ID</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>FABRIC_CHIP_ID</id>
+    <description>
+        Chip attribute.
+        Logical fabric chip id for this chip (position within the fabric).
+        Provided by the Machine Readable Workbook.
+        Can vary across drawers.
+    </description>
+    <simpleType><uint8_t>
+        <default>0</default>
+    </uint8_t></simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_FABRIC_CHIP_ID</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>CHIP_HAS_SBE</id>
+    <description>
+        Chip attribute.
+        If true, the chip has an SBE and the associated registers.
+        Provided by the Machine Readable Workbook.
+    </description>
+    <simpleType><uint8_t></uint8_t></simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_CHIP_HAS_SBE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>FREQ_PROC_REFCLOCK</id>
+    <description>
+        System attribute.
+        The frequency of the processor refclock in MHz.
+        Provided by the MRW.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType><uint32_t></uint32_t></simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_FREQ_PROC_REFCLOCK</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>FREQ_PROC_REFCLOCK_KHZ</id>
+    <description>
+        System attribute.
+        The frequency of the processor refclock in KHz.
+        Provided by the MRW.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType><uint32_t></uint32_t></simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_FREQ_PROC_REFCLOCK_KHZ</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>FREQ_MEM_REFCLOCK</id>
+    <description>
+        System attribute.
+        The frequency of the memory refclock in MHz.
+        Provided by the MRW.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType><uint32_t></uint32_t></simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_FREQ_MEM_REFCLOCK</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MIN_FREQ_MHZ</id>
+    <description>
+        System attribute.
+        The lowest frequency that a core can be set to in MHz.
+        This is the same for all cores in the system.
+        Provided by the MRW.
+    </description>
+    <simpleType><uint32_t></uint32_t></simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_FREQ_CORE_FLOOR</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>FREQ_PB</id>
+    <description>
+        System attribute.
+        The frequency of a processor's PB chiplet in MHz.
+        This is the same for all PB chiplets in the system.
+        Provided by the MRW.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType><uint32_t></uint32_t></simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_FREQ_PB</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>FREQ_A</id>
+    <description>
+        System attribute.
+        The frequency of a processor's A-bus chiplet in MHz.
+        This is the same for all A-bus chiplets in the system.
+        Provided by the MRW.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType><uint32_t>
+        <default>0x1900</default>
+    </uint32_t></simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_FREQ_A</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>FREQ_X</id>
+    <description>
+        System attribute.
+        The frequency of a processor's X-bus chiplet in MHz.
+        This is the same for all X-bus chiplets in the system.
+        Provided by the MRW.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType><uint32_t></uint32_t></simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_FREQ_X</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>HUID</id>
+    <description>
+        Hardware Unit ID
+        SSSSNNNNTTTTTTTTiiiiiiiiiiiiiiii
+        S=System
+        N=Node Number
+        T=Target Type (matches TYPE attribute)
+        i=Instance/Sequence number of target, relative to node
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+        <default>0xFFFFFFFF</default>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+<attribute>
+    <id>SP_FUNCTIONS</id>
+    <description>
+      Attribute which describes what the SP is or is not doing in this system
+    </description>
+    <complexType>
+        <description>Structure which defines a system's SP functions.
+         Applicable for System target only.  Structure is read-only.
+        </description>
+        <field>
+            <name>baseServices</name>
+            <description>
+             If this flag is set then mailboxEnabled MUST also be set
+
+             0b0: SP does not support for VPD, payload, ATTR sync, VDDR, TOD;
+             0b1: SP supports VPD, payload, ATTR sync, VDDR, TOD
+            </description>
+            <type>uint32_t</type>
+            <bits>1</bits>
+            <default>1</default>
+        </field>
+        <field>
+            <name>fsiSlaveInit</name>
+            <description>
+             0b0: SP does not initialize FSI slave logic, Hostboot must;
+             0b1: SP does initialize FSI slave logic so Hostboot should not
+            </description>
+            <type>uint32_t</type>
+            <bits>1</bits>
+            <default>1</default>
+        </field>
+        <field>
+            <name>mailboxEnabled</name>
+            <description>
+             0b0: There is no SP mailbox support;
+             0b1: There is SP mailbox support
+            </description>
+            <type>uint32_t</type>
+            <bits>1</bits>
+            <default>0</default>
+        </field>
+        <field>
+            <name>fsiMasterInit</name>
+            <description>
+             0b0: SP does not initialize FSI master logic, Hostboot must;
+             0b1: SP does initialize FSI master logic so Hostboot should not
+            </description>
+            <type>uint32_t</type>
+            <bits>1</bits>
+            <default>1</default>
+        </field>
+        <field>
+            <name>hardwareChangeDetection</name>
+            <description>
+             0b0: SP does not perform hardware change detection, Hostboot must;
+             0b1: SP does perform hardware change detection (HCDB) so Hostboot should not
+            </description>
+            <type>uint32_t</type>
+            <bits>1</bits>
+            <default>1</default>
+        </field>
+        <field>
+            <name>powerLineDisturbance</name>
+            <description>
+             0b0: SP does not perform Power Line Disturbance (PLD) detection, Hostboot must;
+             0b1: SP does perform Power Line Disturbance (PLD) detection so Hostboot should not
+            </description>
+            <type>uint32_t</type>
+            <bits>1</bits>
+            <default>1</default>
+        </field>
+        <field>
+            <name>reserved</name>
+            <description>Reserved for future use</description>
+            <type>uint32_t</type>
+            <bits>26</bits>
+            <default>0</default>
+        </field>
+        </complexType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>HB_SETTINGS</id>
+    <description>
+      Attribute which describes how the SP has configured features in
+      Hostboot.
+    </description>
+    <complexType>
+        <description>Structure which defines a system's HB settings.
+         Applicable for System target only.
+        </description>
+        <field>
+            <name>traceContinuous</name>
+            <description>
+            Enable / Disable continuous trace.
+                0b0: Continuous trace is disabled.
+                0b1: Continuous trace is enabled.
+            </description>
+            <type>uint8_t</type>
+            <bits>1</bits>
+            <default>0</default>
+        </field>
+        <field>
+            <name>traceScanDebug</name>
+            <description>
+            Override trace debug selection for SCAN component.
+                0b0: TRACS entries for SCAN have default behavior.
+                0b1: TRACS entries for SCAN are enabled.
+            </description>
+            <type>uint8_t</type>
+            <bits>1</bits>
+            <default>0</default>
+        </field>
+        <field>
+            <name>reserved</name>
+            <description>Reserved for future use</description>
+            <type>uint8_t</type>
+            <bits>6</bits>
+            <default>0</default>
+        </field>
+        </complexType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>CEC_IPL_TYPE</id>
+    <description>
+      Attribute which describes optional IPL flavors
+    </description>
+    <complexType>
+        <description>Structure which defines a they IPL types
+         Applicable for System target only.
+        </description>
+        <field>
+            <name>PostDump</name>
+            <description>
+            Perform mainstore dump collection. Only valid for MPIPL
+                0b0: Do not collect mainstore dump
+                0b1: Perform mainstore dump collection
+            </description>
+            <type>uint8_t</type>
+            <bits>1</bits>
+            <default>0</default>
+        </field>
+        <field>
+            <name>reserved</name>
+            <description>Reserved for future use</description>
+            <type>uint8_t</type>
+            <bits>7</bits>
+            <default>0</default>
+        </field>
+        </complexType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+
+<!-- Begin attributes (4) to test string support -->
+
+<attribute>
+    <id>TEST_NULL_STRING</id>
+    <description>Test attribute; string with empty default value</description>
+    <simpleType>
+        <string>
+            <default></default>
+            <sizeInclNull>10</sizeInclNull>
+        </string>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>TEST_MIN_STRING</id>
+    <description>Test attribute; smallest string possible given size</description>
+    <simpleType>
+        <string>
+            <default>a</default>
+            <sizeInclNull>10</sizeInclNull>
+        </string>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>TEST_MAX_STRING</id>
+    <description>Test attribute; largest string possible given size</description>
+    <simpleType>
+        <string>
+            <default>abc</default>
+            <sizeInclNull>4</sizeInclNull>
+        </string>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>TEST_NO_DEFAULT_STRING</id>
+    <description>Test attribute; string with no default supplied</description>
+    <simpleType>
+        <string>
+            <sizeInclNull>10</sizeInclNull>
+        </string>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<!-- End attributes (4) to test string support -->
+
+<attribute>
+    <id>VPD_REC_NUM</id>
+    <description>Record offset for this target's VPD</description>
+    <simpleType>
+        <uint16_t>
+            <default>0xFFFF</default>
+        </uint16_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>PEER_TARGET</id>
+    <description>Peer target's address of a A/X-bus connection.
+                 NULL means address 0 for no peer target. If a
+                 target instance overrides the default with the
+                 peer target's PHYS_PATH. The target compiler will
+                 convert the valid PHYS_PATH string into the runtime
+                 virtual address of the peer target instance.
+    </description>
+    <simpleType>
+        <Target_t>
+            <default>NULL</default>
+        </Target_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>PAYLOAD_BASE</id>
+    <description>Base address (target HRMOR) of the payload.  Value is in MB.</description>
+    <simpleType>
+        <uint64_t>
+            <default>256</default>
+        </uint64_t>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>PAYLOAD_ENTRY</id>
+    <description>The offset from base address of the payload entry-point.
+        Current default is 0x180</description>
+    <simpleType>
+        <uint64_t>
+            <default>0x180</default>
+        </uint64_t>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<enumerationType>
+    <id>PAYLOAD_KIND</id>
+    <description>
+        Enumeration indicating what kind of payload is to be started
+    </description>
+    <enumerator>
+        <name>UNKNOWN</name>
+        <value>0</value>
+    </enumerator>
+    <enumerator>
+        <name>PHYP</name>
+        <value>1</value>
+    </enumerator>
+    <enumerator>
+        <name>SAPPHIRE</name>
+        <value>2</value>
+    </enumerator>
+    <enumerator>
+        <name>NONE</name>
+        <value>3</value>
+    </enumerator>
+    <default>UNKNOWN</default>
+</enumerationType>
+
+<attribute>
+    <id>PAYLOAD_KIND</id>
+    <description>
+        Attribute indicating what kind of payload is to be started.
+    </description>
+    <simpleType>
+        <enumeration>
+            <id>PAYLOAD_KIND</id>
+        </enumeration>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hasStringConversion/>
+</attribute>
+
+<attribute>
+    <id>HB_HRMOR_NODAL_BASE</id>
+    <description>Hostboot HRMOR = (HB_HRMOR_NODAL_BASE * node) + offset. </description>
+    <!-- This value is set by the FSP.
+         Hostboot uses it to find the HRMOR of Hostboot images running on other nodes.
+         The value of HB_HRMOR_NODAL_BASE does NOT include the offset -->
+    <simpleType>
+        <uint64_t>
+            <default>0x200000000000</default> <!-- 32TB -->
+        </uint64_t>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>FABRIC_TO_PHYSICAL_NODE_MAP</id>
+    <description>
+        Correlate HDAT node number (physical) to the logical node
+        (based on the PIR) that contains the host boot image.
+    </description>
+    <!-- 8 byte array.  The index is the physical node number. The value
+    at that index is the hb instance number, based on the processor PIR, that
+    contains or would contain the host boot image if the drawer exists or were
+    to exist. Host boot uses this value and HB_HRMOR_NODAL_BASE to calculate
+    the HRMOR of the hostboot image for each drawer.
+    If the drawer does NOT physically exist then enter a logical node that
+    does NOT physically exist.
+
+    It's conceivable that there could be more than one logical node contained
+    in a physical drawer, if that is ever the case then the FSP would need to
+    modify this attribute to indicate which logical node contains the hostboot
+    image for each drawer. -->
+    <simpleType>
+        <uint8_t>
+            <!-- Default is for single node system -->
+            <default>0,255,255,255,255,255,255,255</default>
+        </uint8_t>
+    <array>8</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<!--    TARGETING attributes to support mss_setup_bars and proc_setup_bars  -->
+
+<attribute>
+  <id>PROC_MEM_BASES</id>
+  <description>
+    read/write HWP attribute mapped to TARGETING
+    Non-mirrored memory base addresses
+    creator: mss_setup_bars
+    consumer: proc_setup_bars, platform
+    firmware notes:
+        64-bit RA
+        eight independent non-mirrored segments are supported
+        (max number based on Venice design)
+  </description>
+  <simpleType>
+      <uint64_t></uint64_t>
+      <array>8</array><!--per group-->
+  </simpleType>
+  <persistency>volatile-zeroed</persistency>
+  <readable/>
+  <writeable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_PROC_MEM_BASES</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+  <id>PROC_MEM_SIZES</id>
+  <description>
+    read/write HWP attribute mapped to TARGETING
+    Size of non-mirrored memory regions
+    creator: mss_setup_bars
+    consumer: proc_setup_bars, platform
+    firmware notes:
+        for given index value, address space assumed to be contiguous
+        from ATTR_PROC_MEM_BASES value at matching index
+        eight independent non-mirrored segments are supported
+        (max number based on Venice design)
+  </description>
+  <simpleType>
+      <uint64_t></uint64_t>
+      <array>8</array><!--per group-->
+  </simpleType>
+  <persistency>volatile-zeroed</persistency>
+  <readable/>
+  <writeable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_PROC_MEM_SIZES</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+  <id>PROC_MIRROR_BASES</id>
+  <description>Mirrored memory base addresses
+    creator: mss_setup_bars
+    consumer: proc_setup_bars, platform
+    firmware notes:
+      64-bit RA
+      four independent mirrored segments are supported
+      (max number based on Venice design)
+  </description>
+  <simpleType>
+      <uint64_t></uint64_t>
+      <array>4</array><!--per group-->
+  </simpleType>
+  <persistency>volatile-zeroed</persistency>
+  <readable/>
+  <writeable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_PROC_MIRROR_BASES</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+  <id>PROC_MIRROR_SIZES</id>
+  <description>Size of mirrored memory region
+    creator: mss_setup_bars
+    consumer: proc_setup_bars, platform
+    firmware notes:
+      for given index value, address space assumed to be contiguous
+      from ATTR_PROC_MIRROR_BASES value at matching index
+      four independent mirrored segments are supported
+      (max number based on Venice design)
+  </description>
+  <simpleType>
+      <uint64_t></uint64_t>
+      <array>4</array><!--per group-->
+  </simpleType>
+  <persistency>volatile-zeroed</persistency>
+  <readable/>
+  <writeable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_PROC_MIRROR_SIZES</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+  <id>PROC_L3_BAR1_REG</id>
+  <description>
+    read/write HWP attribute mapped to TARGETING
+    L3 BAR1 register value
+    creator: proc_setup_bars
+    consumer: winkle image setup procedures
+    notes:
+          64-bit register value
+          SCOM address: 0x1001080B
+  </description>
+  <simpleType>
+      <uint64_t></uint64_t>
+  </simpleType>
+  <persistency>volatile-zeroed</persistency>
+  <readable/>
+  <writeable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_PROC_L3_BAR1_REG</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+  <id>PROC_L3_BAR2_REG</id>
+  <description>
+    read/write HWP attribute mapped to TARGETING
+    L3 BAR2 register value
+    creator: proc_setup_bars
+    consumer: winkle image setup procedures
+    notes:
+      64-bit register value
+      SCOM address: 0x10010813
+  </description>
+  <simpleType>
+      <uint64_t></uint64_t>
+  </simpleType>
+  <persistency>volatile-zeroed</persistency>
+  <readable/>
+  <writeable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_PROC_L3_BAR2_REG</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+  <id>PROC_L3_BAR_GROUP_MASK_REG</id>
+  <description>
+    read/write HWP attribute mapped to TARGETING
+    L3 BAR Group Mask register value
+    creator: proc_setup_bars
+    consumer: winkle image setup procedures
+    notes:
+      64-bit register value
+      SCOM address: 0x10010816
+  </description>
+  <simpleType>
+      <uint64_t></uint64_t>
+  </simpleType>
+  <persistency>volatile-zeroed</persistency>
+  <readable/>
+  <writeable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_PROC_L3_BAR_GROUP_MASK_REG</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+
+<attribute>
+  <id>FREQ_CORE</id>
+  <description>
+    firmware notes:
+      Nominal processor's core DPLL frequency (MHz).
+      Default value provided by Machine Readable Workbook.
+      This attribute is the current value.
+      @note this should be initialized by istep 7.1 proc_a_x_pci_dmi_pll_setup
+  </description>
+  <simpleType>
+      <uint32_t></uint32_t>
+  </simpleType>
+  <persistency>volatile-zeroed</persistency>
+  <readable/>
+  <writeable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_FREQ_CORE</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+  <id>PROC_PCIE_NOT_F_LINK</id>
+  <description>
+    firmware notes:
+      Set IPL time mux/switch between PCIE PHB/F link function
+      (one per foreign link)
+  </description>
+  <simpleType>
+      <uint8_t>
+          <default>1,1</default>
+      </uint8_t>
+      <array>2</array>
+  </simpleType>
+  <persistency>volatile</persistency>
+  <readable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_PROC_PCIE_NOT_F_LINK</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PROC_MCS_GROUPS</id>
+    <description>
+        Per MCS group number
+        Value is index for PROC_MEM_BASES and PROC_MEM_SIZES arrays
+        creator: mss_eff_grouping.C
+        consumer: HDAT
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0,0,0,0,0,0,0,0</default>
+        </uint8_t>
+    <array>8</array><!--per MCS-->
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_MCS_GROUPS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<!-- ===== ===== ===== ===== ===== ===== ===== ===== ===== =====
+     Memory Map
+     The attributes below are defined by the PHYP Memory Map
+     documentation owned by Shawn Lambeth
+
+     @todo: RTC:44128 will be used to automatically create this data
+     ===== ===== ===== ===== ===== ===== ===== ===== ===== ===== -->
+
+<!-- ===== System Attributes ===== -->
+
+<attribute>
+    <id>XSCOM_BASE_ADDRESS</id>
+    <description>System XSCOM base address</description>
+    <simpleType>
+        <uint64_t>
+        </uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>IBSCOM_MCS_BASE_ADDR</id>
+    <description>MCS Inband Scom base address</description>
+    <simpleType>
+        <uint64_t>
+            <default>0x0003E00000000000</default>
+        </uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MCS_INBAND_BASE_ADDRESS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>IBSCOM_PROC_BASE_ADDR</id>
+    <description>PROC Inband Scom base address</description>
+    <simpleType>
+        <uint64_t>
+            <default>0x0003E00000000000</default>
+        </uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>MIRROR_BASE_ADDRESS</id>
+    <description>System Mirrorable base address</description>
+    <simpleType>
+        <uint64_t>
+            <default>0x0000800000000000</default><!-- 128 TB -->
+        </uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MIRROR_BASE_ADDRESS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PAYLOAD_IN_MIRROR_MEM</id>
+    <description>Indicate that payload should be placed in mirrored memory.
+        Set by the FSP based on the value of the registry key indicating
+        the memory mirroring mode.
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default> <!-- false -->
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<!-- ===== Processor Chip Attributes ===== -->
+
+<enumerationType>
+    <id>NPU_MMIO_BAR_ENABLE</id>
+    <description>Enumeration indicating whether MMIO BAR is enabled or not to be
+        used with ATTR_PROC_NPU_MMIO_BAR_ENABLE</description>
+    <enumerator>
+        <name>DISABLE</name>
+        <value>0</value>
+    </enumerator>
+    <enumerator>
+        <name>ENABLE</name>
+        <value>1</value>
+    </enumerator>
+</enumerationType>
+
+<attribute>
+    <id>NPU_MMIO_BAR_ENABLE</id>
+    <description>NPU MMIO BAR enables
+        creator: platform
+        consumer: proc_setup_bars
+        firmware notes: none
+            first dimension: unit number (0:3)
+            second dimension: BAR number (0:1)
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+        <array>4,2</array>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_NPU_MMIO_BAR_ENABLE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+<attribute>
+    <id>NPU_MMIO_BAR_BASE_ADDR</id>
+    <description>NPU MMIO BAR base address values
+        creator: platform
+        consumer: proc_setup_bars
+        firmware notes:
+            64-bit address representing BAR RA
+            NOTE: BAR register covers RA 14:51
+            first dimension: unit number (0:3)
+            second dimension: BAR number (0:1)
+    </description>
+    <simpleType>
+        <uint64_t>
+            <default>0</default>
+        </uint64_t>
+        <array>4,2</array>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_NPU_MMIO_BAR_BASE_ADDR</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<enumerationType>
+    <id>NPU_MMIO_BAR_SIZE</id>
+    <description>Enumeration indicating the BAR size
+        used with ATTR_PROC_NPU_MMIO_BAR_SIZE</description>
+    <enumerator>
+        <name>2_MB</name>
+        <value>0x0000000000200000</value>
+    </enumerator>
+    <enumerator>
+        <name>1_MB</name>
+        <value>0x0000000000100000</value>
+    </enumerator>
+    <enumerator>
+        <name>512_KB</name>
+        <value>0x0000000000080000</value>
+    </enumerator>
+    <enumerator>
+        <name>256_KB</name>
+        <value>0x0000000000040000</value>
+    </enumerator>
+    <enumerator>
+        <name>128_KB</name>
+        <value>0x0000000000020000</value>
+    </enumerator>
+    <enumerator>
+        <name>64_KB</name>
+        <value>0x0000000000010000</value>
+    </enumerator>
+</enumerationType>
+<attribute>
+    <id>NPU_MMIO_BAR_SIZE</id>
+    <description>NPU MMIO BAR size values
+        creator: platform
+        consumer: proc_setup_bars
+        firmware notes: none
+            first dimension: unit number (0:3)
+            second dimension: BAR number (0:1)
+    </description>
+    <simpleType>
+        <uint64_t>
+            <default>0</default>
+        </uint64_t>
+        <array>4,2</array>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_NPU_MMIO_BAR_SIZE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>FSP_BASE_ADDR</id>
+    <description>Base Address of FSP IO Region</description>
+    <simpleType>
+        <uint64_t>
+            <!-- Starts at 1024TB - 128GB, 4GB per proc -->
+            <default>0x0003FFE000000000</default>
+        </uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_FSP_BAR_BASE_ADDR</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>FSP_BAR_SIZE</id>
+    <description>Size of FSP IO Region</description>
+    <simpleType>
+        <uint64_t>
+            <!-- 4GB per Proc -->
+            <default>0x0000000100000000</default>
+        </uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_FSP_BAR_SIZE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>FSP_MMIO_MASK_SIZE</id>
+    <description>MMIO Mask for FSP IO Region</description>
+    <simpleType>
+        <uint64_t>
+            <!-- @fixme : what is this value? -->
+            <default>0x0000000100000000</default>
+        </uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_FSP_MMIO_MASK_SIZE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PSI_BRIDGE_BASE_ADDR</id>
+    <description>Base Address of PSI Bridge Logic</description>
+    <simpleType>
+        <uint64_t>
+            <!-- Starts at 1024TB - 6GB, 1MB per link -->
+            <!-- 0x0003FFFE80000000 + 0x100000*procnum -->
+            <default>0xFFFFFFFFFFFFFFFF</default>
+        </uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_PSI_BRIDGE_BAR_BASE_ADDR</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>INTP_BASE_ADDR</id>
+    <description>Base Address of Interrupt Presenter</description>
+    <simpleType>
+        <uint64_t>
+            <!-- Starts at 1024TB - 2GB, 1MB per proc -->
+            <!-- 0x0003FFFF80000000 + 0x100000*procnum -->
+            <default>0xFFFFFFFFFFFFFFFF</default>
+        </uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_INTP_BAR_BASE_ADDR</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PHB_BASE_ADDRS</id>
+    <description>Base Address of PHB Register Space</description>
+    <simpleType>
+        <uint64_t>
+            <!-- Starts at 1024TB - 7GB -->
+            <!-- 0x0003FFFE40000000 + 0x400000*procnum + 0x100000*phbnum -->
+            <default>
+                0xFFFFFFFFFFFFFFFF,
+                0xFFFFFFFFFFFFFFFF,
+                0xFFFFFFFFFFFFFFFF,
+                0xFFFFFFFFFFFFFFFF
+            </default>
+        </uint64_t>
+        <array>4</array><!-- per PHB -->
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>PCI_BASE_ADDRS_64</id>
+    <description>Base Address of PCI 64 bit Memory Space</description>
+    <simpleType>
+        <uint64_t>
+        </uint64_t>
+        <array>4</array><!-- per PHB -->
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>PCI_BASE_ADDRS_32</id>
+    <description>Base Address of PCI 32 bit Memory Space</description>
+    <simpleType>
+        <uint64_t>
+        </uint64_t>
+        <array>4</array><!-- per PHB -->
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+
+<attribute>
+    <id>MEM_BASE</id>
+    <description>Base Address for all mainstore behind this processor</description>
+    <simpleType>
+        <uint64_t>
+        </uint64_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_MEM_BASE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MIRROR_BASE</id>
+    <description>Base Address for all mirrored mainstore behind this processor</description>
+    <simpleType>
+        <uint64_t>
+        </uint64_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_MIRROR_BASE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>RNG_BASE_ADDR</id>
+    <description>Base Address of RNG IO Region</description>
+    <simpleType>
+        <uint64_t>
+            <!-- Starts at 1024TB - 3GB -->
+            <!-- 0x0003FFFF40000000 + 0x1000*procnum -->
+            <default>0xFFFFFFFFFFFFFFFF</default>
+        </uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_NX_MMIO_BAR_BASE_ADDR</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>RNG_BAR_SIZE</id>
+    <description>Size of RNG IO Region</description>
+    <simpleType>
+        <uint64_t>
+            <!-- 4 KB per processor -->
+            <default>0x000000000001000</default>
+        </uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>IMT_BASE_ADDR</id>
+    <description>Base Address of In-Memory Trace Region
+        Set by FSP-based tooling
+    </description>
+    <simpleType>
+        <uint64_t>
+            <default>0xFFFFFFFFFFFFFFFF</default>
+        </uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>IMT_BAR_SIZE</id>
+    <description>Size of IMT IO Region
+        Set by FSP-based tooling
+    </description>
+    <simpleType>
+        <uint64_t>
+            <default>0x0000000000000000</default>
+        </uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<!-- ===== ===== End Memory Map ===== ===== ===== ===== ===== ===== -->
+
+<attribute>
+  <id>PROC_EPS_GB_PERCENTAGE</id>
+  <description>
+     firmware notes:
+        Guardband percentage to apply to baseline epsilon values
+  </description>
+  <simpleType>
+      <uint8_t></uint8_t>
+  </simpleType>
+  <persistency>volatile-zeroed</persistency>
+  <readable/>
+  <writeable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_PROC_EPS_GB_PERCENTAGE</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+  <id>PROC_EPS_GB_DIRECTION</id>
+  <description>
+    firmware notes:
+      Direction to apply guardband margin (positive/negative)
+  </description>
+  <simpleType>
+      <uint8_t></uint8_t>
+  </simpleType>
+  <persistency>volatile-zeroed</persistency>
+  <readable/>
+  <writeable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_PROC_EPS_GB_DIRECTION</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+  <id>PROC_FABRIC_ASYNC_SAFE_MODE</id>
+  <description>
+    firmware notes:
+      Set to force all asynchronous boundary crossings into safe mode.
+  </description>
+  <simpleType>
+      <uint8_t></uint8_t>
+  </simpleType>
+  <persistency>volatile-zeroed</persistency>
+  <readable/>
+  <writeable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_PROC_FABRIC_ASYNC_SAFE_MODE</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+  <id>FREQ_PCIE</id>
+  <description>
+    The frequency of a processor's PCI-e bus in MHz.
+    This is the same for all PCI-e busses in the system.
+    Provided by the MRW.
+  </description>
+  <group>SYS_POLICIES</group>
+  <simpleType><uint32_t></uint32_t></simpleType>
+  <persistency>non-volatile</persistency>
+  <readable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_FREQ_PCIE</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>NOMINAL_FREQ_MHZ</id>
+    <description>
+      The nominal core frequency in MHz.
+      This is the same for all cores in the system.
+      Provided by the Machine Readable Workbook.
+    </description>
+    <simpleType><uint32_t></uint32_t></simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_FREQ_CORE_NOMINAL</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>ULTRA_TURBO_FREQ_MHZ</id>
+    <description>
+      The ultra turbo frequency in MHz.
+      This is the same for all cores in the system.
+      Provided by the min of the #V Fvmin field in mvpd LRPx records.
+    </description>
+    <simpleType><uint32_t></uint32_t></simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_ULTRA_TURBO_NOMINAL</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MNFG_FLAGS</id>
+    <description>
+        Provides the manufacturing flags. This is a bitfield.
+        Multiple flags can be set at once. Use MNFG_FLAG_BIT
+        to decode. Expected use-case is for FSP to write this
+        attribute based on the MNFG component flags and for
+        HWSV/Hostboot to read it.
+    </description>
+    <simpleType>
+        <uint64_t>
+            <default>0x0000000000000000</default>
+        </uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MNFG_FLAGS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<enumerationType>
+    <id>MNFG_FLAG</id>
+    <description>Enumeration indicating the mnfg flags
+        that are set by the user.  The values can be
+        combined using a bitwise 'OR'.  The values will
+        need to be kept in sync with the FAPI
+        enumerator values.  Also the enumeration type
+        is used by the ATTR_MNFG_FLAGS attribute.  Should
+        note that the MNFG_FLAG values are of type uint32_t
+    </description>
+    <enumerator>
+        <!-- Use default mfg error thresholds and reporting values -->
+        <name>THRESHOLDS</name>
+        <value>0x00000001</value>
+    </enumerator>
+    <enumerator>
+        <!-- Enable AVP execution -->
+        <name>AVP_ENABLE</name>
+        <value>0x00000002</value>
+    </enumerator>
+    <enumerator>
+        <!-- Enable HDAT AVPs** -->
+        <name>HDAT_AVP_ENABLE</name>
+        <value>0x00000004</value>
+    </enumerator>
+    <enumerator>
+        <!-- All SRCs are terminating (CEC hardware/procedural) -->
+        <name>SRC_TERM</name>
+        <value>0x00000008</value>
+    </enumerator>
+    <enumerator>
+        <!-- Enable IPL memory diagnostics to report memory CE -->
+        <name>IPL_MEMORY_CE_CHECKING</name>
+        <value>0x00000010</value>
+    </enumerator>
+    <enumerator>
+        <!-- Enable Fast Background Scrub -->
+        <name>FAST_BACKGROUND_SCRUB</name>
+        <value>0x00000020</value>
+    </enumerator>
+    <enumerator>
+        <!-- Test DRAM Repairs -->
+        <name>TEST_DRAM_REPAIRS</name>
+        <value>0x00000040</value>
+    </enumerator>
+    <enumerator>
+        <!-- Disable Dram Repairs -->
+        <name>DISABLE_DRAM_REPAIRS</name>
+        <value>0x00000080</value>
+    </enumerator>
+    <enumerator>
+        <!-- Enable exhaustive pattern test -->
+        <name>ENABLE_EXHAUSTIVE_PATTERN_TEST</name>
+        <value>0x00000100</value>
+    </enumerator>
+    <enumerator>
+        <!-- Enable standard pattern test -->
+        <name>ENABLE_STANDARD_PATTERN_TEST</name>
+        <value>0x00000200</value>
+    </enumerator>
+    <enumerator>
+        <!-- Enable minimum pattern test -->
+        <name>ENABLE_MINIMUM_PATTERN_TEST</name>
+        <value>0x00000400</value>
+    </enumerator>
+    <enumerator>
+        <!-- Disable Fabric eRepair -->
+        <name>DISABLE_FABRIC_eREPAIR</name>
+        <value>0x00000800</value>
+    </enumerator>
+    <enumerator>
+        <!-- Disable Memory eRepair -->
+        <name>DISABLE_MEMORY_eREPAIR</name>
+        <value>0x00001000</value>
+    </enumerator>
+    <enumerator>
+        <!-- Fabric deploy lane spares -->
+        <name>FABRIC_DEPLOY_LANE_SPARES</name>
+        <value>0x00002000</value>
+    </enumerator>
+    <enumerator>
+        <!-- DMI deploy lane spares -->
+        <name>DMI_DEPLOY_LANE_SPARES</name>
+        <value>0x00004000</value>
+    </enumerator>
+    <enumerator>
+        <!-- Forcibly run PSI diagnostics -->
+        <name>PSI_DIAGNOSTIC</name>
+        <value>0x00008000</value>
+    </enumerator>
+    <enumerator>
+        <!-- Brazos Wrap Config -->
+        <name>BRAZOS_WRAP_CONFIG</name>
+        <value>0x00010000</value>
+    </enumerator>
+    <enumerator>
+        <!-- FSP is responsible for updating Processor SBE Image -->
+        <name>FSP_UPDATE_SBE_IMAGE</name>
+        <value>0x00020000</value>
+    </enumerator>
+    <enumerator>
+        <!-- Update both sides of SBE Image if update is needed -->
+        <name>UPDATE_BOTH_SIDES_OF_SBE</name>
+        <value>0x00040000</value>
+    </enumerator>
+</enumerationType>
+
+<!-- Support for pm_hwp_attributes.xml -->
+
+<attribute>
+    <id>PROC_DPLL_DIVIDER</id>
+    <description>
+      PROC_CHIP Attribute
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_DPLL_DIVIDER</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_POWER_PROXY_TRACE_TIMER</id>
+    <description>
+      PROC_CHIP Attribute
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_POWER_PROXY_TRACE_TIMER</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_PPT_TIMER_MATCH_VALUE</id>
+    <description>
+      PROC_CHIP Attribute
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_PPT_TIMER_MATCH_VALUE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_PPT_TIMER_TICK</id>
+    <description>
+      PROC_CHIP Attribute
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_PPT_TIMER_TICK</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_AISS_TIMEOUT</id>
+    <description>
+      PROC_CHIP Attribute
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_AISS_TIMEOUT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_PSTATE_STEPSIZE</id>
+    <description>
+      PROC_CHIP Attribute
+
+Used to setup the PMC voltage controller
+
+Producer: proc_build_pstate_tables.C
+
+Consumer: OCC pstate_init()
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_PSTATE_STEPSIZE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_EXTERNAL_VRM_STEPDELAY_RANGE</id>
+    <description>
+      PROC_CHIP Attribute
+
+A 4 bit field  selects one of the the upper 16bit of a 19bit counter (16+3) incremented in the nest/4 domain
+
+Consumer: proc_pm.scominit
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_EXTERNAL_VRM_STEPDELAY_RANGE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_EXTERNAL_VRM_STEPDELAY_VALUE</id>
+    <description>
+      PROC_CHIP Attribute
+
+Consumer: proc_pm.scominit
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_EXTERNAL_VRM_STEPDELAY_VALUE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_PMC_HANGPULSE_DIVIDER</id>
+    <description>
+      PROC_CHIP Attribute
+
+Producer:  proc_pm_init
+
+Consumer: proc_pm.scominit
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_PMC_HANGPULSE_DIVIDER</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_PVSAFE_PSTATE</id>
+    <description>
+      PROC_CHIP Attribute
+Pstate that is invoked in the PMC voltage controller upon the loss of the OCC Heartbeat..
+
+Producer:  proc_pm_init.C
+
+Consumer: proc_pm.scominit
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_PVSAFE_PSTATE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SPIVID_FRAME_SIZE</id>
+    <description>
+      PROC_CHIP Attribute
+
+Supported values: 0x20 (32d)
+
+Chip Select assertion duration is spi_frame_size + 2
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SPIVID_FRAME_SIZE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SPIVID_IN_DELAY_FRAME1</id>
+    <description>
+      PROC_CHIP Attribute
+
+Supported values: 0x00 to spi_frame_size.  Values beyond spi_frame_size result in the input never being captured
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SPIVID_IN_DELAY_FRAME1</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SPIVID_IN_DELAY_FRAME2</id>
+    <description>
+      PROC_CHIP Attribute
+
+Supported values: 0x00 to spi_frame_size.  Values beyond spi_frame_size result in the input never being captured
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SPIVID_IN_DELAY_FRAME2</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SPIVID_CLOCK_POLARITY</id>
+    <description>
+      PROC_CHIP Attribute
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SPIVID_CLOCK_POLARITY</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SPIVID_CLOCK_PHASE</id>
+    <description>
+      PROC_CHIP Attribute
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SPIVID_CLOCK_PHASE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SPIVID_CLOCK_DIVIDER</id>
+    <description>
+      PROC_CHIP Attribute
+For a 2.4GHz nest clock, this means that the SPI clk can be theoretically adjusted between 600MHz and 0.29MHz (cycle time 1.66ns...3.41us, in 1.66ns steps). However, a practical range is 0.5...25MHz.
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SPIVID_CLOCK_DIVIDER</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SPIVID_INTERFRAME_DELAY_WRITE_STATUS</id>
+    <description>
+      PROC_CHIP Attribute
+Consumer: proc_pmc_init
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SPIVID_INTERFRAME_DELAY_WRITE_STATUS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SPIVID_INTERFRAME_DELAY_WRITE_STATUS_VALUE</id>
+    <description>
+      PROC_CHIP Attribute
+
+Delay is computed as:  (value * ~100ns_hang_pulse)  +0/-~100ns_hang_pulse time
+
+0x00000: Wait 1 SPI Clock
+0x00001 - 0x1FFFF: value = number of ~100ns_hang_pulses
+
+For values greater than 0x00000, the actual delay is 1 SPI Clock + the time delay designated by the value defined. Max. delay at 0x1FFFF: 13.1ms + 1 SPI clock cycle.
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SPIVID_INTERFRAME_DELAY_WRITE_STATUS_VALUE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SPIVID_INTER_RETRY_DELAY_VALUE</id>
+    <description>
+      PROC_CHIP Attribute
+
+Delay is computed as:  (value * ~100ns_hang_pulse)  +0/-~100ns_hang_pulse time
+
+0x0000: Wait 1 SPI Clock
+0x0001 - 0xFFFF: value = number of ~100ns_hang_pulses
+
+For values greater than 0x00000, the actual delay is 1 SPI Clock + the time delay designated by the value defined. Max. delay at 0x1FFFF: 13.1ms + 1 SPI clock cycle.
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SPIVID_INTER_RETRY_DELAY_VALUE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SPIVID_INTER_RETRY_DELAY</id>
+    <description>
+      PROC_CHIP Attribute
+Consumer: proc_pmc_init
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SPIVID_INTER_RETRY_DELAY</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SPIVID_CRC_GEN_ENABLE</id>
+    <description>
+      PROC_CHIP Attribute
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SPIVID_CRC_GEN_ENABLE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SPIVID_CRC_CHECK_ENABLE</id>
+    <description>
+      PROC_CHIP Attribute
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SPIVID_CRC_CHECK_ENABLE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SPIVID_MAJORITY_VOTE_ENABLE</id>
+    <description>
+      PROC_CHIP Attribute
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SPIVID_MAJORITY_VOTE_ENABLE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SPIVID_MAX_RETRIES</id>
+    <description>
+      PROC_CHIP Attribute
+
+0x00: No retry
+0x01 to 0x1F: 1 to 31 respectively
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SPIVID_MAX_RETRIES</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SPIVID_CRC_POLYNOMIAL_ENABLES</id>
+    <description>
+      PROC_CHIP Attribute
+
+An 8 bit mask vector to enable XORs in the CRC generation and checking LFSRs at the respective bit position. MSB (x^8) is omitted since it is always enabled, so the mask layout is (x^7,x^6,x^5,x^4,x^3,x^2,x^1,1)
+
+Planned CRC8 polynomial: x^8 + x^7 + x^6 + x^4 + x^2 + 1
+Value to enable planned polynomial: 0b1101_0101 (=0xD5)
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SPIVID_CRC_POLYNOMIAL_ENABLES</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_OCC_HEARTBEAT_TIME</id>
+    <description>
+      PROC_CHIP Attribute
+Consumer: OCC FW
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_OCC_HEARTBEAT_TIME</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SLEEP_WINKLE_REQUEST_TIMEOUT</id>
+    <description>
+      PROC_CHIP Attribute
+
+Consumer: proc_pmc_init.C.  Will be translated to a DYNAMIC ATTRIBUTE for use by proc_pm..scominit  as a multiple of PM hang pulses.. Counter starts at 0, is increased with every tp_pmc_hang_pulse as long as PORE is busy and set the PMC local FIR bit 19 when count = threshold.
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SLEEP_WINKLE_REQUEST_TIMEOUT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SLEEP_ENTRY</id>
+    <description>
+      PROC_CHIP Attribute
+
+Set Assisted if power off serialization is needed and SLEEP_TYPE=Fast;  Set to Hardware if the system can handle the unrelated powering off between cores.  Hardware setting decreases entry latency
+
+Producer: MRWB
+
+Consumer:  proc_pm_init and proc_pcbs_init
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SLEEP_ENTRY</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SLEEP_EXIT</id>
+    <description>
+      PROC_CHIP Attribute
+
+Set to Assisted if power on serialization is needed and SLEEP_TYPE=Fast;  Set to Hardware if the system can handle the unrelated powering off between cores.  Hardware setting decreases entry latency
+Must be set to Assisted if ATTR_PM_SLEEP_TYPE=Deep as this necessary for restore.
+
+Setting to Hardware is a test mode for Fast only.
+
+Producer: MRWB
+
+Consumer:  proc_pm_init and proc_pcbs_init.
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SLEEP_EXIT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SLEEP_TYPE</id>
+    <description>
+      PROC_CHIP Attribute
+Selects which voltage level to place the Core domain PFETs upon Sleep entry. 0 = Vret (Fast Sleep Mode), 1 = Voff (Deep Sleep Mode)
+
+Producer: MRWB
+
+Consumer:  proc_pm_init and proc_pcbs_init
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SLEEP_TYPE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_WINKLE_TYPE</id>
+    <description>
+      PROC_CHIP Attribute
+Selects which voltage level to place the Core and ECO domain PFETs upon Winkle entry. 0 = Vret (Fast Winkle Mode), 1 = Voff (Deep Winkle Mode)
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_WINKLE_TYPE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_PFET_POWERUP_CORE_DELAY0</id>
+    <description>
+      PROC_CHIP Attribute
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_PFET_POWERUP_CORE_DELAY0</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_PFET_POWERUP_CORE_DELAY1</id>
+    <description>
+      PROC_CHIP Attribute
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_PFET_POWERUP_CORE_DELAY1</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_PFET_POWERUP_CORE_DELAY0_VALUE</id>
+    <description>
+      PROC_CHIP Attribute
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_PFET_POWERUP_CORE_DELAY0_VALUE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_PFET_POWERUP_CORE_DELAY1_VALUE</id>
+    <description>
+      PROC_CHIP Attribute
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_PFET_POWERUP_CORE_DELAY1_VALUE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_PFET_POWERUP_CORE_SEQUENCE_DELAY_SELECT</id>
+    <description>
+      PROC_CHIP Attribute
+
+0 in the bit position:  use ATTR_PM_PFET_POWERUP_CORE_DELAY0;
+
+1 in the bit position:  use ATTR_PM_PFET_POWERUP_CORE_DELAY1
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_PFET_POWERUP_CORE_SEQUENCE_DELAY_SELECT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_PFET_POWERDOWN_CORE_DELAY0</id>
+    <description>
+      PROC_CHIP Attribute
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_PFET_POWERDOWN_CORE_DELAY0</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_PFET_POWERDOWN_CORE_DELAY1</id>
+    <description>
+      PROC_CHIP Attribute
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_PFET_POWERDOWN_CORE_DELAY1</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_PFET_POWERDOWN_CORE_DELAY0_VALUE</id>
+    <description>
+      PROC_CHIP Attribute
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_PFET_POWERDOWN_CORE_DELAY0_VALUE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_PFET_POWERDOWN_CORE_DELAY1_VALUE</id>
+    <description>
+      PROC_CHIP Attribute
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_PFET_POWERDOWN_CORE_DELAY1_VALUE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_PFET_POWERDOWN_CORE_SEQUENCE_DELAY_SELECT</id>
+    <description>
+      PROC_CHIP Attribute
+
+0 in the bit position:  use ATTR_PM_PFET_POWERUP_CORE_DELAY0;
+
+1 in the bit position:  use ATTR_PM_PFET_POWERUP_CORE_DELAY1
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_PFET_POWERDOWN_CORE_SEQUENCE_DELAY_SELECT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_PFET_POWERUP_ECO_DELAY0</id>
+    <description>
+      PROC_CHIP Attribute
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_PFET_POWERUP_ECO_DELAY0</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_PFET_POWERUP_ECO_DELAY1</id>
+    <description>
+      PROC_CHIP Attribute
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_PFET_POWERUP_ECO_DELAY1</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_PFET_POWERUP_ECO_DELAY0_VALUE</id>
+    <description>
+      PROC_CHIP Attribute
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_PFET_POWERUP_ECO_DELAY0_VALUE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_PFET_POWERUP_ECO_DELAY1_VALUE</id>
+    <description>
+      PROC_CHIP Attribute
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_PFET_POWERUP_ECO_DELAY1_VALUE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_PFET_POWERUP_ECO_SEQUENCE_DELAY_SELECT</id>
+    <description>
+      PROC_CHIP Attribute
+
+0 in the bit position:  use ATTR_PM_PFET_POWERUP_ECO_DELAY0;
+
+1 in the bit position:  use ATTR_PM_PFET_POWERUP_ECO_DELAY1
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_PFET_POWERUP_ECO_SEQUENCE_DELAY_SELECT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_PFET_POWERDOWN_ECO_DELAY0</id>
+    <description>
+      PROC_CHIP Attribute
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_PFET_POWERDOWN_ECO_DELAY0</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_PFET_POWERDOWN_ECO_DELAY1</id>
+    <description>
+      PROC_CHIP Attribute
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_PFET_POWERDOWN_ECO_DELAY1</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_PFET_POWERDOWN_ECO_DELAY0_VALUE</id>
+    <description>
+      PROC_CHIP Attribute
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_PFET_POWERDOWN_ECO_DELAY0_VALUE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_PFET_POWERDOWN_ECO_DELAY1_VALUE</id>
+    <description>
+      PROC_CHIP Attribute
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_PFET_POWERDOWN_ECO_DELAY1_VALUE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_PFET_POWERDOWN_ECO_SEQUENCE_DELAY_SELECT</id>
+    <description>
+      PROC_CHIP Attribute
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_PFET_POWERDOWN_ECO_SEQUENCE_DELAY_SELECT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_PSTATE0_FREQUENCY</id>
+    <description>
+      PROC_CHIP Attribute
+
+Producer: proc_build_gpstate.C
+
+Consumers: proc_pcbs_init.C, proc_pcbs_lpst_init.C,
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_PSTATE0_FREQUENCY</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_IVRMS_ENABLED</id>
+    <description>
+      PROC_CHIP Attribute
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_IVRMS_ENABLED</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SAFE_PSTATE</id>
+    <description>
+      PROC_CHIP Attribute
+
+Valid Values:-128 thru 127
+
+Producer: proc_pm_init.C
+
+DYNAMIC_ATTRIBUTE
+
+Consumer: proc_pcbs_init.C
+
+Establishes the Pstate that the core chiplet will take on if:
+psafe less-than-or-equal PMSR[global_actual_pstate]
+AND any of the following conditions are true:
+Loss of OCC Heartbeat if occ_heartbeat_en is set
+PMGP0[force_safe_mode] is set
+
+If psafe greater-than PMSR[global_actual_pstate], the  global_actual_pstate is forced.
+
+The value of Psafe needs to be at or below the nominal Pstate to make sure safe operation of all chiplets.
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SAFE_PSTATE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_RESONANT_CLOCK_ENABLE</id>
+    <description>
+      PROC_CHIP Attribute
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_RESONANT_CLOCK_ENABLE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_RESONANT_CLOCK_FULL_CSB_PSTATE</id>
+    <description>
+      PROC_CHIP Attribute
+Defines the Pstate for the point at which clock sector buffers should be at full strength.  This is to support Vmin operation.
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_RESONANT_CLOCK_FULL_CSB_PSTATE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_RESONANT_CLOCK_LFRLOW_PSTATE</id>
+    <description>
+      PROC_CHIP Attribute
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_RESONANT_CLOCK_LFRLOW_PSTATE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_RESONANT_CLOCK_LFRUPPER_PSTATE</id>
+    <description>
+      PROC_CHIP Attribute
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_RESONANT_CLOCK_LFRUPPER_PSTATE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_RESONANT_CLOCK_HFRLOW_PSTATE</id>
+    <description>
+      PROC_CHIP Attribute
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_RESONANT_CLOCK_HFRLOW_PSTATE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_RESONANT_CLOCK_HFRHIGH_PSTATE</id>
+    <description>
+      PROC_CHIP Attribute
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_RESONANT_CLOCK_HFRHIGH_PSTATE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SPIPSS_FRAME_SIZE</id>
+    <description>
+      PROC_CHIP Attribute
+
+Supported values: 0x10 (16d),
+
+Chip Select assertion duration is spi_frame_size + 2
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SPIPSS_FRAME_SIZE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SPIPSS_OUT_COUNT</id>
+    <description>
+      PROC_CHIP Attribute
+
+Supported values: 0x000 to spi_frame_size.  Values beyond spi_frame_size are ignored.
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SPIPSS_OUT_COUNT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SPIPSS_IN_DELAY</id>
+    <description>
+      PROC_CHIP Attribute
+
+Supported values: 0x000 to spi_frame_size.  Values beyond spi_frame_size result in the input never being captured
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SPIPSS_IN_DELAY</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SPIPSS_IN_COUNT</id>
+    <description>
+      PROC_CHIP Attribute
+
+Supported values: 0x000 to spi_frame_size.  The actual number of bits captured is spi_frame_size - spi_in_delay
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SPIPSS_IN_COUNT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SPIPSS_CLOCK_POLARITY</id>
+    <description>
+      PROC_CHIP Attribute
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SPIPSS_CLOCK_POLARITY</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SPIPSS_CLOCK_PHASE</id>
+    <description>
+      PROC_CHIP Attribute
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SPIPSS_CLOCK_PHASE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SPIPSS_CLOCK_DIVIDER</id>
+    <description>
+      PROC_CHIP Attribute
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SPIPSS_CLOCK_DIVIDER</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SPIPSS_INTER_FRAME_DELAY_SETTING</id>
+    <description>
+      PROC_CHIP Attribute
+Delay is computed as:  (value * ~100ns_hang_pulse)  +0/-~100ns_hang_pulse time
+
+0x00000: Wait 1 PSS Clock
+0x00001 - 0x1FFFF: value = number of ~100ns_hang_pulses
+
+For values greater than 0x00000, the actual delay is 1 PSS Clock + the time delay designated by the value defined. Max. delay at 0x1FFFF: 13.1ms + 1 PSSI clock cycle.
+
+Producer: proc_pm_init
+
+Consumer: proc_pss_init
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SPIPSS_INTER_FRAME_DELAY_SETTING</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SPIPSS_INTER_FRAME_DELAY</id>
+    <description>
+      PROC_CHIP Attribute
+
+Consumer: proc_pm_init
+
+Produces ATTR_PM_SPIPSS_INTER_FRAME_DELAY_SETTING
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SPIPSS_INTER_FRAME_DELAY</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_PBAX_RCV_RESERV_TIMEOUT</id>
+    <description>
+      PROC_CHIP Attribute
+Divider for the 1us PBAX hang pulse.  A hang is detected after two divided hang pulses are received under the following conditions:
+ Data Hi packet accepted and timeout waiting for Data Lo packet.
+ Reservation aquired and timeout waiting for Data Hi packet.
+
+00000  Data Timeout is Disabled
+00001  divided hang pulse = PBAX hang pulse
+00010  divided hang pulse = PBAX hang pulse/2
+00011  divided hang pulse = PBAX hang pulse/3
+. . .
+11111   divided hang pulse = PBAX hang pulse/31
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_PBAX_RCV_RESERV_TIMEOUT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_PBAX_SND_RETRY_COUNT_OVERCOMMIT_ENABLE</id>
+    <description>
+      PROC_CHIP Attribute
+Mode bit to count overcommit retries for the send retry threshold when sending PBAX commands on the powerbus.
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_PBAX_SND_RETRY_COUNT_OVERCOMMIT_ENABLE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_PBAX_SND_RETRY_THRESHOLD</id>
+    <description>
+      PROC_CHIP Attribute
+Defines the maximum number of retry attempts by the Send Engine for any phase of the PBAX transaction set before the operation is dropped and status bit are set.  This does not count PowerBus overcommit retries unless snd_retry_count_overcom bit is set.
+
+0x00 :  No Timeout
+0x01 :  1 attempt
+0x02 :   2 attempts
+.etc.
+0xFF :  255 attempts
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_PBAX_SND_RETRY_THRESHOLD</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_PBAX_SND_RESERV_TIMEOUT</id>
+    <description>
+      PROC_CHIP Attribute
+Divider for the 1us PBAX hang pulse.  A hang is detected after two divided hang pulses are received after attempting to acquire a reservation with the PBAX Receive engine before declaring a Send Reservation Timeout error.
+
+00000  Send Reservation Timeout is Disabled
+00001  divided hang pulse = PBAX hang pulse
+00010  divided hang pulse = PBAX hang pulse/2
+00011  divided hang pulse = PBAX hang pulse/3
+. . .
+11111   divided hang pulse = PBAX hang pulse/31
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_PBAX_SND_RESERV_TIMEOUT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SPWUP_FSP</id>
+    <description>
+      EX_CHIPLET Attribute
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SPWUP_FSP</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SPWUP_OCC</id>
+    <description>
+      EX_CHIPLET Attribute
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SPWUP_OCC</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SPWUP_PHYP</id>
+    <description>
+      EX_CHIPLET Attribute
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SPWUP_PHYP</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SLW_CONTROL_VECTOR_OFFSET</id>
+    <description>
+    Stores the offset in SLW image of this control vector for later use by scripts to control error injection.
+    This value is added to the contents of PBABAR2 for given chip to calculated the memory address for this vector per chip.
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SLW_CONTROL_VECTOR_OFFSET</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<!-- End pm_hwp_attributes.xml -->
+
+
+<!-- Support for pm_plat_attributes.xml -->
+
+<attribute>
+    <id>PM_EXTERNAL_VRM_STEPSIZE</id>
+    <description>
+      SYSTEM Attribute
+      Step size (binary in microvolts) to take upon external VRM voltage
+      transitions. The value set here must take into account where internal
+      VRMs are enabled or not as, when they are enabled, the step size must
+      account for the tracking (eg PFET strength recalculation) for the step.
+
+      Consumer: proc_build_pstate_tables.C, proc_pmc_init.C -config
+
+      Provided by the Machine Readable Workbook after system characterization.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_EXTERNAL_VRM_STEPSIZE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_EXTERNAL_VRM_STEPDELAY</id>
+    <description>
+      SYSTEM Attribute
+      Step delay (binary in microseconds) after a voltage change
+
+      Consumer: proc_pmc_init -config
+
+      Provided by the Machine Readable Workbook after system characterization.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_EXTERNAL_VRM_STEPDELAY</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SPIVID_FREQUENCY</id>
+    <description>
+      SYSTEM Attribute
+      SPI Clock Frequency (binary in MHz)
+
+      Consumer: proc_pm_effective
+
+      Produces ATTR_PM_SPIVID_CLOCK_DIVIDER
+
+      Provided by the Machine Readable Workbook.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SPIVID_FREQUENCY</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SPIVID_PORT_ENABLE</id>
+    <description>
+      PROC_CHIP Attribute
+      Defines the configuration of the SPIVID ports from the target.
+      - NONE means that no VRM is attached.
+      - PORTxNONRED means that the indicated port is used in a non-redundant
+                    configuration.
+      - REDUNDANT means that all three are connected and considered redundant.
+
+      Provided by the Machine Readable Workbook.
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SPIVID_PORT_ENABLE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SAFE_FREQUENCY</id>
+    <description>
+      Frequency (binary in KHz) indicating the frequency that the cores will be moved
+      to in the event of the loss of the OCC Heartbeat.  This value needs to be the maximum
+      of the DpoMin frequency for proper PowerBus operation and the PowerSave value for
+      the present part.
+
+      Provided by the Machine Readable Workbook after system characterization.
+
+      The value is translated to the Pstate space.
+
+      Producer:  Machine Readable Workbook
+
+      Consumers: p8_build_gpstate_table.C
+
+      DYNAMIC_ATTRIBUTE: ATTR_PM_SAFE_PSTATE
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SAFE_FREQUENCY</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY</id>
+    <description>
+      SYSTEM Attribute
+      Frequency (binary in MHz) for the point at which clock sector buffers
+      should be at full strength.  This is to support Vmin operation.
+      Setting cannot overlap the Low or High bands.
+
+      Provided by the Machine Readable Workbook after system characterization.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY</id>
+    <description>
+      SYSTEM Attribute
+      Frequency (binary in MHz)) for the lower end of the Low Frequency
+      Resonant band
+
+      Provided by the Machine Readable Workbook after system characterization.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY</id>
+    <description>
+      SYSTEM Attribute
+      Frequency (binary in MHz) for the upper end of the Low Frequency
+      Resonant band
+
+      Provided by the Machine Readable Workbook after system characterization.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY</id>
+    <description>
+      SYSTEM Attribute
+      Frequency (binary in MHz) for the lower end of the High Frequency
+      Resonant band
+
+      Provided by the Machine Readable Workbook after system characterization.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY</id>
+    <description>
+      SYSTEM Attribute
+      Frequency (binary in MHz)) for the upper end of the High Frequency
+      Resonant band
+
+      Provided by the Machine Readable Workbook after system characterization.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SPIPSS_FREQUENCY</id>
+    <description>
+      SYSTEM Attribute
+      SPIPSS Clock Frequency (binary in MHz)
+
+      Valid range: 0.5MHz to 25MHz
+
+      Consumer: proc_pmc_init
+
+      Provided by the Machine Readable Workbook.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SPIPSS_FREQUENCY</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_APSS_CHIP_SELECT</id>
+    <description>
+      PROC_CHIP Attribute
+      Defines which of the PSS chip selects that the APSS is connected
+
+      Provided by the Machine Readable Workbook.
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_APSS_CHIP_SELECT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_PBAX_NODEID</id>
+    <description>
+      PROC_CHIP Attribute
+      Receive PBAX Nodeid. Value that indicates this PBA's PBAX Node affinity.
+      This is matched to pbax_nodeid of the PMISC Address phase.
+
+      Provided by the Machine Readable Workbook.
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_PBAX_NODEID</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_PBAX_CHIPID</id>
+    <description>
+      PROC_CHIP Attribute
+      Receive PBAX Chipid. Value that indicates this PBA's PBAX Chipid within
+      the PBAX node.  Is matched to pbax_chipid of the Address phase if
+      pbax_type=unicast.
+
+      Provided by the Machine Readable Workbook.
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_PBAX_CHIPID</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_PBAX_BRDCST_ID_VECTOR</id>
+    <description>
+      PROC_CHIP Attribute
+      Receive PBAX Broadcast Group. Vector that is indexed when decoded PMISC
+      pbax_type=broadcast with the decoded PMISC pbax_chipid value.  If the
+      bit in this vector at the decoded bit location is a 1, then this receive
+      engine will participate in the broadcast operation.
+
+      Provided by the Machine Readable Workbook.
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_PBAX_BRDCST_ID_VECTOR</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>FREQ_CORE_MAX</id>
+    <description>
+      SYSTEM Attribute
+      Maximum frequency (binary in MHz) that any processor in the system will
+      run. Used to define the top end of the PState range in the frequency space.
+      From this, the ATTR_PROCPM_PSTATE0_FREQUENCY is computed using
+      ATTR_SYSTEM_REFCLK_FREQUENCY to determine the step size.
+
+      Consumers: proc_build_gpstate_table.C (among others)
+
+      Set by the HWSV freq/voltage service based on MVPD #V
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_FREQ_CORE_MAX</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<!-- End pm_plat_attributes.xml -->
+
+<attribute>
+    <id>OVERRIDE_MVPD_NOM_FREQ_MHZ</id>
+   <description>Module VPD #V keyword Nominal Frequency in MHZ
+consumer: p8_build_pstate_datablock, others
+firmware notes: Used as override attribute for pstate procedure
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_OVERRIDE_MVPD_NOM_FREQ_MHZ</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>OVERRIDE_MVPD_V_NEST_NOM_VOLTAGE</id>
+    <description>Module VPD #V keyword V-nest nominal voltage
+consumer: p8_build_pstate_datablock, others
+firmware notes: Used as override attribute for pstate procedure
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_OVERRIDE_MVPD_V_NEST_NOM_VOLTAGE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>OVERRIDE_MVPD_I_NEST_NOM_CURRENT</id>
+    <description>Module VPD #V keyword I-nest nominal current
+consumer: p8_build_pstate_datablock, others
+firmware notes: Used as override attribute for pstate procedure</description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_OVERRIDE_MVPD_I_NEST_NOM_CURRENT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>OVERRIDE_MVPD_V_CS_NOM_VOLTAGE</id>
+    <description>
+    Module VPD #V keyword V-cs nominal voltage
+consumer: p8_build_pstate_datablock, others
+firmware notes: Used as override attribute for pstate procedure
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_OVERRIDE_MVPD_V_CS_NOM_VOLTAGE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>OVERRIDE_MVPD_I_CS_NOM_CURRENT</id>
+    <description>
+    Module VPD #V keyword I-cs nominal current
+consumer: p8_build_pstate_datablock, others
+firmware notes: Used as override attribute for pstate procedure
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_OVERRIDE_MVPD_I_CS_NOM_CURRENT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>OVERRIDE_MVPD_PS_FREQ_MHZ</id>
+    <description>
+    Module VPD #V keyword PowerSave Frequency in MHZ
+consumer: p8_build_pstate_datablock, others
+firmware notes: Used as override attribute for pstate procedure
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_OVERRIDE_MVPD_PS_FREQ_MHZ</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>OVERRIDE_MVPD_V_NEST_PS_VOLTAGE</id>
+    <description>
+    Module VPD #V keyword V-nest powersave voltage
+consumer: p8_build_pstate_datablock, others
+firmware notes: Used as override attribute for pstate procedure
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_OVERRIDE_MVPD_V_NEST_PS_VOLTAGE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>OVERRIDE_MVPD_I_NEST_PS_CURRENT</id>
+    <description>
+    Module VPD #V keyword I-nest powersave current
+consumer: p8_build_pstate_datablock, others
+firmware notes: Used as override attribute for pstate procedure
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_OVERRIDE_MVPD_I_NEST_PS_CURRENT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>OVERRIDE_MVPD_V_CS_PS_VOLTAGE</id>
+    <description>
+    Module VPD #V keyword V-cs powersave voltage
+consumer: p8_build_pstate_datablock, others
+firmware notes: Used as override attribute for pstate procedure
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_OVERRIDE_MVPD_V_CS_PS_VOLTAGE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>OVERRIDE_MVPD_I_CS_PS_CURRENT</id>
+    <description>
+    Module VPD #V keyword I-cs powersave current
+consumer: p8_build_pstate_datablock, others
+firmware notes: Used as override attribute for pstate procedure
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_OVERRIDE_MVPD_I_CS_PS_CURRENT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>OVERRIDE_MVPD_TURBO_FREQ_MHZ</id>
+    <description>
+    Module VPD #V keyword turbo frequency in MHZ
+consumer: p8_build_pstate_datablock, others
+firmware notes: Used as override attribute for pstate procedure
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_OVERRIDE_MVPD_TURBO_FREQ_MHZ</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>OVERRIDE_MVPD_V_NEST_TURBO_VOLTAGE</id>
+    <description>
+    Module VPD #V keyword V-nest turbo voltage
+consumer: p8_build_pstate_datablock, others
+firmware notes: Used as override attribute for pstate procedure
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_OVERRIDE_MVPD_V_NEST_TURBO_VOLTAGE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>OVERRIDE_MVPD_I_NEST_TURBO_CURRENT</id>
+    <description>
+    Module VPD #V keyword I-nest turbo current
+consumer: p8_build_pstate_datablock, others
+firmware notes: Used as override attribute for pstate procedure
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_OVERRIDE_MVPD_I_NEST_TURBO_CURRENT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>OVERRIDE_MVPD_V_CS_TURBO_VOLTAGE</id>
+    <description>
+    Module VPD #V keyword V-cs turbo voltage
+consumer: p8_build_pstate_datablock, others
+firmware notes: Used as override attribute for pstate procedure
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_OVERRIDE_MVPD_V_CS_TURBO_VOLTAGE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>OVERRIDE_MVPD_I_CS_TURBO_CURRENT</id>
+    <description>
+    Module VPD #V keyword I-cs turbo current
+consumer: p8_build_pstate_datablock, others
+firmware notes: Used as override attribute for pstate procedure
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_OVERRIDE_MVPD_I_CS_TURBO_CURRENT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+
+<attribute>
+    <id>OVERRIDE_MVPD_FVMIN_FREQ_MHZ</id>
+    <description>
+    Module VPD #V keyword fvmin frequency MHZ
+consumer: p8_build_pstate_datablock, others
+firmware notes: Used as override attribute for pstate procedure
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_OVERRIDE_MVPD_FVMIN_FREQ_MHZ</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>OVERRIDE_MVPD_V_NEST_FVMIN_VOLTAGE</id>
+    <description>
+    Module VPD #V keyword V-nest fvmin voltage
+consumer: p8_build_pstate_datablock, others
+firmware notes: Used as override attribute for pstate procedure
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_OVERRIDE_MVPD_V_NEST_FVMIN_VOLTAGE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>OVERRIDE_MVPD_I_NEST_FVMIN_CURRENT</id>
+    <description>
+    Module VPD #V keyword I-nest fvmin current
+consumer: p8_build_pstate_datablock, others
+firmware notes: Used as override attribute for pstate procedure
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_OVERRIDE_MVPD_I_NEST_FVMIN_CURRENT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>OVERRIDE_MVPD_V_CS_FVMIN_VOLTAGE</id>
+    <description>
+    Module VPD #V keyword V-cs fvmin voltage
+consumer: p8_build_pstate_datablock, others
+firmware notes: Used as override attribute for pstate procedure
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_OVERRIDE_MVPD_V_CS_FVMIN_VOLTAGE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>OVERRIDE_MVPD_I_CS_FVMIN_CURRENT</id>
+    <description>
+    Module VPD #V keyword I-cs fvmin current
+consumer: p8_build_pstate_datablock, others
+firmware notes: Used as override attribute for pstate procedure
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_OVERRIDE_MVPD_I_CS_FVMIN_CURRENT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>OVERRIDE_MVPD_LAB_FREQ_MHZ</id>
+    <description>
+    Module VPD #V keyword lab frequency MHZ
+consumer: p8_build_pstate_datablock, others
+firmware notes: Used as override attribute for pstate procedure
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_OVERRIDE_MVPD_LAB_FREQ_MHZ</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>OVERRIDE_MVPD_V_NEST_LAB_VOLTAGE</id>
+    <description>
+    Module VPD #V keyword V-nest lab voltage
+consumer: p8_build_pstate_datablock, others
+firmware notes: Used as override attribute for pstate procedure
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_OVERRIDE_MVPD_V_NEST_LAB_VOLTAGE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>OVERRIDE_MVPD_I_NEST_LAB_CURRENT</id>
+    <description>
+    Module VPD #V keyword I-nest lab current
+consumer: p8_build_pstate_datablock, others
+firmware notes: Used as override attribute for pstate procedure
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_OVERRIDE_MVPD_I_NEST_LAB_CURRENT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>OVERRIDE_MVPD_V_CS_LAB_VOLTAGE</id>
+    <description>
+    Module VPD #V keyword V-cs lab voltage
+consumer: p8_build_pstate_datablock, others
+firmware notes: Used as override attribute for pstate procedure
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_OVERRIDE_MVPD_V_CS_LAB_VOLTAGE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>OVERRIDE_MVPD_I_CS_LAB_CURRENT</id>
+    <description>
+    Module VPD #V keyword I-cs lab current
+consumer: p8_build_pstate_datablock, others
+firmware notes: Used as override attribute for pstate procedure
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_OVERRIDE_MVPD_I_CS_LAB_CURRENT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+  <id>PROC_PCIE_IOP_CONFIG</id>
+  <description>PCIE IOP lane configuration
+      creator: platform
+      consumer: proc_pcie_scominit
+      firmware notes:
+        Encoded PCIE IOP lane configuration
+  </description>
+  <simpleType><uint8_t></uint8_t></simpleType>
+  <persistency>non-volatile</persistency>
+  <readable/>
+  <writeable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_PROC_PCIE_IOP_CONFIG</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+  <id>PROC_PCIE_IOP_SWAP</id>
+  <description>PCIE IOP swap configuration
+      creator: platform
+      consumer: proc_pcie_scominit
+      firmware notes:
+        Encoded PCIE IOP swap configuration
+        Array index: IOP number (0:2)
+  </description>
+  <simpleType>
+      <uint8_t></uint8_t>
+      <array>3</array>
+  </simpleType>
+  <persistency>non-volatile</persistency>
+  <readable/>
+  <writeable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_PROC_PCIE_IOP_SWAP</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+  <id>PROC_PCIE_PHB_ACTIVE</id>
+  <description>PCIE PHB valid mask
+      creator: platform
+      consumer: proc_pcie_scominit
+      firmware notes:
+        Bit mask defining set of active/valid PHBs
+        bit0=PHB0, bit1=PHB1, bit2=PHB2, bit3=PHB3
+  </description>
+  <simpleType><uint8_t></uint8_t></simpleType>
+  <persistency>non-volatile</persistency>
+  <readable/>
+  <writeable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_PROC_PCIE_PHB_ACTIVE</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+  <id>PROC_PCIE_IOP_G3_PLL_CONTROL0</id>
+  <description>
+      creator: platform (MRW)
+      consumer: proc_pcie_scominit
+      firmware notes:
+        PCIe Gen3 PLL Control Register 0.
+        ATUNE/CPISEL.
+        Array index: IOP number(0:2)
+  </description>
+  <simpleType>
+      <uint32_t></uint32_t>
+      <array>3</array>
+  </simpleType>
+  <persistency>non-volatile</persistency>
+  <readable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_PROC_PCIE_IOP_G3_PLL_CONTROL0</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+  <id>PROC_PCIE_IOP_G2_PLL_CONTROL0</id>
+  <description>
+      creator: platform (MRW)
+      consumer: proc_pcie_scominit
+      firmware notes:
+        PCIe Gen2/Gen1 PLL Control Register 0.
+        ATUNE/CPISEL.
+        Array index: IOP number(0:2)
+  </description>
+  <simpleType>
+      <uint32_t></uint32_t>
+      <array>3</array>
+  </simpleType>
+  <persistency>non-volatile</persistency>
+  <readable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_PROC_PCIE_IOP_G2_PLL_CONTROL0</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+  <id>PROC_PCIE_IOP_PLL_GLOBAL_CONTROL0</id>
+  <description>
+      creator: platform (MRW)
+      consumer: proc_pcie_scominit
+      notes:
+        PCIe PLL Global Control Register 0.
+        REFISRC/REFISINK.
+        Array index: IOP number (0:2)
+  </description>
+  <simpleType>
+      <uint32_t></uint32_t>
+      <array>3</array>
+  </simpleType>
+  <persistency>non-volatile</persistency>
+  <readable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_PROC_PCIE_IOP_PLL_GLOBAL_CONTROL0</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+  <id>PROC_PCIE_IOP_PLL_GLOBAL_CONTROL1</id>
+  <description>
+      creator: platform (MRW)
+      consumer: proc_pcie_scominit
+      notes:
+        PCIe PLL Global Control Register 1.
+    ENBGDOCPSRC/ENBGDOCAMP/REFVREG.
+        Array index: IOP number (0:2)
+  </description>
+  <simpleType>
+      <uint32_t></uint32_t>
+      <array>3</array>
+  </simpleType>
+  <persistency>non-volatile</persistency>
+  <readable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_PROC_PCIE_IOP_PLL_GLOBAL_CONTROL1</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+  <id>PROC_PCIE_IOP_PCS_CONTROL0</id>
+  <description>
+      creator: platform (MRW)
+      consumer: proc_pcie_scominit
+      notes:
+        PCIe PCS Control Register 0.
+        BITLOCKTIME/ADDDREMDELTA_810_B/STARTUPDELTA_810_B/ADDDREMDELTA_810_A/
+        STARTUPDELTA_A/RXREJECTHANDLING/EQCOMLETERESPONSE.
+        Array index: IOP number (0:2)
+  </description>
+  <simpleType>
+      <uint32_t></uint32_t>
+      <array>3</array>
+  </simpleType>
+  <persistency>non-volatile</persistency>
+  <readable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_PROC_PCIE_IOP_PCS_CONTROL0</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+  <id>PROC_PCIE_IOP_PCS_CONTROL1</id>
+  <description>
+      creator: platform (MRW)
+      consumer: proc_pcie_scominit
+      notes:
+        PCIe PCS Control Register 1.
+    RXSIGDETSETTING/ADDDREMDELTA_128130_B/STARTUPDELTA_128130_B/
+        ADDDREMDELTA_128130_A/STARTUPDELTA_128130_A.
+        Array index: IOP number (0:2)
+  </description>
+  <simpleType>
+      <uint32_t></uint32_t>
+      <array>3</array>
+  </simpleType>
+  <persistency>non-volatile</persistency>
+  <readable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_PROC_PCIE_IOP_PCS_CONTROL1</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+  <id>PROC_PCIE_IOP_TX_FIFO_OFFSET</id>
+  <description>
+      creator: platform (MRW)
+      consumer: proc_pcie_scominit
+      notes:
+        PCIe TX FIFO Offset Register.
+    G3OFFSET/G2OFFSET/G1OFFSET.
+        First array index: IOP number (0:2)
+        Second array index: Lane number (0:15)
+  </description>
+  <simpleType>
+      <uint32_t></uint32_t>
+      <array>3,16</array>
+  </simpleType>
+  <persistency>non-volatile</persistency>
+  <readable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_PROC_PCIE_IOP_TX_FIFO_OFFSET</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+  <id>PROC_PCIE_IOP_TX_RCVRDETCNTL</id>
+  <description>
+      creator: platform (MRW)
+      consumer: proc_pcie_scominit
+      notes:
+        PCIe TX Receiver Detect Control Register.
+        VREFSEL/RCVRDETCNT/DETDRVC/PH1WAIT.
+        First array index: IOP number (0:2)
+        Second array index: Lane number (0:15)
+  </description>
+  <simpleType>
+      <uint32_t></uint32_t>
+      <array>3,16</array>
+  </simpleType>
+  <persistency>non-volatile</persistency>
+  <readable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_PROC_PCIE_IOP_TX_RCVRDETCNTL</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+  <id>PROC_PCIE_IOP_TX_BWLOSS1</id>
+  <description>
+      creator: platform (MRW)
+      consumer: proc_pcie_scominit
+      notes:
+        PCIe TX Bandwidth Loss Coefficient Register.
+        GEN3BWCOEFF/GEN2BWCOEFF/GEN1BWCOEFF.
+        First array index: IOP number (0:2)
+        Second array index: Lane number (0:15)
+  </description>
+  <simpleType>
+      <uint32_t></uint32_t>
+      <array>3,16</array>
+  </simpleType>
+  <persistency>non-volatile</persistency>
+  <readable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_PROC_PCIE_IOP_TX_BWLOSS1</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+  <id>PROC_PCIE_IOP_RX_VGA_CONTROL2</id>
+  <description>
+      creator: platform (MRW)
+      consumer: proc_pcie_scominit
+      notes:
+        PCIe RX VGA Control Register 2.
+        GAIN2/GAIN1.
+        First array index: IOP number (0:2)
+        Second array index: Lane number (0:15)
+  </description>
+  <simpleType>
+      <uint32_t></uint32_t>
+      <array>3,16</array>
+  </simpleType>
+  <persistency>non-volatile</persistency>
+  <readable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_PROC_PCIE_IOP_RX_VGA_CONTROL2</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+  <id>PROC_PCIE_IOP_RX_PEAK</id>
+  <description>
+      creator: platform (MRW)
+      consumer: proc_pcie_scominit
+      notes:
+        PCIe RX Receiver Peaking Value Register.
+    PEAK1/PEAK2/PEAK3.
+        First array index: IOP number (0:2)
+        Second array index: Lane number (0:15)
+  </description>
+  <simpleType>
+      <uint32_t></uint32_t>
+      <array>3,16</array>
+  </simpleType>
+  <persistency>non-volatile</persistency>
+  <readable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_PROC_PCIE_IOP_RX_PEAK</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+  <id>PROC_PCIE_IOP_RX_SDL</id>
+  <description>
+      creator: platform (MRW)
+      consumer: proc_pcie_scominit
+      notes:
+        PCIe RX Signal Detect Level Register.
+        SDLVL3/SDLVL2/SDLVL1.
+        First array index: IOP number (0:2)
+        Second array index: Lane number (0:15)
+  </description>
+  <simpleType>
+      <uint32_t></uint32_t>
+      <array>3,16</array>
+  </simpleType>
+  <persistency>non-volatile</persistency>
+  <readable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_PROC_PCIE_IOP_RX_SDL</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+  <id>PROC_PCIE_IOP_ZCAL_CONTROL</id>
+  <description>
+      creator: platform (MRW)
+      consumer: proc_pcie_scominit
+      notes:
+        PCIe ZCAL Control Register.
+        CMPEVALDLY.
+        Array index: IOP number (0:2)
+  </description>
+  <simpleType>
+      <uint32_t></uint32_t>
+      <array>3</array>
+  </simpleType>
+  <persistency>non-volatile</persistency>
+  <readable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_PROC_PCIE_IOP_ZCAL_CONTROL</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>AVDD_ID</id>
+    <description>
+        Memory AVDD voltage domain ID.  All memory buffers in the same AVDD
+        voltage domain will share the same ID.  IDs are arbitrarily assigned,
+        used for correlation between HB + HWSV, and are generated by
+        genHwsvMrwXml.pl
+    </description>
+    <simpleType>
+        <uint16_t>
+            <default>0</default>
+        </uint16_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>VDD_ID</id>
+    <description>
+        Memory VDD voltage domain ID.  All memory buffers in the same VDD
+        voltage domain will share the same ID.  IDs are arbitrarily assigned,
+        used for correlation between HB + HWSV, and are generated by
+        genHwsvMrwXml.pl
+    </description>
+    <simpleType>
+        <uint16_t>
+            <default>0</default>
+        </uint16_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>VCS_ID</id>
+    <description>
+        Memory VCS voltage domain ID.  All memory buffers in the same VCS
+        voltage domain will share the same ID.  IDs are arbitrarily assigned,
+        used for correlation between HB + HWSV, and are generated by
+        genHwsvMrwXml.pl
+    </description>
+    <simpleType>
+        <uint16_t>
+            <default>0</default>
+        </uint16_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>VPP_ID</id>
+    <description>
+        Memory VPP voltage domain ID.  All memory buffers in the same VPP
+        voltage domain will share the same ID.  IDs are arbitrarily assigned,
+        used for correlation between HB + HWSV, and are generated by
+        genHwsvMrwXml.pl
+    </description>
+    <simpleType>
+        <uint16_t>
+            <default>0</default>
+        </uint16_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>VMEM_ID</id>
+    <description>Voltage Memory Rail Manager ID.  Currently HB only needs
+        to configured the Vmem voltage rail manger during the IPL.  The ID
+        is an arbitary value and needed as correlation token between HB and
+        HWSV.  It will be generated by the genHwsvMrwXml.pl.
+    </description>
+    <simpleType>
+        <uint16_t>
+            <default>0</default>
+        </uint16_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<!--    Add attributes for sbe_config_update    -->
+
+<attribute>
+<id>NEST_FREQ_MHZ</id>
+<description>
+    Nest frequency in MHz
+    Default should be 2000 MHz per Greg Still
+</description>
+    <simpleType>
+        <uint32_t>
+            <default>2000</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_NEST_FREQ_MHZ</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>CHIP_REGIONS_TO_ENABLE</id>
+    <description>
+      Called to get data to customize an IPL or SLW image with data indicating
+        which chip regions the SBE should enable
+      The data is in the format of the Module VPD PG (Partial Good Vector)
+        keyword which is an 32 entry array of 16bit words, each word
+        represents a chiplet and a defined set of bits within the word
+        represents regions that are good. The 16 bit word is embedded within
+        a 64bit word as described in the MVPD spec to reflect the clock
+        controller region register layout:
+          bits 0:3 are reserved -> set to 0
+          bits 4:19 are the 16 bit data word
+          bits 20:63 are reserved -> set to 0
+      A platform needs to return data indicating the chip regions to enable,
+      this may not be just the MVPD partial-good data, it may also not enable
+      other chips and chiplets it has decided are non-functional - this is
+      why it is not a standard MVPD query.
+    </description>
+    <simpleType>
+        <uint64_t></uint64_t>
+        <array>32</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_CHIP_REGIONS_TO_ENABLE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>BOOT_FREQ_MHZ</id>
+    <description>
+       Boot frequency in MHZ.  Default is 50% of nominal.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint32_t>
+            <default>2400</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_BOOT_FREQ_MHZ</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EX_GARD_BITS</id>
+    <description>
+      Vector to communicate the guarded EX chiplets to SBE
+            One Guard bit per EX chiplet, bit location aligned to chiplet ID
+      (bit 16: EX00, bit 17: EX01, bit 18: EX02 ... bit 31: EX15)
+            Guarded EX chiplets are marked by a '1'.
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EX_GARD_BITS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+<id>PIB_I2C_REFCLOCK</id>
+<description>
+    i2c reference clock for the system.
+    default is 0x4 => I2C speed = ~1Mhz per Andreas Koenig
+</description>
+    <simpleType>
+        <uint32_t>
+            <default>0x4</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PIB_I2C_REFCLOCK</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PROC_ADU_UNTRUSTED_BAR_BASE_ADDR</id>
+    <description>
+      ADU Untrusted BAR base address (secure mode)
+      creator: platform
+      firmware notes:
+        64-bit address representing BAR RA
+    </description>
+    <simpleType>
+        <uint64_t>
+            <default>0x0000000000000000</default>
+        </uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_ADU_UNTRUSTED_BAR_BASE_ADDR</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+<id>PIB_I2C_NEST_PLL</id>
+<description>
+    i2c pll for the system
+    default is 0x26 (For PIB @500 MHz (2 GHz nest)) for
+    I2C speed = ~1Mhz per Andreas Koenig.
+</description>
+    <simpleType>
+        <uint32_t>
+            <default>0x026</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PIB_I2C_NEST_PLL</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PROC_ADU_UNTRUSTED_BAR_SIZE</id>
+    <description>
+      ADU Untrusted BAR size (secure mode)
+      creator: platform
+      firmware notes:
+        mask applied to RA 14:43
+    </description>
+    <simpleType>
+        <uint64_t>
+            <default>0x0000000000000000</default>
+        </uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_ADU_UNTRUSTED_BAR_SIZE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+<id>SBE_IMAGE_OFFSET</id>
+<description>
+    HostBoot image for SBE, offset to account for ECC
+    Default is calculated from Hostboot base image of 0x03f67000
+</description>
+    <simpleType>
+        <uint32_t>
+            <default>0xfff78000</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_SBE_IMAGE_OFFSET</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>SBE_IMAGE_MINIMUM_VALID_EXS</id>
+    <description>
+      The minimum number of valid EXs that is required to be used when
+      customizing a SBE image. The customization will fail if it cannot
+      create an image with at least this many EXs.
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>3</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_SBE_IMAGE_MINIMUM_VALID_EXS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PROC_PSI_UNTRUSTED_BAR0_BASE_ADDR</id>
+    <description>
+      PSI Untrusted BAR0 base address (secure mode)
+      creator: platform
+      firmware notes:
+        64-bit address representing BAR RA
+    </description>
+    <simpleType>
+        <uint64_t>
+            <default>0x0000000000000000</default>
+        </uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_PSI_UNTRUSTED_BAR0_BASE_ADDR</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+<id>BOOT_VOLTAGE</id>
+<description>
+    Boot Voltage for system.
+    0:2   -> port enables (3b - system design based:
+        port 0 for non-redundant systems (100); all ports for non-redundant (111))
+    3     -> Unused
+     - current recommended default = 1000b
+    4:7   -> phase enables (4b - defined by the system power design)
+    - current recommended default = 0000b
+    8:15  -> VDD voltage (1B in VRM-11 encoded form - 6.25mV increments)
+        note: VPD is in 5mV increments
+    - current recommended default   =   0x52
+    16:23 -> VCS voltage (1B in VRM-11 encoded form - 6.25mV increments)
+        note: VPD is in 5mV increments
+    -current recommended default    =   0x4a
+    24:31 -> Unused                 =   0x00
+</description>
+    <simpleType>
+        <uint32_t>
+            <default>0x80524a00</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_BOOT_VOLTAGE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PROC_PSI_UNTRUSTED_BAR0_SIZE</id>
+    <description>
+      PSI Untrusted BAR0 size (secure mode)
+      creator: platform
+      firmware notes:
+        mask applied to RA 14:43
+    </description>
+    <simpleType>
+        <uint64_t>
+            <default>0x0000000000000000</default>
+        </uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_PSI_UNTRUSTED_BAR0_SIZE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PROC_PSI_UNTRUSTED_BAR1_BASE_ADDR</id>
+    <description>
+      PSI Untrusted BAR1 base address (secure mode)
+      creator: platform
+      firmware notes:
+        64-bit address representing BAR RA
+    </description>
+    <simpleType>
+        <uint64_t>
+            <default>0x0000000000000000</default>
+        </uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_PSI_UNTRUSTED_BAR1_BASE_ADDR</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PROC_PSI_UNTRUSTED_BAR1_SIZE</id>
+    <description>
+      PSI Untrusted BAR1 size (secure mode)
+      creator: platform
+      firmware notes:
+        mask applied to RA 14:43
+    </description>
+    <simpleType>
+        <uint64_t>
+            <default>0x0000000000000000</default>
+        </uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_PSI_UNTRUSTED_BAR1_SIZE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PROC_SECURITY_SETUP_VECTOR</id>
+    <description>
+      Secureboot 64-bit proc_sbe_security_setup_vector used
+      by proc_sbe_security_setup.S. 0s are an unsecure SBE image
+      creator: platform
+      firmware notes:
+      64-bit proc_sbe_security_setup_vector
+    </description>
+    <simpleType>
+        <uint64_t>
+            <default>0x8000000080000000</default>
+        </uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_SECURITY_SETUP_VECTOR</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<!-- ===== Attributes supporting memory_attributes.xml HWPF Attributes ===== -->
+
+<attribute>
+    <id>MSS_VOLT</id>
+    <description>DRAM Voltage. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_VOLT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>VPP_BASE</id>
+    <description>
+        DRAM VPP voltage domain base voltage in mV.  Managed by HWPs.
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_VOLT_VPP</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_FREQ</id>
+    <description>Frequency of memory channel in MHz. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_FREQ</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_DIMM_MFG_ID_CODE</id>
+    <description>DIMM Manufacturer ID Code. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+        <array>2,2</array><!-- [drop][port] -->
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_DIMM_MFG_ID_CODE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DIMM_RANKS_CONFIGED</id>
+    <description>DIMM ranks configured. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2,2</array><!-- [drop][port] -->
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DIMM_RANKS_CONFIGED</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_NUM_RANKS_PER_DIMM</id>
+    <description>Number of ranks per DIMM. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2,2</array><!-- [drop][port] -->
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_NUM_RANKS_PER_DIMM</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DIMM_TYPE</id>
+    <description>Type of DIMM. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DIMM_TYPE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CUSTOM_DIMM</id>
+    <description>DIMM is a custom DIMM. Sometimes this is known as a CDIMM, but technically, we could support Custom DIMMs of different types than an UDIMM, such as RDIMM and LRDIMM.  Created in mss_eff_cnfg</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CUSTOM_DIMM</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_WIDTH</id>
+    <description>DRAM Device Width. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_WIDTH</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_GEN</id>
+    <description>DRAM Generation. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_GEN</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_PRIMARY_RANK_GROUP0</id>
+    <description>Primary RankGroup0. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_PRIMARY_RANK_GROUP0</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_PRIMARY_RANK_GROUP1</id>
+    <description>Primary RankGroup1. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_PRIMARY_RANK_GROUP1</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_PRIMARY_RANK_GROUP2</id>
+    <description>Primary RankGroup2. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_PRIMARY_RANK_GROUP2</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_PRIMARY_RANK_GROUP3</id>
+    <description>Primary RankGroup3. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_PRIMARY_RANK_GROUP3</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_SECONDARY_RANK_GROUP0</id>
+    <description>Secondary RankGroup0. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_SECONDARY_RANK_GROUP0</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_SECONDARY_RANK_GROUP1</id>
+    <description>Secondary RankGroup1. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_SECONDARY_RANK_GROUP1</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_SECONDARY_RANK_GROUP2</id>
+    <description>Secondary RankGroup2. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_SECONDARY_RANK_GROUP2</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_SECONDARY_RANK_GROUP3</id>
+    <description>Secondary RankGroup3. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_SECONDARY_RANK_GROUP3</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_TERTIARY_RANK_GROUP0</id>
+    <description>Tertiary RankGroup0. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_TERTIARY_RANK_GROUP0</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_TERTIARY_RANK_GROUP1</id>
+    <description>Tertiary RankGroup1. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_TERTIARY_RANK_GROUP1</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_TERTIARY_RANK_GROUP2</id>
+    <description>Tertiary RankGroup2. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_TERTIARY_RANK_GROUP2</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_TERTIARY_RANK_GROUP3</id>
+    <description>Tertiary RankGroup3. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_TERTIARY_RANK_GROUP3</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_QUATERNARY_RANK_GROUP0</id>
+    <description>Quaternary RankGroup0. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_QUATERNARY_RANK_GROUP0</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_QUATERNARY_RANK_GROUP1</id>
+    <description>Quaternary RankGroup1. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_QUATERNARY_RANK_GROUP1</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_QUATERNARY_RANK_GROUP2</id>
+    <description>Quaternary RankGroup2. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_QUATERNARY_RANK_GROUP2</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_QUATERNARY_RANK_GROUP3</id>
+    <description>Quaternary RankGroup3. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_QUATERNARY_RANK_GROUP3</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<!-- TODO RTC 87603. These termination data EFF attributes have corresponding
+     VPD attributes that come from CVPD. When all HWPs are using the VPD
+     versions, these EFF versions can be deleted -->
+
+<attribute>
+    <id>EFF_ODT_RD</id>
+    <description>Rank Read ODT. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2,2,4</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_ODT_RD</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_ODT_WR</id>
+    <description>Rank Write ODT. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2,2,4</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_ODT_WR</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_RON</id>
+    <description>DRAM Ron. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2,2</array><!-- [drop][port] -->
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_RON</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_RTT_NOM</id>
+    <description>DRAM Rtt_Nom. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2,2,4</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_RTT_NOM</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_RTT_WR</id>
+    <description>DRAM Rtt_WR. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2,2,4</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_RTT_WR</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_WR_VREF</id>
+    <description>DRAM Write Vref. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_WR_VREF</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_WRDDR4_VREF</id>
+    <description>DRAM Write Vref for DDR4. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_WRDDR4_VREF</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_DRV_IMP_DQ_DQS</id>
+    <description>Centaur DQ and DQS Drive Impedance. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_DRV_IMP_DQ_DQS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_DRV_IMP_ADDR</id>
+    <description>Centaur Address Drive Impedance. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_DRV_IMP_ADDR</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_DRV_IMP_CNTL</id>
+    <description>Centaur Control Drive Impedance. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_DRV_IMP_CNTL</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_DRV_IMP_CLK</id>
+    <description>Centaur Clock Drive Impedance. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_DRV_IMP_CLK</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_DRV_IMP_SPCKE</id>
+    <description>Centaur Spare Clock Drive Impedance. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_DRV_IMP_SPCKE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_RCV_IMP_DQ_DQS</id>
+    <description>Centaur DQ and DQS Receiver Impedance. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_RCV_IMP_DQ_DQS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_SLEW_RATE_DQ_DQS</id>
+    <description>Centaur DQ and DQS Slew Rate. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_SLEW_RATE_DQ_DQS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_SLEW_RATE_ADDR</id>
+    <description>Centaur Address Slew Rate. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_SLEW_RATE_ADDR</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_SLEW_RATE_CLK</id>
+    <description>Centaur Clock Slew Rate. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_SLEW_RATE_CLK</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_SLEW_RATE_SPCKE</id>
+    <description>Centaur Spare Clock Slew Rate. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_SLEW_RATE_SPCKE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_SLEW_RATE_CNTL</id>
+    <description>Centaur Control Slew Rate. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_SLEW_RATE_CNTL</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_RD_VREF</id>
+    <description>Centaur Read Vref. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_RD_VREF</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<!-- TODO RTC 87603 down to here -->
+
+<attribute>
+    <id>EFF_CEN_DRV_IMP_DQ_DQS_SCHMOO</id>
+    <description>Enables for which impedance values can be used and tested in a timing test. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_DRV_IMP_DQ_DQS_SCHMOO</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_DRV_IMP_CLK_SCHMOO</id>
+    <description>Enables for which impedance values can be used and tested in a timing test. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_DRV_IMP_CLK_SCHMOO</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_DRV_IMP_SPCKE_SCHMOO</id>
+    <description>Enables for which impedance values can be used and tested in a timing test. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_DRV_IMP_SPCKE_SCHMOO</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_DRV_IMP_CNTL_SCHMOO</id>
+    <description>Enables for which impedance values can be used and tested in a timing test. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_DRV_IMP_CNTL_SCHMOO</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_RCV_IMP_DQ_DQS_SCHMOO</id>
+    <description>Enables for which impedance values can be used and tested in a timing test. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_RCV_IMP_DQ_DQS_SCHMOO</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_SLEW_RATE_DQ_DQS_SCHMOO</id>
+    <description>Slew Rates that can be selected during timing adjustments. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_SLEW_RATE_DQ_DQS_SCHMOO</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_SLEW_RATE_CLK_SCHMOO</id>
+    <description>Slew Rates that can be selected during timing adjustments. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_SLEW_RATE_CLK_SCHMOO</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_SLEW_RATE_SPCKE_SCHMOO</id>
+    <description>Slew Rates that can be selected during timing adjustments. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_SLEW_RATE_SPCKE_SCHMOO</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_SLEW_RATE_ADDR_SCHMOO</id>
+    <description>Slew Rates that can be selected during timing adjustments. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_SLEW_RATE_ADDR_SCHMOO</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_SLEW_RATE_CNTL_SCHMOO</id>
+    <description>Slew Rates that can be selected during timing adjustments. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_SLEW_RATE_CNTL_SCHMOO</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_WR_VREF_SCHMOO</id>
+    <description>Enables for which VREF to use on the WR Schmoo. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_WR_VREF_SCHMOO</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_WRDDR4_VREF_SCHMOO</id>
+    <description>Enables for which VREF to use on the WR Schmoo for DDR4. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_WRDDR4_VREF_SCHMOO</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_RD_VREF_SCHMOO</id>
+    <description>Enables for which VREF value can be used in timing adjustments. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_RD_VREF_SCHMOO</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DIMM_SIZE</id>
+    <description>DIMM Size. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2,2</array><!-- [drop][port] -->
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DIMM_SIZE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_BANKS</id>
+    <description>Number of DRAM banks. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_BANKS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_ROWS</id>
+    <description>Number of DRAM rows. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_ROWS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_COLS</id>
+    <description>Number of DRAM columns. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_COLS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_DENSITY</id>
+    <description>DRAM Density. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_DENSITY</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_TRCD</id>
+    <description>DRAM RAS to CAS Delay. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_TRCD</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_TRRD</id>
+    <description>DRAM Row ACT to Row ACT Delay. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_TRRD</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_TRP</id>
+    <description>DRAM Row Precharge Delay. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_TRP</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_TRAS</id>
+    <description>DRAM ACT to Precharge Delay. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_TRAS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_TRC</id>
+    <description>DRAM ACT to ACT/Refresh Delay. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_TRC</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_TRFI</id>
+    <description>Refresh Interval. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_TRFI</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_TRFC</id>
+    <description>DRAM Refresh Recovery Delay. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_TRFC</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_TWTR</id>
+    <description>DRAM Internal Write to Read Delay. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_TWTR</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_TRTP</id>
+    <description>DRAM Internal Read to Precharge Delay. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_TRTP</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_TFAW</id>
+    <description>DRAM Four ACT Window Delay. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_TFAW</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_BL</id>
+    <description>DRAM Burst Length. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_BL</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_CL</id>
+    <description>DRAM CAS Latency. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_CL</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_AL</id>
+    <description>DRAM Additive Latency. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_AL</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_CWL</id>
+    <description>DRAM CAS Write Latency. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_CWL</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_RBT</id>
+    <description>DRAM Read Burst Type. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_RBT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_TM</id>
+    <description>DRAM Test Mode. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_TM</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_DLL_RESET</id>
+    <description>DRAM DLL Reset. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_DLL_RESET</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_WR</id>
+    <description>DRAM Write Recovery. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_WR</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_DLL_PPD</id>
+    <description>DRAM DLL Precharge PD. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_DLL_PPD</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_DLL_ENABLE</id>
+    <description>DRAM DLL Enable. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_DLL_ENABLE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_TDQS</id>
+    <description>DRAM TDQS. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_TDQS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_WR_LVL_ENABLE</id>
+    <description>DRAM Write Level Enable. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_WR_LVL_ENABLE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_OUTPUT_BUFFER</id>
+    <description>DRAM output buffer. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_OUTPUT_BUFFER</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_PASR</id>
+    <description>DRAM Partial Array Self-Refresh. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_PASR</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_ASR</id>
+    <description>DRAM Auto Self-Refresh. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_ASR</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_SRT</id>
+    <description>DRAM Self-Refresh Temperature Range. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_SRT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_MPR_LOC</id>
+    <description>Multi Purpose Register Location. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_MPR_LOC</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_MPR_MODE</id>
+    <description>Multi Purpose Register Mode. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_MPR_MODE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DIMM_RCD_CNTL_WORD_0_15</id>
+    <description>DIMM RCD Control Word. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint64_t>
+        </uint64_t>
+        <array>2,2</array><!-- [drop][port] -->
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DIMM_RCD_CNTL_WORD_0_15</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DIMM_RCD_IBT</id>
+    <description>DIMM RCD IBT. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+        <array>2,2</array><!-- [drop][port] -->
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DIMM_RCD_IBT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DIMM_RCD_MIRROR_MODE</id>
+    <description>DIMM RCD Mirror mode. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2,2</array><!-- [drop][port] -->
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DIMM_RCD_MIRROR_MODE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_SCHMOO_MODE</id>
+    <description>Specifies the schmoo mode to use during draminit_train_adv. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_SCHMOO_MODE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_SCHMOO_ADDR_MODE</id>
+    <description>Specifies the schmoo mode to use during draminit_train_adv. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_SCHMOO_ADDR_MODE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_SCHMOO_TEST_VALID</id>
+    <description>Specifies the schmoo test to run during draminit_train_adv. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_SCHMOO_TEST_VALID</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_SCHMOO_PARAM_VALID</id>
+    <description>Specifies the schmoo parameters to use during draminit_train_adv. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_SCHMOO_PARAM_VALID</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_SCHMOO_WR_EYE_MIN_MARGIN</id>
+    <description>Specifies the schmoo minimum margin to use during draminit_train_adv. Used to signal possible SI issues in memory.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_SCHMOO_WR_EYE_MIN_MARGIN</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_SCHMOO_RD_EYE_MIN_MARGIN</id>
+    <description>Specifies the schmoo minimum margin to use during draminit_train_adv. Used to signal possible SI issues in memory.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_SCHMOO_RD_EYE_MIN_MARGIN</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_SCHMOO_DQS_CLK_MIN_MARGIN</id>
+    <description>Specifies the schmoo minimum margin to use during draminit_train_adv. Used to signal possible SI issues in memory.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_SCHMOO_DQS_CLK_MIN_MARGIN</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_SCHMOO_RD_GATE_MIN_MARGIN</id>
+    <description>Specifies the schmoo minimum margin to use during draminit_train_adv. Used to signal possible SI issues in memory.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_SCHMOO_RD_GATE_MIN_MARGIN</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_SCHMOO_ADDR_CMD_MIN_MARGIN</id>
+    <description>Specifies the schmoo minimum margin to use during draminit_train_adv. Used to signal possible SI issues in memory.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_SCHMOO_ADDR_CMD_MIN_MARGIN</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_MEMCAL_INTERVAL</id>
+    <description>Specifies the memcal interval in clocks. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_MEMCAL_INTERVAL</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_ZQCAL_INTERVAL</id>
+    <description>Specifies the zqcal interval in clocks. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_ZQCAL_INTERVAL</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_IBM_TYPE</id>
+    <description>Specifies the memory topology type. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2,2</array><!-- [drop][port] -->
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_IBM_TYPE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_NUM_DROPS_PER_PORT</id>
+    <description>Specifies the number of DIMM dimensions that are valid per port. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_NUM_DROPS_PER_PORT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_STACK_TYPE</id>
+    <description>Specifies the DRAM package type. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2,2</array><!-- [drop][port] -->
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_STACK_TYPE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_NUM_MASTER_RANKS_PER_DIMM</id>
+    <description>Specifies the number of master ranks per DIMM. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2,2</array><!-- [drop][port] -->
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_NUM_MASTER_RANKS_PER_DIMM</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_NUM_PACKAGES_PER_RANK</id>
+    <description>Specifies the number of DRAM packages per rank. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2,2</array><!-- [drop][port] -->
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_NUM_PACKAGES_PER_RANK</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_NUM_DIES_PER_PACKAGE</id>
+    <description>Specifies the number of DRAM dies per package. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2,2</array><!-- [drop][port] -->
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_NUM_DIES_PER_PACKAGE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_MEM_THROTTLE_NUMERATOR_PER_MBA</id>
+    <description>DIMM throttle numerator. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_MEM_THROTTLE_NUMERATOR_PER_MBA</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_MEM_THROTTLE_DENOMINATOR</id>
+    <description>DIMM throttle denominator. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_MEM_THROTTLE_DENOMINATOR</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_MEM_THROTTLE_NUMERATOR_PER_CHIP</id>
+    <description>This is the throttle numerator setting for cfg_nm_n_per_chip. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_MEM_THROTTLE_NUMERATOR_PER_CHIP</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_MEM_WATT_TARGET</id>
+    <description>Channel total memory watts. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_MEM_WATT_TARGET</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_POWER_SLOPE</id>
+    <description>DIMM Power slope value. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+        <array>2,2</array><!-- [drop][port] -->
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_POWER_SLOPE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_POWER_SLOPE2</id>
+    <description>DIMM Power slope value. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+        <array>2,2</array><!-- [drop][port] -->
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_POWER_SLOPE2</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_POWER_INT</id>
+    <description>DIMM Power intercept value. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+        <array>2,2</array><!-- [drop][port] -->
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_POWER_INT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_POWER_INT2</id>
+    <description>Supplier Power intercept value for dimm</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+        <array>2,2</array><!-- [drop][port] -->
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_POWER_INT2</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_TOTAL_POWER_SLOPE</id>
+    <description>Master Total Power slope value for dimm</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+        <array>2,2</array><!-- [drop][port] -->
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_TOTAL_POWER_SLOPE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_TOTAL_POWER_SLOPE2</id>
+    <description>Supplier Total Power slope value for dimm</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+        <array>2,2</array><!-- [drop][port] -->
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_TOTAL_POWER_SLOPE2</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_TOTAL_POWER_INT</id>
+    <description>Master Total Power intercept value for dimm</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+        <array>2,2</array><!-- [drop][port] -->
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_TOTAL_POWER_INT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_TOTAL_POWER_INT2</id>
+    <description>Supplier Total Power intercept value for dimm</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+        <array>2,2</array><!-- [drop][port] -->
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_TOTAL_POWER_INT2</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_DIMM_MAXBANDWIDTH_GBS</id>
+    <description>DIMM Max Bandwidth in GBs. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+        <array>2,2</array><!-- [drop][port] -->
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_DIMM_MAXBANDWIDTH_GBS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_DIMM_MAXBANDWIDTH_MRS</id>
+    <description>DIMM Max Bandwidth in MRs. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+        <array>2,2</array><!-- [drop][port] -->
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_DIMM_MAXBANDWIDTH_MRS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_CHANNEL_MAXBANDWIDTH_GBS</id>
+    <description>Channel Max Bandwidth in GBs. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_CHANNEL_MAXBANDWIDTH_GBS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_CHANNEL_PAIR_MAXBANDWIDTH_GBS</id>
+    <description>Channel Pair Max Bandwidth in GBs. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_CHANNEL_PAIR_MAXBANDWIDTH_GBS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_CHANNEL_MAXBANDWIDTH_MRS</id>
+    <description>Channel Max Bandwidth MRs. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_CHANNEL_MAXBANDWIDTH_MRS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_CHANNEL_PAIR_MAXBANDWIDTH_MRS</id>
+    <description>Channel Pair Max Bandwidth MRs. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_CHANNEL_PAIR_MAXBANDWIDTH_MRS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_DIMM_MAXPOWER</id>
+    <description>DIMM Max Power output. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+        <array>2,2</array><!-- [drop][port] -->
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_DIMM_MAXPOWER</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_CHANNEL_MAXPOWER</id>
+    <description>Channel Max Power output. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_CHANNEL_MAXPOWER</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_CHANNEL_PAIR_MAXPOWER</id>
+    <description>Channel Pair Max Power output. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_CHANNEL_PAIR_MAXPOWER</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_RUNTIME_MEM_THROTTLE_NUMERATOR_PER_MBA</id>
+    <description>Runtime throttle numerator setting for cfg_nm_n_per_mba. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_RUNTIME_MEM_THROTTLE_NUMERATOR_PER_MBA</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_RUNTIME_MEM_THROTTLE_DENOMINATOR</id>
+    <description>Runtime throttle denominator setting for cfg_nm_m. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_RUNTIME_MEM_THROTTLE_DENOMINATOR</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_RUNTIME_MEM_THROTTLE_NUMERATOR_PER_CHIP</id>
+    <description>Runtime throttle numerator setting for cfg_nm_n_per_chip. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_RUNTIME_MEM_THROTTLE_NUMERATOR_PER_CHIP</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_ZSERIES</id>
+    <description>Determines if the code is Zseries type or P Series.  The platform determines this and this attribute is mostly used in the initfiles so that we can share the same initialization code with the zSeries team</description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_ZSERIES</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<!-- Note: This looks incorrect because memory_attributes.xml says it is platInit (therefore we should set it up to a sensible value),
+     but recent discussions have concluded that a HWP will fill this in, this implementation is correct, memory_attributes.xml will eventually change. -->
+<attribute>
+    <id>MSS_NWELL_MISPLACEMENT</id>
+    <description>Set by the platform depending on DD1 vs DD1.01.  If true, then SI settings affected by the NWELL problem are adjusted.  Used in eff_config</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_NWELL_MISPLACEMENT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_INTERLEAVE_ENABLE</id>
+    <description>
+        Used in the setting of MCS groups. It is a bitfield.
+        - If 0x01 is set then groups of 1 are enabled and the SMP fabric must
+          be set in checkerboard mode (see ALL_MCS_IN_INTERLEAVING_GROUP).
+        - If 0x02 is set then groups of 2 are possible.
+        - If 0x04 is set then groups of 4 are possible.
+        - If 0x08 is set then groups of 8 are possible.
+        This attribute is based on Machine-Type-Model (MTM) and is setup by
+          the service processor.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint8_t>
+            <default>0x07</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_INTERLEAVE_ENABLE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_MCA_HASH_MODE</id>
+    <description></description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_MCA_HASH_MODE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_MBA_ADDR_INTERLEAVE_BIT</id>
+    <description>sets the Centaur address bits used to interleave addresses between MBA01 and MBA23. valid values are 23 through 32.</description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_MBA_ADDR_INTERLEAVE_BIT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_MBA_CACHELINE_INTERLEAVE_MODE</id>
+    <description>centaur interleave mode. 1 = 256-BIT, 0 = 128-BIT.</description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_MBA_CACHELINE_INTERLEAVE_MODE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_CACHE_ENABLE</id>
+    <description>
+        Specifies if a Memory Buffer chip L4 cache is enabled or disabled
+        For good memory buffer chips, L4 is enabled
+        Firmware can set to disabled for a particular chip if the cache is
+          not functional
+        1 = enabled, 0 = disabled.
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_CACHE_ENABLE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_PREFETCH_ENABLE</id>
+    <description>Prefteching enable. 1 = enable, 0 = disable.</description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint8_t>
+            <default>1</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_PREFETCH_ENABLE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_CLEANER_ENABLE</id>
+    <description>L4 cleaner enable. 1 = enable, 0 = disable.</description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint8_t>
+            <default>1</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_CLEANER_ENABLE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_LAB_OVERRIDE_FOR_MEM_PLL</id>
+    <description>override the default Centaur MEM PLL settings with user-specified scan chain data. 1 = ON, 0 = OFF.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_LAB_OVERRIDE_FOR_MEM_PLL</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_MEM_MC_IN_GROUP</id>
+    <description>A 8 bit vector that would be a designation of which MC are involved in the group. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>8</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_MEM_MC_IN_GROUP</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_MCS_GROUP_32</id>
+    <description>Data Structure from eff grouping to setup bars to help determine different groups
+   Non- Mirroring [0-7] 0 -- MCS size //1-- No of MCS/group //2-- Total group size //3 -- Base address// 4-11 - MCS ID number// 12 --Alter.Bar //13 - A.Group Size // 14 - A.Base address
+ //  Mirroring      [8-15] 0 -- MCS size //1-- No of MCS/group //2-- Total group size //3 -- Base address// 4-11 - MCS ID number// 12 --Alter.Bar //13 - A.Group Size // 14 - A.Base address
+Measured in GB</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+        <array>16,16</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_MCS_GROUP_32</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_EFF_DIMM_FUNCTIONAL_VECTOR</id>
+    <description>A bit vector (per Dean's request) specifying if a DIMM is functional.  DIMM attributes, such as SIZE, are qualified by this bit vector.  The attribute ANDed 0x80 means port 0, DIMM 0 is functional, 0x40 means port 0, DIMM 1 is functional.  0x08 means port 1, DIMM 0 is functional and 0x04 means port 1 DIMM 1 is functional.  A fully populated system would have the value of 0xCC. Used in various locations and is computed in mss_eff_cnfg. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.  Each memory channel will have a value. creator: mss_eff_cnfg consumer: various firmware notes: none
+This factors in functionality</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_EFF_DIMM_FUNCTIONAL_VECTOR</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_CAL_STEP_ENABLE</id>
+    <description>A bit vector denoting valid cal steps to run during dram_init_train. [0] EXT_ZQCAL
+[1] WR_LEVEL
+[2] DQS_ALIGN
+[3] RDCLK_ALIGN
+[4] READ_CTR
+[5] WRITE_CTR
+[6] COARSE_WR
+[7] COARSE_RD
+bits6:7  will be consumed together to form COARSE_LVL. </description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_CAL_STEP_ENABLE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_MEM_IPL_COMPLETE</id>
+    <description>A numerical number indicating if the memory procedures are complete.  written by mss_setup_bars when the bars are now functional in the processor.  </description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_MEM_IPL_COMPLETE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_SLEW_RATE_DATA</id>
+    <description>The 4 bit result of running the slew calibration algorithm at various rates and impedances</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2, 4, 4</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_SLEW_RATE_DATA</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_SLEW_RATE_ADR</id>
+    <description>The 4 bit result of running the slew calibration algorithm at various rates and impedances</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2, 4, 4</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_SLEW_RATE_ADR</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>ECID</id>
+    <description>
+    Bits 0 to 63 of the ECID in array entry 0 and bits 64 to 127 in ECID array entry 1
+    Created from running proc_getecid.C for processors
+    Created from running mss_get_cen_ecid.C for centaurs
+    </description>
+    <simpleType>
+        <uint64_t>
+        </uint64_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_ECID</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_ALLOW_SINGLE_PORT</id>
+    <description>When this value is true, then mss_eff config will allow a single port to have one dimm and will allow ports to have different sizes.  Used in eff_config</description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_ALLOW_SINGLE_PORT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<!-- TODO RTC 87603. These phase rotator EFF attributes have corresponding
+     VPD attributes that come from CVPD. When all HWPs are using the VPD
+     versions, these EFF versions can be deleted -->
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M0_CLK_P0</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M0_CLK_P0</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M0_CLK_P1</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M0_CLK_P1</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M1_CLK_P0</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M1_CLK_P0</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M1_CLK_P1</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M1_CLK_P1</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M_CMD_A0</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M_CMD_A0</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M_CMD_A1</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M_CMD_A1</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M_CMD_A2</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M_CMD_A2</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M_CMD_A3</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M_CMD_A3</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M_CMD_A4</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M_CMD_A4</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M_CMD_A5</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M_CMD_A5</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M_CMD_A6</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M_CMD_A6</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M_CMD_A7</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M_CMD_A7</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M_CMD_A8</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M_CMD_A8</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M_CMD_A9</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M_CMD_A9</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M_CMD_A10</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M_CMD_A10</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M_CMD_A11</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M_CMD_A11</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M_CMD_A12</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M_CMD_A12</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M_CMD_A13</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M_CMD_A13</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M_CMD_A14</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M_CMD_A14</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M_CMD_A15</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M_CMD_A15</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M_CMD_BA0</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M_CMD_BA0</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M_CMD_BA1</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M_CMD_BA1</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M_CMD_BA2</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M_CMD_BA2</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M_CMD_CASN</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M_CMD_CASN</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M_CMD_RASN</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M_CMD_RASN</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M_CMD_WEN</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M_CMD_WEN</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M_PAR</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M_PAR</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M_ACTN</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M_ACTN</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M0_CNTL_CKE0</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M0_CNTL_CKE0</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M0_CNTL_CKE1</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M0_CNTL_CKE1</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M0_CNTL_CKE2</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M0_CNTL_CKE2</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M0_CNTL_CKE3</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M0_CNTL_CKE3</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M0_CNTL_CSN0</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M0_CNTL_CSN0</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M0_CNTL_CSN1</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M0_CNTL_CSN1</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M0_CNTL_CSN2</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M0_CNTL_CSN2</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M0_CNTL_CSN3</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M0_CNTL_CSN3</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M0_CNTL_ODT0</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M0_CNTL_ODT0</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M0_CNTL_ODT1</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M0_CNTL_ODT1</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M1_CNTL_CKE0</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M1_CNTL_CKE0</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M1_CNTL_CKE1</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M1_CNTL_CKE1</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M1_CNTL_CKE2</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M1_CNTL_CKE2</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M1_CNTL_CKE3</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M1_CNTL_CKE3</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M1_CNTL_CSN0</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M1_CNTL_CSN0</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M1_CNTL_CSN1</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M1_CNTL_CSN1</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M1_CNTL_CSN2</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M1_CNTL_CSN2</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M1_CNTL_CSN3</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M1_CNTL_CSN3</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M1_CNTL_ODT0</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M1_CNTL_ODT0</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CEN_PHASE_ROT_M1_CNTL_ODT1</id>
+    <description>Phase rotator value that comes from termination on the CDIMM VPD</description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CEN_PHASE_ROT_M1_CNTL_ODT1</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<!-- TODO RTC 87603 down to here -->
+
+<attribute>
+    <id>MSS_DQS_SWIZZLE_TYPE</id>
+    <description>DQS Swizzle type is set by the platform to describe what kind of DQS connection is being used for register acceses. Type 0 is normal, type 1 is for systems with wiring like glacier 1.  Additional types maybe defined if new boards have even different DQS swizzle features
+
+        NORMAL_TYPE_0   = 0
+        GLACIER_TYPE_1  = 1
+        PALMETTO_TYPE_2 = 2
+    </description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_DQS_SWIZZLE_TYPE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_MCS_GROUP</id>
+    <description>Data Structure from eff grouping to setup bars to help determine different groups
+   Non- Mirroring [0-7] 0 -- MCS size //1-- No of MCS/group //2-- Total group size //3 -- Base address// 4-11 - MCS ID number// 12 --Alter.Bar //13 - A.Group Size // 14 - A.Base address
+ //  Mirroring      [8-15] 0 -- MCS size //1-- No of MCS/group //2-- Total group size //3 -- Base address// 4-11 - MCS ID number// 12 --Alter.Bar //13 - A.Group Size // 14 - A.Base address
+Measured in GB</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>16,16</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_MCS_GROUP</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CKE_MAP</id>
+    <description>Rank to CKE map. Used in various locations and is computed in mss_eff_cnfg_cke_map. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.   creator: mss_eff_cnfg_cke_map consumer: various firmware notes: none</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2,2,4</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CKE_MAP</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_SPCKE_MAP</id>
+    <description>Rank to Spare CKE map. Used in various locations and is computed in mss_eff_cnfg_cke_map. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.   creator: mss_eff_cnfg_cke_map consumer: various firmware notes: none</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2,2,4</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_SPCKE_MAP</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DIMM_SPARE</id>
+    <description>Spare DRAM availability. Used in various locations and is computed in mss_eff_cnfg. Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.   creator: mss_eff_cnfg consumer: various firmware notes: load from spd</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2,2,4</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DIMM_SPARE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_PSRO</id>
+    <description>Set by the centaur mss_get_cen_ecid function used diagnostic and chip characterization reporting</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_PSRO</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<!-- ===== End Attributes supporting memory_attributes.xml HWPF Attributes ===== -->
+
+<attribute>
+    <id>EI_BUS_TX_LANE_INVERT</id>
+    <description>
+      This attribute represents the polarity of a differential wire pair on the DMI and A buses.
+      creator: platform (generated based on MRW data)
+      See defintion in common_attributes.xml for more information.
+    </description>
+    <simpleType>
+      <uint32_t>
+        <default>0</default>
+      </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EI_BUS_TX_LANE_INVERT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PROC_PERV_BNDY_PLL_CHIPLET_ID</id>
+    <description>Chiplet ID for ring image for perv_bndy_pll ring containing filter plls and xb_pll,nest_pll
+      creator: platform
+      firmware notes:
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_PERV_BNDY_PLL_CHIPLET_ID</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PROC_PB_BNDY_DMIPLL_CHIPLET_ID</id>
+    <description>Chiplet ID for ring image for pb_bndy_dmipll ring
+      creator: platform
+      firmware notes:
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_PB_BNDY_DMIPLL_CHIPLET_ID</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PROC_AB_BNDY_PLL_CHIPLET_ID</id>
+    <description>Chiplet ID for ring image for ab_bndy_pll ring
+      creator: platform
+      firmware notes:
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_AB_BNDY_PLL_CHIPLET_ID</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PROC_PCI_BNDY_PLL_CHIPLET_ID</id>
+    <description>Chiplet ID for ring image for pci_bndy_pll ring
+      creator: platform
+      firmware notes:
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_PCI_BNDY_PLL_CHIPLET_ID</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PROC_PERV_BNDY_PLL_SCAN_SELECT</id>
+    <description>Scan select for ring image for perv_bndy_pll ring containing filter plls and xb_pll,nest_pll
+      creator: platform
+      firmware notes:
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0x00100008</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_PERV_BNDY_PLL_SCAN_SELECT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PROC_PB_BNDY_DMIPLL_SCAN_SELECT</id>
+    <description>Scan select for ring image for pb_bndy_dmipll ring
+      creator: platform
+      firmware notes:
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_PB_BNDY_DMIPLL_SCAN_SELECT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PROC_AB_BNDY_PLL_SCAN_SELECT</id>
+    <description>Scan select for ring image for ab_bndy_pll ring
+      creator: platform
+      firmware notes:
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_AB_BNDY_PLL_SCAN_SELECT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PROC_PCI_BNDY_PLL_SCAN_SELECT</id>
+    <description>Scan select for ring image for pci_bndy_pll ring
+      creator: platform
+      firmware notes:
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_PCI_BNDY_PLL_SCAN_SELECT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<!-- ===== Supporting poreve_memory_attributes.xml ===== -->
+
+<attribute>
+    <id>SBE_SEEPROM_I2C_ADDRESS_BYTES</id>
+    <description>
+      The number of address bytes required to address the SEEPROM memory
+      device that contains SBE IPL code.  This will vary by device based on
+      the device capacity, and must be either 1, 2, 3 or 4.
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>2</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_SBE_SEEPROM_I2C_ADDRESS_BYTES</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>SBE_SEEPROM_I2C_DEVICE_ADDRESS</id>
+    <description>
+      A 2-element array containing the I2C device address of the primary (0)
+      and secondary (1) SEEPROM devices containing SBE IPL code.
+      Provided by the Machine Readable Workbook
+    </description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_SBE_SEEPROM_I2C_DEVICE_ADDRESS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>SBE_SEEPROM_I2C_PORT</id>
+    <description>
+      A 2-element array containing the I2C controller port number of the
+      primary (0) and secondary (1) SEEPROM devices containing SBE IPL code.
+      Provided by the Machine Readable Workbook
+    </description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_SBE_SEEPROM_I2C_PORT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PNOR_I2C_ADDRESS_BYTES</id>
+    <description>
+      The number of address bytes required to address the PNOR memory device
+      via the pseudo-I2C (LPC, ECCAX) controller.  This will vary by device
+      based on the device capacity, and must be either 0, 1, 2, 3 or 4.
+
+      This attribute will be set to 0 for chips with no PNOR attached
+      (PoreVe will never run on these chips).
+
+      Provided by the Machine Readable Workbook
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>4</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PNOR_I2C_ADDRESS_BYTES</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<!-- ===== End supporting poreve_memory_attributes.xml ===== -->
+
+<!-- Support for sync_attributes.xml -->
+<attribute>
+    <id>SYNC_BETWEEN_STEPS</id>
+    <description>
+        Attribute to enable targetting attribute sync when in istep mode.
+        1 = sync will occur following each substep when ipl'ing in single step mode
+        0 = sync will not be done after each step
+    </description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+        <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_SYNC_BETWEEN_STEPS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+<!-- End support for sync_attributes.xml -->
+
+<!--    Support for proc_select_boot_master -->
+
+<enumerationType>
+    <id>PROC_SELECT_BOOT_MASTER</id>
+    <description>Enumeration indicating which chip should be used as the PROC_SELECT_BOOT_MASTER</description>
+    <enumerator>
+        <name>PRIMARY</name>
+        <value>1</value>
+    </enumerator>
+    <enumerator>
+        <name>SECONDARY</name>
+        <value>2</value>
+    </enumerator>
+</enumerationType>
+
+<attribute>
+  <id>PROC_SELECT_BOOT_MASTER</id>
+  <description>
+    Specifies which chip should be used as the boot master
+    Initialized by the platform.
+      PRIMARY  - the primary master is used for the BOOT
+      SECONDARY  - the alternate master is used for the BOOT
+      Platforms are expected to set this to PRIMARY in normal operation
+  </description>
+  <simpleType>
+    <uint8_t>
+      <default>1</default>
+    </uint8_t>
+  </simpleType>
+  <persistency>volatile</persistency>
+  <readable/>
+  <writeable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_PROC_SELECT_BOOT_MASTER</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+
+<enumerationType>
+    <id>PROC_SELECT_SEEPROM_IMAGE</id>
+    <description>Enumeration indicating which SEEPROM image should be used for the boot master</description>
+    <enumerator>
+        <name>FIRST</name>
+        <value>1</value>
+    </enumerator>
+    <enumerator>
+        <name>SECOND</name>
+        <value>2</value>
+    </enumerator>
+</enumerationType>
+
+<attribute>
+  <id>PROC_SELECT_SEEPROM_IMAGE</id>
+  <description>
+    Specifies which SEEPROM image should be used for the boot master.
+      FIRST  - the first image was selected
+      SECOND - the second image was selected
+      Platforms are expected to set this to FIRST in normal operation
+  </description>
+  <simpleType>
+      <uint8_t>
+        <default>1</default>
+      </uint8_t>
+  </simpleType>
+  <persistency>volatile</persistency>
+  <readable/>
+  <writeable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_PROC_SELECT_SEEPROM_IMAGE</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<enumerationType>
+    <id>PROC_SELECT_BOOT_SEEPROM_IMAGE</id>
+    <description>Enumeration indicating which SEEPROM image should be used to boot a processor</description>
+    <enumerator>
+        <name>FIRST</name>
+        <value>1</value>
+    </enumerator>
+    <enumerator>
+        <name>SECOND</name>
+        <value>2</value>
+    </enumerator>
+</enumerationType>
+
+<attribute>
+  <id>PROC_SELECT_BOOT_SEEPROM_IMAGE</id>
+  <description>
+    Specifies which SEEPROM image should be used to boot a processor
+      FIRST  - the first image was selected
+      SECOND - the second image was selected
+  </description>
+  <simpleType>
+      <uint8_t>
+        <default>1</default>
+      </uint8_t>
+  </simpleType>
+  <persistency>volatile</persistency>
+  <readable/>
+  <writeable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_PROC_SELECT_BOOT_SEEPROM_IMAGE</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>ENABLED_THREADS</id>
+    <description>
+       Bitmask of threads to enable for each processor,
+       Zero means enable all architected threads
+    </description>
+    <simpleType>
+        <uint64_t>
+        </uint64_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>MAX_PROC_CHIPS_PER_NODE</id>
+    <description>
+        System attribute.
+        The max proc chips per node available in the system.
+    </description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>MAX_EXS_PER_PROC_CHIP</id>
+    <description>
+        System attribute.
+        The max EX units per proc chip available in the system.
+    </description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>MAX_DIMMS_PER_MBA_PORT</id>
+    <description>
+        System attribute.
+        The max DIMMs per MBA Port available in the system.
+    </description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>MAX_MBA_PORTS_PER_MBA</id>
+    <description>
+        System attribute.
+        The max MBA ports per MBA available in the system.
+    </description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>MAX_MBAS_PER_MEMBUF_CHIP</id>
+    <description>
+        System attribute.
+        The max MBAS per membuf available in the system.
+    </description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>MAX_CHIPLETS_PER_PROC</id>
+    <description>
+        System attribute.
+        The max chiplets per proc available in the system.
+    </description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>MAX_MCS_PER_SYSTEM</id>
+    <description>
+        System attribute.
+        The max MCS units available in the system.
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>4</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<!-- Note: This attribute is only used by FSP -->
+<attribute>
+    <id>DMI_REFCLOCK_SWIZZLE</id>
+    <description>
+      Defines Murano/Venice/Naples FSI GP8 refclock enable field bit offset (0:7) associated with this MCS chip unit.
+    </description>
+    <simpleType>
+      <uint8_t>
+        <default>0</default>
+      </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_DMI_REFCLOCK_SWIZZLE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EI_BUS_TX_MSBSWAP</id>
+    <description>
+        Source: MRW: Downstream MSB Swap and Upstream MSB Swap
+        Usage:  TX_MSBSWAP initfile setting for DMI and A buses
+
+        This attribute represents whether or not a single clock group bus such as DMI and A bus was wired by the board designer using a feature
+        called MSB Swap where lane 0 of the TX chip wires to lane n-1 on the RX chip where 'n' is the width of the bus. A basic description
+        of this capability is that the board designer can save layers on the board wiring by crossing the wiring between the two chips in
+        a prescribed manner. In a non-MSB Swapped bus Lane 0 on the TX chip wires to lane 0 on the RX chip, lane 1 to lane 1 and so on.
+        If a bus is MSB Swapped then lane 0 of the TX chip wires to lane 'n-1' of the RX chip, lane 1 to lane 'n-2', etc. Random or
+        arbitrary wiring of TX to RX lanes on different chips is NOT ALLOWED.
+
+        The Master Chip of two connected chips is defined as the chip with the smaller value of (100*Node + Pos).
+        The Slave Chip of two connected chips is defined as the chip with the larger value of (100*Node + Pos).
+        The Downstream direction is defined as the direction from the Master chip to the Slave chip.
+        The Upstream direction is defined as the direction from the Slave chip to the Master chip.
+
+        The Downstream TX_MSBSWAP from the MRW is a uint8 value. 0x01 means the Downstream bus is wired msb to lsb etc. and
+        0x00 means the bus is wired normally, msb to msb, lsb to lsb (lane0 to lane0).
+
+        The Upstream TX_MSBSWAP from the MRW is a uint8 value. 0x01 means the Upstream bus is wired msb to lsb etc. and
+        0x00 means the bus is wired normally, msb to msb, lsb to lsb (lane0 to lane0).
+
+        It is up to the platform code to set up each ATTR_EI_BUS_TX_MSBSWAP value for the correct target endpoints.
+
+    </description>
+    <simpleType>
+      <uint8_t>
+      </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EI_BUS_TX_MSBSWAP</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_FREQ_OVERRIDE</id>
+    <description>FOR LAB USE ONLY: Frequency override of this memory channel in MHz, comprising of up to three DIMMs.  Set by config file or an attribute writing program.  Consumed by mss_freq.  The default of AUTO means mss_freq will find the best frequencies given the DIMMs plugged in and other rules.  Otherwise, this is the system frequency.
+firmware notes: Platforms should initialize this attribute to AUTO (0)</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_FREQ_OVERRIDE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<!-- mcbist attributes -->
+<attribute>
+    <id>MCBIST_PATTERN</id>
+    <description>Enables mcbist data pattern selection.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MCBIST_PATTERN</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MCBIST_TEST_TYPE</id>
+    <description>Enables mcbist test type selection.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MCBIST_TEST_TYPE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MCBIST_PRINTING_DISABLE</id>
+    <description>MCBIST support for printing</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MCBIST_PRINTING_DISABLE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MCBIST_DATA_ENABLE</id>
+    <description>MCBIST support for enabling data</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MCBIST_DATA_ENABLE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MCBIST_USER_RANK</id>
+    <description>MCBIST support for rank selection</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MCBIST_USER_RANK</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MCBIST_USER_BANK</id>
+    <description>MCBIST support for bank selection</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MCBIST_USER_BANK</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>SCHMOO_MULTIPLE_SETUP_CALL</id>
+    <description>MCBIST for multiple setup</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_SCHMOO_MULTIPLE_SETUP_CALL</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MCBIST_ADDR_MODES</id>
+    <description>Can choose mcbist address mode for full,half or quarter addressing mode.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MCBIST_ADDR_MODES</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MCBIST_RANK</id>
+    <description> Defines the rank for the Mcbist </description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MCBIST_RANK</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MCBIST_START_ADDR</id>
+    <description>Defines the start address for the Mcbist address range</description>
+    <simpleType>
+        <uint64_t>
+        </uint64_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MCBIST_START_ADDR</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MCBIST_END_ADDR</id>
+    <description>Defines the end address for the Mcbist address range</description>
+    <simpleType>
+        <uint64_t>
+        </uint64_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MCBIST_END_ADDR</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MCBIST_ERROR_CAPTURE</id>
+    <description>Enables error capture; basically a flag.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MCBIST_ERROR_CAPTURE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MCBIST_MAX_TIMEOUT</id>
+    <description>Define mcbist Max timeout</description>
+    <simpleType>
+        <uint64_t>
+        </uint64_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MCBIST_MAX_TIMEOUT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MCBIST_PRINT_PORT</id>
+    <description>Enable which port prints are required.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MCBIST_PRINT_PORT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MCBIST_STOP_ON_ERROR</id>
+    <description>Flag to stop Mcbist on Error.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MCBIST_STOP_ON_ERROR</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MCBIST_DATA_SEED</id>
+    <description>Define data seed for the random data pattern or test</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MCBIST_DATA_SEED</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MCBIST_ADDR_INTER</id>
+    <description>The address interleave map with user cases or deafult cases of BANK_RANK,RANK_BANK,BANK_ONLY,RANK_ONLYRANKS_DIMM0,RANKS_DIMM1,USER_PATTERN.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MCBIST_ADDR_INTER</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MCBIST_ADDR_NUM_ROWS</id>
+    <description>User defined constraint for limiting number of rows for addressing.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MCBIST_ADDR_NUM_ROWS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MCBIST_ADDR_NUM_COLS</id>
+    <description>User defined constraint for limiting number of columns for addressing.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MCBIST_ADDR_NUM_COLS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MCBIST_ADDR_RANK</id>
+    <description>User defined constraint for limiting number of ranks for addressing.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MCBIST_ADDR_RANK</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MCBIST_ADDR_BANK</id>
+    <description>User defined constraint for limiting number of banks for addressing.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MCBIST_ADDR_BANK</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MCBIST_ADDR_SLAVE_RANK_ON</id>
+    <description>If slave ranks exists;Restrict usage or enable addressing on them as well.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MCBIST_ADDR_SLAVE_RANK_ON</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MCBIST_ADDR_STR_MAP</id>
+    <description>To Define custom addressing map ; Input by user.</description>
+    <simpleType>
+        <uint64_t>
+        </uint64_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MCBIST_ADDR_STR_MAP</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MCBIST_ADDR_RAND</id>
+    <description>Flag for Addressing to go sequential manner or random.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MCBIST_ADDR_RAND</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PROC_PCIE_REFCLOCK_ENABLE</id>
+    <description>PCIE refclock enable valid mask
+      creator: platform
+      consumer: proc_pcie_scominit
+      firmware notes:
+        Bit mask defining state of refclock drive enables
+        bit0=PCI0, bit1=PCI1, bit2=PCI2, bit3=PCI3
+    </description>
+    <simpleType>
+       <uint8_t>
+       </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_PCIE_REFCLOCK_ENABLE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<enumerationType>
+    <id>PROC_PBIEX_ASYNC_SEL</id>
+    <description>Enumeration indicating which _PBIEX_ASYNC_SEL should be use</description>
+    <enumerator>
+        <name>SEL0</name>
+        <value>0</value>
+    </enumerator>
+    <enumerator>
+        <name>SEL1</name>
+        <value>1</value>
+    </enumerator>
+    <enumerator>
+        <name>SEL2</name>
+        <value>2</value>
+    </enumerator>
+</enumerationType>
+
+<attribute>
+    <id>PROC_PBIEX_ASYNC_SEL</id>
+    <description>Selector for ATTR_PROC_EX_FUNC_L3_DELTA_DATA value to be returned by platform.
+      creator: proc_build_smp
+      firmware notes:
+    </description>
+    <simpleType><uint8_t></uint8_t></simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_PBIEX_ASYNC_SEL</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PROC_DCM_INSTALLED</id>
+    <description>
+      PROC_CHIP Attribute
+        If true, the chip is installed on a Dual Chip Module
+        Provided by the Machine Readable Workbook
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_DCM_INSTALLED</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+
+<!-- === Attributes supporting erepair_thresholds.xml HWPF Attributes === -->
+<attribute>
+    <id>X_EREPAIR_THRESHOLD_FIELD</id>
+    <description>
+      This attribute represents the eRepair threshold value of X-Bus used
+      in the field.
+      creator: platform (generated based on MRW data)
+      See defintion in erepair_thresholds.xml for more information.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+      <uint8_t>
+      </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_X_EREPAIR_THRESHOLD_FIELD</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>A_EREPAIR_THRESHOLD_FIELD</id>
+    <description>
+      This attribute represents the eRepair threshold value of A-Bus used
+      in the field.
+      creator: platform (generated based on MRW data)
+      See defintion in erepair_thresholds.xml for more information.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+      <uint8_t>
+      </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_A_EREPAIR_THRESHOLD_FIELD</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>DMI_EREPAIR_THRESHOLD_FIELD</id>
+    <description>
+      This attribute represents the eRepair threshold value of DMI-Bus used
+      in the field.
+      creator: platform (generated based on MRW data)
+      See defintion in erepair_thresholds.xml for more information.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+      <uint8_t>
+      </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_DMI_EREPAIR_THRESHOLD_FIELD</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>X_EREPAIR_THRESHOLD_MNFG</id>
+    <description>
+      This attribute represents the eRepair threshold value of X-Bus used
+      by Manufacturing.
+      creator: platform (generated based on MRW data)
+      See defintion in erepair_thresholds.xml for more information.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+      <uint8_t>
+      </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_X_EREPAIR_THRESHOLD_MNFG</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>A_EREPAIR_THRESHOLD_MNFG</id>
+    <description>
+      This attribute represents the eRepair threshold value of A-Bus used
+      by Manufacturing.
+      creator: platform (generated based on MRW data)
+      See defintion in erepair_thresholds.xml for more information.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+      <uint8_t>
+      </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_A_EREPAIR_THRESHOLD_MNFG</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>DMI_EREPAIR_THRESHOLD_MNFG</id>
+    <description>
+      This attribute represents the eRepair threshold value of DMI-Bus used
+      by Manufacturing.
+      creator: platform (generated based on MRW data)
+      See defintion in erepair_thresholds.xml for more information.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+      <uint8_t>
+      </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_DMI_EREPAIR_THRESHOLD_MNFG</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+<!-- ===== End Attributes supporting erepair_thresholds.xml HWPF Attributes ===== -->
+
+<!-- Mem PLL attributes ===== -->
+<attribute>
+    <id>MEMB_TP_BNDY_PLL_SCAN_SELECT</id>
+    <description>Scan select for ring image for Centaur tp_bndy_pll ring
+      creator: platform
+      firmware notes:
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0x00100008</default>
+        </uint32_t>
+    </simpleType>
+    <readable/>
+    <persistency>non-volatile</persistency>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MEMB_TP_BNDY_PLL_SCAN_SELECT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_MBA</id>
+    <description>Machine Readable Workbook safe mode throttle value for numerator cfg_nm_n_per_mba</description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_MBA</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_CHIP</id>
+    <description>Machine Readable Workbook safe mode throttle value for numerator cfg_nm_n_per_chip</description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_CHIP</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MRW_THERMAL_MEMORY_POWER_LIMIT</id>
+    <description>Machine Readable Workbook Thermal Memory Power Limit</description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MRW_THERMAL_MEMORY_POWER_LIMIT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_LPASR</id>
+    <description> Low Power Auto Self-Refresh. This is for DDR4 MRS2.  Computed in mss_eff_cnfg. Each memory channel will have a value.
+      creator: mss_eff_cnfg
+      consumer: various
+      firmware notes: none</description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_LPASR</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_MPR_PAGE</id>
+    <description>MPR Page Selection This is for DDR4 MRS3.  Computed in mss_eff_cnfg. Each memory channel will have a value.
+      creator: mss_eff_cnfg
+      consumer: various
+      firmware notes: none</description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_MPR_PAGE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_GEARDOWN_MODE</id>
+    <description>Gear Down Mode. This is for DDR4 MRS3.  Computed in mss_eff_cnfg. Each memory channel will have a value.
+      creator: mss_eff_cnfg
+      consumer: various
+      firmware notes: none</description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_GEARDOWN_MODE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_PER_DRAM_ACCESS</id>
+    <description>Per DRAM accessibility.  This is for DDR4 MRS3.  Computed in mss_eff_cnfg. Each memory channel will have a value.
+      creator: mss_eff_cnfg
+      consumer: various
+      firmware notes: none</description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_PER_DRAM_ACCESS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_TEMP_READOUT</id>
+    <description>Temperature sensor readout. This is for DDR4 MRS3.  Computed in mss_eff_cnfg. Each memory channel will have a value.
+      creator: mss_eff_cnfg
+      consumer: various
+      firmware notes: none</description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_TEMP_READOUT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_FINE_REFRESH_MODE</id>
+    <description>Fine refresh mode. This is for DDR4 MRS3.  Computed in mss_eff_cnfg. Each memory channel will have a value.
+      creator: mss_eff_cnfg
+      consumer: various
+      firmware notes: none</description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_FINE_REFRESH_MODE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CRC_WR_LATENCY</id>
+    <description>write latency for CRC and DM. This is for DDR4 MRS3.  Computed in mss_eff_cnfg. Each memory channel will have a value.
+      creator: mss_eff_cnfg
+      consumer: various
+      firmware notes: none</description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CRC_WR_LATENCY</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_MPR_RD_FORMAT</id>
+    <description>MPR READ FORMAT. This is for DDR4 MRS3.  Computed in mss_eff_cnfg. Each memory channel will have a value.
+      creator: mss_eff_cnfg
+      consumer: various
+      firmware notes: none</description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_MPR_RD_FORMAT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_MAX_POWERDOWN_MODE</id>
+    <description>Max Power down mode. This is for DDR4 MRS4.  Computed in mss_eff_cnfg. Each memory channel will have a value.
+      creator: mss_eff_cnfg
+      consumer: various
+      firmware notes: none</description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_MAX_POWERDOWN_MODE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_TEMP_REF_RANGE</id>
+    <description>Temp ref range. This is for DDR4 MRS4.  Computed in mss_eff_cnfg. Each memory channel will have a value.
+      creator: mss_eff_cnfg
+      consumer: various
+      firmware notes: none</description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_TEMP_REF_RANGE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_TEMP_REF_MODE</id>
+    <description>Temp controlled ref mode. This is for DDR4 MRS4.  Computed in mss_eff_cnfg. Each memory channel will have a value.
+      creator: mss_eff_cnfg
+      consumer: various
+      firmware notes: none</description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_TEMP_REF_MODE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_INT_VREF_MON</id>
+    <description>Internal Vref Monitor.. This is for DDR4 MRS4.  Computed in mss_eff_cnfg. Each memory channel will have a value.
+      creator: mss_eff_cnfg
+      consumer: various
+      firmware notes: none</description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_INT_VREF_MON</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CS_CMD_LATENCY</id>
+    <description>CS to CMD/ADDR Latency. This is for DDR4 MRS4.  Computed in mss_eff_cnfg. Each memory channel will have a value.
+      creator: mss_eff_cnfg
+      consumer: various
+      firmware notes: none</description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CS_CMD_LATENCY</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_SELF_REF_ABORT</id>
+    <description>Self Refresh Abort. This is for DDR4 MRS4.  Computed in mss_eff_cnfg. Each memory channel will have a value.
+      creator: mss_eff_cnfg
+      consumer: various
+      firmware notes: none</description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_SELF_REF_ABORT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_RD_PREAMBLE_TRAIN</id>
+    <description>Read Pre amble Training Mode. This is for DDR4 MRS4.  Computed in mss_eff_cnfg. Each memory channel will have a value.
+      creator: mss_eff_cnfg
+      consumer: various
+      firmware notes: none</description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_RD_PREAMBLE_TRAIN</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_RD_PREAMBLE</id>
+    <description>Read Pre amble. This is for DDR4 MRS4.  Computed in mss_eff_cnfg. Each memory channel will have a value.
+      creator: mss_eff_cnfg
+      consumer: various
+      firmware notes: none</description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_RD_PREAMBLE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_WR_PREAMBLE</id>
+    <description>Write Pre amble. This is for DDR4 MRS4.  Computed in mss_eff_cnfg. Each memory channel will have a value.
+      creator: mss_eff_cnfg
+      consumer: various
+      firmware notes: none</description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_WR_PREAMBLE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CA_PARITY_LATENCY</id>
+    <description>C/A Parity Latency Mode. This is for DDR4 MRS5.  Computed in mss_eff_cnfg. Each memory channel will have a value.
+      creator: mss_eff_cnfg
+      consumer: various
+      firmware notes: none</description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CA_PARITY_LATENCY</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CRC_ERROR_CLEAR</id>
+    <description>CRC Error Clear. This is for DDR4 MRS5.  Computed in mss_eff_cnfg. Each memory channel will have a value.
+      creator: mss_eff_cnfg
+      consumer: various
+      firmware notes: none</description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CRC_ERROR_CLEAR</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CA_PARITY_ERROR_STATUS</id>
+    <description>C/A Parity Error Status. This is for DDR4 MRS5.  Computed in mss_eff_cnfg. Each memory channel will have a value.
+      creator: mss_eff_cnfg
+      consumer: various
+      firmware notes: none</description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CA_PARITY_ERROR_STATUS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_ODT_INPUT_BUFF</id>
+    <description>ODT Input Buffer during power down. This is for DDR4 MRS5.  Computed in mss_eff_cnfg. Each memory channel will have a value.
+      creator: mss_eff_cnfg
+      consumer: various
+      firmware notes: none</description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_ODT_INPUT_BUFF</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_RTT_PARK</id>
+    <description>RTT_Park value. This is for DDR4 MRS5.  Computed in mss_eff_cnfg. Each memory channel will have a value.
+      creator: mss_eff_cnfg
+      consumer: various
+      firmware notes: none</description>
+    <simpleType>
+        <uint8_t></uint8_t>
+        <array>2, 2, 4</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_RTT_PARK</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CA_PARITY</id>
+    <description>CA Parity Persistance Error. This is for DDR4 MRS5.  Computed in mss_eff_cnfg. Each memory channel will have a value.
+      creator: mss_eff_cnfg
+      consumer: various
+      firmware notes: none</description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CA_PARITY</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DATA_MASK</id>
+    <description>Data Mask. This is for DDR4 MRS5.  Computed in mss_eff_cnfg. Each memory channel will have a value.
+      creator: mss_eff_cnfg
+      consumer: various
+      firmware notes: none</description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DATA_MASK</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_WRITE_DBI</id>
+    <description>Write DBI. This is for DDR4 MRS5.  Computed in mss_eff_cnfg. Each memory channel will have a value.
+      creator: mss_eff_cnfg
+      consumer: various
+      firmware notes: none</description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_WRITE_DBI</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_READ_DBI</id>
+    <description>Read DBI. This is for DDR4 MRS5.  Computed in mss_eff_cnfg. Each memory channel will have a value.
+      creator: mss_eff_cnfg
+      consumer: various
+      firmware notes: none</description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_READ_DBI</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_VREF_DQ_TRAIN_VALUE</id>
+    <description>vrefdq_train value. This is for DDR4 MRS6.  Computed in mss_eff_cnfg. Each memory channel will have a value.
+      creator: mss_eff_cnfg
+      consumer: various
+      firmware notes: none</description>
+    <simpleType>
+        <uint8_t></uint8_t>
+        <array>2,2,4</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_VREF_DQ_TRAIN_VALUE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_VREF_DQ_TRAIN_RANGE</id>
+    <description>vrefdq_train range. This is for DDR4 MRS6.  Computed in mss_eff_cnfg. Each memory channel will have a value.
+      creator: mss_eff_cnfg
+      consumer: various
+      firmware notes: none</description>
+    <simpleType>
+        <uint8_t></uint8_t>
+        <array>2,2,4</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_VREF_DQ_TRAIN_RANGE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_VREF_DQ_TRAIN_ENABLE</id>
+    <description>vrefdq_train enable. This is for DDR4 MRS6.  Computed in mss_eff_cnfg. Each memory channel will have a value.
+      creator: mss_eff_cnfg
+      consumer: various
+      firmware notes: none</description>
+    <simpleType>
+        <uint8_t></uint8_t>
+        <array>2,2,4</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_VREF_DQ_TRAIN_ENABLE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>TCCD_L</id>
+    <description>tccd_l. This is for DDR4 MRS6.  Computed in mss_eff_cnfg. Each memory channel will have a value.
+      creator: mss_eff_cnfg
+      consumer: various
+      firmware notes: none</description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_TCCD_L</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_WRITE_CRC</id>
+    <description>Write CRC control for DDR4.  Set in mss_eff_cnfg.  Each memory channel will have a value.
+      creator: mss_eff_cnfg
+      consumer: various
+      firmware notes: none</description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_WRITE_CRC</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_2N_MODE_ENABLED</id>
+    <description>Describes if this MBA is in 2N address mode.  The DIMM attributes associated with this MBA describes if this mode is needed for SI.  The MR Keyword of the VPD gives and indication of the value needed. Set by eff_config and consumed in the mba_def.initfile.</description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_2N_MODE_ENABLED</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_DIMM_POWER_TEST_REV</id>
+    <description>The power test revision number that is saved when data is saved on an ISDIMM.  If the power test changes, then a difference indicates that the power test needs to be rerun.  This attribute needs to stick around between IPLs</description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_DIMM_POWER_TEST_REV</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>FRU_ID</id>
+    <description>FRU ID attribute used to report FRU information to the BMC
+        for each fru in the system.</description>
+    <simpleType><uint32_t><default>0</default></uint32_t></simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>BMC_FRU_ID</id>
+    <description>BMC FRU ID attribute to report the system firmware levels
+        to the BMC.</description>
+    <simpleType><uint32_t><default>0</default></uint32_t></simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>CENTAUR_ECID_FRU_ID</id>
+    <description>FRU ID attribute for centaur ECID data. This fru ID is used to
+        report the ECID data to the BMC and make it available for systems which
+        have then centaur chips soldered to the backplane.</description>
+    <simpleType><uint32_t></uint32_t></simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>PLCK_IPL_ATTR_OVERRIDES_EXIST</id>
+    <description>
+      Set to 1 by HWSV to indicate that attribute overrides exist in a PLCK IPL
+      (not an IPL by steps). This is read by Hostboot to determine if it needs
+      to request the attribute overrides from HWSV before starting its IPL.
+    </description>
+    <simpleType><uint8_t><default>0x00</default></uint8_t></simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>DUMMY_PERSISTENCY</id>
+    <description>Cached value to test persistency</description>
+    <simpleType>
+       <uint8_t>
+          <default>0</default>
+       </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_DUMMY_PERSISTENCY</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>IS_INTER_ENCLOSURE_BUS</id>
+    <description>Indicate an inter-enclosure bus at this endpoint target.
+                 0 = No, 1 = Yes
+    </description>
+    <simpleType>
+        <uint8_t><default>0</default></uint8_t>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>PEER_PATH</id>
+    <description>Entity path of the peer target of an Abus
+    </description>
+    <nativeType>
+        <name>EntityPath</name>
+    </nativeType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>PROC_HTM_BAR_SIZE</id>
+    <description>Desired HTM trace memory size value
+      creator: platform
+      firmware notes:
+        set by platform to request size of per-chip area reserved
+        for HTM trace memory
+    </description>
+    <simpleType>
+        <uint64_t>
+            <default>0</default>
+        </uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_HTM_BAR_SIZE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PROC_OCC_SANDBOX_SIZE</id>
+    <description>Desired size of OCC sandbox memory region
+      creator: platform
+      firmware notes:
+        set by platform to request size of per-chip area reserved
+        for OCC sandbox function
+    </description>
+    <simpleType>
+        <uint64_t>
+            <default>0</default>
+        </uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_OCC_SANDBOX_SIZE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PROC_HTM_BAR_BASE_ADDR</id>
+    <description>HTM trace memory base address allocated
+    </description>
+    <simpleType><uint64_t></uint64_t></simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_HTM_BAR_BASE_ADDR</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PROC_OCC_SANDBOX_BASE_ADDR</id>
+    <description>OCC sandbox base address allocated
+    </description>
+    <simpleType><uint64_t></uint64_t></simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_OCC_SANDBOX_BASE_ADDR</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MEM_MIRROR_PLACEMENT_POLICY</id>
+    <description>Define placement policy/scheme for non-mirrored/mirrored memory
+                 layout
+      creator: platform
+      consumer: opt_memmap
+      firmware notes:
+        NORMAL  = non-mirrored start: 0, mirrored start: 512TB
+        FLIPPED = mirrored start: 0, non-mirrored start: 512TB
+        SELECTIVE = non-mirrored/mirrored start (interleaved): 0
+        DRAWER = non-mirrored start: 1TB*drawer, mirrored start: 512TB+(1TB*drawer/2)
+    </description>
+    <simpleType>
+      <uint8_t>
+            <!-- Normal -->
+            <default>0</default>
+      </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MEM_MIRROR_PLACEMENT_POLICY</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PROC_AS_MMIO_BAR_BASE_ADDR</id>
+    <description>AS MMIO BAR base address value
+      creator: platform
+      consumer: proc_setup_bars
+      firmware notes:
+        64-bit address representing BAR RA
+        NOTE: BAR register covers RA 14:51
+    </description>
+    <simpleType>
+       <uint64_t>
+           <default>0</default>
+       </uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_AS_MMIO_BAR_BASE_ADDR</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PROC_AS_MMIO_BAR_ENABLE</id>
+    <description>AS MMIO BAR enable
+      creator: platform
+      consumer: proc_setup_bars
+      firmware notes: none
+    </description>
+    <simpleType>
+      <uint8_t>
+            <!-- Disabled -->
+            <default>0</default>
+      </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_AS_MMIO_BAR_ENABLE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PROC_AS_MMIO_BAR_SIZE</id>
+    <description>AS MMIO BAR size value
+      creator: platform
+      consumer: proc_setup_bars
+      firmware notes: none
+    </description>
+    <simpleType>
+       <uint64_t>
+           <!-- 2_MB -->
+           <default>0x0000000000200000</default>
+       </uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_AS_MMIO_BAR_SIZE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>RISK_LEVEL</id>
+    <description>
+        Defines risk level to consider for initialization values applied during IPL.
+        Risk level 0 should contain solutions for all known errata, and may sacrifice performance to avoid data integrity issue/error checking cases.
+        Risk level 0x100 may introduce data integrity/error scenarios to provide full performance or visibility to state space/coverage behind known issues.
+    </description>
+    <simpleType><uint32_t></uint32_t></simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_RISK_LEVEL</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_FREQ_BIAS_PERCENTAGE</id>
+    <description>
+        Percentage to increase/decrease MEM frequency. two's complement number.
+        Measured in 100's.  So the value of 100 is one percent increase.
+        This frequency change comes from changing multipliers and dividers to
+        get the desired frequency. The supported frequencies come from
+        Tim Diemoz.
+        Creator: platform set this to 0.  Users can set this to a valid value.
+    </description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_FREQ_BIAS_PERCENTAGE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MRW_MEM_SENSOR_CACHE_ADDR_MAP</id>
+    <description>Machine Readable Workbook value detailing the wiring of the
+                 8 dimm temperature sensors for non custom dimms, in DIMM A0,
+                 A1,B0,B1,C0,C1,D0,D1 order. One nibble per sensor where
+                 bit0 (MSB) is the i2c bus the sensor is attached to
+                 (0 for master, 1 for spare) and bits 1:3 are for A2,A1,A0
+                 of the sensor i2c address (where A2 is MSB)
+    </description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MRW_MEM_SENSOR_CACHE_ADDR_MAP</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>CDIMM_SENSOR_MAP_PRIMARY</id>
+    <description>
+        Custom DIMM Sensor Map for Primary I2C Port (1 byte of data):
+            0x00 No sensors attached
+            0x01 DIMM sensor 0 attached
+            0x02 DIMM sensor 1 attached
+            0x04 DIMM sensor 2 attached
+            0x08 DIMM sensor 3 attached
+            0x10 DIMM sensor 4 attached
+            0x20 DIMM sensor 5 attached
+            0x40 DIMM sensor 6 attached
+            0x80 DIMM sensor 7 attached
+            Comes from the VPD MW Keyword
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_CDIMM_SENSOR_MAP_PRIMARY</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>CDIMM_SENSOR_MAP_SECONDARY</id>
+    <description>
+        Custom DIMM Sensor Map for Secondary I2C Port (1 byte of data):
+            0x00 No sensors attached
+            0x01 DIMM sensor 0 attached
+            0x02 DIMM sensor 1 attached
+            0x04 DIMM sensor 2 attached
+            0x08 DIMM sensor 3 attached
+            0x10 DIMM sensor 4 attached
+            0x20 DIMM sensor 5 attached
+            0x40 DIMM sensor 6 attached
+            0x80 DIMM sensor 7 attached
+            Comes from the VPD MW Keyword
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_CDIMM_SENSOR_MAP_SECONDARY</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_ADDRESS_MIRRORING</id>
+    <description>
+        Address mirroring on the DIMM by rank, up to 4 ranks.
+            0x08 means rank 0 is mirrored
+            0x04 means rank 1 is mirrored
+            0x02 means rank 2 is mirrored
+            0x01 means rank 3 is mirrored
+        Comes from EFF config reading the VPD_DRAM_ADDRESS_MIRRORING from the
+        AM keyword of the VPD.
+    </description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2,2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_ADDRESS_MIRRORING</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_BLUEWATERFALL_BROKEN</id>
+    <description>
+        Set by the platform depending on DD1.0X vs DD1.03 or newer. If true,
+        then draminit_train will modify dqs_clk_ps and gate to work around the
+        issue. Set in get ecid which determines if we are at 1.03
+    </description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_BLUEWATERFALL_BROKEN</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>CDM_POLICIES</id>
+    <description>
+        Cec Degraded Mode Policy flags
+        Use the CDM_POLICIES enum to decode.
+        If the appropriate bit is 1 then the policy mode is enabled,
+        and those type of Guard records are disabled.
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0x00</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <writeable/>
+    <readable/>
+</attribute>
+
+<enumerationType>
+    <id>CDM_POLICIES</id>
+    <description>Enumeration of CDM_POLICIES flags</description>
+    <enumerator>
+        <description>
+        MFG_Guard policy:
+        Used in MFG only to prevent and disable the following:
+        . Storing or creation of new Guard records from Diagno`stic or other
+            faults through error logs. This is all domains, CEC
+            processor/memory, VPD, FSP, etc.
+        . Storing or creation of Manual Guard record from user.
+            NOTE: this does not stop FCO.
+        . Using an already stored System or Manual Guard record from
+            deconfiguring resources. This is all domains, CEC
+            processor/memory, VPD, FSP, etc.
+        </description>
+        <name>MANUFACTURING_DISABLED</name>
+        <value>0x01</value>
+    </enumerator>
+    <enumerator>
+        <description>
+        Predictive_Guard policy:
+        Used in Field or development to prevent and disable the following:
+        . Storing or creation of new Guard records from diagnostics or other
+            faults through error logs with the error_type of Predictive.
+        . Using an already stored System Guard record with error_type of
+            Predictive from deconfiguring resources.
+        </description>
+        <name>PREDICTIVE_DISABLED</name>
+        <value>0x02</value>
+    </enumerator>
+</enumerationType>
+
+<attribute>
+    <id>FIELD_CORE_OVERRIDE</id>
+    <description>Field Core Override (FCO) is the override value for the
+    number of functional cores allowed on the system.
+    FCO is used when customers order a system with N cores but they only want
+    to enable less than N cores to lower software license costs. A field in the
+    anchor VPD is set by manufacturing to specify the maximum number of cores
+    to enable. The number is maintained, even if some cores are garded out due
+    to error.
+    A value of 0 means all cores allowed;
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>HOSTSVC_PLID</id>
+    <description>
+        Value of the next PLID that host service should send
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0x89000000</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>RUN_MAX_MEM_PATTERNS</id>
+    <description>
+        Policy indicating whether to perform the maximum amount of memory
+            pattern testing possible or not.
+        Set to 0x01 to perform the maximum amount of memory pattern testing
+            possible.
+        Set to 0x00 to perform the default amount of memory pattern testing.
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>EFF_RLO</id>
+    <description>Gives the RLO value to use for this port.  This comes from the MR Keyword of the VPD gives and indication of the value.  It will be writable until it comes from VPD. The value is a positive integer number.</description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_RLO</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_WLO</id>
+    <description>Read Latency Offset value that is used in the phy.  This value  comes from the MR keyword of the VPD</description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_WLO</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_GPO</id>
+    <description>Global Phy Offset value that is used in setting up the phy.  This value comes from the MR keyword of the VPD</description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_GPO</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CKE_PRI_MAP</id>
+    <description>Contains the CKE MAP for the DIMM being plugged in.  It comes from the MT keyword but is not on a port basis --- meaning this Attribute may be split: with 16 bits associated with port A data and 16 bits with B. This value goes directly into the MBA01 Rank-to-primary-CKE mapping table register bits 0:31 (MBA01_MBAREF1Q) register. This attribute is writeable until it comes from the VPD</description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CKE_PRI_MAP</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_CKE_PWR_MAP</id>
+    <description>Contains the CKE Power Domain mapping tables for the DIMM being plugged in.  It comes from the MT keyword but is not on a port basis --- meaning this Attribute may be split: with 32 bits associated with port A data and 32 bits with B. This value goes directly into the MBA01 Rank-to-CKE power domain mapping table bits 0:33 (MBA01_MBARPC1Q) register. This attribute is writeable until it comes from the VPD</description>
+    <simpleType>
+        <uint64_t>
+            <default>0</default>
+        </uint64_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_CKE_PWR_MAP</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_RDTAG</id>
+    <description>Read Tag value that is used in setting up the phy.  It is expected that this value will come from the VPD</description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_RDTAG</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_TSYS_ADR</id>
+    <description>TSYS for all address blocks in the MBA pair. This value comes from the MR keyword of the VPD</description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_TSYS_ADR</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_TSYS_DP18</id>
+    <description>TSYS for all DP18 blocks in the MBA pair.  This value comes from the MR keyword of the VPD</description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_TSYS_DP18</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DQ_WR_OFFSET</id>
+    <description>DQ write offset value that is used in setting up the phy's phase rotators before WR_LVL, 0x40 is HW Default.  It is expected that this value will come from the VPD</description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DQ_WR_OFFSET</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_BUFFER_LATENCY</id>
+    <description>Additional buffer latency in the case of RDIMMs and LRDIMMs.    It is expected that this value will come from the VPD</description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_BUFFER_LATENCY</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>LRDIMM_MR12_REG</id>
+    <description>LRDIMM MR1,2 register.
+     DRAM Rtt_WR for all ranks, DRAM Rtt_Nom for ranks 0 and 1, DRAM driver impedance for all ranks.  Eff config should set this up.</description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+        <array>2,2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_LRDIMM_MR12_REG</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>LRDIMM_ADDITIONAL_CNTL_WORDS</id>
+    <description>LRDIMM additional RCD control words as set by DIMM SPD:
+     F[3,4]RC10, F[3,4]RC11, F[5,6]RC10, F[5,6]RC11, F[7,8]RC10, F[7,8]RC11, F[9,10]RC10, F[9,10]RC11,
+     F[1]RC8, F[3]RC9, F[3]RC8, F[1]RC11, F[1]RC12, F[1]RC13, F[1]RC14, F[1]RC15.
+     Eff config should set this up</description>
+    <simpleType>
+        <uint64_t>
+            <default>0</default>
+        </uint64_t>
+        <array>2,2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_LRDIMM_ADDITIONAL_CNTL_WORDS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>LRDIMM_RANK_MULT_MODE</id>
+    <description>LRDIMM rank multiplication mode.
+     Will be set at an MBA level with one policy to be used</description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_LRDIMM_RANK_MULT_MODE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SPWUP_IGNORE_XSTOP_FLAG</id>
+    <description>Flag storage to have the Special Wakeup procedure ignore a checkstop condition.</description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SPWUP_IGNORE_XSTOP_FLAG</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>CPM_INFLECTION_POINTS</id>
+    <description>Structure to communicate the CPM inflection points from the CPM code to the Pstate code
+    Datablock consisting of:
+        8 Inflection Point frequency entries (binary in ATTR_FREQ_PROC_REFCLOCK_KHZ / ATTR_PROC_DPLL_DIVIDER units)
+        1 ValidRanges entry - the number of valid inflection points in the previous locations (unit origin)
+        1 pMax frequency entry - the maximum allowed boosted frequency (binary in ATTR_FREQ_PROC_REFCLOCK_KHZ / ATTR_DPLL_DIVIDER units)
+        6 spare entries
+    Producer: p8_cpm_cal_load
+    Consumer: p8_pstate_datablock
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+        <array>16</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_CPM_INFLECTION_POINTS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>LAB_USE_JTAG_MODE</id>
+    <description>This attribute controls how the procedures operate in JTAG mode under an environment called cronus flex.  For normal operation, this attribute should be set to FALSE. Platforms should initialize this attribute to FALSE.</description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_LAB_USE_JTAG_MODE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_CONTROL_SWITCH</id>
+    <description>This attribute enables control switches in the memory code.  This is a one hot vector:  Bit 7 controls the Bad Bit Mask function in draminit_training. The platform should initialize this to BBM_ON except if ATTR_LAB_USE_JTAG_MODE == TRUE, then the platform should set this attribute to BBM_ OFF.</description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_CONTROL_SWITCH</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<!--
+<attribute>
+    <id>MSS_DRAM_ACTIVATE_POWER_PERCENT</id>
+    <description>DRAM Activation power percentage to determine the ras and cas weights for throttle controls
+        will originates from VPD for custom DIMMs in the MW keyword byte 5 (MSB is on the left(big endian))
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_DRAM_ACTIVATE_POWER_PERCENT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+-->
+
+<attribute>
+    <id>MSS_THROTTLE_CONTROL_RAS_WEIGHT</id>
+    <description>RAS weight to use for memory throttle control</description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_THROTTLE_CONTROL_RAS_WEIGHT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_THROTTLE_CONTROL_CAS_WEIGHT</id>
+    <description>CAS weight to use for memory throttle control</description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_THROTTLE_CONTROL_CAS_WEIGHT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+  <id>PROC_MIRROR_BASES_ACK</id>
+  <description>Mirrored memory base addresses
+      creator: mss_setup_bars
+      consumer: consumer: opt_mem_map
+      Mem opt map uses this for the bases of the mirror ranges.
+        (max number based on Venice design)
+  </description>
+  <simpleType>
+      <uint64_t></uint64_t>
+      <array>4</array>
+  </simpleType>
+  <persistency>volatile-zeroed</persistency>
+  <readable/>
+  <writeable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_PROC_MIRROR_BASES_ACK</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+  <id>PROC_MIRROR_SIZES_ACK</id>
+  <description>Size of mirrored memory region up to a power of 2
+      creator: mss_setup_bars
+      consumer: opt_mem_map
+      Mem opt map uses this to stack mirror ranges.  The real amount of memory behind the mirror group maybe less than the number reported here if there are memory holes
+  </description>
+  <simpleType>
+      <uint64_t></uint64_t>
+      <array>4</array>
+  </simpleType>
+  <persistency>volatile-zeroed</persistency>
+  <readable/>
+  <writeable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_PROC_MIRROR_SIZES_ACK</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+  <id>PROC_MEM_BASES_ACK</id>
+  <description>Non-mirrored memory base addresses
+    creator: mss_setup_bars
+    consumer: opt_mem_map
+    Mem opt map uses this for the bases of the non-mirror ranges.
+      (max number based on Venice design)
+  </description>
+  <simpleType>
+      <uint64_t></uint64_t>
+      <array>8</array>
+  </simpleType>
+  <persistency>volatile-zeroed</persistency>
+  <readable/>
+  <writeable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_PROC_MEM_BASES_ACK</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+  <id>PROC_MEM_SIZES_ACK</id>
+  <description>Size of non-mirrored memory regions up to a power of 2
+    creator: mss_setup_bars
+    consumer: opt_mem_map
+    Mem opt map uses this to stack mirror ranges.  The real amount of memory behind the mirror group maybe less than the number reported here if there are memory holes
+  </description>
+  <simpleType>
+      <uint64_t></uint64_t>
+      <array>8</array>
+  </simpleType>
+  <persistency>volatile-zeroed</persistency>
+  <readable/>
+  <writeable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_PROC_MEM_SIZES_ACK</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MCBIST_RANDOM_SEED_VALUE</id>
+    <description>Controls the MCBIST engine in the centaur chip.  The value will be set in mss_eff_config_shmoo.</description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MCBIST_RANDOM_SEED_VALUE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MCBIST_RANDOM_SEED_TYPE</id>
+    <description>Controls the MCBIST engine in the centaur chip.  The value will be set in mss_eff_config_shmoo.</description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MCBIST_RANDOM_SEED_TYPE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PROC_BOOT_VOLTAGE_VID</id>
+    <description>
+        Proc Boot Voltage
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_BOOT_VOLTAGE_VID</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>DISABLE_I2C_ACCESS</id>
+    <description>
+      Set to skip physical access to i2c interface in SBE execution.
+      Consumed by SBE hooks to permit skipping of selected code when
+      running on a test platform (i.e., wafer) which does not have a physical
+      SEEPROM connected.
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <hasStringConversion/>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_DISABLE_I2C_ACCESS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PROC_REFCLOCK_RCVR_TERM</id>
+    <description>
+        Defines system specific value of processor refclock receiver termination (FSI GP4 bits 8:9)
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <group>SYS_POLICIES</group>
+    <persistency>non-volatile</persistency>
+    <hasStringConversion/>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_REFCLOCK_RCVR_TERM</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PCI_REFCLOCK_RCVR_TERM</id>
+    <description>
+        Defines system specific value of PCI refclock receiver termination (FSI GP4 bits 10:11)
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <group>SYS_POLICIES</group>
+    <persistency>non-volatile</persistency>
+    <hasStringConversion/>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PCI_REFCLOCK_RCVR_TERM</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MEMB_DMI_REFCLOCK_RCVR_TERM</id>
+    <description>
+        Defines system specific value of DMI refclock receiver termination (FSI GP4 bits 8:9)
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <hasStringConversion/>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MEMB_DMI_REFCLOCK_RCVR_TERM</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MEMB_DDR_REFCLOCK_RCVR_TERM</id>
+    <description>
+        Defines system specific value of DDR refclock receiver termination (FSI GP4 bits 10:11)
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <hasStringConversion/>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MEMB_DDR_REFCLOCK_RCVR_TERM</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MEM_FILTER_PLL_SOURCE</id>
+    <description>
+        Defines source of MEM filter PLL input (FSI GP4 bit 23)
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <hasStringConversion/>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MEM_FILTER_PLL_SOURCE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MULTI_SCOM_BUFFER_MAX_SIZE</id>
+    <description>To represent different sizes of Multiscom Buffer.
+    It can take 11 different values
+    MULTI_SCOM_BUFFER_SIZE_1KB   = 0x0000000000000400,
+    MULTI_SCOM_BUFFER_SIZE_2KB   = 0x0000000000000800,
+    MULTI_SCOM_BUFFER_SIZE_4KB   = 0x0000000000001000,
+    MULTI_SCOM_BUFFER_SIZE_8KB   = 0x0000000000002000,
+    MULTI_SCOM_BUFFER_SIZE_16KB  = 0x0000000000004000,
+    MULTI_SCOM_BUFFER_SIZE_32KB  = 0x0000000000008000,
+    MULTI_SCOM_BUFFER_SIZE_64KB  = 0x0000000000010000,
+    MULTI_SCOM_BUFFER_SIZE_128KB = 0x0000000000020000,
+    MULTI_SCOM_BUFFER_SIZE_256KB = 0x0000000000040000,
+    MULTI_SCOM_BUFFER_SIZE_512KB = 0x0000000000080000,
+    MULTI_SCOM_BUFFER_SIZE_1MB   = 0x0000000000100000
+    </description>
+    <simpleType>
+      <uint64_t>
+            <default>0x0000000000001000</default>
+      </uint64_t>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MULTI_SCOM_BUFFER_MAX_SIZE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<enumerationType>
+    <id>MULTI_SCOM_BUFFER_MAX_SIZE_BIT</id>
+    <description>Enumeration indicating the multi scome
+        buffer size. The values can be combined using a
+        bitwise 'OR'.  The values will need to be kept
+        in sync with the FAPI enumerator values.  Also
+        the enumeration type is used by the
+        ATTR_MULTI_SCOM_BUFFER_MAX_SIZE.  Should
+        note that the MULTI_SCOM_BUFFER_MAX_SIZE values
+        are of type uint32_t
+    </description>
+    <enumerator>
+        <name>MULTI_SCOM_BUFFER_SIZE_1KB</name>
+        <value>0x00000400</value>
+    </enumerator>
+    <enumerator>
+        <name>MULTI_SCOM_BUFFER_SIZE_2KB</name>
+        <value>0x00000800</value>
+    </enumerator>
+    <enumerator>
+        <name>MULTI_SCOM_BUFFER_SIZE_4KB</name>
+        <value>0x00001000</value>
+    </enumerator>
+    <enumerator>
+        <name>MULTI_SCOM_BUFFER_SIZE_8KB</name>
+        <value>0x00002000</value>
+    </enumerator>
+    <enumerator>
+        <name>MULTI_SCOM_BUFFER_SIZE_16KB</name>
+        <value>0x00004000</value>
+    </enumerator>
+    <enumerator>
+        <name>MULTI_SCOM_BUFFER_SIZE_32KB</name>
+        <value>0x00008000</value>
+    </enumerator>
+    <enumerator>
+        <name>MULTI_SCOM_BUFFER_SIZE_64KB</name>
+        <value>0x00010000</value>
+    </enumerator>
+    <enumerator>
+        <name>MULTI_SCOM_BUFFER_SIZE_128KB</name>
+        <value>0x00020000</value>
+    </enumerator>
+    <enumerator>
+        <name>MULTI_SCOM_BUFFER_SIZE_256KB</name>
+        <value>0x00040000</value>
+    </enumerator>
+    <enumerator>
+        <name>MULTI_SCOM_BUFFER_SIZE_512KB</name>
+        <value>0x00080000</value>
+    </enumerator>
+    <enumerator>
+        <name>MULTI_SCOM_BUFFER_SIZE_1MB</name>
+        <value>0x00100000</value>
+    </enumerator>
+</enumerationType>
+
+<attribute>
+    <id>DMI_DFE_OVERRIDE</id>
+    <description>
+      Defines where to apply DMI bus DFE override settings for HW244323.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_DMI_DFE_OVERRIDE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PROC_VRM_VOFFSET_VDD</id>
+    <description>
+      Offset voltage (binary in microvolts) to apply to the VDD VRM distribution to
+      the processor module.  This value is applied to each processor instance.
+
+      Producer:  Machine Readable Workbook (via the power subsystem design per system)
+
+      Consumer: p8_build_gpstate_table.C
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_VRM_VOFFSET_VDD</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PROC_VRM_VOFFSET_VCS</id>
+    <description>
+      Offset voltage (binary in microvolts) to apply to the VCS VRM distribution to
+      the processor module.  This value is applied to each processor instance.
+
+      Producer:  Machine Readable Workbook (via the power subsystem design per system)
+
+      Consumer: p8_build_gpstate_table.C
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_VRM_VOFFSET_VCS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>CPM_TURBO_BOOST_PERCENT</id>
+    <description>
+     Percent of Boost Above Turbo for CPMs - (binary in 0.1 percent steps)
+
+     Used in generating extra Pstate tables beyond those that would result from
+     #V data.
+
+     Producer:  DEF file as this is CCIN based
+
+     Consumers: p8_build_gpstate_table.C, p8_cpm_cal_load.C
+
+     Platform default:  0
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_CPM_TURBO_BOOST_PERCENT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PROC_R_LOADLINE_VDD</id>
+    <description>
+      Impedance (binary microOhms) of the load line from a processor VDD VRM to the
+      Processor Module pins.  This value is applied to each processor instance.
+
+      Consumers: p8_build_gpstate_table.C
+
+      Provided by the Machine Readable Workbook (via the power subsystem design
+      per system)
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_R_LOADLINE_VDD</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PROC_R_LOADLINE_VCS</id>
+    <description>
+      Impedance (binary microOhms) of the load line from a processor VCS VRM to the
+      Processor Module pins.  This value is applied to each processor instance.
+
+      Producer:  Machine Readable Workbook (via the power subsystem design per system)
+
+      Consumer: p8_build_gpstate_table.C
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_R_LOADLINE_VCS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PROC_R_DISTLOSS_VDD</id>
+    <description>
+      Impedance (binary in microOhms) of the VDD distribution loss sense point
+      to the circuit. This value is applied to each processor instance.
+
+      Producer:  Machine Readable Workbook (via the power subsystem design per system)
+
+      Consumer: p8_build_gpstate_table.C
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_R_DISTLOSS_VDD</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PROC_R_DISTLOSS_VCS</id>
+    <description>
+      Impedance (binary in microOhms) of the VCS distribution loss sense point
+      to the circuit. This value is applied to each processor instance.
+
+      Producer:  Machine Readable Workbook (via the power subsystem design per system)
+
+      Consumer: p8_build_gpstate_table.C
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PROC_R_DISTLOSS_VCS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_UNDERVOLTING_FRQ_MINIMUM</id>
+    <description>
+      Override for Minimum frequency for which undervolting is allowed.
+
+      If value = 0, the value of VPD CPMin data point is passed to OCC FW via
+      Pstate SuperStructure.
+
+      If value != 0, this value will be passed to OCC FW via Pstate SuperStructure
+      as the floor frequency for enabled CPMs.
+
+      Will be internally rounded to the nearest ATTR_PROC_REFCLK_FREQUENCY / 8 value.
+
+      Consumer: OCC FW; OCC Lab Tools
+
+      Provided by the Machine Readable Workbook.
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_UNDERVOLTING_FRQ_MINIMUM</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_UNDERVOLTING_FREQ_MAXIMUM</id>
+    <description>
+      Override for Maximum frequency for which undervolting is allowed.
+
+      If value = 0, the value of VPD Turbo data point is passed to OCC FW via
+      Pstate SuperStructure.
+
+      If value != 0, this value will be passed to OCC FW via Pstate SuperStructure
+      as the ceiling frequency for enabled CPMs.
+
+      Will be internally rounded to the nearest ATTR_PROC_REFCLK_FREQUENCY / 8 value.
+
+      Consumer: OCC FW; OCC Lab Tools
+
+      Provided by the Machine Readable Workbook.
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_UNDERVOLTING_FREQ_MAXIMUM</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_WINKLE_ENTRY</id>
+    <description>Setting depends on di/dt charateristics of the system.
+
+        Set Assisted if power off serialization is needed and WINKLE_TYPE=Fast;
+        Set to Hardware if the system can handle the unrelated powering off between cores.
+        Hardware setting decreases entry latency
+
+        Producer: MRWB
+
+        Consumer:  p8_poreslw_init.C
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_WINKLE_ENTRY</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_WINKLE_EXIT</id>
+    <description>Setting depends on di/dt charateristics of the system and the setting of ATTR_PM_WINKLE_TYPE.
+
+        Set to Assisted if power on serialization is needed and WINKLE_TYPE=Fast;  Set to Hardware if the system
+        can handle the unrelated powering off between cores.  Hardware setting decreases entry latency.
+        Must be set to Assisted if ATTR_PM_WINKLE_TYPE=Deep as this necessary for restore.
+
+        Setting to Hardware is a test mode for Fast only.
+
+        Producer: MRWB
+
+        Consumer:  p8_poreslw_init.C
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_WINKLE_EXIT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<enumerationType>
+    <id>PROC_MASTER_TYPE</id>
+    <description>
+        Enumeration indicating the role of proc as master/alt_master/not_master
+    </description>
+    <enumerator>
+        <name>ACTING_MASTER</name>
+        <value>0</value>
+    </enumerator>
+    <enumerator>
+        <name>MASTER_CANDIDATE</name>
+        <value>1</value>
+    </enumerator>
+    <enumerator>
+        <name>NOT_MASTER</name>
+        <value>2</value>
+    </enumerator>
+    <default>NOT_MASTER</default>
+</enumerationType>
+
+<attribute>
+    <id>PROC_MASTER_TYPE</id>
+    <description>Type of Master, ACTING_MASTER or MASTER_CANDIDATE or
+      NOT_MASTER</description>
+    <simpleType>
+        <uint8_t>
+            <default>NOT_MASTER</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <hasStringConversion/>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+  <id>MSS_DATABUS_UTIL_PER_MBA</id>
+  <description>MBA DRAM data bus utilization percent to use to determine cfg_nm_n_per_mba</description>
+  <simpleType>
+      <uint8_t></uint8_t>
+  </simpleType>
+  <persistency>volatile-zeroed</persistency>
+  <readable/>
+  <writeable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_MSS_DATABUS_UTIL_PER_MBA</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+  <id>MSS_UTIL_N_PER_MBA</id>
+  <description>cfg_nm_n_per_mba throttle N value that was calculated from MSS_DATABUS_UTIL_PER_MBA</description>
+  <simpleType>
+      <uint32_t></uint32_t>
+  </simpleType>
+  <persistency>volatile-zeroed</persistency>
+  <readable/>
+  <writeable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_MSS_UTIL_N_PER_MBA</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFFECTIVE_EC</id>
+    <description>
+        Holds the effective EC of the system.  Effective EC is the lowest EC
+        among all the functional procs in the system.  Some cards may "downbin"
+        the effective ECs of their contained processors, which could lower the
+        effective EC of the system beyond what would occur when considering
+        processor ECs alone
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0x10</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+  <id>PROC_PBA_UNTRUSTED_BAR_BASE_ADDR</id>
+    <description>PBA Untrusted BAR base address (secure mode)
+      creator: platform
+      firmware notes:
+        64-bit address representing BAR RA
+    </description>
+  <simpleType>
+      <uint64_t></uint64_t>
+  </simpleType>
+  <persistency>volatile-zeroed</persistency>
+  <readable/>
+  <writeable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_PROC_PBA_UNTRUSTED_BAR_BASE_ADDR</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+  <id>PROC_PBA_UNTRUSTED_BAR_SIZE</id>
+    <description>PBA Untrusted BAR size (secure mode)
+      creator: platform
+      firmware notes:
+        mask applied to RA 23:43
+    </description>
+  <simpleType>
+      <uint64_t></uint64_t>
+  </simpleType>
+  <persistency>volatile-zeroed</persistency>
+  <readable/>
+  <writeable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_PROC_PBA_UNTRUSTED_BAR_SIZE</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+<attribute>
+    <id>MRU_ID</id>
+    <description>MRU ID attribute for chip/unit class</description>
+    <simpleType>
+        <uint32_t>
+            <default>0x00</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>MSS_INIT_STATE</id>
+    <description>How far into the ipl istep the centaur has been brought up</description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_INIT_STATE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+  <id>PROC_PCIE_IOP_TX_FFE_GEN1</id>
+    <description>
+      creator: platform (MRW)
+      consumer: proc_pcie_scominit
+      notes:
+        PCIe TX FFE (Gen1)
+        First array index: IOP number (0:2)
+        Second array index: Lane number (0:15)
+    </description>
+  <simpleType>
+      <uint32_t></uint32_t>
+      <array>3,16</array>
+  </simpleType>
+  <persistency>non-volatile</persistency>
+  <readable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_PROC_PCIE_IOP_TX_FFE_GEN1</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+  <id>PROC_PCIE_IOP_TX_FFE_GEN2</id>
+    <description>
+      creator: platform (MRW)
+      consumer: proc_pcie_scominit
+      notes:
+        PCIe TX FFE (Gen2)
+        First array index: IOP number (0:2)
+        Second array index: Lane number (0:15)
+    </description>
+  <simpleType>
+      <uint32_t></uint32_t>
+      <array>3,16</array>
+  </simpleType>
+  <persistency>non-volatile</persistency>
+  <readable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_PROC_PCIE_IOP_TX_FFE_GEN2</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MRW_DIMM_POWER_CURVE_PERCENT_UPLIFT</id>
+    <description>Machine Readable Workbook DIMM power curve percent uplift for this system</description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MRW_DIMM_POWER_CURVE_PERCENT_UPLIFT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MRW_DIMM_POWER_CURVE_PERCENT_UPLIFT_IDLE</id>
+    <description>
+            Machine Readable Workbook DIMM power
+            curve percent uplife idle for this system
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MRW_DIMM_POWER_CURVE_PERCENT_UPLIFT_IDLE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MRW_MEM_THROTTLE_DENOMINATOR</id>
+    <description>Machine Readable Workbook throttle value for denominator cfg_nm_m</description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MRW_MEM_THROTTLE_DENOMINATOR</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MRW_MAX_DRAM_DATABUS_UTIL</id>
+    <description>Machine Readable Workbook value for maximum dram data bus utilization in centi percent (c%).  Used to determine memory throttle values.</description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MRW_MAX_DRAM_DATABUS_UTIL</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>RECONFIGURE_LOOP</id>
+    <description>
+        Used to inidicate if a reconfigure loop is needed.
+        Hostboot clears and sets this during istep dispatching.
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_RECONFIGURE_LOOP</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<enumerationType>
+    <id>RECONFIGURE_LOOP</id>
+    <description>Enumeration of RECONFIGURE_LOOP flags</description>
+    <!-- add enumerators (single bits) for anything that needs a reconfigure loop -->
+    <enumerator>
+        <description>
+            Indicates HW has been deconfigured
+        </description>
+        <name>DECONFIGURE</name>
+        <value>0x01</value>
+    </enumerator>
+    <enumerator>
+        <description>
+            Indicates a bad DQ bit was set in the BadDqBitmap
+        </description>
+        <name>BAD_DQ_BIT_SET</name>
+        <value>0x02</value>
+    </enumerator>
+</enumerationType>
+
+<attribute>
+    <id>PM_SYSTEM_IVRMS_ENABLED</id>
+    <description>System control to allow (if all other attribute tests yield true values) or categorically disallow IVRM enablement
+     Producer: MRWB
+     Consumer:  p8_build_pstate_datablock.C
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SYSTEM_IVRMS_ENABLED</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SYSTEM_IVRM_VPD_MIN_LEVEL</id>
+    <description>Version level of #M that represents the minimum for IVRM characterized parts.
+     If this value is non-zero and the #M version level is less than this value, IVRMs are disabled.
+     If the #M version is greater than or equal to this value, the IVRMs are allowed to be enable from a level of part perspective.
+     Producer: MRWB
+     Consumer:  p8_build_pstate_datablock.C
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SYSTEM_IVRM_VPD_MIN_LEVEL</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SLW_DEEP_WINKLE_EXIT_GOOD_HALT_ADDR</id>
+    <description>
+    Stores the offset in SLW image of the halt point for a good Deep Winkle Exit transition.
+    This is value may used by FAPI code to check that the SLW engine achieved an expected state.
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SLW_DEEP_WINKLE_EXIT_GOOD_HALT_ADDR</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SLW_DEEP_SLEEP_EXIT_GOOD_HALT_ADDR</id>
+    <description>
+    Stores the offset in SLW image of the halt point for a good Deep Sleep Exit transition.
+    This is value may used by FAPI code to check that the SLW engine achieved an expected state.
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SLW_DEEP_SLEEP_EXIT_GOOD_HALT_ADDR</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_EFF_VPD_VERSION</id>
+    <description>
+        The lowest VPD Version of the DIMMs attached to the MBA. Comes directly (in ASCII) of the VINI VZ keyword
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_EFF_VPD_VERSION</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>DISABLE_SCRUB_AFTER_PATTERN_TEST</id>
+    <description>
+        1 = disable scrub after memdiags pattern test. 0 = scrub after memdiags pattern test.
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_DISABLE_SCRUB_AFTER_PATTERN_TEST</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_PCBS_FSM_TRACE_EN</id>
+    <description>
+    Overridable attribute to allow for PCBS FSM tracing by Power Management procedures
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_PCBS_FSM_TRACE_EN</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_GLOBAL_FIR_TRACE_EN</id>
+    <description>
+    Overridable attribute to allow for Global checkstop and recoverable FIR tracing by Power Management procedures
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_GLOBAL_FIR_TRACE_EN</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_DERIVED_MBA_CACHELINE_INTERLEAVE_MODE</id>
+    <description>Value of on or off.  On is 256 bit interleave.  Off, the translation is on 128  bit interleave mode.  See centaur workbook chapter 5.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_DERIVED_MBA_CACHELINE_INTERLEAVE_MODE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MRW_STRICT_MBA_PLUG_RULE_CHECKING</id>
+    <description>
+       The MRW for a system should set this to TRUE for systems that must obey plug rules.  Lab environments should default this to off and allow the user to override using normal methods to test.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MRW_STRICT_MBA_PLUG_RULE_CHECKING</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_DERIVED_MBA_ADDR_INTERLEAVE_BIT</id>
+    <description>This dial sets the Centaur address bits used to interleave addresses between MBA01 and MBA23.  Valid values are 23 through 32.  See Centaur Spec Chapter 5 for details.   Used in the intifile </description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_DERIVED_MBA_ADDR_INTERLEAVE_BIT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MRW_MBA_CACHELINE_INTERLEAVE_MODE_CONTROL</id>
+    <description>At a system level, this attribute controls if interleaving is required, requested or never.  The MRW.</description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MRW_MBA_CACHELINE_INTERLEAVE_MODE_CONTROL</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_HWP_ATTR_VERSION</id>
+    <description>Defines HWP version to be checked inside HWPs to determine if new code should be loaded/skipped/modified/etc.</description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_HWP_ATTR_VERSION</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>REDUNDANT_CLOCKS</id>
+    <description>
+        1 = System has redundant clock oscillators
+        0 = System does not have redundant clock oscillators
+        From the Machine Readable Workbook
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_REDUNDANT_CLOCKS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_NEST_CAPABLE_FREQUENCIES</id>
+    <description>
+        The NEST frequencies the memory chip can run at computed by the mss_freq.  The possibilities are ORed together.  The platform uses these value and the MRW to determine what frequency to boot the fabric (nest) if it can. There are two values: 8G and 9.6G
+    </description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_NEST_CAPABLE_FREQUENCIES</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MRW_ENHANCED_GROUPING_NO_MIRRORING</id>
+    <description>
+       The MRW for a system should set this to TRUE for systems that do not want to suport MCS groupings larget than 2.  Mirroring  also must be disabled and is unusable. IBM systems, such as Tuleta, should set this attribute to FALSE.  Stradale based systems should set this to TRUE.  This instructs the grouping code to group contiguous memory controllers of the same size together.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MRW_ENHANCED_GROUPING_NO_MIRRORING</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<enumerationType>
+    <id>TOD_ROLE</id>
+    <description>
+        Enumeration indicating what role this chip has in tod topology
+    </description>
+    <enumerator>
+        <name>NON_MASTER</name>
+        <value>0</value>
+    </enumerator>
+    <enumerator>
+        <name>PRIMARY</name>
+        <value>1</value>
+    </enumerator>
+    <enumerator>
+        <name>SECONDARY</name>
+        <value>2</value>
+    </enumerator>
+    <default>NON_MASTER</default>
+</enumerationType>
+
+<attribute>
+    <id>TOD_ROLE</id>
+    <description>
+        Bitmask indicating what role this chip has in tod topology
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>MNFG_DMI_MIN_EYE_WIDTH</id>
+    <description>
+      System attribute.
+      6 bit rx_min_eye_width value for DMI bus interfaces during system
+      manufacturing; used for both centaur and p8
+      creator: platform
+      firmware notes: Attribute value is in the Machine Readable Workbook
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MNFG_DMI_MIN_EYE_WIDTH</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MNFG_DMI_MIN_EYE_HEIGHT</id>
+    <description>
+      System attribute.
+      8 bit rx_min_eye_height value for DMI bus interfaces during system
+      manufacturing; used for both centaur and p8
+      creator: platform
+      firmware notes: Attribute value is in the Machine Readable Workbook
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MNFG_DMI_MIN_EYE_HEIGHT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MNFG_ABUS_MIN_EYE_WIDTH</id>
+    <description>
+      System attribute
+      6 bit rx_min_eye_width value for A bus interfaces during system
+      manufacturing
+      creator: platform
+      firmware notes: Attribute value is in the Machine Readable Workbook
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MNFG_ABUS_MIN_EYE_WIDTH</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MNFG_ABUS_MIN_EYE_HEIGHT</id>
+    <description>
+      System attribute
+      8 bit rx_min_eye_height value for A bus interfaces during system
+      manufacturing
+      creator: platform
+      firmware notes: Attribute value is in the Machine Readable Workbook
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MNFG_ABUS_MIN_EYE_HEIGHT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MNFG_XBUS_MIN_EYE_WIDTH</id>
+    <description>
+      System attribute
+      6 bit rx_min_eye_width value for X bus interfaces during system
+      manufacturing
+      creator: platform
+      firmware notes: Attribute value is in the Machine Readable Workbook
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MNFG_XBUS_MIN_EYE_WIDTH</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>HB_RSV_MEM_SIZE_MB</id>
+    <description>
+        The amount of mainstore that PHYP needs to preserve per node
+        during MPIPL.
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>256</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>MRW_CDIMM_MASTER_I2C_TEMP_SENSOR_ENABLE</id>
+    <description>Used for Custom DIMMs to not enable the reading of the dimm temperature sensor on the master i2c bus</description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MRW_CDIMM_MASTER_I2C_TEMP_SENSOR_ENABLE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MRW_CDIMM_SPARE_I2C_TEMP_SENSOR_ENABLE</id>
+    <description>Used for Custom DIMMs to not enable the reading of the dimm temperature sensor on the spare i2c bus</description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MRW_CDIMM_SPARE_I2C_TEMP_SENSOR_ENABLE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>DO_ABUS_DECONFIG</id>
+    <description>
+        Indicates if system should consider abus logic when deconfiguring in
+        _deconfigureAssocProc(), will be overwritten on multi-node system
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>1</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>MEM_AVDD_OFFSET_MILLIVOLTS</id>
+    <description>Memory AVDD voltage domain offset in mV.</description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_AVDD_OFFSET</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+<!-- For reconfig loop testing -->
+<attribute>
+  <id>RECONFIG_LOOP_TESTS</id>
+  <description> System attribute array that defines the reconfig loop test cases
+      consumer: istep dispatcher reconfigLoopTestRunner function
+      This array is loaded with data via attribute override. The attribute is
+      then read  and then overlayed onto a test case structure.
+  </description>
+  <simpleType>
+      <uint64_t></uint64_t>
+      <array>5</array>
+  </simpleType>
+  <persistency>volatile-zeroed</persistency>
+  <readable/>
+  <writeable/>
+</attribute>
+
+<attribute>
+    <id>RECONFIG_LOOP_TESTS_ENABLE</id>
+    <description>
+        Indicates whether reconfigure loop tests are enabled.
+        This attribute is set via attribute override
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>MEM_VDD_OFFSET_MILLIVOLTS</id>
+    <description>Memory VDD voltage domain offset in mV.</description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_VDD_OFFSET</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MEM_VCS_OFFSET_MILLIVOLTS</id>
+    <description>Memory VCS voltage domain offset in mV.</description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_VCS_OFFSET</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MEM_VPP_OFFSET_MILLIVOLTS</id>
+    <description>Memory VPP voltage domain offset in mV.</description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_VPP_OFFSET</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MEM_VDDR_OFFSET_MILLIVOLTS</id>
+    <description>Memory VDDR voltage domain offset in mV.</description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_VDDR_OFFSET</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_CENT_AVDD_OFFSET_DISABLE</id>
+    <description>
+        Boolean indicating whether to disable configuring VDDR offset voltage
+        for memory voltage domains.
+            0x00 = Enable VDDR offset voltage for memory voltage domains
+            0x01 = Disable VDDR offset voltage for memory voltage domains
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>1</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_AVDD_OFFSET_DISABLE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_CENT_VDD_OFFSET_DISABLE</id>
+    <description>
+        Boolean indicating whether to disable configuring VDD offset voltage
+        for memory voltage domains.
+            0x00 = Enable VDD offset voltage for memory voltage domains
+            0x01 = Disable VDD offset voltage for memory voltage domains
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>1</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_VDD_OFFSET_DISABLE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_CENT_VCS_OFFSET_DISABLE</id>
+    <description>
+        Boolean indicating whether to disable configuring VCS offset voltage
+        for memory voltage domains.
+            0x00 = Enable VCS offset voltage for memory voltage domains
+            0x01 = Disable VCS offset voltage for memory voltage domains
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>1</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_VCS_OFFSET_DISABLE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_VOLT_VPP_OFFSET_DISABLE</id>
+    <description>
+        Boolean indicating whether to disable configuring VPP offset voltage
+        for memory voltage domains.
+            0x00 = Enable VPP offset voltage for memory voltage domains
+            0x01 = Disable VPP offset voltage for memory voltage domains
+        If disabled, Hostboot will send VPP_BASE in place of this to program the
+        VPP voltage domain.
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>1</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_VPP_OFFSET_DISABLE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_VOLT_VDDR_OFFSET_DISABLE</id>
+    <description>
+        Boolean indicating whether to disable configuring VDDR offset voltage
+        for memory voltage domains.
+            0x00 = Enable VDDR offset voltage for memory voltage domains
+            0x01 = Disable VDDR offset voltage for memory voltage domains
+        If disabled, Hostboot will send MSS_VOLT in place of this to program the
+        VDDR voltage domain.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint8_t>
+            <default>1</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_VDDR_OFFSET_DISABLE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_CENT_AVDD_SLOPE_ACTIVE</id>
+    <description>Units: uV/Membuf
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_AVDD_SLOPE_ACTIVE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_CENT_AVDD_SLOPE_INACTIVE</id>
+    <description>Units: uV/Membuf
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_AVDD_SLOPE_INACTIVE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_CENT_AVDD_INTERCEPT</id>
+    <description>Units: mV
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_AVDD_SLOPE_INTERCEPT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_CENT_VDD_SLOPE_ACTIVE</id>
+    <description>Units: uV/Membuf
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>MSS_CENT_VDD_SLOPE_INACTIVE</id>
+    <description>Units: uV/Membuf
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>MSS_CENT_VDD_INTERCEPT</id>
+    <description>Units: mV
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>MSS_CENT_VCS_SLOPE_ACTIVE</id>
+    <description>Units: uV/Membuf
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>MSS_CENT_VCS_SLOPE_INACTIVE</id>
+    <description>Units: uV/Membuf
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>MSS_CENT_VCS_INTERCEPT</id>
+    <description>Units: mV
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>MSS_VOLT_VPP_SLOPE</id>
+    <description>Units: uV/DRAM
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>MSS_VOLT_VPP_INTERCEPT</id>
+    <description>Units: mV
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>MSS_VOLT_VPP_SLOPE_POST_DRAM_INIT</id>
+    <description>Units: uV/DRAM
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>MSS_VOLT_VPP_INTERCEPT_POST_DRAM_INIT</id>
+    <description>Units: mV
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>MSS_VOLT_DDR3_VDDR_SLOPE</id>
+    <description>Units: 1/Amps
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>MSS_VOLT_DDR3_VDDR_INTERCEPT</id>
+    <description>Units: mV
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>MRW_DDR3_VDDR_MAX_LIMIT</id>
+    <description>Maximum voltage limit for the dynamic VID DDR3 VDDR
+        voltage setpoint. In mV.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>MSS_VOLT_DDR3_VDDR_SLOPE_POST_DRAM_INIT</id>
+    <description>Units: 1/Amps
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>MSS_VOLT_DDR3_VDDR_INTERCEPT_POST_DRAM_INIT</id>
+    <description>Units: mV
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>MRW_DDR3_VDDR_MAX_LIMIT_POST_DRAM_INIT</id>
+    <description>Maximum voltage limit for the dynamic VID DDR3 VDDR
+        voltage setpoint. In mV.
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>MSS_VOLT_DDR4_VDDR_SLOPE</id>
+    <description>Units: 1/Amps
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>MSS_VOLT_DDR4_VDDR_INTERCEPT</id>
+    <description>Units: mV
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>MRW_DDR4_VDDR_MAX_LIMIT</id>
+    <description>Maximum voltage limit for the dynamic VID DDR4 VDDR voltage
+        setpoint. In mV.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>MSS_VOLT_DDR4_VDDR_SLOPE_POST_DRAM_INIT</id>
+    <description>Units: 1/Amps
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>MSS_VOLT_DDR4_VDDR_INTERCEPT_POST_DRAM_INIT</id>
+    <description>Units: mV
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>MRW_DDR4_VDDR_MAX_LIMIT_POST_DRAM_INIT</id>
+    <description>Maximum voltage limit for the dynamic VID DDR4 VDDR voltage
+        setpoint. In mV.
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>MSS_VOLT_OVERRIDE</id>
+    <description>
+        Voltage override for MSS_VOLT.  Used for membuf lab debug.
+
+        0x00 = None (default), no override
+        0x01 = 1.35V
+        0x02 = 1.20V
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_VOLT_OVERRIDE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_VOLT_COMPLIANT_DIMMS</id>
+    <description>
+        Compliant Voltages. Created to call out non-compliant dimms
+        if they exist in the system.
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_VOLT_COMPLIANT_DIMMS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_VDDR_OVERIDE_SPD</id>
+    <description>
+        DIMM SPD voltage override for VDDR voltage calculations.
+        Used for lab debug.
+
+        0x00 = None (default), no override
+        0x01 = 1.35V
+        0x02 = 1.20V
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_VDDR_OVERIDE_SPD</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<enumerationType>
+    <id>MRW_POWER_CONTROL_REQUESTED</id>
+    <description>
+        Enumeration defining the type of power control requested
+    </description>
+    <enumerator>
+        <name>NONE</name>
+        <value>0</value>
+    </enumerator>
+    <enumerator>
+        <name>SLOWEXIT</name>
+        <value>1</value>
+    </enumerator>
+    <enumerator>
+        <name>FASTEXIT</name>
+        <value>2</value>
+    </enumerator>
+    <enumerator>
+        <name>FASTEXIT_AND_SLOWEXIT</name>
+        <value>3</value>
+    </enumerator>
+    <default>NONE</default>
+</enumerationType>
+
+<attribute>
+    <id>MRW_POWER_CONTROL_REQUESTED</id>
+    <description>
+        Type of memory power control requested
+
+        0x00 = NONE
+        0x01 = SLOWEXIT
+        0x02 = FASTEXIT
+        0x03 = FASTEXIT_AND_SLOWEXIT
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0x00</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MRW_POWER_CONTROL_REQUESTED</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_PFET_WORKAROUND_RUN_FLAG</id>
+    <description>
+    Flag to store that the work-around for HW250017 as been run so that during any resets it is skipped.
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_PFET_WORKAROUND_RUN_FLAG</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_OCC_LFIR_MASK</id>
+    <description>
+    Upon an UE event, PRD may update some fir masks in occ domain. To avoid this update getting lost during occ reset, which could eventually cause multiple occ resets, this attribute is added to be the storage to remember the OCC_LFIR_MASK in the RESET phase so that reset procedures can later overlay this updated settings with the default instalation in INIT phase. See details in SW260003.
+    Producer/Consumer: p8_pm_occ_firinit.C
+    </description>
+    <simpleType>
+        <uint64_t></uint64_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_OCC_LFIR_MASK</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_PBA_FIR_MASK</id>
+    <description>
+    Upon an UE event, PRD may update some fir masks in occ domain. To avoid this update getting lost during occ reset, which could eventually cause multiple occ resets, this attribute is added to be the storage to remember the PBA_FIR_MASK in the RESET phase so that reset procedures can later overlay this updated settings with the default instalation in INIT phase. See details in SW260003.
+    Producer/Consumer: p8_pm_pba_firinit.C
+    </description>
+    <simpleType>
+        <uint64_t></uint64_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_PBA_FIR_MASK</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_PMC_LFIR_MASK</id>
+    <description>
+    Upon an UE event, PRD may update some fir masks in occ domain. To avoid this update getting lost during occ reset, which could eventually cause multiple occ resets, this attribute is added to be the storage to remember the PMC_LFIR_MASK in the RESET phase so that reset procedures can later overlay this updated settings with the default instalation in INIT phase. See details in SW260003.
+    Producer/Consumer: p8_pm_pmc_firinit.C
+    </description>
+    <simpleType>
+        <uint64_t></uint64_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_PMC_LFIR_MASK</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_FIRINIT_DONE_ONCE_FLAG</id>
+    <description>
+    Due to SW260003, a flag is needed to remember if we executed the p8_pm_firinit procedures at least once.
+    Producer/Consumer: p8_pm_firinit.C
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_FIRINIT_DONE_ONCE_FLAG</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PM_SLEEP_ENABLE</id>
+    <description>Control HW response to execution of PPC sleep instruction
+      if OFF, treat sleep as nap
+      if ON, treat sleep as sleep
+      Producer: Hostboot
+      Consumer:  p8_slw_build.C
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0x0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SLEEP_ENABLE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>I2C_SWITCHES</id>
+    <description>Attribute storing information about which I2C method to use</description>
+    <complexType>
+        <description>Structure which defines which I2C access method to use at
+        a point in time.  Only applicable if target supports one or more I2C
+        types.  Only one bit (of the first two) can ever be set at any one time.
+        </description>
+        <field>
+            <name>useFsiI2C</name>
+            <description>0b0: Do not use FSI I2C at this time.  0b1: Use FSI
+            I2C at this time</description>
+            <type>uint8_t</type>
+            <bits>1</bits>
+            <default>0</default>
+        </field>
+        <field>
+            <name>useHostI2C</name>
+            <description>0b0: Do not use Host I2C at this time.  0b1: Use
+            Host I2C at this time</description>
+            <type>uint8_t</type>
+            <bits>1</bits>
+            <default>0</default>
+        </field>
+        <field>
+            <name>reserved</name>
+            <description>Reserved for future expansion</description>
+            <type>uint8_t</type>
+            <bits>6</bits>
+            <default>0</default>
+        </field>
+    </complexType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>OCC_MASTER_CAPABLE</id>
+    <description>
+        This attribute is to determine whether an occ is master capable.
+        An OCC is master capable if it's parent processor is wired to the
+        APSS.
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>   <!-- false -->
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>MSS_DRAMINIT_RESET_DISABLE</id>
+    <description>A disable switch for resetting the phy delay values at the beginning of calling mss_draminit_training.</description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_DRAMINIT_RESET_DISABLE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>ISDIMM_POWER_CURVE_ALGORITHM_VERSION</id>
+    <description>version of algorithm used to calculate ISDIMM power curves
+    </description>
+    <simpleType>
+        <uint32_t><default>0</default></uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_ISDIMM_POWER_CURVE_ALGORITHM_VERSION</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PROC_PCIE_LANE_MASK</id>
+    <description>Effective PCIE Lane Mask
+        Creator: Firmware
+        Purpose: Holds the effective PCIE lane mask after taking into account
+            any IOP bifurcations.  If no IOP bifurcations present, this is just
+            the value of the PROC_PCIE_LANE_MASK_NON_BIFURCATED attribute
+        Data Format: 2x2 array of uint16_t values.  The first two uint16_t
+            values are lane set 0/1 masks for IOP0, the remaining two uint16_t
+            values are lane set 0/1 masks for IOP1.  A lane set mask indicates
+            which groups of lanes are assigned to an IOP.  For instance, lane
+            set 0 value of 0xFFFF and lane set 1 value of 0x0000 for IOP0 means
+            IOP0 is a x16. Lane set 0 value of 0xFF00 and lane set 1 value of
+            0x00FF for IOP0, means the IOP is bifurcated into two x8s.
+            Each index in the array that is non-0 will require a dedicated PHB.
+    </description>
+    <simpleType>
+        <uint16_t>
+        </uint16_t>
+        <array>3,2</array>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>PROC_PCIE_DSMP_CAPABLE</id>
+    <description>Whether DSMP is enabled for a lane set or not
+        Creator: MRW
+        Purpose: Indicates whether a given IOP / lane set is dedicated to dSMP
+            traffic or not
+        Data Format: 2x2 array of uint8_t values.  The first two uint8_t
+            values are for lane sets 0/1 of IOP0, the remaining two uint8_t
+            values are fpr lane sets 0/1 of IOP1.  If the value at a given
+            array index is 1, that IOP/lane set routes dSMP traffic.
+    </description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>3,2</array>
+        </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>PROC_PCIE_IOP_REVERSAL</id>
+    <description>Effective PCIE IOP reversal configuration
+        Creator: Firmware
+        Purpose: Holds the effective PCIE IOP reversal value after taking into
+            account any IOP bifurcations.  If no IOP bifurcations present, this
+            is just the value of the PROC_PCIE_IOP_REVERSAL_NON_BIFURCATED
+            attribute.
+        Data Format: 2x2 array of uint8_t values.  The first two uint8_t
+            values are for lane sets 0/1 of IOP0, the remaining two uint8_t
+            values are for lane sets 0/1 of IOP1.  The given index in the array
+            is a mask which specifies which bit to invert in the lane swap
+            settings for the given IOP/lane set.
+    </description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>3,2</array>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>PROC_PCIE_IOP_REVERSAL_NON_BIFURCATED</id>
+    <description>Base PCIE IOP reversal configuration
+        Creator: Firmware
+        Purpose: Holds the base PCIE IOP reversal value without considering IOP
+            bifurcation.
+        Data Format: 2x2 array of uint8_t values.  The first two uint8_t
+            values are for lane sets 0/1 of IOP0, the remaining two uint8_t
+            values are for lane sets 0/1 of IOP1.  The given index in the array
+            is a mask which specifies which bit to invert in the lane swap
+            settings for the given IOP/lane set
+    </description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>3,2</array>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>PROC_PCIE_IOP_SWAP_NON_BIFURCATED</id>
+    <description>Base PCIE IOP swap configuration value
+        Creator: MRW
+        Purpose: Holds the base IOP swap configuration value without considering
+            IOP bifurcation.  The swap value controls how PCIE lanes are
+            recordered when the leave the IOP, to provide lane routing
+            flexibility.
+        Data Format: 2x2 array of uint8_t values.  The first two uint8_t
+            values are for lane sets 0/1 of IOP0, the remaining two uint8_t
+            values are for lane sets 0/1 of IOP1.  The given index in the array
+            is a value for the hardware which specifies how to swap the PCIE
+            lanes for the given IOP/lane set.
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+        <array>3,2</array>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>PROC_PCIE_LANE_MASK_NON_BIFURCATED</id>
+    <description>PCIE Lane Mask base configuration
+        Creator: MRW
+        Purpose: Holds the base PCIE lane mask assuming no dynamic IOP
+            bifurcations.
+        Data Format: 2x2 array of uint16_t values.  The first two uint16_t
+            values are for lane set 0/1 masks of IOP0, the remaining two
+            values are for lane set 0/1 masks of IOP1.  A lane set mask
+            indicates which groups of lanes are assigned to an IOP.  For
+            instance, lane set 0 value of 0xFFFF and lane set 1 value of 0x0000
+            for IOP0 means IOP0 is a x16. Lane set 0 value of 0xFF00 and lane
+            set 1 value of 0x00FF for IOP0, means the IOP is split into two x8s.
+            Each array index with non-0 value implies a dedicated PHB.
+    </description>
+    <simpleType>
+        <uint16_t>
+        </uint16_t>
+        <array>3,2</array>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>PROC_PCIE_IOP_REVERSAL_BIFURCATED</id>
+    <description>Base PCIE IOP reversal configuration
+        Creator: Firmware
+        Purpose: Holds the PCIE IOP reversal value for cases where the IOP
+            is bifurcated
+        Data Format: 2x2 array of uint8_t values.  The first two uint8_t
+            values are for lane sets 0/1 of IOP0, the remaining two uint8_t
+            values are for lane sets 0/1 of IOP1.  The given index in the array
+            is a mask which specifies which bit to invert in the lane swap
+            settings for the given IOP / lane set
+    </description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>3,2</array>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>PROC_PCIE_IOP_SWAP_BIFURCATED</id>
+    <description>Bifurcated PCIE IOP swap configuration value
+        Creator: MRW
+        Purpose: Holds the base IOP swap configuration value for the IOPs in the
+            case where they are bifurcated.  The swap value controls how PCIE
+            lanes are recordered when the leave the IOP, to provide lane routing
+            flexibility.
+        Data Format: 2x2 array of uint8_t values.  The first two uint8_t
+            values are for lane sets 0/1 of IOP0, the remaining two uint8_t
+            values are for lane sets 0/1 pf IOP1.  The given index in the array
+            is a value for the hardware which specifies how to swap the PCIE
+            lanes for the given IOP/lane set.
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+        <array>3,2</array>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>PROC_PCIE_LANE_MASK_BIFURCATED</id>
+    <description>PCIE Lane Mask bifurcated configuration
+        Creator: MRW
+        Purpose: Holds the PCIE lane mask assuming IOPs are bifurcated.
+        Data Format: 2x2 array of uint16_t values.  The first two uint16_t
+            values are for lane set 0/1 masks of IOP0, the remaining two
+            values are for lane set 0/1 masks of IOP1.  A lane set mask
+            indicates which groups of lanes are assigned to an IOP.  For
+            instance, lane set 0 value of 0xFF00 and lane set 1 value of 0x00FF
+            for IOP0, means the IOP is bifurcated into two x8s.
+            Each non-0 array value implies a dedicated PHB.
+    </description>
+    <simpleType>
+        <uint16_t>
+        </uint16_t>
+        <array>3,2</array>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>PROC_PCIE_LANE_EQUALIZATION</id>
+    <description>PCIE Lane Equalization values for each PHB
+        Creator: MRW
+        Purpose: Holds settings which are loaded into the HW to optimize the
+            PCIE lane signal eye between the chips + PCIE endpoints
+        Data Format: 4 PHBs x 32 bytes of EQ data per PHB.  Each PHB has an EQ
+            value for each of its 16 lanes.  Each value is a uint16 formatted as
+            follows:
+                Bit 0:3   - up_rx_hint (bit 0 reserved)
+                Bit 4:7   - up_tx_preset
+                Bit 8:11  - dn_rx_hint (bit 0 reserved)
+                Bit 12:15 - dn_tx_preset
+    </description>
+    <simpleType>
+        <uint8_t><default>0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,
+            0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,
+            0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,
+            0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x0,
+            0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x77,
+            0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,0x77,
+            0x77,0x77,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,
+            0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,
+            0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,
+            0x0,0x0</default>
+        </uint8_t>
+        <array>4,32</array>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>PROC_PCIE_IS_SLOT</id>
+    <description>Indicates whether PCIE lanes terminate at a pluggable slot
+        Creator: MRW
+        Purpose: Used by FW to know whether the given PCIE lanes terminate at a
+            pluggable slot or not.  If this is the case, and the platform
+            supports bifurcation, the card's VPD should be interrogated to
+            determine whether to bifurcate the IOP or not.
+        Data Format: 2x2 array of uint8_t values.  The first two values indicate
+            whether lane set 0/1 of IOP0 terminates at a pluggable slot.  The
+            next two values indicate the same for IOP1.  A value of 1 at a given
+            array index indicates the lanes terminate at a pluggable slot, 0
+            otherwise.
+    </description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>3,2</array>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<enumerationType>
+    <id>CDM_DOMAIN</id>
+    <description>
+        Enumeration specifying a target's CEC degraded mode domain
+    </description>
+    <enumerator>
+        <name>NONE</name>
+        <value>0</value>
+    </enumerator>
+    <enumerator>
+        <name>CPU</name>
+        <value>1</value>
+    </enumerator>
+    <enumerator>
+        <name>DIMM</name>
+        <value>2</value>
+    </enumerator>
+    <enumerator>
+        <name>FABRIC</name>
+        <value>3</value>
+    </enumerator>
+    <enumerator>
+        <name>MEM</name>
+        <value>4</value>
+    </enumerator>
+    <enumerator>
+        <name>IO</name>
+        <value>5</value>
+    </enumerator>
+    <enumerator>
+        <name>NODE</name>
+        <value>6</value>
+    </enumerator>
+    <enumerator>
+        <name>CLOCK</name>
+        <value>7</value>
+    </enumerator>
+    <enumerator>
+        <name>PSI</name>
+        <value>8</value>
+    </enumerator>
+    <enumerator>
+        <name>FSP</name>
+        <value>9</value>
+    </enumerator>
+    <enumerator>
+        <name>ALL</name>
+        <value>10</value>
+    </enumerator>
+    <default>NONE</default>
+</enumerationType>
+
+<attribute>
+    <id>CDM_DOMAIN</id>
+    <description>
+        Specifies a target's CEC degraded mode domain.  For example, all
+        DIMMs are part of the DIMM CEC degraded mode domain.
+    </description>
+    <simpleType>
+        <enumeration>
+            <id>CDM_DOMAIN</id>
+        </enumeration>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hasStringConversion/>
+</attribute>
+
+<attribute>
+    <id>I2C_BUS_SPEED_ARRAY</id>
+    <description>Designates the speed at which a given I2C bus should run.
+        Creator: MRW
+        Purpose: Used by FW to know the fastest possible bus speed that all of
+            the devices on a given bus are able to use.
+        Data Format: 2x3 array of uint16_t values.  The first two values
+            indicate the engine number of the bus.  The next 3 vaules indicate
+            the port number of the bus.  The value in the array is the I2C bus
+            speed used for that engine/port combination in KHz.
+    </description>
+    <simpleType>
+        <uint16_t>
+            <default>0,0,0,0,0,0</default>
+        </uint16_t>
+        <array>2,3</array>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>ISTEP_PAUSE_ENABLE</id>
+    <description>
+      Used to enable pause/stop in between isteps. This attribute is set via
+      attribute override.
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+<enumerationType>
+    <id>SUPPORTED_HOT_PLUG</id>
+    <description>
+        Enumeration indication which Hot Plug Controllers are supported by
+        the current system.
+    </description>
+    <enumerator>
+        <name>NA</name>
+        <value>0</value>
+    </enumerator>
+    <enumerator>
+        <name>MAX5961</name>
+        <value>0x01</value>
+    </enumerator>
+    <enumerator>
+        <name>PCA9551</name>
+        <value>0x02</value>
+    </enumerator>
+    <default>NA</default>
+</enumerationType>
+
+<attribute>
+    <id>HOT_PLUG_POWER_CONTROLLER_INFO</id>
+    <description>Hot Plug Controller values for a specific processor.
+        Purpose: Holds information about the hot plug controllers so that a
+            Hardware procedure is able to turn them on and off.
+        Data Format: up to 8 Hot Plug Controllers x 7 variables of information
+            This data is at the processor level.
+            The needed information and their individual sizes are as follows:
+            (1) I2C Master processor engine (uint8_t)
+            (2) I2C Master processor port (uint8_t)
+            (3) Bus Speed (uint16_t value: 2 uint8_t values: MSB, LSB)
+            (4) Slave address (uint8_t)
+            (5) Device type (uint8_t: see SUPPORTED_HOT_PLUG enum)
+            (6) I2C Master processor node (uint8_t)
+            (7) I2C Master processor position (uint8_t)
+            Thus, the information will be 8 bytes.
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
+                     0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
+                     0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
+            </default>
+        </uint8_t>
+        <array>8,8</array>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_HOT_PLUG_POWER_CONTROLLER_INFO</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>ISTEP_PAUSE_CONFIG</id>
+    <description>
+      Used to configure the parameters for enabling pause/stop between
+      isteps. This attribute is set via attribute override.
+    </description>
+    <simpleType>
+        <uint64_t></uint64_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>OPT_MEMMAP_GROUP_POLICY</id>
+    <description>
+       Controls scope of grouping performed in memory map calculations
+       Possible values defined in FAPI ATTR_OPT_MEMMAP_GROUP_POLICY
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint8_t><default>0x00</default></uint8_t><!-- CHIP_AS_GROUP -->
+    </simpleType>
+    <readable/>
+    <persistency>non-volatile</persistency>
+    <hwpfToHbAttrMap>
+        <id>ATTR_OPT_MEMMAP_GROUP_POLICY</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MFG_TRACE_ENABLE</id>
+    <description>
+        Override this to a non-zero value to have the FAPI manufacturing
+        traces output to the console or go to a fsp trace buffer when
+        console not enabled.
+    </description>
+    <simpleType><uint8_t></uint8_t></simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MFG_TRACE_ENABLE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+  <id>PROC_PCIE_NUM_PHB</id>
+  <description>
+      creator: platform
+        Number of PCIe PHB units present on target
+        Murano/Venice: 3
+        Naples: 4
+        Nimbus: 6
+        Cumulus: 6
+  </description>
+  <simpleType>
+      <uint8_t></uint8_t>
+  </simpleType>
+  <persistency>non-volatile</persistency>
+  <readable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_PROC_PCIE_NUM_PHB</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+  <id>PROC_PCIE_NUM_IOP</id>
+  <description>
+      creator: platform
+        Number of PCIe IOP units present on target
+        Murano/Venice: 2
+        Naples: 3
+  </description>
+  <simpleType>
+      <uint8_t></uint8_t>
+  </simpleType>
+  <persistency>non-volatile</persistency>
+  <readable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_PROC_PCIE_NUM_IOP</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+  <id>PROC_PCIE_NUM_LANES</id>
+  <description>
+      creator: platform
+        Number of PCIe I/O lanes supported by target
+        Murano: 24
+        Venice: 32
+        Naples: 40
+  </description>
+  <simpleType>
+      <uint8_t></uint8_t>
+  </simpleType>
+  <persistency>non-volatile</persistency>
+  <readable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_PROC_PCIE_NUM_LANES</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<!-- === Manufacturing threshold Attributes of PRD === -->
+
+<attribute>
+    <id>MNFG_TH_P8EX_L2_CACHE_CES</id>
+    <description>
+      This attribute represents the Maximum number of L2 Cache CEs allowed
+      during Manufacturing.
+      creator: platform (generated based on MRW data)
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+      <uint8_t>
+        <default>1</default>
+      </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>MNFG_TH_P8EX_L2_DIR_CES</id>
+    <description>
+      This attribute represents the Maximum number of L2 Directory CEs allowed
+      during Manufacturing.
+      creator: platform (generated based on MRW data)
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+      <uint8_t>
+        <default>1</default>
+      </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>MNFG_TH_P8EX_L3_CACHE_CES</id>
+    <description>
+      This attribute represents the Maximum number of L3 Cache CEs allowed
+      during Manufacturing.
+      creator: platform (generated based on MRW data)
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+      <uint8_t>
+        <default>3</default>
+      </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>MNFG_TH_P8EX_L3_DIR_CES</id>
+    <description>
+      This attribute represents the Maximum number of L3 Directory CEs allowed
+      during Manufacturing.
+      creator: platform (generated based on MRW data)
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+      <uint8_t>
+        <default>1</default>
+      </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>FIELD_TH_P8EX_L2_LINE_DELETES</id>
+    <description>
+      This attribute represents the Maximum number of L2 Line Deletes allowed
+      in the Field.
+      creator: platform (generated based on MRW data)
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+      <uint8_t>
+        <default>6</default>
+      </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>FIELD_TH_P8EX_L3_LINE_DELETES</id>
+    <description>
+      This attribute represents the Maximum number of L3 Line Deletes allowed
+      in the Field.
+      creator: platform (generated based on MRW data)
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+      <uint8_t>
+        <default>6</default>
+      </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>FIELD_TH_P8EX_L2_COL_REPAIRS</id>
+    <description>
+      This attribute represents the Maximum number of L2 Column Repairs allowed
+      in the Field.
+      creator: platform (generated based on MRW data)
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+      <uint8_t>
+        <default>7</default>
+      </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>FIELD_TH_P8EX_L3_COL_REPAIRS</id>
+    <description>
+      This attribute represents the Maximum number of L3 Column Repairs allowed
+      in the Field.
+      creator: platform (generated based on MRW data)
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+      <uint8_t>
+        <default>7</default>
+      </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>MNFG_TH_P8EX_L2_LINE_DELETES</id>
+    <description>
+      This attribute represents the Maximum number of L2 Line Deletes allowed
+      during Manufacturing.
+      creator: platform (generated based on MRW data)
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+      <uint8_t>
+        <default>0</default>
+      </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>MNFG_TH_P8EX_L3_LINE_DELETES</id>
+    <description>
+      This attribute represents the Maximum number of L3 Line Deletes allowed
+      during Manufacturing.
+      creator: platform (generated based on MRW data)
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+      <uint8_t>
+        <default>0</default>
+      </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>MNFG_TH_P8EX_L2_COL_REPAIRS</id>
+    <description>
+      This attribute represents the Maximum number of L2 Column Repairs allowed
+      during Manufacturing.
+      creator: platform (generated based on MRW data)
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+      <uint8_t>
+        <default>0</default>
+      </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>MNFG_TH_P8EX_L3_COL_REPAIRS</id>
+    <description>
+      This attribute represents the Maximum number of L3 Column Repairs allowed
+      during Manufacturing.
+      creator: platform (generated based on MRW data)
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+      <uint8_t>
+        <default>0</default>
+      </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>MNFG_TH_CEN_MBA_RT_SOFT_CE_TH_ALGO</id>
+    <description>
+      This attribute represents the Base threshold (for 2GB DRAM ) of
+      Memory CEs allowed during runtime.
+      creator: platform (generated based on MRW data)
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+      <uint8_t>
+        <default>2</default>
+      </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>MNFG_TH_CEN_MBA_IPL_SOFT_CE_TH_ALGO</id>
+    <description>
+      This attribute represents the Base threshold (for 2GB DRAM ) of
+      Memory CEs allowed during IPL.
+      creator: platform (generated based on MRW data)
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+      <uint8_t>
+        <default>2</default>
+      </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>MNFG_TH_CEN_MBA_RT_RCE_PER_RANK</id>
+    <description>
+      This attribute represents the maximum number of Memory RCEs
+      allowed per Rank during runtime.
+      creator: platform (generated based on MRW data)
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+      <uint8_t>
+        <default>2</default>
+      </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>MNFG_TH_CEN_L4_CACHE_CES</id>
+    <description>
+      This attribute represents the maximum number of L4 Cache CEs allowed.
+      creator: platform (generated based on MRW data)
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+      <uint8_t>
+        <default>2</default>
+      </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>RESOURCE_IS_CRITICAL</id>
+    <description>
+        Used to tell if a resource is critical to perform an IPL. If this
+        attribute is set to 1 and the target is deconfigured, the IPL MUST
+        terminate.
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+
+<attribute>
+    <id>BRAZOS_RX_FIFO_OVERRIDE</id>
+    <description>
+      Defines where to apply Brazos rx_fifo_final_l2u_dly override settings for SW299500.
+    </description>
+    <simpleType>
+      <uint8_t>
+        <default>0</default>
+      </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_BRAZOS_RX_FIFO_OVERRIDE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<!-- === Manufacturing threshold Attributes of PRD === -->
+
+<attribute>
+    <id>MSS_VMEM_REGULATOR_MAX_DIMM_COUNT</id>
+    <description>Maximum number of installed DIMMs per VMEM regulator for all
+    VMEM regulators in the system.
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_VMEM_REGULATOR_MAX_DIMM_COUNT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MRW_VMEM_REGULATOR_POWER_LIMIT_PER_DIMM_ADJ_ENABLE</id>
+    <description>Machine Readable Workbook enablement of the HWP code to adjust
+    the VMEM regulator power limit based on number of installed DIMMs.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MRW_VMEM_REGULATOR_POWER_LIMIT_PER_DIMM_ADJ_ENABLE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MRW_MAX_NUMBER_DIMMS_POSSIBLE_PER_VMEM_REGULATOR</id>
+    <description>Machine Readable Workbook value for the maximum possible number
+    of dimms that can be installed under any of the VMEM regulators.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MRW_MAX_NUMBER_DIMMS_POSSIBLE_PER_VMEM_REGULATOR</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MRW_VMEM_REGULATOR_MEMORY_POWER_LIMIT_PER_DIMM</id>
+    <description>Machine Readable Workbook VMEM regulator power limit per CDIMM
+    assuming a full configuration. Units in cW.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MRW_VMEM_REGULATOR_MEMORY_POWER_LIMIT_PER_DIMM</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MRW_VMEM_REGULATOR_MEMORY_POWER_LIMIT_PER_DIMM_DDR4</id>
+    <description>Machine Readable Workbook VMEM regulator power limit per DDR4 DIMM
+    assuming a full configuration. Units in cW.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MRW_VMEM_REGULATOR_MEMORY_POWER_LIMIT_PER_DIMM_DDR4</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<enumerationType>
+    <id>MRW_NEST_CAPABLE_FREQUENCIES_SYS</id>
+    <description>Enumeration of MRW_NEST_CAPABLE_FREQUENCIES_SYS</description>
+    <enumerator>
+        <name>UNSUPPORTED_FREQ</name>
+        <value>0</value>
+    </enumerator>
+    <enumerator>
+        <name>2000_MHZ</name>
+        <value>1</value>
+    </enumerator>
+    <enumerator>
+        <name>2400_MHZ</name>
+        <value>2</value>
+    </enumerator>
+    <enumerator>
+        <name>2000_MHZ_OR_2400_MHZ</name>
+        <value>3</value>
+    </enumerator>
+</enumerationType>
+
+<attribute>
+    <id>MRW_NEST_CAPABLE_FREQUENCIES_SYS</id>
+    <description>The NEST frequencies that the system can support.  This is a bit-wise value that represents which of the possible nest frequencies are supported. : 2.0GHz, 2.4GHz, or both. New frequencies should be added in ascending order.
+    </description>
+    <simpleType>
+        <enumeration>
+            <id>MRW_NEST_CAPABLE_FREQUENCIES_SYS</id>
+            <default>UNSUPPORTED_FREQ</default>
+        </enumeration>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>WOF_ENABLED</id>
+    <description>
+        Defines if the Workload Optimization Frequency (WOF) system feature
+        where OCC algorithms will change (typically boost) the operational 
+        frequency based on measured power available and any currently idling 
+        cores.        
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_WOF_ENABLED</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>TRUSTED_SLAVE_SCAN_PATH_ACTIVE</id>
+    <description>
+        Set to indicate state of master->slave scan path.
+        Platform should default to false at beginning of IPL, and set to
+        true once trusted XSCOM path is active to all slave chips in drawer
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_TRUSTED_SLAVE_SCAN_PATH_ACTIVE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>FORCE_SKIP_SBE_MASTER_INTR_SERVICE</id>
+    <description>
+        Set to force skip of SBE interrupt service for master chip.
+        Default is to disable the use of the SBE interrupt service.
+    </description>
+    <simpleType>
+        <uint8_t>
+        <default>1</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_FORCE_SKIP_SBE_MASTER_INTR_SERVICE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>FORCE_USE_SBE_SLAVE_SCAN_SERVICE</id>
+    <description>
+        Set to force use of SBE scan service for slave chips.
+        Default is to enable the use of the SBE scan service
+        only for slave chips with security enabled.
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_FORCE_USE_SBE_SLAVE_SCAN_SERVICE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>SBE_MASTER_INTR_SERVICE_DELAY_CYCLES</id>
+    <description>
+        Cycle delay of SBE master interrupt service loop wait statement.
+        Paces rate of decrementer progress and prevents SBE from consuming PIB.
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_SBE_MASTER_INTR_SERVICE_DELAY_CYCLES</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>SBE_MASTER_INTR_SERVICE_DELAY_US</id>
+    <description>
+        Execution delay (in microseconds) of SBE master interrupt service loop.
+    </description>
+    <simpleType>
+        <uint32_t></uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_SBE_MASTER_INTR_SERVICE_DELAY_US</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MSS_VREF_CAL_CNTL</id>
+    <description>Training Control over IPL
+         - ENUM - 0x00=DISABLE /Skip V-ref Train; 0x01=DRAM - Enable V-Ref Train DRAM Level; 0x02=RANK Level Training;
+                  0x03=PORT Level Training; 0x04=MBA Level; 0x05=CENTAUR level;
+         Default Value = 0x01;
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0x01</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MSS_VREF_CAL_CNTL</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DIMM_RCD_CNTL_WORD_X</id>
+    <description>Additional RCD Control Word for DDR4. Used in mss_dram_init and is computed in mss_eff_cnfg.
+                 Can be overwritten by ODM vendors if done from the PNOR or odm_eff_cnfg.  Each memory channel will have a value.
+                 creator: mss_eff_cnfg
+                 consumer: mss_dram_init
+                 firmware notes: none
+    </description>
+    <simpleType>
+        <uint64_t></uint64_t>
+        <array>2,2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DIMM_RCD_CNTL_WORD_X</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DIMM_DDR4_RC00</id>
+    <description>F0RC00: Global Features Control Word.For normal operation, output inversion is always enabled. For DIMM vendor test purpose, output
+                 inversion can be disabled. When disabled, register tPDM is not guaranteed to be met.
+                 NOTE: Default value - 0x00. Values Range from 0-8.
+                 00 - Normal Operation; 01 - Output Inversion Disabled; 02 - Weak Drive Enabled; 04 - A outputs disabled; 08 - B outputs disabled; So on.
+                 No need to calculate; User can override with desired experimental value.
+                 creator: mss_eff_cnfg
+                 consumer: mss_dram_init
+                 firmware notes: none
+     </description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2,2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DIMM_DDR4_RC00</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DIMM_DDR4_RC01</id>
+    <description>F0RC01 - Clock Driver Enable Control Word.1. Output clocks may be individually turned on or off to conserve power.
+                 The system must read the module SPD to determine which clock outputs are used by the module. The PLL remains locked
+                 on CK_t/CK_c unless the system stops the clock inputs to the DDR4RCD02 to enter the lowest power mode.
+                 Default value - 0x00. Values Range from 0-8. No need to calculate; User can override with desired experimental value.
+                 creator: mss_eff_cnfg
+                 consumer: mss_dram_init
+                 firmware notes: none
+    </description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2,2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DIMM_DDR4_RC01</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DIMM_DDR4_RC02</id>
+    <description>F0RC02: Timing and IBT Control Word;
+                 Default value - 0x00. Values Range from 0-8. No need to calculate; User can override with desired experimental value.
+                 creator: mss_eff_cnfg
+                 consumer: mss_dram_init
+                 firmware notes: none
+    </description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2,2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DIMM_DDR4_RC02</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DIMM_DDR4_RC03</id>
+    <description>F0RC03 - CA and CS Signals Driver Characteristics Control Word;
+                 Default value - 0x05 (Moderate Drive). Values Range from 00 to 0F. Has to be picked up from SPD byte 137, 1st Nibble for CS and CA.
+                 creator: mss_eff_cnfg
+                 consumer: mss_dram_init
+                 firmware notes: none
+    </description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2,2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DIMM_DDR4_RC03</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DIMM_DDR4_RC04</id>
+    <description>F0RC04 - ODT and CKE Signals Driver Characteristics Control Word;
+                 Default value - 0x05 (Moderate Drive). Values Range from 00 to 0F. Has to be picked up from SPD byte 137, 2nd Nibble for ODT and CKE.
+                 creator: mss_eff_cnfg
+                 consumer: mss_dram_init
+                 firmware notes: none
+    </description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2,2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DIMM_DDR4_RC04</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DIMM_DDR4_RC05</id>
+    <description>F0RC05 - Clock Driver Characteristics Control Word;
+                 Default value - 0x05 (Moderate Drive). Values Range from 00 to 0F. Has to be picked up from SPD byte 138, 2nd Nibble for CK.
+                 creator: mss_eff_cnfg
+                 consumer: mss_dram_init
+                 firmware notes: none
+    </description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2,2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DIMM_DDR4_RC05</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DIMM_DDR4_RC06_07</id>
+    <description>F0RC06: Command Space Control Word definition;
+                 Default value - 0xF0 (NOP). Values Range from 00 to F0. F0RC07 not used. RDIMM
+                 creator: mss_eff_cnfg
+                 consumer: mss_dram_init
+                 firmware notes: none
+    </description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2,2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DIMM_DDR4_RC06_07</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DIMM_DDR4_RC08</id>
+    <description>F0RC08: Command Space Control Word definition;
+                 Default value - 0x03. Values Range from 00 to 08 decimal. Check the stack height and calculate dynamically;
+                 00 = Stack height_8; 01 = Stack height_4; 02 = Stack height_2;
+                 creator: mss_eff_cnfg
+                 consumer: mss_dram_init
+                 firmware notes: none
+    </description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2,2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DIMM_DDR4_RC08</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DIMM_DDR4_RC09</id>
+    <description>F0RC09: Command Space Control Word definition;
+                 Default value - 0xF0 (NOP). Values Range from 00 to F0. No need to calculate; User can override with desired experimental value.
+                 creator: mss_eff_cnfg
+                 consumer: mss_dram_init
+                 firmware notes: none
+    </description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2,2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DIMM_DDR4_RC09</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DIMM_DDR4_RC10</id>
+    <description>RDIMM Operating Speed;  Read from ATTR_MSS_FREQ;
+                 Default value - 00. Values Range from 00 to 09. No need to calculate; User can override with desired experimental value.
+                 creator: mss_eff_cnfg
+                 consumer: mss_dram_init
+                 firmware notes: none
+    </description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2,2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DIMM_DDR4_RC10</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DIMM_DDR4_RC11</id>
+    <description>Operating Voltage VDD and VrefCA Source Control Word; Read from ATTR_MSS_VOLT.
+                 Default value - 14. Values Range from 00 to 15 decimal.  No need to calculate; User can override with desired experimental value.
+                 creator: mss_eff_cnfg
+                 consumer: mss_dram_init
+                 firmware notes: none
+    </description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2,2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DIMM_DDR4_RC11</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DIMM_DDR4_RC12</id>
+    <description>F0RC0C - Training Control Word;
+                 Default value - 00. Values Range from 00 to 07 decimal.No need to calculate; User can override with desired experimental value. 
+                 creator: mss_eff_cnfg
+                 consumer: mss_dram_init
+                 firmware notes: none
+    </description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2,2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DIMM_DDR4_RC12</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DIMM_DDR4_RC13</id>
+    <description>F0RC0D - DIMM Configuration Control Word;
+                 Default value - 0x0B. Values Range from 00 to 15 decimal.
+                 Dynamically calculated using 4 bits[0:3] Bit 0 - Address Mirroring; Bit 1 - Rdimm(1)/Lrdimm (0) ; Bit 2 - N/A ; Bit 3 - CS Mode (Direct / Quad CS mode etc); 
+                 creator: mss_eff_cnfg
+                 consumer: mss_dram_init
+                 firmware notes: none
+    </description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2,2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DIMM_DDR4_RC13</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DIMM_DDR4_RC14</id>
+    <description>F0RC0E - Parity Control Word;  Default value - 00. Check from ATTR_EFF_CA_PARITY and assign; Values Range from 00 to 0F. 
+                 creator: mss_eff_cnfg
+                 consumer: mss_dram_init
+                 firmware notes: none
+    </description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2,2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DIMM_DDR4_RC14</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DIMM_DDR4_RC15</id>
+    <description>F0RC0F - Command Latency Adder Control Word;
+                 Default value - 04. Values Range from 00 to 04. No need to calculate; User can override with desired experimental value.
+                 creator: mss_eff_cnfg
+                 consumer: mss_dram_init
+                 firmware notes: none
+    </description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>2,2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DIMM_DDR4_RC15</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+
+<attribute>
+    <id>EFF_DIMM_DDR4_RC_1x</id>
+    <description>F0RC1x - Internal VrefCA Control Word;
+                 Default value - 00. Values Range from 00 to 3F.No need to calculate; User can override with desired experimental value. 
+                 creator: mss_eff_cnfg
+                 consumer: mss_dram_init
+                 firmware notes: none
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+        <array>2,2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DIMM_DDR4_RC_1x</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DIMM_DDR4_RC_2x</id>
+    <description>F0RC2x: I2C Bus Control Word;
+                 Default value - 00. Values Range from 00 to FF.No need to calculate; User can override with desired experimental value. 
+                 creator: mss_eff_cnfg
+                 consumer: mss_dram_init
+                 firmware notes: none
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+        <array>2,2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DIMM_DDR4_RC_2x</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DIMM_DDR4_RC_3x</id>
+    <description>F0RC3x - Fine Granularity RDIMM Operating Speed;
+                 Default value = (Operating Freq - 1250)/20. Values Range from 00 to 61 Hex. 
+                 creator: mss_eff_cnfg
+                 consumer: mss_dram_init
+                 firmware notes: none
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+        <array>2,2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DIMM_DDR4_RC_3x</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DIMM_DDR4_RC_4x</id>
+    <description>F0RC4x: CW Source Selection Control Word;
+                 Default value - 00. Values Range from 00 to FF. No need to calculate; User can override with desired experimental value.
+                 creator: mss_eff_cnfg
+                 consumer: mss_dram_init
+                 firmware notes: none
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+        <array>2,2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DIMM_DDR4_RC_4x</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DIMM_DDR4_RC_5x</id>
+    <description>F0RC5x: CW Destination Selection and Write/Read Additional QxODT[1:0] Signal High;
+                 Default value - 00. Values Range from 00 to FF. No need to calculate; User can override with desired experimental value.
+                 creator: mss_eff_cnfg
+                 consumer: mss_dram_init
+                 firmware notes: none
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+        <array>2,2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DIMM_DDR4_RC_5x</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DIMM_DDR4_RC_6x</id>
+    <description>F0RC6x: CW Data Control Word;
+                 Default value - 00. Values Range from 00 to FF.No need to calculate; User can override with desired experimental value. 
+                 creator: mss_eff_cnfg
+                 consumer: mss_dram_init
+                 firmware notes: none
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+        <array>2,2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DIMM_DDR4_RC_6x</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DIMM_DDR4_RC_7x</id>
+    <description>F0RC7x: IBT Control Word;
+                 Default value - 00. Values Range from 00 to FF.No need to calculate; User can override with desired experimental value.
+                 creator: mss_eff_cnfg
+                 consumer: mss_dram_init
+                 firmware notes: none
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+        <array>2,2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DIMM_DDR4_RC_7x</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DIMM_DDR4_RC_8x</id>
+    <description>F0RC8x: ODT Input Buffer/IBT, QxODT Output Buffer and Timing Control Word;
+                 Default value - 00. Values Range from 00 to FF. No need to calculate; User can override with desired experimental value.
+                 creator: mss_eff_cnfg
+                 consumer: mss_dram_init
+                 firmware notes: none
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+        <array>2,2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DIMM_DDR4_RC_8x</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DIMM_DDR4_RC_9x</id>
+    <description>F0RC9x1: QxODT[1:0] Write Pattern Control Word;
+                 Default value - 00. Values Range from 00 to FF.No need to calculate; User can override with desired experimental value. 
+                 creator: mss_eff_cnfg
+                 consumer: mss_dram_init
+                 firmware notes: none
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+        <array>2,2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DIMM_DDR4_RC_9x</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DIMM_DDR4_RC_Ax</id>
+    <description>F0RCAx1: QxODT[1:0] Read Pattern Control Word;
+                 Default value - 00. Values Range from 00 to FF. No need to calculate; User can override with desired experimental value. 
+                 creator: mss_eff_cnfg
+                 consumer: mss_dram_init
+                 firmware notes: none
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+        <array>2,2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DIMM_DDR4_RC_Ax</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DIMM_DDR4_RC_Bx</id>
+    <description>F0RCBx: IBT and MRS Snoop Control Word;  Default value - 07. Values Range from 00 to FF. No need to calculate; User can override with desired experimental value. 
+                 creator: mss_eff_cnfg
+                 consumer: mss_dram_init
+                 firmware notes: none
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+        <array>2,2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DIMM_DDR4_RC_Bx</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_TCCD_L</id>
+    <description>tccd_l. This is for DDR4 MRS6.  Computed in mss_eff_cnfg. Each memory channel will have a value.
+                 Creator: mss_eff_cnfg
+                 Consumer:various
+                 Firmware notes: none
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_TCCD_L</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_LRDIMM_WORD_X</id>
+    <description>Additional buffer control word for LRDIMM building of the BCW</description>
+    <simpleType>
+        <uint64_t></uint64_t>
+        <array>2,2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_LRDIMM_WORD_X</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_LRDIMM_ADDITIONAL_CNTL_WORDS</id>
+    <description>LRDIMM additional RCD control words as set by DIMM SPD:
+                 F[3,4]RC10, F[3,4]RC11, F[5,6]RC10, F[5,6]RC11, F[7,8]RC10,
+                 F[7,8]RC11, F[9,10]RC10, F[9,10]RC11, F[1]RC8, F[3]RC9,
+                 F[3]RC8, F[1]RC11, F[1]RC12, F[1]RC13, F[1]RC14, F[1]RC15.
+                 Eff config should set this up.
+    </description>
+    <simpleType>
+        <uint64_t></uint64_t>
+        <array>2,2</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_LRDIMM_ADDITIONAL_CNTL_WORDS</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MCBIST_DDR4_PDA_ENABLE</id>
+    <description>Controls PDA train enable or PBA. 00 - Disable; 01 - PDA; 02 - PBA(Lrdimm)</description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MCBIST_DDR4_PDA_ENABLE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>MRW_MCS_PREFETCH_RETRY_THRESHOLD</id>
+    <description>
+    Option to control MCS prefetch retry threshold, for performance
+    optimization. This attribute controls the number of retries in the
+    prefetch engine. Retry threshold available ranges from 16 to 30. Note:
+    Values outside those ranges will default to 30. In MRW.
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MRW_MCS_PREFETCH_RETRY_THRESHOLD</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>DEFAULT_PROC_MODULE_NEST_FREQ_MHZ</id>
+    <description>
+        Default Nest frequency in MHz for Processor Modules
+        Default to 2000 MHz for Murano-based Modules
+        Default to 2400 MHz for Venice- and Naples-based Modules
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>2000</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_TRRD_L</id>
+    <description>DRAM Row to Row Delay. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_TRRD_L</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_TWTR_L</id>
+    <description>DRAM Internal Write to Read Delay. Initialized and used by HWPs.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_TWTR_L</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>EFF_DRAM_TCCD_S</id>
+    <description>tccd_l. This is for DDR4 MRS6.  Computed in mss_eff_cnfg. Each memory channel will have a value.
+                 Creator: mss_eff_cnfg
+                 Consumer:various
+                 Firmware notes: none
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_EFF_DRAM_TCCD_S</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PHB_MMIO_ADDRS_64</id>
+    <description>PHB0-PHB5 64 bits addresses
+        MMIO consumed by PHYP
+    </description>
+    <simpleType>
+        <uint64_t></uint64_t>
+        <array>6</array>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>PHB_MMIO_ADDRS_32</id>
+    <description>PHB0-PHB5 32 bit addresses
+        MMIO consumed by PHYP
+    </description>
+    <simpleType>
+        <uint64_t></uint64_t>
+        <array>6</array>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>`
+
+<attribute>
+    <id>PHB_XIVE_ESB_ADDRS</id>
+    <description>PHB0-PHB5 XIVE ESB addresses
+        MMIO consumed by PHYP
+    </description>
+    <simpleType>
+        <uint64_t></uint64_t>
+        <array>6</array>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>PHB_REG_ADDRS</id>
+    <description>PHB0-PHB5 Register Space addresses
+        MMIO consumed by PHYP
+    </description>
+    <simpleType>
+        <uint64_t></uint64_t>
+        <array>6</array>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>XIVE_ROUTING_ESB_ADDR</id>
+    <description>XIVE Routing ESB address
+        MMIO consumed by PHYP
+    </description>
+    <simpleType>
+        <uint64_t></uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>XIVE_ROUTING_END_ADDR</id>
+    <description>XIVE Routing END address
+        MMIO consumed by PHYP
+    </description>
+    <simpleType>
+        <uint64_t></uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>XIVE_PRESENTATION_NVT_ADDR</id>
+    <description>XIVE Presentation NVT address
+        MMIO consumed by PHYP
+    </description>
+    <simpleType>
+        <uint64_t></uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>VAS_HYPERVISOR_WINDOW_CONTEXT_ADDR</id>
+    <description>VAS - Hypervisor Window Contexts address
+        MMIO consumed by PHYP
+    </description>
+    <simpleType>
+        <uint64_t></uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>VAS_USER_WINDOW_CONTEXT_ADDR</id>
+    <description>VAS - User Window Context address
+        MMIO consumed by PHYP
+    </description>
+    <simpleType>
+        <uint64_t></uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>LPC_BUS_ADDR</id>
+    <description>LPC Bus address - MMIO consumed by PHYP</description>
+    <simpleType>
+        <uint64_t></uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>NVIDIA_NPU_PRIVILEGED_ADDR</id>
+    <description>Nvidia Link - NPU Privileged Regs address
+        MMIO consumed by PHYP
+    </description>
+    <simpleType>
+        <uint64_t></uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>NVIDIA_NPU_USER_REG_ADDR</id>
+    <description>Nvidia Link - NPU User Regs address
+        MMIO consumed by PHYP
+    </description>
+    <simpleType>
+        <uint64_t></uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>NVIDIA_PHY0_REG_ADDR</id>
+    <description>Nvidia Link - Phy 0 Regs address
+        MMIO consumed by PHYP
+    </description>
+    <simpleType>
+        <uint64_t></uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>NVIDIA_PHY1_REG_ADDR</id>
+    <description>Nvidia Link - Phy 1 Regs address
+        MMIO consumed by PHYP
+    </description>
+    <simpleType>
+        <uint64_t></uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>XIVE_CONTROLLER_BAR_ADDR</id>
+    <description>XIVE - Controller Bar address
+        MMIO consumed by PHYP
+    </description>
+    <simpleType>
+        <uint64_t></uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>XIVE_PRESENTATION_BAR_ADDR</id>
+    <description>XIVE - Presentation Bar address
+        MMIO consumed by PHYP
+    </description>
+    <simpleType>
+        <uint64_t></uint64_t>
+   </simpleType>
+   <persistency>non-volatile</persistency>
+   <readable/>
+</attribute>
+
+<attribute>
+    <id>PSI_HB_ESP_ADDR</id>
+    <description>PSIHB - ESB space address - MMIO consumed by PHYP
+    </description>
+    <simpleType>
+        <uint64_t></uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>NX_RNG_ADDR</id>
+    <description>NX - RNG space - MMIO consumed by PHYP</description>
+    <simpleType>
+        <uint64_t></uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<enumerationType>
+    <id>FUSED_CORE_OPTION</id>
+    <description>Enum for FUSED_CORE_OPTION</description>
+    <enumerator>
+        <name>USING_DEFAULT_CORES</name>
+        <value>0</value>
+    </enumerator>
+    <enumerator>
+        <name>USING_NORMAL_CORES</name>
+        <value>1</value>
+    </enumerator>
+    <enumerator>
+        <name>USING_FUSED_CORES</name>
+        <value>2</value>
+    </enumerator>
+</enumerationType>
+
+<attribute>
+    <id>FUSED_CORE_OPTION</id>
+    <description>
+        If not loading PHYP or OPAL, then use this to
+        decide whether to use FUSED cores or NOT.
+    </description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+</attributes>
diff --git a/xml/attribute_types_fsp.xml b/xml/attribute_types_fsp.xml
new file mode 100644
index 0000000..6123d1a
--- /dev/null
+++ b/xml/attribute_types_fsp.xml
@@ -0,0 +1,575 @@
+
+<!-- attribute defining the required system policy for a fsp based system -->
+
+<attributes>
+
+<attribute>
+	<id>IM_ID</id>
+	<description>
+		Used to indicate a certain target is valid only
+		for a certain IM ID.
+	</description>
+    <simpleType>
+        <string></string>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+	<id>IM_VALUE</id>
+	<description>
+		Used to indicate the IM keyword value
+	</description>
+    <simpleType>
+        <string></string>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+	<id>PART_NUMBER</id>
+	<description>
+		Used to indicate the part number information
+	</description>
+    <simpleType>
+        <string></string>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<enumerationType>
+    <id>SYS_POLICY_NAME</id>
+    <description>An enumeration of all system policies</description>
+    <enumerator>
+        <name>all_mcs_in_interleaving_groups</name>
+        <value>0</value>
+    </enumerator>
+    <enumerator>
+        <name>mss_interleave_enables</name>
+        <value>1</value>
+    </enumerator>
+    <enumerator>
+        <name>power-def-filenames</name>
+        <value>2</value>
+    </enumerator>
+    <enumerator>
+        <name>powr-vrm-xml-filenames</name>
+        <value>3</value>
+    </enumerator>
+    <default></default>
+</enumerationType>
+
+<attribute>
+	<id>SYS_POLICY_NAME</id>
+	<description>
+		The name of the system policy
+	</description>
+    <simpleType>
+        <enumeration>
+            <id>SYS_POLICY_NAME</id>
+        </enumeration>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+	<id>SYS_POLICY_VALUE</id>
+	<description>
+		The value of the system policy
+	</description>
+    <simpleType>
+        <string></string>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<enumerationType>
+    <id>CARD_USE</id>
+    <description>An enumeration of all possible places where a card can be used</description>
+    <enumerator>
+        <name>FIELD</name>
+        <value>0</value>
+    </enumerator>
+    <enumerator>
+        <name>LAB_ONLY</name>
+        <value>1</value>
+    </enumerator>
+    <default>FIELD</default>
+</enumerationType>
+
+<attribute>
+    <id>CARD_USE</id>
+    <description>
+        Where is the card used? field/lab-only
+    </description>
+    <simpleType>
+        <enumeration>
+            <id>CARD_USE</id>
+        </enumeration>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<enumerationType>
+    <id>RU_TYPE</id>
+    <description>An enumeration of all possible places where a card can be replaced</description>
+    <enumerator>
+        <name>FRU</name>
+        <value>0</value>
+    </enumerator>
+    <enumerator>
+        <name>CRU</name>
+        <value>1</value>
+    </enumerator>
+    <enumerator>
+        <name>MRU</name>
+        <value>2</value>
+    </enumerator>
+    <default>FRU</default>
+</enumerationType>
+
+<attribute>
+    <id>RU_TYPE</id>
+    <description>
+        Where can the card replaced? field/client/manufacturing
+    </description>
+    <simpleType>
+        <enumeration>
+            <id>RU_TYPE</id>
+        </enumeration>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<enumerationType>
+    <id>SUPPORTED_MTMS</id>
+    <description>An enumeration of all possible MTMs supporting a given CCIN</description>
+    <enumerator>
+        <name>9040-MR9</name>
+        <value>0</value>
+    </enumerator>
+    <enumerator>
+        <name>ALL</name>
+        <value>1</value>
+    </enumerator>
+    <default>ALL</default>
+</enumerationType>
+
+<attribute>
+    <id>SUPPORTED_MTMS</id>
+    <description>
+        MTMs where this CCIN will be supported. A comma separated list of MTMs.
+    </description>
+    <simpleType>
+        <enumeration>
+            <id>SUPPORTED_MTMS</id>
+        </enumeration>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>CORES</id>
+    <description>
+        The number of cores - for modules only
+    </description>
+    <simpleType>
+        <uint8_t/>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>FREQUENCY</id>
+    <description>
+        The core frequency - for modules only
+    </description>
+    <simpleType>
+        <string></string>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>MTM_NAME</id>
+    <description>
+        System MTM
+    </description>
+    <simpleType>
+        <string></string>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>IM_ID</id>
+    <description>
+        IM Keyword
+    </description>
+    <simpleType>
+        <string></string>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>REDUNDANT_FSPS</id>
+    <description>
+        1 = System has redundant FSPs
+        0 = System does not have redundant FSPs
+        From the Machine Readable Workbook
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_REDUNDANT_FSP</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>AVERAGE_IPL_TIME</id>
+    <description>
+        The average amount of time it may take for this enclosure to IPL in minutes.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>LED_STRATEGY</id>
+    <description>
+        The LED service strategy.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <string>
+            <default>lightpath</default>
+        </string>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+	<id>power-def-filenames</id>
+	<description>Names of the system power management def files</description>
+	<group>SYS_POLICIES</group>
+	<simpleType>
+		<string>
+			<default></default>
+		</string>
+	</simpleType>
+	<persistency>non-volatile</persistency>
+	<readable/>
+</attribute>
+
+<attribute>
+	<id>powr-vrm-xml-filenames</id>
+	<description>Name of the powr VRM xml file</description>
+	<group>SYS_POLICIES</group>
+	<simpleType>
+		<string>
+			<default></default>
+		</string>
+	</simpleType>
+	<persistency>non-volatile</persistency>
+	<readable/>
+</attribute>
+
+<attribute>
+    <id>LED_ON_DEFAULT_GPIO_VALUE</id>
+    <description>
+        The LED on-value for the GPIO-controlled LEDs in the platform:
+                1 means "VLED will set the GPIO pin value to '1' causing the LED to turn on."
+                0 means "VLED will set the GPIO pin value to '0' causing the LED to turn on."
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint8_t><default></default></uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>MRW_MEM_MIRRORING_ALLOWED</id>
+    <description>
+        Is memory mirroring allowed on this platform?
+        0 - No
+        1 - Yes
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint8_t><default></default></uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>MRW_MEM_MIRRORING_ENABLE_DEFAULT</id>
+    <description>
+        By default, is memory mirroring enabled on this platform?
+        0 - No
+        1 - Yes
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint8_t><default></default></uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>MRW_MEM_POWER_CONTROL_USAGE</id>
+    <description>
+        Determines if any power controls should be used by memory on this
+        platform.  This is a system-wide policy setting that is used when
+        configuring the memory.  Note that individual DIMMs will also know if
+        they are capable of doing any of this so the eventual answer is
+        combination of the requested value specified here and the capable
+        value from the VPD.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint8_t>
+            <default>0x00</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_MRW_MEM_POWER_CONTROL_USAGE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>OCC_LOAD_TIMEOUT</id>
+    <description>
+        The maximum amount of time it should take for all OCCs in the system to be loaded and started in seconds.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>OCC_RESET_TIMEOUT</id>
+    <description>
+        The maximum amount of time it should take for all OCCs to be reset in seconds.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>FREQ_PB_HFT</id>
+    <description>
+        System attribute.
+        The frequency of a processor's PB chiplet in MHz.
+        Provided by the MRW.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType><uint32_t></uint32_t></simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_FREQ_PB_HFT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>FREQ_X_HFT</id>
+    <description>
+        System attribute.
+        The frequency of a processor's X bus in MHz.
+        Provided by the MRW.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType><uint32_t></uint32_t></simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_FREQ_X_HFT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>FREQ_NEST_HFT</id>
+    <description>
+        System attribute.
+        The frequency of a processor's Nest chiplet in MHz.
+        Provided by the MRW.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType><uint32_t></uint32_t></simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_FREQ_X_HFT</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>PCIE_DEFAULT_HDDW_SLOT_COUNT</id>
+    <description>
+        The default HDDW slot count.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>PCIE_MIN_HDDW_SLOT_COUNT</id>
+    <description>
+        The minimum HDDW slot count.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>PCIE_MAX_HDDW_SLOT_COUNT</id>
+    <description>
+        The maximum HDDW slot count.
+    </description>
+    <group>SYS_POLICIES</group>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>APPLY_PCIE_WORKAROUND</id>
+    <description>
+        Should the PCIE workaround fix be applied on this platform?
+                If "yes", use the pcie-workaround-perst-control-table element to determine
+                the device and pin to use.
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+
+
+
+<!-- Types of Location code -->
+<!--  RELATIVE : Location code attached to parent card location code  -->
+<!--  ABSOLUTE : Location code attached to system location code (Ufcs) -->
+<!--  ASSEMBLY : Location code is shared with another card(s) location code -->
+<enumerationType>
+    <id>LOCATION_CODE_TYPE</id>
+    <description>Type of Location code</description>
+    <enumerator>
+        <name>RELATIVE</name>
+        <value>0</value>
+    </enumerator>
+    <enumerator>
+        <name>ABSOLUTE</name>
+        <value>1</value>
+    </enumerator>
+    <enumerator>
+        <name>ASSEMBLY</name>
+        <value>2</value>
+    </enumerator>
+    <default>RELATIVE</default>
+</enumerationType>
+
+<!-- attribute defining the type of the Location code -->
+<attribute>
+    <id>LOCATION_CODE_TYPE</id>
+    <description>Type of the Location code</description>
+    <simpleType>
+        <enumeration>
+            <id>LOCATION_CODE_TYPE</id>
+        </enumeration>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable />
+    <writeable/>
+    <fspOnly/>
+</attribute>
+
+<!-- attribute defining the required system mtms for a fsp based system -->
+<attribute>
+    <id>SYSTEM_MTM</id>
+    <description>Describes a list of Machine Type Model</description>
+    <simpleType>
+        <string>
+            <default>NULL</default>
+            <sizeInclNull>9</sizeInclNull>
+        </string>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <fspOnly/>
+</attribute>
+
+<!-- attribute defining the required system CCINs for a fsp based system -->
+<attribute>
+    <id>CCIN</id>
+    <description>Defines CCINs</description>
+    <simpleType>
+        <string>
+            <default>NULL</default>
+            <sizeInclNull>4</sizeInclNull>
+        </string>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <fspOnly/>
+</attribute>
+
+</attributes>
diff --git a/xml/attribute_types_hb.xml b/xml/attribute_types_hb.xml
new file mode 100644
index 0000000..d81c185
--- /dev/null
+++ b/xml/attribute_types_hb.xml
@@ -0,0 +1,1601 @@
+<!-- IBM_PROLOG_BEGIN_TAG                                                   -->
+<!-- This is an automatically generated prolog.                             -->
+<!--                                                                        -->
+<!-- $Source: src/usr/targeting/common/xmltohb/attribute_types_hb.xml $     -->
+<!--                                                                        -->
+<!-- OpenPOWER HostBoot Project                                             -->
+<!--                                                                        -->
+<!-- Contributors Listed Below - COPYRIGHT 2012,2015                        -->
+<!-- [+] Google Inc.                                                        -->
+<!-- [+] International Business Machines Corp.                              -->
+<!--                                                                        -->
+<!--                                                                        -->
+<!-- Licensed under the Apache License, Version 2.0 (the "License");        -->
+<!-- you may not use this file except in compliance with the License.       -->
+<!-- You may obtain a copy of the License at                                -->
+<!--                                                                        -->
+<!--     http://www.apache.org/licenses/LICENSE-2.0                         -->
+<!--                                                                        -->
+<!-- Unless required by applicable law or agreed to in writing, software    -->
+<!-- distributed under the License is distributed on an "AS IS" BASIS,      -->
+<!-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        -->
+<!-- implied. See the License for the specific language governing           -->
+<!-- permissions and limitations under the License.                         -->
+<!--                                                                        -->
+<!-- IBM_PROLOG_END_TAG                                                     -->
+
+<attributes>
+
+<!-- =====================================================================
+     HOST BOOT ATTRIBUTE TYPES
+     Contains the definition of hostboot attributes which should not be
+     synced to/from FSP
+     ================================================================= -->
+<attribute>
+    <id>HIDDEN_ERRLOGS_ENABLE</id>
+    <description>
+        Used to decide whether or not to prevent INFORMATIONAL/RECOVERED error
+        logs from being sent to the BMC via SEL/eSEL, saved to the PNOR, and
+        displayed to the console.
+        0 = Prevent INFORMATIONAL/RECOVERED error logs from being processed.
+        1 = Send only INFORMATIONAL error logs.
+        2 = Send only RECOVERED error logs.
+        3 = Allow all hidden error logs to be processed.
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile</persistency>
+    <readable/>
+</attribute>
+
+<enumerationType>
+    <id>HIDDEN_ERRLOGS_ENABLE</id>
+    <description>Enumeration of HIDDEN_ERRLOGS_ENABLE</description>
+    <enumerator>
+        <name>NO_HIDDEN_LOGS</name>
+        <value>0</value>
+    </enumerator>
+    <enumerator>
+        <name>ALLOW_INFORMATIONAL</name>
+        <value>1</value>
+    </enumerator>
+    <enumerator>
+        <name>ALLOW_RECOVERED</name>
+        <value>2</value>
+    </enumerator>
+    <enumerator>
+        <name>ALLOW_ALL_LOGS</name>
+        <value>3</value>
+    </enumerator>
+</enumerationType>
+
+<attribute>
+    <id>IS_MPIPL_HB</id>
+    <description>1 = in Memory Preserving IPL mode. 0 = in normal IPL mode.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_IS_MPIPL</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+    <hbOnly/>
+</attribute>
+
+<attribute>
+    <id>XSCOM_VIRTUAL_ADDR</id>
+    <description>Cached Virtual Address of Xscom memory space for this Chip</description>
+    <simpleType>
+        <uint64_t>
+        </uint64_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hbOnly/>
+</attribute>
+
+<attribute>
+    <id>FSI_MASTER_MUTEX</id>
+    <description>Mutex for FSI Master Operations</description>
+    <simpleType>
+        <hbmutex>
+        </hbmutex>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hbOnly/>
+</attribute>
+
+<!-- For POD Testing -->
+<attribute>
+    <id>HB_MUTEX_TEST_LOCK</id>
+    <description>Host boot mutex for testing</description>
+    <simpleType>
+        <hbmutex>
+        </hbmutex>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hbOnly/>
+</attribute>
+
+<attribute>
+    <id>I2C_ENGINE_MUTEX_0</id>
+    <description>Mutex for I2C Master engine 0</description>
+    <simpleType>
+        <hbmutex>
+        </hbmutex>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hbOnly/>
+</attribute>
+
+<attribute>
+    <id>I2C_ENGINE_MUTEX_1</id>
+    <description>Mutex for I2C Master engine 1</description>
+    <simpleType>
+        <hbmutex>
+        </hbmutex>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hbOnly/>
+</attribute>
+
+<attribute>
+    <id>I2C_ENGINE_MUTEX_2</id>
+    <description>Mutex for I2C Master engine 2</description>
+    <simpleType>
+        <hbmutex>
+        </hbmutex>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hbOnly/>
+</attribute>
+
+<attribute>
+    <id>FSI_SCOM_MUTEX</id>
+    <description>Mutex for FSI-based SCOM Operations</description>
+    <simpleType>
+        <hbmutex>
+        </hbmutex>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hbOnly/>
+</attribute>
+
+<attribute>
+    <id>SCOM_IND_MUTEX</id>
+    <description>Mutex for Indirect SCOM read operation</description>
+    <simpleType>
+        <hbmutex>
+        </hbmutex>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hbOnly/>
+</attribute>
+
+<attribute>
+    <id>SCAN_MUTEX</id>
+    <description>Mutex for SCAN operations</description>
+    <simpleType>
+        <hbmutex>
+            <default>0</default>
+        </hbmutex>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hbOnly/>
+</attribute>
+
+<attribute>
+    <id>SLW_IMAGE_ADDR</id>
+    <description>
+        Location of runtime winkle image for this processor chip.
+        Written by host_build_winkle (istep 15.1)
+    </description>
+    <simpleType>
+        <uint64_t></uint64_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hbOnly/>
+</attribute>
+
+<attribute>
+    <id>SLW_IMAGE_SIZE</id>
+    <description>
+        Size of runtime winkle image for this processor chip.
+        Written by host_build_winkle (istep 15.1)
+    </description>
+    <simpleType>
+        <uint64_t></uint64_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hbOnly/>
+</attribute>
+
+<attribute>
+    <id>IBSCOM_VIRTUAL_ADDR</id>
+    <description>Cached Virtual Address of Inband Scom memory space for this Chip</description>
+    <simpleType>
+        <uint64_t>
+        </uint64_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hbOnly/>
+</attribute>
+
+<attribute>
+    <id>IBSCOM_MUTEX</id>
+    <description>Mutex for Inband SCOM Operations</description>
+    <simpleType>
+        <hbmutex>
+        </hbmutex>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hbOnly/>
+</attribute>
+
+<attribute>
+    <id>IBSCOM_ENABLE_OVERRIDE</id>
+    <description>Used to force IBSCOM enabled for lab testing</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <hbOnly/>
+</attribute>
+
+<attribute>
+    <id>HB_EXISTING_IMAGE</id>
+    <description>Indicates which logical nodes have a hostboot image.</description>
+    <!-- Bit position [0-7] (left to right) represents logical node.
+    '1' means the logical node has an active hostboot image.
+    -->
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hbOnly/>
+</attribute>
+
+<attribute>
+    <id>HB_PM_SPWUP_OHA_FLAG</id>
+    <description>Flag storage to break the recursive calling loop for when accessing the OHA address space from the Special Wakeup procedure.</description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PM_SPWUP_OHA_FLAG</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+    <hbOnly/>
+</attribute>
+
+<attribute>
+    <id>GPIO_INFO</id>
+    <description>Information needed to address GPIO device</description>
+    <complexType>
+        <description>Structure to define the addessing for an I2C
+                     slave device.</description>
+        <field>
+            <name>i2cMasterPath</name>
+            <description>Entity path to the chip that contains the I2C
+                         master</description>
+            <type>EntityPath</type>
+            <default>physical:sys-0</default>
+        </field>
+        <field>
+            <name>port</name>
+            <description>Port from the I2C Master device. This is a 6-bit
+                         value.</description>
+            <type>uint8_t</type>
+            <default>0</default>
+        </field>
+        <field>
+            <name>devAddr</name>
+            <description>Device address on the I2C bus. This is a 7-bit value,
+                         but then shifted 1 bit left.</description>
+            <type>uint8_t</type>
+            <default>0</default>
+        </field>
+        <field>
+            <name>engine</name>
+            <description>I2C master engine. This is a 2-bit
+                         value.</description>
+            <type>uint8_t</type>
+            <default>0</default>
+        </field>
+        <field>
+            <name>vddrPin</name>
+            <description>
+                Logical GPIO pin number used to enabled/disable VDDR
+            </description>
+            <type>uint8_t</type>
+            <default>0</default>
+        </field>
+    </complexType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>HB_TARGET_SCOMABLE</id>
+    <description>
+        This attribute indicates if the target can be SCOMed.
+        It's used in FSP only but declared here because the attribute
+        is defined in chip_attributes.xml, which is a common file
+        between FSP and HB (without this, HB will get a compilation error).
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0x0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_TARGET_SCOMABLE</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+    <hbOnly/>
+</attribute>
+
+<attribute>
+    <id>OCC_COMMON_AREA_PHYS_ADDR</id>
+    <description>
+        Physical address where OCC Common Area is placed in mainstore.
+    </description>
+    <simpleType>
+        <uint64_t></uint64_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hbOnly/>
+</attribute>
+
+<attribute>
+    <id>HOMER_PHYS_ADDR</id>
+    <description>
+        Physical address where HOMER image is placed in mainstore.
+    </description>
+    <simpleType>
+        <uint64_t></uint64_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hbOnly/>
+</attribute>
+
+<attribute>
+    <id>HOMER_VIRT_ADDR</id>
+    <description>
+        Virtual address where HOMER memory is mapped into.  If value is zero,
+        memory must be mapped into virtual space.
+    </description>
+    <simpleType>
+        <uint64_t></uint64_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hbOnly/>
+</attribute>
+<attribute>
+    <id>OPEN_POWER_DIMM_THROTTLE_TEMP_DEG_C</id>
+    <description>
+        DIMM temperature threshold where throttling will
+        occur in degrees C
+    </description>
+    <simpleType>
+        <uint64_t></uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+<attribute>
+    <id>OPEN_POWER_DIMM_ERROR_TEMP_DEG_C</id>
+    <description>
+        DIMM temperature where an error will be generated
+        in degrees C
+    </description>
+    <simpleType>
+        <uint64_t></uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+<attribute>
+    <id>OPEN_POWER_MEMCTRL_THROTTLE_TEMP_DEG_C</id>
+    <description>
+         Memory controller temperature threshold
+         where throttling will occur in degrees C
+    </description>
+    <simpleType>
+        <uint64_t></uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+<attribute>
+    <id>OPEN_POWER_PROC_DVFS_TEMP_DEG_C</id>
+    <description>
+        Processor temperature where DVFS will occur in degrees C
+    </description>
+    <simpleType>
+        <uint64_t></uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+<attribute>
+    <id>OPEN_POWER_MEMCTRL_ERROR_TEMP_DEG_C</id>
+    <description>
+        Memory controller temperature where an error will occur
+        in degrees C
+    </description>
+    <simpleType>
+        <uint64_t></uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+<attribute>
+    <id>OPEN_POWER_N_BULK_POWER_LIMIT_WATTS</id>
+    <description>
+        N mode bulk power supply limit in Watts
+    </description>
+    <simpleType>
+        <uint64_t></uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+<attribute>
+    <id>OPEN_POWER_N_MAX_MEM_POWER_WATTS</id>
+    <description>
+        Maximum power allocated to DIMMs in Watts
+    </description>
+    <simpleType>
+        <uint64_t></uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+<attribute>
+    <id>OPEN_POWER_MEMCTRL_READ_TIMEOUT_SEC</id>
+    <description>
+        Memory controller read timeout in seconds
+    </description>
+    <simpleType>
+        <uint64_t></uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+<attribute>
+    <id>OPEN_POWER_DIMM_READ_TIMEOUT_SEC</id>
+    <description>
+        DIMM read timeout in seconds
+    </description>
+    <simpleType>
+        <uint64_t></uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+<attribute>
+    <id>OPEN_POWER_PROC_ERROR_TEMP_DEG_C</id>
+    <description>
+        Processor temperature error threshold in degrees C
+    </description>
+    <simpleType>
+        <uint64_t></uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+<attribute>
+    <id>OPEN_POWER_MIN_MEM_UTILIZATION_THROTTLING</id>
+    <description>
+        Minimum memory utilization for memory throttling
+    </description>
+    <simpleType>
+        <uint64_t></uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+<attribute>
+    <id>OPEN_POWER_PROC_READ_TIMEOUT_SEC</id>
+    <description>
+        Processor read timeout in seconds
+    </description>
+    <simpleType>
+        <uint64_t></uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+<attribute>
+    <id>OPEN_POWER_REGULATOR_EFFICIENCY_FACTOR</id>
+    <description>
+        Regulator efficiency factor
+    </description>
+    <simpleType>
+        <uint64_t></uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+<attribute>
+    <id>OPEN_POWER_MIN_POWER_CAP_WATTS</id>
+    <description>
+        Minimum power cap in Watts
+    </description>
+    <simpleType>
+        <uint64_t></uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+<attribute>
+    <id>OPEN_POWER_N_PLUS_ONE_BULK_POWER_LIMIT_WATTS</id>
+    <description>
+        N+1 bulk power limit in Watts for systems running
+        with redundant power supplies (default)
+    </description>
+    <simpleType>
+        <uint64_t></uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+<attribute>
+    <id>OPEN_POWER_N_PLUS_ONE_HPC_BULK_POWER_LIMIT_WATTS</id>
+    <description>
+        N+1 bulk power limit in Watts for High Performance Computing
+        systems running with a non-redundant power supply policy
+    </description>
+    <simpleType>
+        <uint64_t>
+            <default>0</default>
+        </uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+<attribute>
+    <id>OPEN_POWER_N_PLUS_ONE_MAX_MEM_POWER_WATTS</id>
+    <description>
+        N+1 max memory power in Watts
+    </description>
+    <simpleType>
+        <uint64_t></uint64_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+<attribute>
+    <id>OPEN_POWER_TURBO_MODE_SUPPORTED</id>
+    <description>
+        If this system supports Turbo frequency mode.
+            0x00 = no
+            0x01 = yes
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>ADC_CHANNEL_FUNC_IDS</id>
+    <description>ADC Channel function id. 16 channels.</description>
+    <simpleType>
+        <uint8_t></uint8_t>
+        <array>16</array>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+<attribute>
+    <id>ADC_CHANNEL_SENSOR_NUMBERS</id>
+    <description>ADC Channel IPMI sensor numbers. 16 channels.</description>
+    <simpleType>
+        <uint16_t></uint16_t>
+        <array>16</array>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+<attribute>
+    <id>ADC_CHANNEL_GNDS</id>
+    <description>ADC Channel ground. 16 channels.</description>
+    <simpleType>
+        <uint8_t></uint8_t>
+        <array>16</array>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>ADC_CHANNEL_GAINS</id>
+    <description>ADC channel gain * 1000. 16 channels.</description>
+    <simpleType>
+        <uint32_t></uint32_t>
+        <array>16</array>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>ADC_CHANNEL_OFFSETS</id>
+    <description>ADC channel offset * 1000. 16 channels</description>
+    <simpleType>
+        <uint32_t></uint32_t>
+        <array>16</array>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>APSS_GPIO_PORT_MODES</id>
+    <description>APSS GPIO PORT MODES</description>
+    <simpleType>
+        <uint8_t></uint8_t>
+        <array>2</array>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>APSS_GPIO_PORT_PINS</id>
+    <description>APSS GPIO PORT PINS
+        Port0 pin 0-7
+        Port1 pin 8-15
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+        <array>16</array>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>PSTATE_TABLE</id>
+    <description>HTMGT PSTATE data</description>
+    <simpleType>
+        <uint8_t></uint8_t>
+        <array>3656</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>PSTATE_TABLE_MFG</id>
+    <description>HTMGT PSTATE data for mfg</description>
+    <simpleType>
+        <uint8_t></uint8_t>
+        <array>3656</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>OCC_CONTROL_DATA</id>
+    <description>OCC operational data
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+        <array>256</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>OT_MIN_N_PER_MBA</id>
+    <description>
+        Lowest per MBA numerator ever allowed when OCC is
+        throttling due to OT.
+    </description>
+    <simpleType>
+        <uint16_t>
+            <default>0</default>
+        </uint16_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>N_PLUS_ONE_N_PER_MBA</id>
+    <description>
+        Static per MBA numerator setting when not in
+        oversubscription.  Calculated based on MRW memory
+        power with redundant power. Lowest per MBA numerator
+        ever allowed when OCC is throttling due to OT.
+    </description>
+    <simpleType>
+        <uint16_t>
+            <default>0</default>
+        </uint16_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>N_PLUS_ONE_N_PER_CHIP</id>
+    <description>
+        Static per chip numerator setting when not in oversubscription.
+    </description>
+    <simpleType>
+        <uint16_t>
+            <default>0</default>
+        </uint16_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>OVERSUB_N_PER_MBA</id>
+    <description>
+        Static per MBA numerator setting when in oversubscription.
+        Calculated based on MRW oversubscription memory power.
+    </description>
+    <simpleType>
+        <uint16_t>
+            <default>0</default>
+        </uint16_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>OVERSUB_N_PER_CHIP</id>
+    <description>
+        Static per chip numerator setting when in oversubscription.
+    </description>
+    <simpleType>
+        <uint16_t>
+            <default>0</default>
+        </uint16_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+
+<!-- end HTMGT attributes -->
+
+<attribute>
+    <id>VPD_SWITCHES</id>
+    <description>Attribute storing VPD state information</description>
+    <complexType>
+        <description>VPD flags</description>
+        <field>
+            <name>pnorCacheValid</name>
+            <description>Set when this target's VPD data has been loaded
+                from EEPROM into the PNOR.
+            </description>
+            <type>uint8_t</type>
+            <bits>1</bits>
+            <default>0</default>
+        </field>
+        <field>
+            <name>pnorCacheValidRT</name>
+            <description>See pnorCacheValid. Allows runtime version to be
+                set separately from common version.
+            </description>
+            <type>uint8_t</type>
+            <bits>1</bits>
+            <default>0</default>
+        </field>
+        <field>
+            <name>disableWriteToPnorRT</name>
+            <description>Set to disable write-thru to PNOR at runtime
+            </description>
+            <type>uint8_t</type>
+            <bits>1</bits>
+            <default>0</default>
+        </field>
+        <field>
+            <name>reserved</name>
+            <description>Reserved for future expansion</description>
+            <type>uint8_t</type>
+            <bits>5</bits>
+            <default>0</default>
+        </field>
+    </complexType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+    <id>OPAL_MODEL</id>
+    <description>
+        Specifies the compatible model name for Opal to key off of.
+        This is sourced from the MRW and should be of the format
+        'vendor,model', e.g. 'tyan,palmetto'.
+    </description>
+    <simpleType>
+        <string>
+            <default>ibm,miscopenpower</default>
+            <sizeInclNull>32</sizeInclNull>
+        </string>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+
+<attribute>
+    <id>ISDIMM_MBVPD_INDEX</id>
+    <description>
+        Multiple centaurs can sometimes have their VPD located in one
+        physical SEEPROM. This is the index into the memory buffer VPD
+        for this centaur.
+    </description>
+    <simpleType>
+        <uint8_t>
+            <default>0</default>
+        </uint8_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_ISDIMM_MBVPD_INDEX</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+    <id>HTMGT_SAFEMODE</id>
+    <description>1 = in safemode. 0 = in normal mode.</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hbOnly/>
+</attribute>
+<attribute>
+    <id>IPMI_INSTANCE</id>
+    <description>Holds the IPMI instance number for this entity.</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+<enumerationType>
+    <id>ENTITY_ID</id>
+    <description>Enumeration indicating the IPMI entity ID, these values are
+        defined in the IPMI specification.  These values will be used in place
+        of target type when events are sent to the BMC.</description>
+    <enumerator>
+        <name>NA</name>
+        <value>0</value>
+    </enumerator>
+    <enumerator>
+        <name>OTHER</name>
+        <value>0x01</value>
+    </enumerator>
+    <enumerator>
+        <name>PROCESSOR</name>
+        <value>0x03</value>
+    </enumerator>
+    <enumerator>
+        <name>SYSTEM_BOARD</name>
+        <value>0x07</value>
+    </enumerator>
+    <enumerator>
+        <name>POWER_MGMT</name>
+        <value>0x15</value>
+    </enumerator>
+    <enumerator>
+        <name>CHASSIS</name>
+        <value>0x17</value>
+    </enumerator>
+    <enumerator>
+        <name>MEMORY_DEVICE</name>
+        <value>0x20</value>
+    </enumerator>
+    <enumerator>
+        <name>BIOS</name>
+        <value>0x22</value>
+    </enumerator>
+    <enumerator>
+        <name>OS</name>
+        <value>0x23</value>
+    </enumerator>
+    <enumerator>
+        <name>CORE</name>
+        <value>0xD0</value>
+    </enumerator>
+    <enumerator>
+        <name>MEMBUF</name>
+        <value>0xD1</value>
+    </enumerator>
+    <enumerator>
+        <name>OCC</name>
+        <value>0xD2</value>
+    </enumerator>
+    <enumerator>
+        <name>REF_CLOCK</name>
+        <value>0xD4</value>
+    </enumerator>
+    <enumerator>
+        <name>PCI_CLOCK</name>
+        <value>0xD5</value>
+    </enumerator>
+    <enumerator>
+        <name>TOD_CLOCK</name>
+        <value>0xD6</value>
+    </enumerator>
+    <enumerator>
+        <name>APSS</name>
+        <value>0xD7</value>
+    </enumerator>
+</enumerationType>
+
+<enumerationType>
+    <id>SENSOR_NAME</id>
+    <description>Enumeration indicating the IPMI sensor name, which will
+        be used by hostboot when determining the sensor number to return.
+        he sensor name consists of one byte of sensor type plus one byte of
+        sub-type, to differentiate similar sensors under the same target.
+        Our implementaion uses the IPMI defined entity ID as the sub-type.
+    </description>
+    <enumerator>
+        <name>PROC_TEMP</name>
+        <value>0x0103</value>
+    </enumerator>
+    <enumerator>
+        <name>DIMM_TEMP</name>
+        <value>0x0120</value>
+    </enumerator>
+    <enumerator>
+        <name>CORE_TEMP</name>
+        <value>0x01D0</value>
+    </enumerator>
+    <enumerator>
+        <name>STATE</name>
+        <value>0x0500</value>
+    </enumerator>
+    <enumerator>
+        <name>MEMBUF_TEMP</name>
+        <value>0x01D1</value>
+    </enumerator>
+    <enumerator>
+        <name>PROC_STATE</name>
+        <value>0x0703</value>
+    </enumerator>
+    <enumerator>
+        <name>CORE_STATE</name>
+        <value>0x07D0</value>
+    </enumerator>
+    <enumerator>
+        <name>DIMM_STATE</name>
+        <value>0x0C20</value>
+    </enumerator>
+    <enumerator>
+        <name>MEMBUF_STATE</name>
+        <value>0x0CD1</value>
+    </enumerator>
+    <enumerator>
+        <name>FW_BOOT_PROGRESS</name>
+        <value>0x0F22</value>
+    </enumerator>
+    <enumerator>
+        <name>SYSTEM_EVENT</name>
+        <value>0x1201</value>
+    </enumerator>
+    <enumerator>
+        <name>OS_BOOT</name>
+        <value>0x1F23</value>
+    </enumerator>
+    <enumerator>
+        <name>HOST_STATUS</name>
+        <value>0x2223</value>
+    </enumerator>
+    <enumerator>
+        <name>OCC_ACTIVE</name>
+        <value>0x07D2</value>
+    </enumerator>
+    <enumerator>
+        <name>CORE_FREQ</name>
+        <value>0xC1D0</value>
+    </enumerator>
+    <enumerator>
+        <name>APSS_CHANNEL</name>
+        <value>0xC2D7</value>
+    </enumerator>
+    <enumerator>
+        <name>PCI_ACTIVE</name>
+        <value>0xC423</value>
+    </enumerator>
+    <enumerator>
+        <name>REBOOT_COUNT</name>
+        <value>0xC322</value>
+    </enumerator>
+    <enumerator>
+        <name>FAULT</name>
+        <value>0xC700</value>
+    </enumerator>
+    <enumerator>
+        <name>BACKPLANE_FAULT</name>
+        <value>0xC707</value>
+    </enumerator>
+    <enumerator>
+        <name>REF_CLOCK_FAULT</name>
+        <value>0xC7D4</value>
+    </enumerator>
+    <enumerator>
+        <name>PCI_CLOCK_FAULT</name>
+        <value>0xC7D5</value>
+    </enumerator>
+    <enumerator>
+        <name>TOD_CLOCK_FAULT</name>
+        <value>0xC7D6</value>
+    </enumerator>
+    <enumerator>
+        <name>APSS_FAULT</name>
+        <value>0xC7D7</value>
+    </enumerator>
+    <enumerator>
+        <name>DERATING_FACTOR</name>
+        <value>0xC815</value>
+    </enumerator>
+    <enumerator>
+        <name>REDUNDANT_PS_POLICY</name>
+        <value>0xCA22</value>
+    </enumerator>
+</enumerationType>
+
+<enumerationType>
+    <id>SENSOR_TYPE</id>
+    <description>Enumeration indicating the IPMI sensor type, these values
+        are defined in the IPMI specification. These values will be used when
+    sending sensor reading events to the BMC.</description>
+    <enumerator>
+        <name>NA</name>
+        <value>0</value>
+    </enumerator>
+    <enumerator>
+        <name>TEMPERATURE</name>
+        <value>0x01</value>
+    </enumerator>
+    <enumerator>
+        <name>PROCESSOR</name>
+        <value>0x07</value>
+    </enumerator>
+    <enumerator>
+        <name>MEMORY</name>
+        <value>0x0c</value>
+    </enumerator>
+    <enumerator>
+        <name>SYS_FW_PROGRESS</name>
+        <value>0x0F</value>
+    </enumerator>
+    <enumerator>
+        <name>SYS_EVENT</name>
+        <value>0x12</value>
+    </enumerator>
+    <enumerator>
+        <name>OS_BOOT</name>
+       <value>0x1F</value>
+    </enumerator>
+    <enumerator>
+        <name>APCI_POWER_STATE</name>
+        <value>0x22</value>
+    </enumerator>
+    <enumerator>
+        <name>FREQ</name>
+        <value>0xC1</value>
+    </enumerator>
+    <enumerator>
+        <name>POWER</name>
+        <value>0xC2</value>
+    </enumerator>
+    <enumerator>
+        <name>BOOT_COUNT</name>
+        <value>0xC3</value>
+    </enumerator>
+    <enumerator>
+        <name>PCI_LINK_PRES</name>
+        <value>0xC4</value>
+    </enumerator>
+    <enumerator>
+        <name>PWR_LIMIT_ACTIVE</name>
+        <value>0xC4</value>
+    </enumerator>
+    <enumerator>
+        <name>FAULT</name>
+        <value>0xC7</value>
+    </enumerator>
+</enumerationType>
+
+<!-- IPMI Sensor numbers are defined in the IPMI spec as 8 bit values. However
+in the hostboot code they will be defined as a uint16_t to allow us to add
+additonal information. An example relates to error logs returned by the OCC,
+we might want to pass the Entity ID in the upper byte of the sensor ID, this
+would allow hostboot to search only the target type identifed by the Entity
+ID for the sensor number returned with the elog. -->
+
+<!-- attribute to hold 16 pairs of sensor type, sensor number values -->
+<attribute>
+    <id>IPMI_SENSORS</id>
+    <description>Attribute to hold 16 pairs of sensor name, sensor number
+        pairs. A sensor name consists of one byte of general sensor type
+        and one byte of sub-type</description>
+    <simpleType>
+        <uint16_t></uint16_t>
+        <array>16,2</array>
+    </simpleType>
+    <persistency>non-volatile</persistency>
+    <readable/>
+</attribute>
+<enumerationType>
+    <id>IPMI_SENSOR_ARRAY</id>
+    <description>Enumeration defining the offsets into the
+        IPMI_SENSORS array.</description>
+    <enumerator>
+        <name>NAME_OFFSET</name>
+        <value>0x00</value>
+    </enumerator>
+    <enumerator>
+        <name>NUMBER_OFFSET</name>
+        <value>0x01</value>
+    </enumerator>
+</enumerationType>
+
+<attribute>
+    <id>IPMI_MAX_BUFFER_SIZE</id>
+    <description>max buffer size to use for ipmi messages</description>
+    <simpleType>
+        <uint32_t>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hbOnly/>
+</attribute>
+
+<attribute>
+    <id>SERIAL_NUMBER</id>
+    <description>The serial number for a particular FRU target</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>18</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_SERIAL_NUMBER</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+    <hbOnly/>
+</attribute>
+
+<attribute>
+    <id>PART_NUMBER</id>
+    <description>The part number for a particular FRU target</description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+        <array>20</array>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hwpfToHbAttrMap>
+        <id>ATTR_PART_NUMBER</id>
+        <macro>DIRECT</macro>
+    </hwpfToHbAttrMap>
+    <hbOnly/>
+</attribute>
+
+<attribute>
+    <id>MSS_VOLT_VPP_SLOPE_EFF_CONFIG</id>
+    <description>Units: uV/DRAM
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hbOnly/>
+</attribute>
+
+<attribute>
+    <id>MSS_VOLT_VPP_INTERCEPT_EFF_CONFIG</id>
+    <description>Units: mV
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hbOnly/>
+</attribute>
+
+<attribute>
+    <id>MSS_VOLT_DDR3_VDDR_SLOPE_EFF_CONFIG</id>
+    <description>Units: 1/Amps
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hbOnly/>
+</attribute>
+
+<attribute>
+    <id>MSS_VOLT_DDR3_VDDR_INTERCEPT_EFF_CONFIG</id>
+    <description>Units: mV
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hbOnly/>
+</attribute>
+
+<attribute>
+    <id>MRW_DDR3_VDDR_MAX_LIMIT_EFF_CONFIG</id>
+    <description>Maximum voltage limit for the dynamic VID DDR3 VDDR
+        voltage setpoint. In mV.
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hbOnly/>
+</attribute>
+
+<attribute>
+    <id>MSS_VOLT_DDR4_VDDR_SLOPE_EFF_CONFIG</id>
+    <description>Units: 1/Amps
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hbOnly/>
+</attribute>
+
+<attribute>
+    <id>MSS_VOLT_DDR4_VDDR_INTERCEPT_EFF_CONFIG</id>
+    <description>Units: mV
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hbOnly/>
+</attribute>
+
+<attribute>
+    <id>MRW_DDR4_VDDR_MAX_LIMIT_EFF_CONFIG</id>
+    <description>Maximum voltage limit for the dynamic VID DDR4 VDDR voltage
+        setpoint. In mV.
+    </description>
+    <simpleType>
+        <uint32_t>
+            <default>0</default>
+        </uint32_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hbOnly/>
+</attribute>
+
+<attribute>
+    <id>SBE_MASTER_INTR_SERVICE_ENABLED</id>
+    <description>
+       Indicator whether the SBE interupt service is anabled.
+       0=Not Enabled
+       1=Enabled
+    </description>
+    <simpleType>
+        <uint8_t>
+        </uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+    <hbOnly/>
+</attribute>
+
+<attribute>
+    <id>CLEAR_DIMM_SPD_ENABLE</id>
+    <description>
+      Used to enable clearing of SPD on all present DIMMs. This attribute is
+      set via attribute override.
+    </description>
+    <simpleType>
+        <uint8_t></uint8_t>
+    </simpleType>
+    <persistency>volatile-zeroed</persistency>
+    <readable/>
+    <writeable/>
+</attribute>
+
+<attribute>
+  <id>WOF_PROC_SORT</id>
+  <description>
+      creator: platform (MRW)
+      Look up table by active cores and nominal frequency to find WOF table
+      index. First column is number of active cores, Second is nominal
+      frequency, and third is the WOF table index (1,2,3,4).
+  </description>
+  <simpleType>
+    <uint16_t>
+      <default>
+        0,0,0,
+        0,0,0,
+        0,0,0,
+        0,0,0,
+      </default>
+    </uint16_t>
+    <array>4,3</array>
+  </simpleType>
+  <persistency>non-volatile</persistency>
+  <readable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_WOF_PROC_SORT</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+  <id>WOF_FREQUENCY_UPLIFT</id>
+  <description>
+      creator: platform (MRW)
+      WOF frequency uplift table. The columns will be the # of active cores.
+      The rows will be the AC reduction %, or the amount of current difference
+      from the TDP current.  The percentage value is encoded into a integer with
+      a fixed floating point of 2.  (35.8% --> 3580).
+  </description>
+  <simpleType>
+    <uint16_t>
+      <default>
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0
+      </default>
+    </uint16_t>
+    <array>4,22,13</array>
+  </simpleType>
+  <persistency>non-volatile</persistency>
+  <readable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_WOF_FREQUENCY_UPLIFT</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+<attribute>
+  <id>WOF_FREQUENCY_UPLIFT_SELECTED</id>
+  <description>
+      The selected WOF frequency uplift table.
+  </description>
+  <simpleType>
+    <uint16_t>
+    </uint16_t>
+    <array>22,13</array>
+  </simpleType>
+  <persistency>volatile-zeroed</persistency>
+  <readable/>
+  <writeable/>
+  <hbOnly/>
+</attribute>
+
+<attribute>
+  <id>WOF_REGULATOR_EFFICIENCIES</id>
+  <description>
+      creator: platform (MRW)
+      WOF regulator efficiencies.  The rows are the output voltage setting and
+      the columns are the output current.  The data in the table is percentages
+      converted into two byte integers.
+  </description>
+  <simpleType>
+    <uint16_t>
+      <default>
+        0,0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,0,
+        0,0,0,0,0,0,0,0,0,0,0,0,0,0
+      </default>
+    </uint16_t>
+    <array>3,14</array>
+  </simpleType>
+  <persistency>non-volatile</persistency>
+  <readable/>
+  <hwpfToHbAttrMap>
+      <id>ATTR_WOF_REGULATOR_EFFICIENCIES</id>
+      <macro>DIRECT</macro>
+  </hwpfToHbAttrMap>
+</attribute>
+
+</attributes>
diff --git a/xml/attribute_types_mrw.xml b/xml/attribute_types_mrw.xml
index 66f40df..1b138dc 100644
--- a/xml/attribute_types_mrw.xml
+++ b/xml/attribute_types_mrw.xml
@@ -138,9 +138,21 @@
 			<name>INOUT</name>
 			<value>2</value>
 		</enumerator>
+		<enumerator>
+			<name>NA</name>
+			<value>3</value>
+		</enumerator>
 		<default>INOUT</default>
 	</enumerationType>
 	<enumerationType>
+		<id>DRIVER_TYPE</id>
+		<description>Driver Type</description>
+		<enumerator><name>NA</name><value>0</value></enumerator>
+		<enumerator><name>OPEN-DRAIN</name><value>1</value></enumerator>
+		<enumerator><name>PUSH-PULL</name><value>2</value></enumerator>
+		<default>NA</default>
+	</enumerationType>
+	<enumerationType>
 		<id>RAIL_NAME</id>
 		<description>Power supply rail name</description>
 		<enumerator>
@@ -155,6 +167,42 @@
 			<name>VDD</name>
 			<value>2</value>
 		</enumerator>
+		<enumerator>
+			<name>VCS</name>
+			<value>3</value>
+		</enumerator>
+		<enumerator>
+			<name>VIO</name>
+			<value>4</value>
+		</enumerator>
+		<enumerator>
+			<name>VDN</name>
+			<value>5</value>
+		</enumerator>
+		<enumerator>
+			<name>VMEM</name>
+			<value>6</value>
+		</enumerator>
+		<enumerator>
+			<name>CentVDD</name>
+			<value>7</value>
+		</enumerator>
+		<enumerator>
+			<name>CentVCS</name>
+			<value>8</value>
+		</enumerator>	
+		<enumerator>
+			<name>MemIO</name>
+			<value>9</value>
+		</enumerator>
+		<enumerator>
+			<name>AVDD</name>
+			<value>10</value>
+		</enumerator>
+		<enumerator>
+			<name>VPP</name>
+			<value>11</value>
+		</enumerator>																
 		<default>UNKNOWN</default>
 	</enumerationType>
 	<enumerationType>
@@ -176,9 +224,262 @@
 			<name>ENABLE</name>
 			<value>3</value>
 		</enumerator>
+		<enumerator>
+			<name>PRESENCE</name>
+			<value>4</value>
+		</enumerator>
+		<enumerator>
+			<name>LED</name>
+			<value>5</value>
+		</enumerator>
+		<enumerator>
+			<name>GPIO_EXP</name>
+			<value>6</value>
+		</enumerator>
 		<default>GENERIC_OUTPUT</default>
 	</enumerationType>
 	<enumerationType>
+		<id>CARD_TYPE</id>
+		<description>Type of card</description>
+		<enumerator>
+			<name>ANCHOR</name>
+			<value>0</value>
+		</enumerator>
+		<enumerator>
+			<name>BATTERY</name>
+			<value>1</value>
+		</enumerator>
+		<enumerator>
+			<name>CLOCK</name>
+			<value>2</value>
+		</enumerator>
+		<enumerator>
+			<name>CLOCK_INTERFACE</name>
+			<value>3</value>
+		</enumerator>
+		<enumerator>
+			<name>DASD-BP</name>
+			<value>4</value>
+		</enumerator>
+		<enumerator>
+			<name>DAUGHTER</name>
+			<value>5</value>
+		</enumerator>
+		<enumerator>
+			<name>SCM-MODULE</name>
+			<value>6</value>
+		</enumerator>
+		<enumerator>
+			<name>DIMM</name>
+			<value>7</value>
+		</enumerator>
+		<enumerator>
+			<name>FAN</name>
+			<value>8</value>
+		</enumerator>
+		<enumerator>
+			<name>FAN_INTERFACE</name>
+			<value>9</value>
+		</enumerator>
+		<enumerator>
+			<name>FSI_INTERFACE</name>
+			<value>10</value>
+		</enumerator>
+		<enumerator>
+			<name>FSP</name>
+			<value>11</value>
+		</enumerator>
+		<enumerator>
+			<name>HDD</name>
+			<value>12</value>
+		</enumerator>	
+		<enumerator>
+			<name>LCC</name>
+			<value>13</value>
+		</enumerator>	
+		<enumerator>
+			<name>MEZZANINE</name>
+			<value>14</value>
+		</enumerator>	
+		<enumerator>
+			<name>OP_PANEL</name>
+			<value>15</value>
+		</enumerator>
+		<enumerator>
+			<name>PCIE</name>
+			<value>16</value>
+		</enumerator>	
+		<enumerator>
+			<name>PCIE_RISER</name>
+			<value>17</value>
+		</enumerator>	
+		<enumerator>
+			<name>PLANAR</name>
+			<value>18</value>
+		</enumerator>	
+		<enumerator>
+			<name>POWER_DIST</name>
+			<value>19</value>
+		</enumerator>	
+		<enumerator>
+			<name>POWER_INTERFACE</name>
+			<value>20</value>
+		</enumerator>	
+		<enumerator>
+			<name>POWERSUPPLY</name>
+			<value>21</value>
+		</enumerator>	
+		<enumerator>
+			<name>RAID</name>
+			<value>22</value>
+		</enumerator>	
+		<enumerator>
+			<name>RISER</name>
+			<value>23</value>
+		</enumerator>	
+		<enumerator>
+			<name>TPM</name>
+			<value>24</value>
+		</enumerator>	
+		<enumerator>
+			<name>VRM</name>
+			<value>25</value>
+		</enumerator>																																						
+		<default>NA</default>
+	</enumerationType>	
+	<enumerationType>
+		<id>CONNECTOR_TYPE</id>
+		<description>Type of connector</description>
+		<enumerator>
+			<name>AC_POWER</name>
+			<value>0</value>
+		</enumerator>
+		<enumerator>
+			<name>CLOCK</name>
+			<value>1</value>
+		</enumerator>
+		<enumerator>
+			<name>FSP</name>
+			<value>2</value>
+		</enumerator>
+		<enumerator>
+			<name>HMC</name>
+			<value>3</value>
+		</enumerator>
+		<enumerator>
+			<name>NET</name>
+			<value>4</value>
+		</enumerator>
+		<enumerator>
+			<name>PCIE_X8_CARD</name>
+			<value>5</value>
+		</enumerator>
+		<enumerator>
+			<name>PCIE_X16_CARD</name>
+			<value>6</value>
+		</enumerator>
+		<enumerator>
+			<name>SERIAL</name>
+			<value>7</value>
+		</enumerator>
+		<enumerator>
+			<name>SMP</name>
+			<value>8</value>
+		</enumerator>
+		<enumerator>
+			<name>USB</name>
+			<value>9</value>
+		</enumerator>
+		<enumerator>
+			<name>UPIC</name>
+			<value>10</value>
+		</enumerator>
+		<enumerator>
+			<name>CXP</name>
+			<value>11</value>
+		</enumerator>
+		<enumerator>
+			<name>BLUELINK</name>
+			<value>12</value>
+		</enumerator>
+		<default>NA</default>
+	</enumerationType>	
+	<enumerationType>
+		<id>LED_TYPE</id>
+		<description>Type of led</description>
+		<enumerator>
+			<name>ENC_ATTENTION</name>
+			<value>0</value>
+		</enumerator>
+		<enumerator>
+			<name>ENC_IDENTIFY</name>
+			<value>1</value>
+		</enumerator>
+		<enumerator>
+			<name>ENC_FAULT</name>
+			<value>2</value>
+		</enumerator>
+		<enumerator>
+			<name>SYS_POWER</name>
+			<value>3</value>
+		</enumerator>
+		<enumerator>
+			<name>FAULT</name>
+			<value>4</value>
+		</enumerator>
+		<enumerator>
+			<name>POWER</name>
+			<value>5</value>
+		</enumerator>
+		<enumerator>
+			<name>ACTIVITY</name>
+			<value>6</value>
+		</enumerator>	
+		<enumerator>
+			<name>STANDBY_GOOD</name>
+			<value>7</value>
+		</enumerator>						
+		<default>NA</default>		
+		</enumerationType>
+	<enumerationType>
+		<id>VPD_SIZE</id>
+		<description>Size of VPD EEPROM device</description>
+		<enumerator>
+			<name>NA</name>
+			<value>0</value>
+		</enumerator>
+		<enumerator>
+			<name>24c32</name>
+			<value>1</value>
+		</enumerator>
+		<enumerator>
+			<name>24c64</name>
+			<value>2</value>
+		</enumerator>
+		<enumerator>
+			<name>24c512</name>
+			<value>3</value>
+		</enumerator>				
+		<default>NA</default>
+	</enumerationType>
+	<enumerationType>
+		<id>I2C_CONNECTION_TYPE</id>
+		<description>Type of I2C connection</description>
+		<enumerator>
+			<name>NA</name>
+			<value>0</value>
+		</enumerator>
+		<enumerator>
+			<name>CFAM</name>
+			<value>1</value>
+		</enumerator>
+		<enumerator>
+			<name>PIB</name>
+			<value>2</value>
+		</enumerator>			
+		<default>NA</default>
+	</enumerationType>					
+	<enumerationType>
 		<id>VPD_TYPE</id>
 		<description>Types of VPD</description>
 		<enumerator>
@@ -186,25 +487,41 @@
 			<value>0</value>
 		</enumerator>
 		<enumerator>
-			<name>MVPD</name>
+			<name>PMVPD</name>
 			<value>1</value>
 		</enumerator>
 		<enumerator>
-			<name>CVPD</name>
+			<name>RMVPD</name>
 			<value>2</value>
 		</enumerator>
 		<enumerator>
-			<name>SPD</name>
+			<name>PCVPD</name>
 			<value>3</value>
 		</enumerator>
 		<enumerator>
-			<name>PVPD</name>
+			<name>RCVPD</name>
 			<value>4</value>
 		</enumerator>
 		<enumerator>
-			<name>SBE</name>
+			<name>SPD</name>
 			<value>5</value>
 		</enumerator>
+		<enumerator>
+			<name>PVPD</name>
+			<value>6</value>
+		</enumerator>
+		<enumerator>
+			<name>PSBE</name>
+			<value>7</value>
+		</enumerator>
+		<enumerator>
+			<name>RSBE</name>
+			<value>8</value>
+		</enumerator>	
+		<enumerator>
+			<name>DVPD</name>
+			<value>9</value>
+		</enumerator>		
 		<default>NA</default>
 	</enumerationType>
 	<enumerationType>
@@ -278,7 +595,42 @@
 			<name>U750</name>
 			<value>16</value>
 		</enumerator>
-
+		<enumerator>
+			<name>PSI</name>
+			<value>17</value>
+		</enumerator>
+		<enumerator>
+			<name>SPI</name>
+			<value>18</value>
+		</enumerator>
+		<enumerator>
+			<name>UART</name>
+			<value>19</value>
+		</enumerator>
+		<enumerator>
+			<name>PWM</name>
+			<value>20</value>
+		</enumerator>
+		<enumerator>
+			<name>TACH</name>
+			<value>21</value>
+		</enumerator>
+		<enumerator>
+			<name>USB</name>
+			<value>22</value>
+		</enumerator>
+		<enumerator>
+			<name>LPC</name>
+			<value>23</value>
+		</enumerator>
+		<enumerator>
+			<name>CLK</name>
+			<value>24</value>
+		</enumerator>
+		<enumerator>
+			<name>ETHERNET</name>
+			<value>25</value>
+		</enumerator>
 	</enumerationType>
 	<enumerationType>
 		<id>MRW_TYPE</id>
@@ -338,7 +690,38 @@
 			<name>APSS_SENSOR</name>
 			<value>13</value>
 		</enumerator>
-
+		<enumerator>
+			<name>SMARTCHIP</name>
+			<value>13</value>
+		</enumerator>
+		<enumerator>
+			<name>NONIOMUX_GROUP</name>
+			<value>14</value>
+		</enumerator>
+		<enumerator>
+			<name>PASSTHROUGH</name>
+			<value>15</value>
+		</enumerator>
+		<enumerator>
+			<name>USB</name>
+			<value>16</value>
+		</enumerator>
+		<enumerator>
+			<name>TMP</name>
+			<value>17</value>
+		</enumerator>
+		<enumerator>
+			<name>CLK</name>
+			<value>18</value>
+		</enumerator>
+		<enumerator>
+			<name>TARGET_OVERRIDE</name>
+			<value>19</value>
+		</enumerator>
+		<enumerator>
+			<name>TARGET_OVERRIDE_GROUP</name>
+			<value>20</value>
+		</enumerator>
 		<default>NA</default>
 	</enumerationType>
 
@@ -356,6 +739,10 @@
 			<name>FRU</name>
 			<value>2</value>
 		</enumerator>
+		<enumerator>
+			<name>LED</name>
+			<value>3</value>
+		</enumerator>
 		<default>NA</default>
 	</enumerationType>
 	<enumerationType>
@@ -374,10 +761,58 @@
 		</enumerator>
 		<enumerator>
 			<name>BLUE</name>
-			<value>2</value>
+			<value>3</value>
 		</enumerator>
 		<default>GREEN</default>
 	</enumerationType>
+	<enumerationType>
+		<id>BLINK_ROLLUP</id>
+		<enumerator>
+			<name>YES</name>
+			<value>0</value>
+		</enumerator>
+		<enumerator>
+			<name>NO</name>
+			<value>1</value>
+		</enumerator>
+		<default>NO</default>
+	</enumerationType>
+	<enumerationType>
+		<id>VIEW_REAR</id>
+		<enumerator>
+			<name>YES</name>
+			<value>0</value>
+		</enumerator>
+		<enumerator>
+			<name>NO</name>
+			<value>1</value>
+		</enumerator>
+		<default>NO</default>
+	</enumerationType>
+		<enumerationType>
+		<id>VIEW_FRONT</id>
+		<enumerator>
+			<name>YES</name>
+			<value>0</value>
+		</enumerator>
+		<enumerator>
+			<name>NO</name>
+			<value>1</value>
+		</enumerator>
+		<default>NO</default>
+	</enumerationType>
+		<enumerationType>
+		<id>VIEW_INTERNAL</id>
+		<enumerator>
+			<name>YES</name>
+			<value>0</value>
+		</enumerator>
+		<enumerator>
+			<name>NO</name>
+			<value>1</value>
+		</enumerator>
+		<default>NO</default>
+	</enumerationType>
 
 	<attribute>
 		<id>BUS_TYPE</id>
@@ -391,6 +826,44 @@
 		<persistency>volatile-zeroed</persistency>
 		<readable />
 	</attribute>
+	<attribute>
+		<id>BUS_WIDTH</id>
+		<description>Bus Width</description>
+		<simpleType><uint32_t></uint32_t></simpleType>
+		<persistency>volatile-zeroed</persistency>
+		<readable />
+		<serverwizReadonly/>
+	</attribute>
+	<attribute>
+		<id>REGISTER_OFFSET</id>
+		<description>Register offset</description>
+		<simpleType><uint8_t></uint8_t></simpleType>
+		<persistency>volatile-zeroed</persistency>
+		<readable />
+	</attribute>		
+	<attribute>
+		<id>GROUP_NAME</id>
+		<description>Group Name</description>
+		<simpleType>
+			<string>
+			</string>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<writeable />
+		<readable />
+	</attribute>
+
+	<attribute>
+		<id>GROUPED_ATTRIBUTE_NAME</id>
+		<description>Attribute Name to be added to a Group</description>
+		<simpleType>
+			<string>
+			</string>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<writeable />
+		<readable />
+	</attribute>
 
 	<attribute>
 		<id>LED_COLOR</id>
@@ -406,6 +879,54 @@
 		<writeable />
 	</attribute>
 	<attribute>
+		<id>BLINK_ROLLUP</id>
+		<description>Identifies if an LED is a blink rollup</description>
+		<simpleType>
+			<enumeration>
+				<id>BLINK_ROLLUP</id>
+			</enumeration>
+		</simpleType>
+		<persistency>volatile-zeroed</persistency>
+		<readable />
+		<writeable />
+	</attribute>
+		<attribute>
+		<id>VIEW_REAR</id>
+		<description>Identifies if an LED can be viewed from the rear</description>
+		<simpleType>
+			<enumeration>
+				<id>VIEW_REAR</id>
+			</enumeration>
+		</simpleType>
+		<persistency>volatile-zeroed</persistency>
+		<readable />
+		<writeable />
+	</attribute>
+	<attribute>
+		<id>VIEW_FRONT</id>
+		<description>Identifies if an LED can be viewed from the front</description>
+		<simpleType>
+			<enumeration>
+				<id>VIEW_FRONT</id>
+			</enumeration>
+		</simpleType>
+		<persistency>volatile-zeroed</persistency>
+		<readable />
+		<writeable />
+	</attribute>
+	<attribute>
+		<id>VIEW_INTERNAL</id>
+		<description>Identifies if an LED can be viewed internally</description>
+		<simpleType>
+			<enumeration>
+				<id>VIEW_INTERNAL</id>
+			</enumeration>
+		</simpleType>
+		<persistency>volatile-zeroed</persistency>
+		<readable />
+		<writeable />
+	</attribute>
+	<attribute>
 		<id>IO_CONFIG_SELECT</id>
 		<description>configuration select
 		</description>
@@ -443,6 +964,7 @@
 		</simpleType>
 		<persistency>volatile-zeroed</persistency>
 		<readable />
+		<global />
 	</attribute>
 	<attribute>
 		<id>MRU_PREFIX</id>
@@ -469,6 +991,30 @@
 		<serverwizHide/>
 	</attribute>
 	<attribute>
+		<id>FUNCTION</id>
+		<description>Function description</description>
+		<simpleType>
+			<string>
+			</string>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<writeable />
+		<readable />
+		<global />
+	</attribute>
+		<attribute>
+		<id>BLINK_RATE</id>
+		<description>Blink rate</description>
+		<simpleType>
+			<string>
+			</string>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<writeable />
+		<readable />
+		<global />
+	</attribute>
+	<attribute>
 		<id>LOCATION_CODE</id>
 		<description>Location Code</description>
 		<simpleType>
@@ -480,6 +1026,29 @@
 		<readable />
 	</attribute>
 	<attribute>
+		<id>CCIN</id>
+		<description>CCIN</description>
+		<simpleType>
+			<string>
+			</string>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<writeable />
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PSI_ENGINE</id>
+		<description>PSI engine number</description>
+		<simpleType>
+			<uint8_t>
+			</uint8_t>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<writeable />
+		<readable />
+		<global />
+	</attribute>
+	<attribute>
 		<id>FSI_ENGINE</id>
 		<description>FSI engine number</description>
 		<simpleType>
@@ -510,7 +1079,8 @@
 		</simpleType>
 		<persistency>non-volatile</persistency>
 		<readable />
-		<serverwizReadonly/>
+		<writeable />
+		<global />
 	</attribute>
 	<attribute>
 		<id>CMFSI</id>
@@ -524,6 +1094,28 @@
 		<serverwizReadonly/>
 	</attribute>
 	<attribute>
+		<id>SPI_PORT</id>
+		<description>SPI Port</description>
+		<simpleType>
+			<uint8_t>
+			</uint8_t>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+		<serverwizReadonly/>
+	</attribute>
+	<attribute>
+		<id>SPI_ENGINE</id>
+		<description>SPI Engine</description>
+		<simpleType>
+			<uint8_t>
+			</uint8_t>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+		<serverwizReadonly/>
+	</attribute>
+	<attribute>
 		<id>I2C_PORT</id>
 		<description>I2C Port</description>
 		<simpleType>
@@ -555,8 +1147,36 @@
 		<persistency>non-volatile</persistency>
 		<readable />
 		<writeable />
+		<global />
+	</attribute>
+	<attribute>
+		<id>VPD_SIZE</id>
+		<description>Size of VPD EEPROM device</description>
+		<simpleType>
+			<enumeration>
+				<id>VPD_SIZE</id>
+				<default>NA</default>
+			</enumeration>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+		<writeable />
+		<global />
 	</attribute>
 	<attribute>
+		<id>I2C_CONNECTION_TYPE</id>
+		<description>Type of I2C connection</description>
+		<simpleType>
+			<enumeration>
+				<id>I2C_CONNECTION_TYPE</id>
+				<default>NA</default>
+			</enumeration>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+		<writeable />
+	</attribute>		
+	<attribute>
 		<id>I2C_SPEED</id>
 		<description>I2C Speed in kHz</description>
 		<simpleType>
@@ -568,6 +1188,50 @@
 		<writeable />
 	</attribute>
 	<attribute>
+		<id>CARD_TYPE</id>
+		<description>Type of card
+		</description>
+		<simpleType>
+			<enumeration>
+				<id>CARD_TYPE</id>
+				<default>NA</default>
+			</enumeration>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+		<writeable />
+	</attribute>
+	<attribute>
+		<id>CONNECTOR_TYPE</id>
+		<description>Type of connector
+		</description>
+		<simpleType>
+			<enumeration>
+				<id>CONNECTOR_TYPE</id>
+				<default>NA</default>
+			</enumeration>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+		<writeable />
+		<global />
+	</attribute>
+	<attribute>
+		<id>LED_TYPE</id>
+		<description>Type of LED
+		</description>
+		<simpleType>
+			<enumeration>
+				<id>LED_TYPE</id>
+				<default>NA</default>
+			</enumeration>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+		<writeable />
+		<global />
+	</attribute>		
+	<attribute>
 		<id>VPD_TYPE</id>
 		<description>MVPD,CVPD, or SPD</description>
 		<simpleType>
@@ -958,6 +1622,7 @@
 		<persistency>non-volatile</persistency>
 		<readable />
 		<writeable />
+		<global />
 	</attribute>
 	<attribute>
 		<id>GPIO_TYPE</id>
@@ -972,6 +1637,7 @@
 		<persistency>non-volatile</persistency>
 		<readable />
 		<writeable />
+		<global />
 	</attribute>
 	<attribute>
 		<id>IOP_NUM</id>
@@ -1123,6 +1789,15 @@
 		<serverwizReadonly/>
 	</attribute>
 	<attribute>
+		<id>GROUP_KEY</id>
+		<description>Key</description>
+		<simpleType>
+			<string></string>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+	</attribute>	
+	<attribute>
 		<id>ASSOCIATION_TYPE</id>
 		<description>Associates 2 parts together
 		</description>
@@ -1135,6 +1810,7 @@
 		<persistency>non-volatile</persistency>
 		<readable />
 		<writeable />
+		<global />
 	</attribute>
 	<attribute>
 		<id>MEMORY_SIZE_IN_KB</id>
@@ -1149,6 +1825,7 @@
 	<attribute>
 		<id>WRITE_CYCLE_TIME</id>
 		<description>write cycle time of seeprom</description>
+		<group>SYS_POLICY</group>
 		<simpleType>
 			<uint8_t></uint8_t>
 		</simpleType>
@@ -1233,8 +1910,91 @@
 		<readable />
 		<serverwizReadonly/>
 	</attribute>
+	
+	<!-- FSP stuff -->
+	<attribute>
+		<id>PIN_NAME[0]</id>
+		<description>pin name</description>
+		<simpleType>
+			<string></string>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+		<serverwizReadonly/>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME[1]</id>
+		<description>pin name</description>
+		<simpleType>
+			<string></string>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+		<serverwizReadonly/>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME[2]</id>
+		<description>pin name</description>
+		<simpleType>
+			<string></string>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+		<serverwizReadonly/>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME[3]</id>
+		<description>pin name</description>
+		<simpleType>
+			<string></string>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+		<serverwizReadonly/>
+	</attribute>
+	<attribute>
+		<id>PIN_NUM[0]</id>
+		<description>pin name</description>
+		<simpleType>
+			<string></string>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+		<serverwizReadonly/>
+	</attribute>
+	<attribute>
+		<id>PIN_NUM[1]</id>
+		<description>pin name</description>
+		<simpleType>
+			<string></string>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+		<serverwizReadonly/>
+	</attribute>
+	<attribute>
+		<id>PIN_NUM[2]</id>
+		<description>pin name</description>
+		<simpleType>
+			<string></string>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+		<serverwizReadonly/>
+	</attribute>
 	<attribute>
-		<id>SP_IO_NAME0</id>
+		<id>PIN_NUM[3]</id>
+		<description>pin name</description>
+		<simpleType>
+			<string></string>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+		<serverwizReadonly/>
+	</attribute>
+
+	<attribute>
+		<id>SP_IO_NAME[0]</id>
 		<description>dio name for offset 1</description>
 		<simpleType>
 			<string></string>
@@ -1244,7 +2004,7 @@
 		<serverwizReadonly/>
 	</attribute>
 	<attribute>
-		<id>SP_IO_NAME1</id>
+		<id>SP_IO_NAME[1]</id>
 		<description>dio name for offset 2</description>
 		<simpleType>
 			<string></string>
@@ -1254,7 +2014,7 @@
 		<serverwizReadonly/>
 	</attribute>
 	<attribute>
-		<id>SP_IO_NAME2</id>
+		<id>SP_IO_NAME[2]</id>
 		<description>dio name for offset 3</description>
 		<simpleType>
 			<string></string>
@@ -1264,7 +2024,7 @@
 		<serverwizReadonly/>
 	</attribute>
 	<attribute>
-		<id>SP_IO_NAME3</id>
+		<id>SP_IO_NAME[3]</id>
 		<description>dio name for offset 4</description>
 		<simpleType>
 			<string></string>
@@ -1274,6 +2034,130 @@
 		<serverwizReadonly/>
 	</attribute>
 	<attribute>
+		<id>SP_DIRECTION[0]</id>
+		<description>direction</description>
+		<simpleType>
+			<enumeration>
+				<id>DIRECTION</id>
+				<default>NA</default>
+			</enumeration>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+		<serverwizReadonly/>
+	</attribute>
+	<attribute>
+		<id>SP_DIRECTION[1]</id>
+		<description>direction</description>
+		<simpleType>
+			<enumeration>
+				<id>DIRECTION</id>
+					<default>NA</default>
+			</enumeration>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+		<serverwizReadonly/>
+	</attribute>
+	<attribute>
+		<id>SP_DIRECTION[2]</id>
+		<description>direction</description>
+		<simpleType>
+			<enumeration>
+				<id>DIRECTION</id>
+			</enumeration>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+		<serverwizReadonly/>
+	</attribute>
+	<attribute>
+		<id>SP_DIRECTION[3]</id>
+		<description>direction</description>
+		<simpleType>
+			<enumeration>
+				<id>DIRECTION</id>
+			</enumeration>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+		<serverwizReadonly/>
+	</attribute>
+	<attribute>
+		<id>DRIVER_TYPE</id>
+		<description>driver type</description>
+		<simpleType>
+			<enumeration>
+				<id>DRIVER_TYPE</id>
+				<default>NA</default>
+			</enumeration>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+		<global />
+	</attribute>	
+	<attribute>
+		<id>SP_DRIVER_TYPE[0]</id>
+		<description>driver type</description>
+		<simpleType>
+			<enumeration>
+				<id>DRIVER_TYPE</id>
+				<default>NA</default>
+			</enumeration>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+		<serverwizReadonly/>
+	</attribute>
+	<attribute>
+		<id>SP_DRIVER_TYPE[1]</id>
+		<description>driver type</description>
+		<simpleType>
+			<enumeration>
+				<id>DRIVER_TYPE</id>
+				<default>NA</default>
+			</enumeration>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+		<serverwizReadonly/>
+	</attribute>
+	<attribute>
+		<id>SP_DRIVER_TYPE[2]</id>
+		<description>driver type</description>
+		<simpleType>
+			<enumeration>
+				<id>DRIVER_TYPE</id>
+				<default>NA</default>
+			</enumeration>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+		<serverwizReadonly/>
+	</attribute>
+	<attribute>
+		<id>SP_DRIVER_TYPE[3]</id>
+		<description>driver type</description>
+		<simpleType>
+			<enumeration>
+				<id>DRIVER_TYPE</id>
+				<default>NA</default>
+			</enumeration>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+		<serverwizReadonly/>
+	</attribute>
+	<attribute>
+		<id>POR_VALUE</id>
+		<description>gpio power on reset value</description>
+		<simpleType>
+			<uint8_t></uint8_t>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+	</attribute>
+	<attribute>
 		<id>SP_MUX_GROUP</id>
 		<description>IOMUX mux group</description>
 		<simpleType>
@@ -1294,6 +2178,16 @@
 		<serverwizReadonly/>
 	</attribute>
 	<attribute>
+		<id>DIO_START</id>
+		<description>DIO starting index</description>
+		<simpleType>
+			<uint8_t></uint8_t>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+		<serverwizReadonly/>
+	</attribute>	
+	<attribute>
 		<id>SP_DIO_NUM</id>
 		<description>IOMUX DIO number</description>
 		<simpleType>
@@ -1314,6 +2208,84 @@
 		<serverwizReadonly/>
 	</attribute>
 	<attribute>
+		<id>SP_ENGINE_NUM[0]</id>
+		<description>IOMUX Engine number</description>
+		<simpleType>
+			<uint8_t></uint8_t>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+		<serverwizReadonly/>
+	</attribute>	
+	<attribute>
+		<id>SP_ENGINE_NUM[1]</id>
+		<description>IOMUX Engine number</description>
+		<simpleType>
+			<uint8_t></uint8_t>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+		<serverwizReadonly/>
+	</attribute>	
+	<attribute>
+		<id>SP_ENGINE_NUM[2]</id>
+		<description>IOMUX Engine number</description>
+		<simpleType>
+			<uint8_t></uint8_t>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+		<serverwizReadonly/>
+	</attribute>	
+	<attribute>
+		<id>SP_ENGINE_NUM[3]</id>
+		<description>IOMUX Engine number</description>
+		<simpleType>
+			<uint8_t></uint8_t>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+		<serverwizReadonly/>
+	</attribute>
+	<attribute>
+		<id>SP_MODE_CONTROL[0]</id>
+		<description>IOMUX Engine number</description>
+		<simpleType>
+			<uint8_t></uint8_t>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+	</attribute>	
+	<attribute>
+		<id>SP_MODE_CONTROL[1]</id>
+		<description>IOMUX Engine number</description>
+		<simpleType>
+			<uint8_t></uint8_t>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+	</attribute>	
+	<attribute>
+		<id>SP_MODE_CONTROL[2]</id>
+		<description>IOMUX Engine number</description>
+		<simpleType>
+			<uint8_t></uint8_t>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+	</attribute>	
+	<attribute>
+		<id>SP_MODE_CONTROL[3]</id>
+		<description>IOMUX Engine number</description>
+		<simpleType>
+			<uint8_t></uint8_t>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+	</attribute>	
+	
+
+	<attribute>
 		<id>ENTITY_ID_LOOKUP</id>
 		<description>These entity ids map to current target</description>
 		<simpleType>
@@ -1471,7 +2443,7 @@
 	</attribute>
 	<attribute>
 		<id>ADC_CHANNEL_GAIN</id>
-		<description>APSS channel assignment</description>
+		<description>APSS channel gain</description>
 		<simpleType>
 			<string>
 			</string>
@@ -1481,7 +2453,7 @@
 	</attribute>
 	<attribute>
 		<id>ADC_CHANNEL_GROUND</id>
-		<description>APSS channel groud</description>
+		<description>APSS channel ground</description>
 		<simpleType>
 			<string>
 			</string>
@@ -1499,5 +2471,2799 @@
 		<persistency>non-volatile</persistency>
 		<readable />
 	</attribute>
-
+	<attribute>
+		<id>PWM_CHANNEL_ID</id>
+		<description>PWM channel #</description>
+		<simpleType>
+			<uint8_t>
+			</uint8_t>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FAN_PWM_ADDRESS</id>
+		<description>Fan PWM address</description>
+		<simpleType>
+			<uint8_t>
+			</uint8_t>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FAN_PWM_BITMASK</id>
+		<description>Fan PWM bitmask</description>
+		<simpleType>
+			<uint8_t>
+			</uint8_t>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PWM_DUTY_CYCLE_ADDRESS</id>
+		<description>Fan PWM duty cycle address</description>
+		<simpleType>
+			<uint8_t>
+			</uint8_t>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+	</attribute>
+		<attribute>
+		<id>PWM_DUTY_CYCLE_BITMASK</id>
+		<description>Fan PWM duty cycle bitmask</description>
+		<simpleType>
+			<uint8_t>
+			</uint8_t>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>TACH_CHANNEL_ID</id>
+		<description>Fan tach channel #</description>
+		<simpleType>
+			<uint8_t>
+			</uint8_t>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FAN_DOMAIN_REG_ADDRESS</id>
+		<description>Fan tach domain register address</description>
+		<simpleType>
+			<uint8_t>
+			</uint8_t>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+	</attribute>
+		<attribute>
+		<id>FAN_DOMAIN_REG_BITMASK</id>
+		<description>Fan tach domain register bitmask</description>
+		<simpleType>
+			<uint8_t>
+			</uint8_t>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FAN_ERROR_MASK_ADDRESS</id>
+		<description>Fan tach error mask address</description>
+		<simpleType>
+			<uint8_t>
+			</uint8_t>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FAN_ERROR_MASK_BITMASK</id>
+		<description>Fan tach error mask bitmask</description>
+		<simpleType>
+			<uint8_t>
+			</uint8_t>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FAN_ERROR_REG_ADDRESS</id>
+		<description>Fan tach error register address</description>
+		<simpleType>
+			<uint8_t>
+			</uint8_t>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+	</attribute>	
+	<attribute>
+		<id>FAN_ERROR_REG_BITMASK</id>
+		<description>Fan tach error register bitmask</description>
+		<simpleType>
+			<uint8_t>
+			</uint8_t>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+	</attribute>	
+	<attribute>
+		<id>FAN_PARTNER_HS_REG_ADDRESS</id>
+		<description>Fan tach partner HS register address</description>
+		<simpleType>
+			<uint8_t>
+			</uint8_t>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+	</attribute>	
+	<attribute>
+		<id>FAN_PARTNER_HS_REG_BITMASK</id>
+		<description>Fan tach partner HS register bitmask</description>
+		<simpleType>
+			<uint8_t>
+			</uint8_t>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FAN_SPD_REG_HIGH_ADDRESS</id>
+		<description>Fan tach SPD register high address</description>
+		<simpleType>
+			<uint8_t>
+			</uint8_t>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+	</attribute>	
+	<attribute>
+		<id>FAN_SPD_REG_HIGH_BITMASK</id>
+		<description>Fan tach SPD register high bitmask</description>
+		<simpleType>
+			<uint8_t>
+			</uint8_t>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FAN_SPD_REG_LOW_ADDRESS</id>
+		<description>Fan tach SPD register low address</description>
+		<simpleType>
+			<uint8_t>
+			</uint8_t>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+	</attribute>	
+	<attribute>
+		<id>FAN_SPD_REG_LOW_BITMASK</id>
+		<description>Fan tach SPD register low bitmask</description>
+		<simpleType>
+			<uint8_t>
+			</uint8_t>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FAN_TYPE_SEL_ADDRESS</id>
+		<description>Fan tach type select address</description>
+		<simpleType>
+			<uint8_t>
+			</uint8_t>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+	</attribute>	
+	<attribute>
+		<id>FAN_TYPE_SEL_BITMASK</id>
+		<description>Fan tach type select bitmask</description>
+		<simpleType>
+			<uint8_t>
+			</uint8_t>
+		</simpleType>
+		<persistency>non-volatile</persistency>
+		<readable />
+	</attribute>
+	<!-- Start DPSS attributes -->	
+	<attribute>
+		<id>PIN_NUM</id>
+		<simpleType>
+			<string></string>
+		</simpleType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>BITS</id>
+		<simpleType>
+			<string></string>
+		</simpleType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>CHANNEL</id>
+		<complexType>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>CHECK_STAGE</id>
+		<complexType>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>CONFIG_ID</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>CURRENT_MAX</id>
+		<complexType>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>CURRENT_NOM</id>
+		<complexType>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>DEFAULT_VALUE</id>
+		<complexType>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>DEGATE_CPU</id>
+		<complexType>
+		<field>
+			<name>Bit-mask</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>DEGATE_CPU_0</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>DEGATE_CPU_1</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>DEGATE_CPU_2</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>DEGATE_CPU_3</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>DEGATE_INT</id>
+		<complexType>
+		<field>
+			<name>Bit-mask</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>DEGATE_INT_0</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>DEGATE_INT_1</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>DEGATE_INT_2</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>DEGATE_INT_3</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>DEGATE_IO</id>
+		<complexType>
+		<field>
+			<name>Bit-mask</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>DEGATE_IO_0</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>DEGATE_IO_1</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>DEGATE_IO_2</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>DEGATE_IO_3</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>DELAY_CPU</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>DELAY_IO</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>ENABLE_HOLD</id>
+		<complexType>
+		<field>
+			<name>Bit-mask</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>END_COUNT</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>ENGINE</id>
+		<complexType>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>EN_OD</id>
+		<complexType>
+		<field>
+			<name>Bit-mask</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>EN_OD_0</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>EN_OD_1</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>EN_OD_2</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>EN_OD_3</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FAN_DOMAIN_0</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FAN_DOMAIN_1</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FAN_DOMAIN_2</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FAN_DOMAIN_3</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FAN_DOMAIN_REG</id>
+		<complexType>
+		<field>
+			<name>Bit-mask</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FAN_ERRORS_0</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FAN_ERRORS_1</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FAN_ERRORS_2</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FAN_ERRORS_3</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FAN_ERROR_MASK</id>
+		<complexType>
+		<field>
+			<name>Bit-mask</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FAN_ERROR_MASK_0</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FAN_ERROR_MASK_1</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FAN_ERROR_REG</id>
+		<complexType>
+		<field>
+			<name>Bit-mask</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FAN_FFS_CH_0</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FAN_FFS_CH_1</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FAN_HYST_HIGH0</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FAN_HYST_HIGH1</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FAN_HYST_LOW0</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FAN_HYST_LOW1</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FAN_MAN_MODE</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FAN_MODE</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FAN_PARTNER_HS_REG</id>
+		<complexType>
+		<field>
+			<name>Bit-mask</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FAN_PPR0</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FAN_PPR1</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FAN_PRESENCE_0</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FAN_PRESENCE_1</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FAN_PWM_MANUAL</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FAN_SPD_REG_HIGH</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FAN_SPD_REG_LOW</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FAN_TYPE_SEL</id>
+		<complexType>
+		<field>
+			<name>Bit-mask</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FAN_TYPE_SEL0</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FAN_TYPE_SEL1</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FAN_WARNING_CNT</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FAULT_ACTION</id>
+		<complexType>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FAULT_DELAY</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FFS_MIN_TACH_HIGH0</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FFS_MIN_TACH_HIGH1</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FFS_MIN_TACH_LOW0</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FFS_MIN_TACH_LOW1</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FIXED_ADDRESS</id>
+		<complexType>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>GPIO_IN</id>
+		<complexType>
+		<field>
+			<name>Bit-mask</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>I2C_FFS</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>I2C_INT</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>I2C_INT_MASK</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>INSTANCE_ID</id>
+		<simpleType>
+			<string></string>
+		</simpleType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>INVERT_RESETS</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>LS_REG</id>
+		<complexType>
+		<field>
+			<name>Bit-mask</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>MAN_ENABLE</id>
+		<complexType>
+		<field>
+			<name>Bit-mask</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>MAX_FAN_PWM0</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>MAX_FAN_PWM1</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>MIN_FAN_PWM0</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>MIN_FAN_PWM1</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>NUM_PS</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PGOOD INVERT_0</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PGOOD INVERT_1</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PGOOD INVERT_2</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PGOOD INVERT_3</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PGOOD_INVERT</id>
+		<complexType>
+		<field>
+			<name>Bit-mask</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PGOOD_LATCHED</id>
+		<complexType>
+		<field>
+			<name>Bit-mask</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PGOOD_LATCHED_0</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PGOOD_LATCHED_1</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PGOOD_LATCHED_2</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PGOOD_LATCHED_3</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PGOOD_MASK</id>
+		<complexType>
+		<field>
+			<name>Bit-mask</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PGOOD_MASK_0</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PGOOD_MASK_1</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PGOOD_MASK_2</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PGOOD_MASK_3</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PGOOD_PORT</id>
+		<complexType>
+		<field>
+			<name>Bit-mask</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PGOOD_PORT_0</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PGOOD_PORT_1</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PGOOD_PORT_2</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PGOOD_PORT_3</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PGOOD_SLOT</id>
+		<simpleType>
+			<string></string>
+		</simpleType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<complexType>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PORT</id>
+		<complexType>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PRIMARY_DELAY</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PRSNT_REG</id>
+		<complexType>
+		<field>
+			<name>Bit-mask</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PSC0</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PSC1</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PSEQ_CTRL</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PSEQ_OVERRIDE</id>
+		<complexType>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PSEQ_SLOT0</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PSEQ_SLOT1</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PSEQ_SLOT10</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PSEQ_SLOT11</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PSEQ_SLOT12</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PSEQ_SLOT13</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PSEQ_SLOT14</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PSEQ_SLOT15</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PSEQ_SLOT16</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PSEQ_SLOT17</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PSEQ_SLOT18</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PSEQ_SLOT19</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PSEQ_SLOT2</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PSEQ_SLOT20</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PSEQ_SLOT21</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PSEQ_SLOT22</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PSEQ_SLOT23</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PSEQ_SLOT24</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PSEQ_SLOT25</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PSEQ_SLOT26</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PSEQ_SLOT27</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PSEQ_SLOT28</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PSEQ_SLOT29</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PSEQ_SLOT3</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PSEQ_SLOT30</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PSEQ_SLOT31</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PSEQ_SLOT4</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PSEQ_SLOT5</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PSEQ_SLOT6</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PSEQ_SLOT7</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PSEQ_SLOT8</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PSEQ_SLOT9</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PSEQ_SLOT_CNT</id>
+		<complexType>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PWM0</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PWM1</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PWM_DELAY</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PWM_DUTY_CYCLE</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PWM_STEP</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>REBOOT</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>RESERV_REV_CODE</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>RESETS_OUT</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>REV_CODE</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>SECONDARY_DELAY</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>SEC_SEQ</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>SEQUENCE_CNT</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>SLIDING_INDEX</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>SOFT_PGOOD</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>TACH_SET_H0</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>TACH_SET_H1</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>TACH_SET_H2</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>TACH_SET_H3</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>TACH_SET_L0</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>TACH_SET_L1</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>TACH_SET_L2</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>TACH_SET_L3</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>VOLTAGE</id>
+		<complexType>
+		<field>
+			<name>Value</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>WDT_RESET</id>
+		<complexType>
+		<field>
+			<name>Register</name>
+			<type>uint8_t</type>
+			<bits>8</bits>
+		</field>
+		</complexType>
+		<readable />
+	</attribute>
+	<!-- End DPSS attributes -->
+	<!-- APSS attributes -->
+		<attribute>
+		<id>ADC_MAX</id>
+		<description>12 bit max value</description>
+		<simpleType>
+			<string></string>
+		</simpleType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>ADC_VREF</id>
+		<description>V</description>
+		<simpleType>
+			<string></string>
+		</simpleType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>CHANNEL</id>
+		<simpleType>
+			<string></string>
+		</simpleType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FUNCTION_ID</id>
+		<simpleType>
+			<string></string>
+		</simpleType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>FUNCTION_NAME</id>
+		<simpleType>
+			<string></string>
+		</simpleType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>GAIN</id>
+		<simpleType>
+			<string></string>
+		</simpleType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>GND</id>
+		<simpleType>
+			<string></string>
+		</simpleType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>GPIO_P0_MODE</id>
+		<description>1 = output, 0 = input � use GPIO modes tab to fill these out</description>
+		<simpleType>
+			<string></string>
+		</simpleType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>GPIO_P1_MODE</id>
+		<description>1 = output, 0 = input � use GPIO modes tab to fill these out</description>
+		<simpleType>
+			<string></string>
+		</simpleType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>OFFSET</id>
+		<simpleType>
+			<string></string>
+		</simpleType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PIN-NAME</id>
+		<simpleType>
+			<string></string>
+		</simpleType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>PORT</id>
+		<simpleType>
+			<string></string>
+		</simpleType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>VOLTAGE</id>
+		<description>volts</description>
+		<simpleType>
+			<string></string>
+		</simpleType>
+		<readable />
+	</attribute>
+	<!-- end APSS attributes -->
+	<attribute>
+		<id>TARGET_NAME</id>
+		<description>Name of target</description>
+		<simpleType>
+			<string></string>
+		</simpleType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>MRW_ID</id>
+		<description>Name identifying a given system MRW</description>
+		<simpleType>
+			<string></string>
+		</simpleType>
+		<readable />
+	</attribute>
+	<attribute>
+		<id>CHECK_SCRIPT</id>
+		<description>Name of checking script to run when Run Checks button is clicked</description>
+		<simpleType>
+			<string></string>
+		</simpleType>
+		<readable />
+	</attribute>
 </attributes>
diff --git a/xml/attribute_types_obmc.xml b/xml/attribute_types_obmc.xml
new file mode 100644
index 0000000..fe43892
--- /dev/null
+++ b/xml/attribute_types_obmc.xml
@@ -0,0 +1,2 @@
+<attributes>

+</attributes>
\ No newline at end of file
diff --git a/xml/errata/errata_example.xml b/xml/errata/errata_example.xml
new file mode 100644
index 0000000..b0999ac
--- /dev/null
+++ b/xml/errata/errata_example.xml
@@ -0,0 +1,15 @@
+<erratas>

+<errata>

+	<errata_id>errata.date.id</errata_id>

+	<description>Issue with clocking</description>

+	<target_type>target_type</target_type>

+	<attribute>

+		<id>REDUNDANT_CLOCKS</id>

+		<default>1</default>

+	</attribute>

+	<attribute>

+		<id>TEST_MIN_STRING</id>

+		<default>false</default>

+	</attribute>

+</errata>

+</erratas>

diff --git a/xml/parts/89LPC932.xml b/xml/parts/89LPC932.xml
new file mode 100644
index 0000000..3dfb1af
--- /dev/null
+++ b/xml/parts/89LPC932.xml
@@ -0,0 +1,589 @@
+<partInstance>
+<version>2.1</version>
+<targetInstances>
+<targetPart>
+	<id>89LPC932</id>
+	<type>chip-89LPC932</type>
+	<is_root>true</is_root>
+	<instance_name>89LPC932</instance_name>
+	<position>-1</position>
+	<parent>chip</parent>
+	<parent_type>card-motherboard</parent_type>
+	<parent_type>card-daughtercard</parent_type>
+	<child_id>89LPC932.i2c-0</child_id>
+	<child_id>89LPC932.gpio-slave-0</child_id>
+	<child_id>89LPC932.gpio-slave-1</child_id>
+	<child_id>89LPC932.gpio-slave-2</child_id>
+	<child_id>89LPC932.gpio-slave-3</child_id>
+	<child_id>89LPC932.gpio-slave-4</child_id>
+	<child_id>89LPC932.gpio-slave-5</child_id>
+	<child_id>89LPC932.gpio-slave-6</child_id>
+	<child_id>89LPC932.gpio-slave-7</child_id>
+	<child_id>89LPC932.gpio-master-8</child_id>
+	<attribute>
+		<id>CCIN</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>CHIP_ID</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>CHIP</default>
+	</attribute>
+	<attribute>
+		<id>LOCATION_CODE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>LOCATION_CODE_TYPE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRU_ID</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>POSITION</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default></default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>89LPC932.i2c-0</id>
+	<type>unit-i2c-slave</type>
+	<is_root>false</is_root>
+	<instance_name>89LPC932.i2c</instance_name>
+	<position>0</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>I2C</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>IN</default>
+	</attribute>
+	<attribute>
+		<id>I2C_ADDRESS</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>I2C_ENGINE</id>
+		<default>0x00</default>
+	</attribute>
+	<attribute>
+		<id>I2C_PORT</id>
+		<default>0x00</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>89LPC932.gpio-slave-0</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>89LPC932.gpio-slave</instance_name>
+	<position>0</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>IN</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>89LPC932.gpio-slave-1</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>89LPC932.gpio-slave</instance_name>
+	<position>1</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>IN</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>89LPC932.gpio-slave-2</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>89LPC932.gpio-slave</instance_name>
+	<position>2</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>IN</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>89LPC932.gpio-slave-3</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>89LPC932.gpio-slave</instance_name>
+	<position>3</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>IN</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>89LPC932.gpio-slave-4</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>89LPC932.gpio-slave</instance_name>
+	<position>4</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>IN</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>89LPC932.gpio-slave-5</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>89LPC932.gpio-slave</instance_name>
+	<position>5</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>IN</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>89LPC932.gpio-slave-6</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>89LPC932.gpio-slave</instance_name>
+	<position>6</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>IN</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>89LPC932.gpio-slave-7</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>89LPC932.gpio-slave</instance_name>
+	<position>7</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>IN</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>89LPC932.gpio-master-8</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>89LPC932.gpio-master</instance_name>
+	<position>8</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>OUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+</targetInstances>
+</partInstance>
diff --git a/xml/parts/ANDGATE.xml b/xml/parts/ANDGATE.xml
new file mode 100644
index 0000000..e2d7fc6
--- /dev/null
+++ b/xml/parts/ANDGATE.xml
@@ -0,0 +1,165 @@
+<partInstance>

+<version>2.1</version>

+<targetInstances>

+<targetPart>

+	<id>ANDGATE</id>

+	<type>chip-ANDGATE</type>

+	<is_root>true</is_root>

+	<instance_name>ANDGATE</instance_name>

+	<position>-1</position>

+	<parent>chip</parent>

+	<parent_type>card-motherboard</parent_type>

+	<parent_type>card-daughtercard</parent_type>

+	<child_id>ANDGATE.gpio-master-0</child_id>

+	<child_id>ANDGATE.gpio-slave-1</child_id>

+	<attribute>

+		<id>CCIN</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>CHIP_ID</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>CHIP</default>

+	</attribute>

+	<attribute>

+		<id>LOCATION_CODE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>LOCATION_CODE_TYPE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRU_ID</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>POSITION</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default></default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>ANDGATE.gpio-master-0</id>

+	<type>unit-gpio-generic</type>

+	<is_root>false</is_root>

+	<instance_name>ANDGATE.gpio-master</instance_name>

+	<position>0</position>

+	<parent>unit</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>GPIO</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>OUT</default>

+	</attribute>

+	<attribute>

+		<id>GPIO_TYPE</id>

+		<default>GENERIC_OUTPUT</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>PIN_NAME</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>SCHEMATIC_INTERFACE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>ANDGATE.gpio-slave-1</id>

+	<type>unit-gpio-generic</type>

+	<is_root>false</is_root>

+	<instance_name>ANDGATE.gpio-slave</instance_name>

+	<position>1</position>

+	<parent>unit</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>GPIO</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>IN</default>

+	</attribute>

+	<attribute>

+		<id>GPIO_TYPE</id>

+		<default>GENERIC_OUTPUT</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>PIN_NAME</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>SCHEMATIC_INTERFACE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+</targetInstances>

+</partInstance>

diff --git a/xml/parts/AST2500.xml b/xml/parts/AST2500.xml
new file mode 100644
index 0000000..e3efd1a
--- /dev/null
+++ b/xml/parts/AST2500.xml
@@ -0,0 +1,88 @@
+<partInstance>
+<version>2.1</version>
+<targetInstances>
+<targetPart>
+	<id>AST2500</id>
+	<type>chip-AST2500</type>
+	<is_root>true</is_root>
+	<instance_name>AST2500</instance_name>
+	<position>-1</position>
+	<parent>chip</parent>
+	<parent_type>card-motherboard</parent_type>
+	<parent_type>card-daughtercard</parent_type>
+	<child_id>AST2500.lpc-0</child_id>
+	<attribute>
+		<id>CHIP_ID</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>CHIP</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRU_ID</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>POSITION</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default></default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>AST2500.lpc-0</id>
+	<type>unit-lpc-slave</type>
+	<is_root>false</is_root>
+	<instance_name>AST2500.lpc</instance_name>
+	<position>0</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>LPC</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>IN</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+</targetInstances>
+</partInstance>
diff --git a/xml/parts/BMP280.xml b/xml/parts/BMP280.xml
new file mode 100644
index 0000000..e5b997b
--- /dev/null
+++ b/xml/parts/BMP280.xml
@@ -0,0 +1,112 @@
+<partInstance>
+<version>2.1</version>
+<targetInstances>
+<targetPart>
+	<id>BMP280</id>
+	<type>chip-BMP280</type>
+	<is_root>true</is_root>
+	<instance_name>BMP280</instance_name>
+	<position>-1</position>
+	<parent>chip</parent>
+	<parent_type>card-motherboard</parent_type>
+	<parent_type>card-daughtercard</parent_type>
+	<child_id>BMP280.i2c-0</child_id>
+	<attribute>
+		<id>CCIN</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>CHIP_ID</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>CHIP</default>
+	</attribute>
+	<attribute>
+		<id>LOCATION_CODE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>LOCATION_CODE_TYPE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRU_ID</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>POSITION</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default></default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>BMP280.i2c-0</id>
+	<type>unit-i2c-slave</type>
+	<is_root>false</is_root>
+	<instance_name>BMP280.i2c</instance_name>
+	<position>0</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>I2C</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>IN</default>
+	</attribute>
+	<attribute>
+		<id>I2C_ADDRESS</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>I2C_ENGINE</id>
+		<default>0x00</default>
+	</attribute>
+	<attribute>
+		<id>I2C_PORT</id>
+		<default>0x00</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+</targetInstances>
+</partInstance>
diff --git a/xml/parts/CY14B101I.xml b/xml/parts/CY14B101I.xml
new file mode 100644
index 0000000..5f71e1d
--- /dev/null
+++ b/xml/parts/CY14B101I.xml
@@ -0,0 +1,112 @@
+<partInstance>
+<version>2.1</version>
+<targetInstances>
+<targetPart>
+	<id>CY14B101I</id>
+	<type>chip-CY14B101I</type>
+	<is_root>true</is_root>
+	<instance_name>CY14B101I</instance_name>
+	<position>-1</position>
+	<parent>chip</parent>
+	<parent_type>card-motherboard</parent_type>
+	<parent_type>card-daughtercard</parent_type>
+	<child_id>CY14B101I.i2c-0</child_id>
+	<attribute>
+		<id>CCIN</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>CHIP_ID</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>CHIP</default>
+	</attribute>
+	<attribute>
+		<id>LOCATION_CODE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>LOCATION_CODE_TYPE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRU_ID</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>POSITION</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default></default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>CY14B101I.i2c-0</id>
+	<type>unit-i2c-slave</type>
+	<is_root>false</is_root>
+	<instance_name>CY14B101I.i2c</instance_name>
+	<position>0</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>I2C</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>IN</default>
+	</attribute>
+	<attribute>
+		<id>I2C_ADDRESS</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>I2C_ENGINE</id>
+		<default>0x00</default>
+	</attribute>
+	<attribute>
+		<id>I2C_PORT</id>
+		<default>0x00</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+</targetInstances>
+</partInstance>
diff --git a/xml/parts/EPSON-MOSO.xml b/xml/parts/EPSON-MOSO.xml
new file mode 100644
index 0000000..279d1ef
--- /dev/null
+++ b/xml/parts/EPSON-MOSO.xml
@@ -0,0 +1,337 @@
+<partInstance>
+<version>2.1</version>
+<targetInstances>
+<targetPart>
+	<id>EPSON-MOSO</id>
+	<type>chip-EPSON-MOSO</type>
+	<is_root>true</is_root>
+	<instance_name>EPSON-MOSO</instance_name>
+	<parent_type>card-motherboard</parent_type>
+	<parent_type>card-daughtercard</parent_type>
+	<position>-1</position>
+	<parent>chip</parent>
+	<child_id>EPSON-MOSO.i2c-0</child_id>
+	<child_id>EPSON-MOSO.OUT0-0</child_id>
+	<child_id>EPSON-MOSO.OUT1-1</child_id>
+	<child_id>EPSON-MOSO.OUT2-2</child_id>
+	<child_id>EPSON-MOSO.OUT3-3</child_id>
+	<child_id>EPSON-MOSO.vin-0</child_id>
+	<attribute>
+		<id>CCIN</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>CHIP_ID</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>CHIP</default>
+	</attribute>
+	<attribute>
+		<id>LOCATION_CODE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>LOCATION_CODE_TYPE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRU_ID</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>POSITION</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default></default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>EPSON-MOSO.i2c-0</id>
+	<type>unit-i2c-slave</type>
+	<is_root>false</is_root>
+	<instance_name>EPSON-MOSO.i2c</instance_name>
+	<position>0</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>I2C</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>IN</default>
+	</attribute>
+	<attribute>
+		<id>I2C_ADDRESS</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>I2C_ENGINE</id>
+		<default>0x00</default>
+	</attribute>
+	<attribute>
+		<id>I2C_PORT</id>
+		<default>0x00</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>EPSON-MOSO.OUT0-0</id>
+	<type>unit-clk-master</type>
+	<is_root>false</is_root>
+	<instance_name>EPSON-MOSO.OUT0</instance_name>
+	<position>0</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>CLK</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>OUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>EPSON-MOSO.OUT1-1</id>
+	<type>unit-clk-master</type>
+	<is_root>false</is_root>
+	<instance_name>EPSON-MOSO.OUT1</instance_name>
+	<position>1</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>CLK</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>OUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>EPSON-MOSO.OUT2-2</id>
+	<type>unit-clk-master</type>
+	<is_root>false</is_root>
+	<instance_name>EPSON-MOSO.OUT2</instance_name>
+	<position>2</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>CLK</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>OUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>EPSON-MOSO.OUT3-3</id>
+	<type>unit-clk-master</type>
+	<is_root>false</is_root>
+	<instance_name>EPSON-MOSO.OUT3</instance_name>
+	<position>3</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>CLK</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>OUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>EPSON-MOSO.vin-0</id>
+	<type>unit-vin-generic</type>
+	<is_root>false</is_root>
+	<instance_name>EPSON-MOSO.vin</instance_name>
+	<position>0</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>POWER</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>IN</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>RAIL_NAME</id>
+		<default>UNKNOWN</default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+</targetInstances>
+</partInstance>
diff --git a/xml/parts/FAN_COUNTER_ROTATING.xml b/xml/parts/FAN_COUNTER_ROTATING.xml
new file mode 100644
index 0000000..7a094b5
--- /dev/null
+++ b/xml/parts/FAN_COUNTER_ROTATING.xml
@@ -0,0 +1,322 @@
+<partInstance>
+<version>2.1</version>
+<targetInstances>
+<targetPart>
+	<id>FAN_COUNTER_ROTATING</id>
+	<type>chip-FAN_COUNTER_ROTATING</type>
+	<is_root>true</is_root>
+	<instance_name>FAN_COUNTER_ROTATING</instance_name>
+	<position>-1</position>
+	<parent>chip</parent>
+	<parent_type>card-motherboard</parent_type>
+	<parent_type>card-daughtercard</parent_type>
+	<child_id>FAN_COUNTER_ROTATING.pwm-0</child_id>
+	<child_id>FAN_COUNTER_ROTATING.tach-0</child_id>
+	<child_id>FAN_COUNTER_ROTATING.tach-1</child_id>
+	<attribute>
+		<id>CCIN</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>CHIP_ID</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>CHIP</default>
+	</attribute>
+	<attribute>
+		<id>LOCATION_CODE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>LOCATION_CODE_TYPE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRU_ID</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>POSITION</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default></default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>FAN_COUNTER_ROTATING.pwm-0</id>
+	<type>unit-pwm-generic</type>
+	<is_root>false</is_root>
+	<instance_name>FAN_COUNTER_ROTATING.pwm</instance_name>
+	<position>0</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>PWM</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>IN</default>
+	</attribute>
+	<attribute>
+		<id>FAN_PWM_ADDRESS</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>FAN_PWM_BITMASK</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PWM_CHANNEL_ID</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>PWM_DUTY_CYCLE_ADDRESS</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>PWM_DUTY_CYCLE_BITMASK</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>FAN_COUNTER_ROTATING.tach-0</id>
+	<type>unit-tach-generic</type>
+	<is_root>false</is_root>
+	<instance_name>FAN_COUNTER_ROTATING.tach</instance_name>
+	<position>0</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>TACH</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>OUT</default>
+	</attribute>
+	<attribute>
+		<id>FAN_DOMAIN_REG_ADDRESS</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>FAN_DOMAIN_REG_BITMASK</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>FAN_ERROR_MASK_ADDRESS</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>FAN_ERROR_MASK_BITMASK</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>FAN_ERROR_REG_ADDRESS</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>FAN_ERROR_REG_BITMASK</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>FAN_PARTNER_HS_REG_ADDRESS</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>FAN_PARTNER_HS_REG_BITMASK</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>FAN_SPD_REG_HIGH_ADDRESS</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>FAN_SPD_REG_HIGH_BITMASK</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>FAN_SPD_REG_LOW_ADDRESS</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>FAN_SPD_REG_LOW_BITMASK</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>FAN_TYPE_SEL_ADDRESS</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>FAN_TYPE_SEL_BITMASK</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TACH_CHANNEL_ID</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>FAN_COUNTER_ROTATING.tach-1</id>
+	<type>unit-tach-generic</type>
+	<is_root>false</is_root>
+	<instance_name>FAN_COUNTER_ROTATING.tach</instance_name>
+	<position>1</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>TACH</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>OUT</default>
+	</attribute>
+	<attribute>
+		<id>FAN_DOMAIN_REG_ADDRESS</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>FAN_DOMAIN_REG_BITMASK</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>FAN_ERROR_MASK_ADDRESS</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>FAN_ERROR_MASK_BITMASK</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>FAN_ERROR_REG_ADDRESS</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>FAN_ERROR_REG_BITMASK</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>FAN_PARTNER_HS_REG_ADDRESS</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>FAN_PARTNER_HS_REG_BITMASK</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>FAN_SPD_REG_HIGH_ADDRESS</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>FAN_SPD_REG_HIGH_BITMASK</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>FAN_SPD_REG_LOW_ADDRESS</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>FAN_SPD_REG_LOW_BITMASK</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>FAN_TYPE_SEL_ADDRESS</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>FAN_TYPE_SEL_BITMASK</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TACH_CHANNEL_ID</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+</targetInstances>
+</partInstance>
diff --git a/xml/parts/IDT9DBL04.xml b/xml/parts/IDT9DBL04.xml
new file mode 100644
index 0000000..7c5f23b
--- /dev/null
+++ b/xml/parts/IDT9DBL04.xml
@@ -0,0 +1,337 @@
+<partInstance>
+<version>2.1</version>
+<targetInstances>
+<targetPart>
+	<id>IDT9DBL04</id>
+	<type>chip-IDT9DBL04</type>
+	<is_root>true</is_root>
+	<instance_name>IDT9DBL04</instance_name>
+	<parent_type>card-motherboard</parent_type>
+	<parent_type>card-daughtercard</parent_type>
+	<position>-1</position>
+	<parent>chip</parent>
+	<child_id>IDT9DBL04.i2c-0</child_id>
+	<child_id>IDT9DBL04.DIF0-0</child_id>
+	<child_id>IDT9DBL04.DIF1-1</child_id>
+	<child_id>IDT9DBL04.DIF2-2</child_id>
+	<child_id>IDT9DBL04.DIF3-3</child_id>
+	<child_id>IDT9DBL04.vin-0</child_id>
+	<attribute>
+		<id>CCIN</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>CHIP_ID</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>CHIP</default>
+	</attribute>
+	<attribute>
+		<id>LOCATION_CODE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>LOCATION_CODE_TYPE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRU_ID</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>POSITION</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default></default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>IDT9DBL04.i2c-0</id>
+	<type>unit-i2c-slave</type>
+	<is_root>false</is_root>
+	<instance_name>IDT9DBL04.i2c</instance_name>
+	<position>0</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>I2C</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>IN</default>
+	</attribute>
+	<attribute>
+		<id>I2C_ADDRESS</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>I2C_ENGINE</id>
+		<default>0x00</default>
+	</attribute>
+	<attribute>
+		<id>I2C_PORT</id>
+		<default>0x00</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>IDT9DBL04.DIF0-0</id>
+	<type>unit-clk-master</type>
+	<is_root>false</is_root>
+	<instance_name>IDT9DBL04.DIF0</instance_name>
+	<position>0</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>CLK</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>OUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>IDT9DBL04.DIF1-1</id>
+	<type>unit-clk-master</type>
+	<is_root>false</is_root>
+	<instance_name>IDT9DBL04.DIF1</instance_name>
+	<position>1</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>CLK</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>OUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>IDT9DBL04.DIF2-2</id>
+	<type>unit-clk-master</type>
+	<is_root>false</is_root>
+	<instance_name>IDT9DBL04.DIF2</instance_name>
+	<position>2</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>CLK</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>OUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>IDT9DBL04.DIF3-3</id>
+	<type>unit-clk-master</type>
+	<is_root>false</is_root>
+	<instance_name>IDT9DBL04.DIF3</instance_name>
+	<position>3</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>CLK</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>OUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>IDT9DBL04.vin-0</id>
+	<type>unit-vin-generic</type>
+	<is_root>false</is_root>
+	<instance_name>IDT9DBL04.vin</instance_name>
+	<position>0</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>POWER</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>IN</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>RAIL_NAME</id>
+		<default>UNKNOWN</default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+</targetInstances>
+</partInstance>
diff --git a/xml/parts/IDT9FGS9093.xml b/xml/parts/IDT9FGS9093.xml
new file mode 100644
index 0000000..6c804db
--- /dev/null
+++ b/xml/parts/IDT9FGS9093.xml
@@ -0,0 +1,427 @@
+<partInstance>
+<version>2.1</version>
+<targetInstances>
+<targetPart>
+	<id>IDT09FGS9093</id>
+	<type>chip-IDT09FGS9093</type>
+	<is_root>true</is_root>
+	<instance_name>IDT09FGS9093</instance_name>
+	<parent_type>card-motherboard</parent_type>
+	<parent_type>card-daughtercard</parent_type>
+	<position>-1</position>
+	<parent>chip</parent>
+	<child_id>IDT09FGS9093.i2c-0</child_id>
+	<child_id>IDT09FGS9093.REF0-0</child_id>
+	<child_id>IDT09FGS9093.REF1-1</child_id>
+	<child_id>IDT09FGS9093.OUT0-2</child_id>
+	<child_id>IDT09FGS9093.OUT1-3</child_id>
+	<child_id>IDT09FGS9093.OUT2-4</child_id>
+	<child_id>IDT09FGS9093.OUT3-5</child_id>
+	<child_id>IDT09FGS9093.vin-0</child_id>
+	<attribute>
+		<id>CCIN</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>CHIP_ID</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>CHIP</default>
+	</attribute>
+	<attribute>
+		<id>LOCATION_CODE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>LOCATION_CODE_TYPE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRU_ID</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>POSITION</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default></default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>IDT09FGS9093.i2c-0</id>
+	<type>unit-i2c-slave</type>
+	<is_root>false</is_root>
+	<instance_name>IDT09FGS9093.i2c</instance_name>
+	<position>0</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>I2C</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>IN</default>
+	</attribute>
+	<attribute>
+		<id>I2C_ADDRESS</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>I2C_ENGINE</id>
+		<default>0x00</default>
+	</attribute>
+	<attribute>
+		<id>I2C_PORT</id>
+		<default>0x00</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>IDT09FGS9093.REF0-0</id>
+	<type>unit-clk-master</type>
+	<is_root>false</is_root>
+	<instance_name>IDT09FGS9093.REF0</instance_name>
+	<position>0</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>CLK</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>OUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>IDT09FGS9093.REF1-1</id>
+	<type>unit-clk-master</type>
+	<is_root>false</is_root>
+	<instance_name>IDT09FGS9093.REF1</instance_name>
+	<position>1</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>CLK</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>OUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>IDT09FGS9093.OUT0-2</id>
+	<type>unit-clk-master</type>
+	<is_root>false</is_root>
+	<instance_name>IDT09FGS9093.OUT0</instance_name>
+	<position>2</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>CLK</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>OUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>IDT09FGS9093.OUT1-3</id>
+	<type>unit-clk-master</type>
+	<is_root>false</is_root>
+	<instance_name>IDT09FGS9093.OUT1</instance_name>
+	<position>3</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>CLK</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>OUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>IDT09FGS9093.OUT2-4</id>
+	<type>unit-clk-master</type>
+	<is_root>false</is_root>
+	<instance_name>IDT09FGS9093.OUT2</instance_name>
+	<position>4</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>CLK</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>OUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>IDT09FGS9093.OUT3-5</id>
+	<type>unit-clk-master</type>
+	<is_root>false</is_root>
+	<instance_name>IDT09FGS9093.OUT3</instance_name>
+	<position>5</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>CLK</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>OUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>IDT09FGS9093.vin-0</id>
+	<type>unit-vin-generic</type>
+	<is_root>false</is_root>
+	<instance_name>IDT09FGS9093.vin</instance_name>
+	<position>0</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>POWER</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>IN</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>RAIL_NAME</id>
+		<default>UNKNOWN</default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+</targetInstances>
+</partInstance>
diff --git a/xml/parts/IR35219.xml b/xml/parts/IR35219.xml
new file mode 100644
index 0000000..688d831
--- /dev/null
+++ b/xml/parts/IR35219.xml
@@ -0,0 +1,466 @@
+<partInstance>

+<version>2.1</version>

+<targetInstances>

+<targetPart>

+	<id>IR35219</id>

+	<type>chip-IR35219</type>

+	<is_root>true</is_root>

+	<instance_name>IR35219</instance_name>

+	<position>-1</position>

+	<parent>chip</parent>

+	<parent_type>card-motherboard</parent_type>

+	<parent_type>card-daughtercard</parent_type>

+	<child_id>IR35219.vout-0</child_id>

+	<child_id>IR35219.i2c-0</child_id>

+	<child_id>IR35219.enable-0</child_id>

+	<child_id>IR35219.pgood-0</child_id>

+	<child_id>IR35219.gpio-0</child_id>

+	<child_id>IR35219.gpio-1</child_id>

+	<child_id>IR35219.gpio-2</child_id>

+	<child_id>IR35219.gpio-3</child_id>

+	<attribute>

+		<id>CCIN</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>CHIP_ID</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>CHIP</default>

+	</attribute>

+	<attribute>

+		<id>LOCATION_CODE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>LOCATION_CODE_TYPE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRU_ID</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>VOLTAGE_REGULATOR</default>

+	</attribute>

+	<attribute>

+		<id>POSITION</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default></default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>IR35219.vout-0</id>

+	<type>unit-vout-generic</type>

+	<is_root>false</is_root>

+	<instance_name>IR35219.vout</instance_name>

+	<position>0</position>

+	<parent>unit</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>POWER</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>OUT</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>RAIL_NAME</id>

+		<default>UNKNOWN</default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>IR35219.i2c-0</id>

+	<type>unit-i2c-slave</type>

+	<is_root>false</is_root>

+	<instance_name>IR35219.i2c</instance_name>

+	<position>0</position>

+	<parent>unit</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>I2C</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>IN</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+			<id>I2C_ADDRESS</id>

+		</attribute>

+</targetPart>

+<targetPart>

+	<id>IR35219.enable-0</id>

+	<type>unit-enable-generic</type>

+	<is_root>false</is_root>

+	<instance_name>IR35219.enable</instance_name>

+	<position>0</position>

+	<parent>unit-gpio-generic</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>GPIO</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>IN</default>

+	</attribute>

+	<attribute>

+		<id>GPIO_TYPE</id>

+		<default>ENABLE</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>PIN_NAME</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>SCHEMATIC_INTERFACE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>IR35219.pgood-0</id>

+	<type>unit-pgood-generic</type>

+	<is_root>false</is_root>

+	<instance_name>IR35219.pgood</instance_name>

+	<position>0</position>

+	<parent>unit-gpio-generic</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>GPIO</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>IN</default>

+	</attribute>

+	<attribute>

+		<id>GPIO_TYPE</id>

+		<default>PGOOD</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>PIN_NAME</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>SCHEMATIC_INTERFACE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>IR35219.gpio-0</id>

+	<type>unit-gpio-generic</type>

+	<is_root>false</is_root>

+	<instance_name>IR35219.gpio</instance_name>

+	<position>0</position>

+	<parent>unit</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>GPIO</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>INOUT</default>

+	</attribute>

+	<attribute>

+		<id>GPIO_TYPE</id>

+		<default>GENERIC_OUTPUT</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>PIN_NAME</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>SCHEMATIC_INTERFACE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>IR35219.gpio-1</id>

+	<type>unit-gpio-generic</type>

+	<is_root>false</is_root>

+	<instance_name>IR35219.gpio</instance_name>

+	<position>1</position>

+	<parent>unit</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>GPIO</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>INOUT</default>

+	</attribute>

+	<attribute>

+		<id>GPIO_TYPE</id>

+		<default>GENERIC_OUTPUT</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>PIN_NAME</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>SCHEMATIC_INTERFACE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>IR35219.gpio-2</id>

+	<type>unit-gpio-generic</type>

+	<is_root>false</is_root>

+	<instance_name>IR35219.gpio</instance_name>

+	<position>2</position>

+	<parent>unit</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>GPIO</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>INOUT</default>

+	</attribute>

+	<attribute>

+		<id>GPIO_TYPE</id>

+		<default>GENERIC_OUTPUT</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>PIN_NAME</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>SCHEMATIC_INTERFACE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>IR35219.gpio-3</id>

+	<type>unit-gpio-generic</type>

+	<is_root>false</is_root>

+	<instance_name>IR35219.gpio</instance_name>

+	<position>3</position>

+	<parent>unit</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>GPIO</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>INOUT</default>

+	</attribute>

+	<attribute>

+		<id>GPIO_TYPE</id>

+		<default>GENERIC_OUTPUT</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>PIN_NAME</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>SCHEMATIC_INTERFACE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+</targetInstances>

+</partInstance>

diff --git a/xml/parts/IR35219_special.xml b/xml/parts/IR35219_special.xml
new file mode 100644
index 0000000..f3364be
--- /dev/null
+++ b/xml/parts/IR35219_special.xml
@@ -0,0 +1,626 @@
+<partInstance>

+<version>2.1</version>

+<targetInstances>

+<targetPart>

+	<id>IR35219_special</id>

+	<type>chip-IR35219_special</type>

+	<is_root>true</is_root>

+	<instance_name>IR35219_special</instance_name>

+	<position>-1</position>

+	<parent>chip</parent>

+	<parent_type>card-motherboard</parent_type>

+	<parent_type>card-daughtercard</parent_type>

+	<child_id>IR35219_special.vout-0</child_id>

+	<child_id>IR35219_special.vout-1</child_id>

+	<child_id>IR35219_special.i2c-0</child_id>

+	<child_id>IR35219_special.enable-0</child_id>

+	<child_id>IR35219_special.enable-1</child_id>

+	<child_id>IR35219_special.pgood-0</child_id>

+	<child_id>IR35219_special.pgood-1</child_id>

+	<child_id>IR35219_special.gpio-0</child_id>

+	<child_id>IR35219_special.gpio-1</child_id>

+	<child_id>IR35219_special.gpio-2</child_id>

+	<child_id>IR35219_special.gpio-3</child_id>

+	<attribute>

+		<id>CCIN</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>CHIP_ID</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>CHIP</default>

+	</attribute>

+	<attribute>

+		<id>LOCATION_CODE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>LOCATION_CODE_TYPE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRU_ID</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>POSITION</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default></default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>IR35219_special.vout-0</id>

+	<type>unit-vout-generic</type>

+	<is_root>false</is_root>

+	<instance_name>IR35219_special.vout</instance_name>

+	<position>0</position>

+	<parent>unit</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>POWER</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>OUT</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>RAIL_NAME</id>

+		<default>UNKNOWN</default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>IR35219_special.vout-1</id>

+	<type>unit-vout-generic</type>

+	<is_root>false</is_root>

+	<instance_name>IR35219_special.vout</instance_name>

+	<position>1</position>

+	<parent>unit</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>POWER</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>OUT</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>RAIL_NAME</id>

+		<default>UNKNOWN</default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>IR35219_special.i2c-0</id>

+	<type>unit-i2c-slave</type>

+	<is_root>false</is_root>

+	<instance_name>IR35219_special.i2c</instance_name>

+	<position>0</position>

+	<parent>unit</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>I2C</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>IN</default>

+	</attribute>

+	<attribute>

+		<id>I2C_ADDRESS</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>I2C_ENGINE</id>

+		<default>0x00</default>

+	</attribute>

+	<attribute>

+		<id>I2C_PORT</id>

+		<default>0x00</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>IR35219_special.enable-0</id>

+	<type>unit-enable-generic</type>

+	<is_root>false</is_root>

+	<instance_name>IR35219_special.enable</instance_name>

+	<position>0</position>

+	<parent>unit-gpio-generic</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>GPIO</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>IN</default>

+	</attribute>

+	<attribute>

+		<id>GPIO_TYPE</id>

+		<default>ENABLE</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>PIN_NAME</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>SCHEMATIC_INTERFACE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>IR35219_special.enable-1</id>

+	<type>unit-enable-generic</type>

+	<is_root>false</is_root>

+	<instance_name>IR35219_special.enable</instance_name>

+	<position>1</position>

+	<parent>unit-gpio-generic</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>GPIO</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>IN</default>

+	</attribute>

+	<attribute>

+		<id>GPIO_TYPE</id>

+		<default>ENABLE</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>PIN_NAME</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>SCHEMATIC_INTERFACE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>IR35219_special.pgood-0</id>

+	<type>unit-pgood-generic</type>

+	<is_root>false</is_root>

+	<instance_name>IR35219_special.pgood</instance_name>

+	<position>0</position>

+	<parent>unit-gpio-generic</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>GPIO</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>IN</default>

+	</attribute>

+	<attribute>

+		<id>GPIO_TYPE</id>

+		<default>PGOOD</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>PIN_NAME</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>SCHEMATIC_INTERFACE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>IR35219_special.pgood-1</id>

+	<type>unit-pgood-generic</type>

+	<is_root>false</is_root>

+	<instance_name>IR35219_special.pgood</instance_name>

+	<position>1</position>

+	<parent>unit-gpio-generic</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>GPIO</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>IN</default>

+	</attribute>

+	<attribute>

+		<id>GPIO_TYPE</id>

+		<default>PGOOD</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>PIN_NAME</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>SCHEMATIC_INTERFACE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>IR35219_special.gpio-0</id>

+	<type>unit-gpio-generic</type>

+	<is_root>false</is_root>

+	<instance_name>IR35219_special.gpio</instance_name>

+	<position>0</position>

+	<parent>unit</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>GPIO</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>INOUT</default>

+	</attribute>

+	<attribute>

+		<id>GPIO_TYPE</id>

+		<default>GENERIC_OUTPUT</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>PIN_NAME</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>SCHEMATIC_INTERFACE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>IR35219_special.gpio-1</id>

+	<type>unit-gpio-generic</type>

+	<is_root>false</is_root>

+	<instance_name>IR35219_special.gpio</instance_name>

+	<position>1</position>

+	<parent>unit</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>GPIO</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>INOUT</default>

+	</attribute>

+	<attribute>

+		<id>GPIO_TYPE</id>

+		<default>GENERIC_OUTPUT</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>PIN_NAME</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>SCHEMATIC_INTERFACE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>IR35219_special.gpio-2</id>

+	<type>unit-gpio-generic</type>

+	<is_root>false</is_root>

+	<instance_name>IR35219_special.gpio</instance_name>

+	<position>2</position>

+	<parent>unit</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>GPIO</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>INOUT</default>

+	</attribute>

+	<attribute>

+		<id>GPIO_TYPE</id>

+		<default>GENERIC_OUTPUT</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>PIN_NAME</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>SCHEMATIC_INTERFACE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>IR35219_special.gpio-3</id>

+	<type>unit-gpio-generic</type>

+	<is_root>false</is_root>

+	<instance_name>IR35219_special.gpio</instance_name>

+	<position>3</position>

+	<parent>unit</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>GPIO</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>INOUT</default>

+	</attribute>

+	<attribute>

+		<id>GPIO_TYPE</id>

+		<default>GENERIC_OUTPUT</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>PIN_NAME</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>SCHEMATIC_INTERFACE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+</targetInstances>

+</partInstance>

diff --git a/xml/parts/IR35220.xml b/xml/parts/IR35220.xml
new file mode 100644
index 0000000..421b50f
--- /dev/null
+++ b/xml/parts/IR35220.xml
@@ -0,0 +1,156 @@
+<partInstance>

+<version>2.1</version>

+<targetInstances>

+<targetPart>

+	<id>IR35220</id>

+	<type>chip-IR35220</type>

+	<is_root>true</is_root>

+	<instance_name>IR35220</instance_name>

+	<position>-1</position>

+	<parent>chip</parent>

+	<parent_type>card-motherboard</parent_type>

+	<parent_type>card-daughtercard</parent_type>

+	<child_id>IR35220.i2c-0</child_id>

+	<child_id>IR35220.gpio-0</child_id>

+	<attribute>

+		<id>CCIN</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>CHIP_ID</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>CHIP</default>

+	</attribute>

+	<attribute>

+		<id>LOCATION_CODE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>LOCATION_CODE_TYPE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRU_ID</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>VOLTAGE_REGULATOR</default>

+	</attribute>

+	<attribute>

+		<id>POSITION</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default></default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>IR35220.i2c-0</id>

+	<type>unit-i2c-slave</type>

+	<is_root>false</is_root>

+	<instance_name>IR35220.i2c</instance_name>

+	<position>0</position>

+	<parent>unit</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>I2C</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>IN</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+			<id>I2C_ADDRESS</id>

+		</attribute>

+</targetPart>

+<targetPart>

+	<id>IR35220.gpio-0</id>

+	<type>unit-gpio-generic</type>

+	<is_root>false</is_root>

+	<instance_name>IR35220.gpio</instance_name>

+	<position>0</position>

+	<parent>unit</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>GPIO</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>INOUT</default>

+	</attribute>

+	<attribute>

+		<id>GPIO_TYPE</id>

+		<default>GENERIC_OUTPUT</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>PIN_NAME</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>SCHEMATIC_INTERFACE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+</targetInstances>

+</partInstance>

diff --git a/xml/parts/NOR_FLASH.xml b/xml/parts/NOR_FLASH.xml
new file mode 100644
index 0000000..388d1b6
--- /dev/null
+++ b/xml/parts/NOR_FLASH.xml
@@ -0,0 +1,161 @@
+<partInstance>

+<version>2.1</version>

+<targetInstances>

+<targetPart>

+	<id>NOR_FLASH</id>

+	<type>chip-NOR_FLASH</type>

+	<is_root>true</is_root>

+	<instance_name>NOR_FLASH</instance_name>

+	<position>-1</position>

+	<parent>chip</parent>

+	<parent_type>card-motherboard</parent_type>

+	<parent_type>card-daughtercard</parent_type>

+	<child_id>NOR_FLASH.spi-slave-0</child_id>

+	<child_id>NOR_FLASH.gpio-slave-0</child_id>

+	<attribute>

+		<id>CCIN</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>CHIP_ID</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>CHIP</default>

+	</attribute>

+	<attribute>

+		<id>LOCATION_CODE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>LOCATION_CODE_TYPE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRU_ID</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>POSITION</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default></default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>NOR_FLASH.spi-slave-0</id>

+	<type>spi-slave</type>

+	<is_root>false</is_root>

+	<instance_name>NOR_FLASH.spi-slave</instance_name>

+	<position>0</position>

+	<parent>unit</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>SPI</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>IN</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>SPI_ENGINE</id>

+		<default>0x00</default>

+	</attribute>

+	<attribute>

+		<id>SPI_PORT</id>

+		<default>0x00</default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>NOR_FLASH.gpio-slave-0</id>

+	<type>unit-gpio-generic</type>

+	<is_root>false</is_root>

+	<instance_name>NOR_FLASH.gpio-slave</instance_name>

+	<position>0</position>

+	<parent>unit</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>GPIO</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>IN</default>

+	</attribute>

+	<attribute>

+		<id>GPIO_TYPE</id>

+		<default>GENERIC_OUTPUT</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>PIN_NAME</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>SCHEMATIC_INTERFACE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+</targetInstances>

+</partInstance>

diff --git a/xml/parts/NPCT501.xml b/xml/parts/NPCT501.xml
new file mode 100644
index 0000000..a9a68c2
--- /dev/null
+++ b/xml/parts/NPCT501.xml
@@ -0,0 +1,271 @@
+<partInstance>
+<version>2.1</version>
+<targetInstances>
+<targetPart>
+	<id>NPCT501</id>
+	<type>chip-NPCT501</type>
+	<is_root>true</is_root>
+	<instance_name>NPCT501</instance_name>
+	<position>-1</position>
+	<parent>chip</parent>
+	<parent_type>card-motherboard</parent_type>
+	<parent_type>card-daughtercard</parent_type>
+	<child_id>NPCT501.i2c-0</child_id>
+	<child_id>NPCT501.gpio-slave-0</child_id>
+	<child_id>NPCT501.gpio-master-1</child_id>
+	<child_id>NPCT501.gpio-master-2</child_id>
+	<attribute>
+		<id>CCIN</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>CHIP_ID</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>CHIP</default>
+	</attribute>
+	<attribute>
+		<id>LOCATION_CODE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>LOCATION_CODE_TYPE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRU_ID</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>POSITION</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default></default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>NPCT501.i2c-0</id>
+	<type>unit-i2c-slave</type>
+	<is_root>false</is_root>
+	<instance_name>NPCT501.i2c</instance_name>
+	<position>0</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>I2C</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>IN</default>
+	</attribute>
+	<attribute>
+		<id>I2C_ADDRESS</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>I2C_ENGINE</id>
+		<default>0x00</default>
+	</attribute>
+	<attribute>
+		<id>I2C_PORT</id>
+		<default>0x00</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>NPCT501.gpio-slave-0</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>NPCT501.gpio-slave</instance_name>
+	<position>0</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>IN</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>NPCT501.gpio-master-1</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>NPCT501.gpio-master</instance_name>
+	<position>1</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>OUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>NPCT501.gpio-master-2</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>NPCT501.gpio-master</instance_name>
+	<position>2</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>OUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+</targetInstances>
+</partInstance>
diff --git a/xml/parts/PCA9551.xml b/xml/parts/PCA9551.xml
new file mode 100644
index 0000000..bd3ac6e
--- /dev/null
+++ b/xml/parts/PCA9551.xml
@@ -0,0 +1,536 @@
+<partInstance>

+<version>2.1</version>

+<targetInstances>

+<targetPart>

+	<id>PCA9551</id>

+	<type>chip-PCA9551</type>

+	<is_root>true</is_root>

+	<instance_name>PCA9551</instance_name>

+	<position>-1</position>

+	<parent>chip</parent>

+	<parent_type>card-motherboard</parent_type>

+	<parent_type>card-daughtercard</parent_type>

+	<child_id>PCA9551.gpio-0</child_id>

+	<child_id>PCA9551.gpio-1</child_id>

+	<child_id>PCA9551.gpio-2</child_id>

+	<child_id>PCA9551.gpio-3</child_id>

+	<child_id>PCA9551.gpio-4</child_id>

+	<child_id>PCA9551.gpio-5</child_id>

+	<child_id>PCA9551.gpio-6</child_id>

+	<child_id>PCA9551.gpio-7</child_id>

+	<child_id>PCA9551.i2c-0</child_id>

+	<attribute>

+		<id>CCIN</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>CHIP_ID</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>CHIP</default>

+	</attribute>

+	<attribute>

+		<id>LOCATION_CODE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>LOCATION_CODE_TYPE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRU_ID</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>POSITION</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default></default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>PCA9551.gpio-0</id>

+	<type>unit-gpio-generic</type>

+	<is_root>false</is_root>

+	<instance_name>PCA9551.gpio</instance_name>

+	<position>0</position>

+	<parent>unit</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>GPIO</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>INOUT</default>

+	</attribute>

+	<attribute>

+		<id>GPIO_TYPE</id>

+		<default>GENERIC_OUTPUT</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>PIN_NAME</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>SCHEMATIC_INTERFACE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>PCA9551.gpio-1</id>

+	<type>unit-gpio-generic</type>

+	<is_root>false</is_root>

+	<instance_name>PCA9551.gpio</instance_name>

+	<position>1</position>

+	<parent>unit</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>GPIO</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>INOUT</default>

+	</attribute>

+	<attribute>

+		<id>GPIO_TYPE</id>

+		<default>GENERIC_OUTPUT</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>PIN_NAME</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>SCHEMATIC_INTERFACE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>PCA9551.gpio-2</id>

+	<type>unit-gpio-generic</type>

+	<is_root>false</is_root>

+	<instance_name>PCA9551.gpio</instance_name>

+	<position>2</position>

+	<parent>unit</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>GPIO</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>INOUT</default>

+	</attribute>

+	<attribute>

+		<id>GPIO_TYPE</id>

+		<default>GENERIC_OUTPUT</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>PIN_NAME</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>SCHEMATIC_INTERFACE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>PCA9551.gpio-3</id>

+	<type>unit-gpio-generic</type>

+	<is_root>false</is_root>

+	<instance_name>PCA9551.gpio</instance_name>

+	<position>3</position>

+	<parent>unit</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>GPIO</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>INOUT</default>

+	</attribute>

+	<attribute>

+		<id>GPIO_TYPE</id>

+		<default>GENERIC_OUTPUT</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>PIN_NAME</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>SCHEMATIC_INTERFACE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>PCA9551.gpio-4</id>

+	<type>unit-gpio-generic</type>

+	<is_root>false</is_root>

+	<instance_name>PCA9551.gpio</instance_name>

+	<position>4</position>

+	<parent>unit</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>GPIO</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>INOUT</default>

+	</attribute>

+	<attribute>

+		<id>GPIO_TYPE</id>

+		<default>GENERIC_OUTPUT</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>PIN_NAME</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>SCHEMATIC_INTERFACE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>PCA9551.gpio-5</id>

+	<type>unit-gpio-generic</type>

+	<is_root>false</is_root>

+	<instance_name>PCA9551.gpio</instance_name>

+	<position>5</position>

+	<parent>unit</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>GPIO</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>INOUT</default>

+	</attribute>

+	<attribute>

+		<id>GPIO_TYPE</id>

+		<default>GENERIC_OUTPUT</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>PIN_NAME</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>SCHEMATIC_INTERFACE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>PCA9551.gpio-6</id>

+	<type>unit-gpio-generic</type>

+	<is_root>false</is_root>

+	<instance_name>PCA9551.gpio</instance_name>

+	<position>6</position>

+	<parent>unit</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>GPIO</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>INOUT</default>

+	</attribute>

+	<attribute>

+		<id>GPIO_TYPE</id>

+		<default>GENERIC_OUTPUT</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>PIN_NAME</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>SCHEMATIC_INTERFACE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>PCA9551.gpio-7</id>

+	<type>unit-gpio-generic</type>

+	<is_root>false</is_root>

+	<instance_name>PCA9551.gpio</instance_name>

+	<position>7</position>

+	<parent>unit</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>GPIO</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>INOUT</default>

+	</attribute>

+	<attribute>

+		<id>GPIO_TYPE</id>

+		<default>GENERIC_OUTPUT</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>PIN_NAME</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>SCHEMATIC_INTERFACE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>PCA9551.i2c-0</id>

+	<type>unit-i2c-slave</type>

+	<is_root>false</is_root>

+	<instance_name>PCA9551.i2c</instance_name>

+	<position>0</position>

+	<parent>unit</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>I2C</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>IN</default>

+	</attribute>

+	<attribute>

+		<id>I2C_ADDRESS</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>I2C_ENGINE</id>

+		<default>0x00</default>

+	</attribute>

+	<attribute>

+		<id>I2C_PORT</id>

+		<default>0x00</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+</targetInstances>

+</partInstance>

diff --git a/xml/parts/PCA9552.xml b/xml/parts/PCA9552.xml
new file mode 100644
index 0000000..c8b9593
--- /dev/null
+++ b/xml/parts/PCA9552.xml
@@ -0,0 +1,960 @@
+<partInstance>
+<version>2.1</version>
+<targetInstances>
+<targetPart>
+	<id>PCA9552</id>
+	<type>chip-PCA9552</type>
+	<is_root>true</is_root>
+	<instance_name>PCA9552</instance_name>
+	<position>-1</position>
+	<parent>chip</parent>
+	<parent_type>card-motherboard</parent_type>
+	<parent_type>card-daughtercard</parent_type>
+	<child_id>PCA9552.i2c-0</child_id>
+	<child_id>PCA9552.gpio-0</child_id>
+	<child_id>PCA9552.gpio-1</child_id>
+	<child_id>PCA9552.gpio-2</child_id>
+	<child_id>PCA9552.gpio-3</child_id>
+	<child_id>PCA9552.gpio-4</child_id>
+	<child_id>PCA9552.gpio-5</child_id>
+	<child_id>PCA9552.gpio-6</child_id>
+	<child_id>PCA9552.gpio-7</child_id>
+	<child_id>PCA9552.gpio-8</child_id>
+	<child_id>PCA9552.gpio-9</child_id>
+	<child_id>PCA9552.gpio-10</child_id>
+	<child_id>PCA9552.gpio-11</child_id>
+	<child_id>PCA9552.gpio-12</child_id>
+	<child_id>PCA9552.gpio-13</child_id>
+	<child_id>PCA9552.gpio-14</child_id>
+	<child_id>PCA9552.gpio-15</child_id>
+	<attribute>
+		<id>CCIN</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>CHIP_ID</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>CHIP</default>
+	</attribute>
+	<attribute>
+		<id>LOCATION_CODE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>LOCATION_CODE_TYPE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRU_ID</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>POSITION</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default></default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>PCA9552.i2c-0</id>
+	<type>unit-i2c-slave</type>
+	<is_root>false</is_root>
+	<instance_name>PCA9552.i2c</instance_name>
+	<position>0</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>I2C</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>IN</default>
+	</attribute>
+	<attribute>
+		<id>I2C_ADDRESS</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>I2C_ENGINE</id>
+		<default>0x00</default>
+	</attribute>
+	<attribute>
+		<id>I2C_PORT</id>
+		<default>0x00</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>PCA9552.gpio-0</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>PCA9552.gpio</instance_name>
+	<position>0</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>INOUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>PCA9552.gpio-1</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>PCA9552.gpio</instance_name>
+	<position>1</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>INOUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>PCA9552.gpio-2</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>PCA9552.gpio</instance_name>
+	<position>2</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>INOUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>PCA9552.gpio-3</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>PCA9552.gpio</instance_name>
+	<position>3</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>INOUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>PCA9552.gpio-4</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>PCA9552.gpio</instance_name>
+	<position>4</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>INOUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>PCA9552.gpio-5</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>PCA9552.gpio</instance_name>
+	<position>5</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>INOUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>PCA9552.gpio-6</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>PCA9552.gpio</instance_name>
+	<position>6</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>INOUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>PCA9552.gpio-7</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>PCA9552.gpio</instance_name>
+	<position>7</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>INOUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>PCA9552.gpio-8</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>PCA9552.gpio</instance_name>
+	<position>8</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>INOUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>PCA9552.gpio-9</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>PCA9552.gpio</instance_name>
+	<position>9</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>INOUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>PCA9552.gpio-10</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>PCA9552.gpio</instance_name>
+	<position>10</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>INOUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>PCA9552.gpio-11</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>PCA9552.gpio</instance_name>
+	<position>11</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>INOUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>PCA9552.gpio-12</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>PCA9552.gpio</instance_name>
+	<position>12</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>INOUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>PCA9552.gpio-13</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>PCA9552.gpio</instance_name>
+	<position>13</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>INOUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>PCA9552.gpio-14</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>PCA9552.gpio</instance_name>
+	<position>14</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>INOUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>PCA9552.gpio-15</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>PCA9552.gpio</instance_name>
+	<position>15</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>INOUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+</targetInstances>
+</partInstance>
diff --git a/xml/parts/PCA9554.xml b/xml/parts/PCA9554.xml
new file mode 100644
index 0000000..fac4a99
--- /dev/null
+++ b/xml/parts/PCA9554.xml
@@ -0,0 +1,536 @@
+<partInstance>
+<version>2.1</version>
+<targetInstances>
+<targetPart>
+	<id>PCA9554</id>
+	<type>chip-PCA9554</type>
+	<is_root>true</is_root>
+	<instance_name>PCA9554</instance_name>
+	<position>-1</position>
+	<parent>chip</parent>
+	<parent_type>card-motherboard</parent_type>
+	<parent_type>card-daughtercard</parent_type>
+	<child_id>PCA9554.i2c-0</child_id>
+	<child_id>PCA9554.gpio-0</child_id>
+	<child_id>PCA9554.gpio-1</child_id>
+	<child_id>PCA9554.gpio-2</child_id>
+	<child_id>PCA9554.gpio-3</child_id>
+	<child_id>PCA9554.gpio-4</child_id>
+	<child_id>PCA9554.gpio-5</child_id>
+	<child_id>PCA9554.gpio-6</child_id>
+	<child_id>PCA9554.gpio-7</child_id>
+	<attribute>
+		<id>CCIN</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>CHIP_ID</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>CHIP</default>
+	</attribute>
+	<attribute>
+		<id>LOCATION_CODE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>LOCATION_CODE_TYPE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRU_ID</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>POSITION</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default></default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>PCA9554.i2c-0</id>
+	<type>unit-i2c-slave</type>
+	<is_root>false</is_root>
+	<instance_name>PCA9554.i2c</instance_name>
+	<position>0</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>I2C</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>IN</default>
+	</attribute>
+	<attribute>
+		<id>I2C_ADDRESS</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>I2C_ENGINE</id>
+		<default>0x00</default>
+	</attribute>
+	<attribute>
+		<id>I2C_PORT</id>
+		<default>0x00</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>PCA9554.gpio-0</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>PCA9554.gpio</instance_name>
+	<position>0</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>INOUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>PCA9554.gpio-1</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>PCA9554.gpio</instance_name>
+	<position>1</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>INOUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>PCA9554.gpio-2</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>PCA9554.gpio</instance_name>
+	<position>2</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>INOUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>PCA9554.gpio-3</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>PCA9554.gpio</instance_name>
+	<position>3</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>INOUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>PCA9554.gpio-4</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>PCA9554.gpio</instance_name>
+	<position>4</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>INOUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>PCA9554.gpio-5</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>PCA9554.gpio</instance_name>
+	<position>5</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>INOUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>PCA9554.gpio-6</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>PCA9554.gpio</instance_name>
+	<position>6</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>INOUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>PCA9554.gpio-7</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>PCA9554.gpio</instance_name>
+	<position>7</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>INOUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+</targetInstances>
+</partInstance>
diff --git a/xml/parts/PIC16F882.xml b/xml/parts/PIC16F882.xml
new file mode 100644
index 0000000..2abb392
--- /dev/null
+++ b/xml/parts/PIC16F882.xml
@@ -0,0 +1,960 @@
+<partInstance>
+<version>2.1</version>
+<targetInstances>
+<targetPart>
+	<id>PIC16F882</id>
+	<type>chip-PIC16F882</type>
+	<is_root>true</is_root>
+	<instance_name>PIC16F882</instance_name>
+	<position>-1</position>
+	<parent>chip</parent>
+	<parent_type>card-motherboard</parent_type>
+	<parent_type>card-daughtercard</parent_type>
+	<child_id>PIC16F882.i2c-0</child_id>
+	<child_id>PIC16F882.gpio-0</child_id>
+	<child_id>PIC16F882.gpio-1</child_id>
+	<child_id>PIC16F882.gpio-2</child_id>
+	<child_id>PIC16F882.gpio-3</child_id>
+	<child_id>PIC16F882.gpio-4</child_id>
+	<child_id>PIC16F882.gpio-5</child_id>
+	<child_id>PIC16F882.gpio-6</child_id>
+	<child_id>PIC16F882.gpio-7</child_id>
+	<child_id>PIC16F882.gpio-8</child_id>
+	<child_id>PIC16F882.gpio-9</child_id>
+	<child_id>PIC16F882.gpio-10</child_id>
+	<child_id>PIC16F882.gpio-11</child_id>
+	<child_id>PIC16F882.gpio-12</child_id>
+	<child_id>PIC16F882.gpio-13</child_id>
+	<child_id>PIC16F882.gpio-14</child_id>
+	<child_id>PIC16F882.gpio-15</child_id>
+	<attribute>
+		<id>CCIN</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>CHIP_ID</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>CHIP</default>
+	</attribute>
+	<attribute>
+		<id>LOCATION_CODE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>LOCATION_CODE_TYPE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRU_ID</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>POSITION</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default></default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>PIC16F882.i2c-0</id>
+	<type>unit-i2c-slave</type>
+	<is_root>false</is_root>
+	<instance_name>PIC16F882.i2c</instance_name>
+	<position>0</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>I2C</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>IN</default>
+	</attribute>
+	<attribute>
+		<id>I2C_ADDRESS</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>I2C_ENGINE</id>
+		<default>0x00</default>
+	</attribute>
+	<attribute>
+		<id>I2C_PORT</id>
+		<default>0x00</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>PIC16F882.gpio-0</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>PIC16F882.gpio</instance_name>
+	<position>0</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>INOUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>PIC16F882.gpio-1</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>PIC16F882.gpio</instance_name>
+	<position>1</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>INOUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>PIC16F882.gpio-2</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>PIC16F882.gpio</instance_name>
+	<position>2</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>INOUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>PIC16F882.gpio-3</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>PIC16F882.gpio</instance_name>
+	<position>3</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>INOUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>PIC16F882.gpio-4</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>PIC16F882.gpio</instance_name>
+	<position>4</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>INOUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>PIC16F882.gpio-5</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>PIC16F882.gpio</instance_name>
+	<position>5</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>INOUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>PIC16F882.gpio-6</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>PIC16F882.gpio</instance_name>
+	<position>6</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>INOUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>PIC16F882.gpio-7</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>PIC16F882.gpio</instance_name>
+	<position>7</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>INOUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>PIC16F882.gpio-8</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>PIC16F882.gpio</instance_name>
+	<position>8</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>INOUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>PIC16F882.gpio-9</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>PIC16F882.gpio</instance_name>
+	<position>9</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>INOUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>PIC16F882.gpio-10</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>PIC16F882.gpio</instance_name>
+	<position>10</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>INOUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>PIC16F882.gpio-11</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>PIC16F882.gpio</instance_name>
+	<position>11</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>INOUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>PIC16F882.gpio-12</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>PIC16F882.gpio</instance_name>
+	<position>12</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>INOUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>PIC16F882.gpio-13</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>PIC16F882.gpio</instance_name>
+	<position>13</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>INOUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>PIC16F882.gpio-14</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>PIC16F882.gpio</instance_name>
+	<position>14</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>INOUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>PIC16F882.gpio-15</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>PIC16F882.gpio</instance_name>
+	<position>15</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>INOUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+</targetInstances>
+</partInstance>
diff --git a/xml/parts/POWER_SUPPLY.xml b/xml/parts/POWER_SUPPLY.xml
new file mode 100644
index 0000000..13c79dc
--- /dev/null
+++ b/xml/parts/POWER_SUPPLY.xml
@@ -0,0 +1,626 @@
+<partInstance>
+<version>2.1</version>
+<targetInstances>
+<targetPart>
+	<id>POWER_SUPPLY</id>
+	<type>chip-POWER_SUPPLY</type>
+	<is_root>true</is_root>
+	<instance_name>POWER_SUPPLY</instance_name>
+	<position>-1</position>
+	<parent>chip</parent>
+	<parent_type>card-motherboard</parent_type>
+	<parent_type>card-daughtercard</parent_type>
+	<child_id>POWER_SUPPLY.i2c-0</child_id>
+	<child_id>POWER_SUPPLY.vout-0</child_id>
+	<child_id>POWER_SUPPLY.vout-1</child_id>
+	<child_id>POWER_SUPPLY.pgood-0</child_id>
+	<child_id>POWER_SUPPLY.enable-0</child_id>
+	<child_id>POWER_SUPPLY.gpio-slave-0</child_id>
+	<child_id>POWER_SUPPLY.gpio-slave-1</child_id>
+	<child_id>POWER_SUPPLY.gpio-slave-2</child_id>
+	<child_id>POWER_SUPPLY.gpio-slave-3</child_id>
+	<child_id>POWER_SUPPLY.gpio-master-4</child_id>
+	<child_id>POWER_SUPPLY.gpio-master-5</child_id>
+	<attribute>
+		<id>CCIN</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>CHIP_ID</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>CHIP</default>
+	</attribute>
+	<attribute>
+		<id>LOCATION_CODE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>LOCATION_CODE_TYPE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRU_ID</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>POSITION</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default></default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>POWER_SUPPLY.i2c-0</id>
+	<type>unit-i2c-slave</type>
+	<is_root>false</is_root>
+	<instance_name>POWER_SUPPLY.i2c</instance_name>
+	<position>0</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>I2C</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>IN</default>
+	</attribute>
+	<attribute>
+		<id>I2C_ADDRESS</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>I2C_ENGINE</id>
+		<default>0x00</default>
+	</attribute>
+	<attribute>
+		<id>I2C_PORT</id>
+		<default>0x00</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>POWER_SUPPLY.vout-0</id>
+	<type>unit-vout-generic</type>
+	<is_root>false</is_root>
+	<instance_name>POWER_SUPPLY.vout</instance_name>
+	<position>0</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>POWER</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>OUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>RAIL_NAME</id>
+		<default>UNKNOWN</default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>POWER_SUPPLY.vout-1</id>
+	<type>unit-vout-generic</type>
+	<is_root>false</is_root>
+	<instance_name>POWER_SUPPLY.vout</instance_name>
+	<position>1</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>POWER</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>OUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>RAIL_NAME</id>
+		<default>UNKNOWN</default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>POWER_SUPPLY.pgood-0</id>
+	<type>unit-pgood-generic</type>
+	<is_root>false</is_root>
+	<instance_name>POWER_SUPPLY.pgood</instance_name>
+	<position>0</position>
+	<parent>unit-gpio-generic</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>IN</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>PGOOD</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>POWER_SUPPLY.enable-0</id>
+	<type>unit-enable-generic</type>
+	<is_root>false</is_root>
+	<instance_name>POWER_SUPPLY.enable</instance_name>
+	<position>0</position>
+	<parent>unit-gpio-generic</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>IN</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>ENABLE</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>POWER_SUPPLY.gpio-slave-0</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>POWER_SUPPLY.gpio-slave</instance_name>
+	<position>0</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>IN</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>POWER_SUPPLY.gpio-slave-1</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>POWER_SUPPLY.gpio-slave</instance_name>
+	<position>1</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>IN</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>POWER_SUPPLY.gpio-slave-2</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>POWER_SUPPLY.gpio-slave</instance_name>
+	<position>2</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>IN</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>POWER_SUPPLY.gpio-slave-3</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>POWER_SUPPLY.gpio-slave</instance_name>
+	<position>3</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>IN</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>POWER_SUPPLY.gpio-master-4</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>POWER_SUPPLY.gpio-master</instance_name>
+	<position>4</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>OUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>POWER_SUPPLY.gpio-master-5</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>POWER_SUPPLY.gpio-master</instance_name>
+	<position>5</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>OUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+</targetInstances>
+</partInstance>
diff --git a/xml/parts/RJ45_1PORT.xml b/xml/parts/RJ45_1PORT.xml
new file mode 100644
index 0000000..5cc04db
--- /dev/null
+++ b/xml/parts/RJ45_1PORT.xml
@@ -0,0 +1,92 @@
+<partInstance>
+<version>2.1</version>
+<targetInstances>
+<targetPart>
+	<id>RJ45_1PORT</id>
+	<type>chip-RJ45_1PORT</type>
+	<is_root>true</is_root>
+	<instance_name>RJ45_1PORT</instance_name>
+	<position>-1</position>
+	<parent>chip</parent>
+	<parent_type>card-motherboard</parent_type>
+	<parent_type>card-daughtercard</parent_type>
+	<child_id>RJ45_1PORT.ethernet-0</child_id>
+	<attribute>
+		<id>CHIP_ID</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>CHIP</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRU_ID</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>POSITION</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default></default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>RJ45_1PORT.ethernet-0</id>
+	<type>unit-ethernet-master</type>
+	<is_root>false</is_root>
+	<instance_name>RJ45_1PORT.ethernet</instance_name>
+	<position>0</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>ETHERNET</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>OUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+</targetInstances>
+</partInstance>
diff --git a/xml/parts/SI5335.xml b/xml/parts/SI5335.xml
new file mode 100644
index 0000000..9d09096
--- /dev/null
+++ b/xml/parts/SI5335.xml
@@ -0,0 +1,345 @@
+<partInstance>
+<version>2.1</version>
+<targetInstances>
+<targetPart>
+	<id>SI5335</id>
+	<type>chip-SI5335</type>
+	<is_root>true</is_root>
+	<instance_name>SI5335</instance_name>
+	<position>-1</position>
+	<parent>chip</parent>
+	<parent_type>card-motherboard</parent_type>
+	<parent_type>card-daughtercard</parent_type>
+	<child_id>SI5335.gpio-slave-0</child_id>
+	<child_id>SI5335.gpio-slave-1</child_id>
+	<child_id>SI5335.clk-0</child_id>
+	<child_id>SI5335.clk-1</child_id>
+	<child_id>SI5335.clk-2</child_id>
+	<child_id>SI5335.clk-3</child_id>
+	<attribute>
+		<id>CCIN</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>CHIP_ID</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>CHIP</default>
+	</attribute>
+	<attribute>
+		<id>LOCATION_CODE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>LOCATION_CODE_TYPE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRU_ID</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>POSITION</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default></default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>SI5335.gpio-slave-0</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>SI5335.gpio-slave</instance_name>
+	<position>0</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>IN</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>SI5335.gpio-slave-1</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>SI5335.gpio-slave</instance_name>
+	<position>1</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>IN</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>SI5335.clk-0</id>
+	<type>unit-clk-master</type>
+	<is_root>false</is_root>
+	<instance_name>SI5335.clk</instance_name>
+	<position>0</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>CLK</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>OUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>SI5335.clk-1</id>
+	<type>unit-clk-master</type>
+	<is_root>false</is_root>
+	<instance_name>SI5335.clk</instance_name>
+	<position>1</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>CLK</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>OUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>SI5335.clk-2</id>
+	<type>unit-clk-master</type>
+	<is_root>false</is_root>
+	<instance_name>SI5335.clk</instance_name>
+	<position>2</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>CLK</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>OUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>SI5335.clk-3</id>
+	<type>unit-clk-master</type>
+	<is_root>false</is_root>
+	<instance_name>SI5335.clk</instance_name>
+	<position>3</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>CLK</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>OUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+</targetInstances>
+</partInstance>
diff --git a/xml/parts/SMARTCHIP.xml b/xml/parts/SMARTCHIP.xml
new file mode 100644
index 0000000..dc2da6f
--- /dev/null
+++ b/xml/parts/SMARTCHIP.xml
@@ -0,0 +1,100 @@
+<partInstance>
+<version>2.1</version>
+<targetInstances>
+<targetPart>
+	<id>SMARTCHIP</id>
+	<type>chip-SMARTCHIP</type>
+	<is_root>true</is_root>
+	<instance_name>SMARTCHIP</instance_name>
+	<position>-1</position>
+	<parent>chip</parent>
+	<parent_type>card-motherboard</parent_type>
+	<parent_type>card-daughtercard</parent_type>
+	<child_id>SMARTCHIP.sc-0</child_id>
+	<attribute>
+		<id>CCIN</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>CHIP_ID</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>CHIP</default>
+	</attribute>
+	<attribute>
+		<id>LOCATION_CODE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>LOCATION_CODE_TYPE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRU_ID</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>POSITION</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default></default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>SMARTCHIP.sc-0</id>
+	<type>unit-sc-slave</type>
+	<is_root>false</is_root>
+	<instance_name>SMARTCHIP.sc</instance_name>
+	<position>0</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>SC</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>IN</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+</targetInstances>
+</partInstance>
diff --git a/xml/parts/SPIVID.xml b/xml/parts/SPIVID.xml
new file mode 100644
index 0000000..8ed5ffd
--- /dev/null
+++ b/xml/parts/SPIVID.xml
@@ -0,0 +1,259 @@
+<partInstance>

+<version>2.1</version>

+<targetInstances>

+<targetPart>

+	<id>SPIVID</id>

+	<type>chip-SPIVID</type>

+	<is_root>true</is_root>

+	<instance_name>SPIVID</instance_name>

+	<position>-1</position>

+	<parent>chip</parent>

+	<parent_type>card-motherboard</parent_type>

+	<parent_type>card-daughtercard</parent_type>

+	<child_id>SPIVID.spi-slave-0</child_id>

+	<child_id>SPIVID.i2c-slave-0</child_id>

+	<child_id>SPIVID.gpio-master-0</child_id>

+	<child_id>SPIVID.power-0</child_id>

+	<attribute>

+		<id>CCIN</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>CHIP_ID</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>CHIP</default>

+	</attribute>

+	<attribute>

+		<id>LOCATION_CODE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>LOCATION_CODE_TYPE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRU_ID</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>POSITION</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default></default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>SPIVID.spi-slave-0</id>

+	<type>unit-spi-slave</type>

+	<is_root>false</is_root>

+	<instance_name>SPIVID.spi-slave</instance_name>

+	<position>0</position>

+	<parent>unit</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>SPI</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>IN</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>SPI_ENGINE</id>

+		<default>0x00</default>

+	</attribute>

+	<attribute>

+		<id>SPI_PORT</id>

+		<default>0x00</default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>SPIVID.i2c-slave-0</id>

+	<type>unit-i2c-slave</type>

+	<is_root>false</is_root>

+	<instance_name>SPIVID.i2c-slave</instance_name>

+	<position>0</position>

+	<parent>unit</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>I2C</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>IN</default>

+	</attribute>

+	<attribute>

+		<id>I2C_ADDRESS</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>I2C_ENGINE</id>

+		<default>0x00</default>

+	</attribute>

+	<attribute>

+		<id>I2C_PORT</id>

+		<default>0x00</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>SPIVID.gpio-master-0</id>

+	<type>unit-gpio-generic</type>

+	<is_root>false</is_root>

+	<instance_name>SPIVID.gpio-master</instance_name>

+	<position>0</position>

+	<parent>unit</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>GPIO</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>INOUT</default>

+	</attribute>

+	<attribute>

+		<id>GPIO_TYPE</id>

+		<default>GENERIC_OUTPUT</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>PIN_NAME</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>SCHEMATIC_INTERFACE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>SPIVID.power-0</id>

+	<type>unit-power-generic</type>

+	<is_root>false</is_root>

+	<instance_name>SPIVID.power</instance_name>

+	<position>0</position>

+	<parent>unit</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>POWER</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>IN</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>RAIL_NAME</id>

+		<default>UNKNOWN</default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+</targetInstances>

+</partInstance>

diff --git a/xml/parts/SWITCH.xml b/xml/parts/SWITCH.xml
new file mode 100644
index 0000000..0fd2ee2
--- /dev/null
+++ b/xml/parts/SWITCH.xml
@@ -0,0 +1,112 @@
+<partInstance>
+<version>2.1</version>
+<targetInstances>
+<targetPart>
+	<id>SWITCH</id>
+	<type>chip-SWITCH</type>
+	<is_root>true</is_root>
+	<instance_name>SWITCH</instance_name>
+	<position>-1</position>
+	<parent>chip</parent>
+	<parent_type>card-motherboard</parent_type>
+	<parent_type>card-daughtercard</parent_type>
+	<child_id>SWITCH.gpio-master-0</child_id>
+	<attribute>
+		<id>CCIN</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>CHIP_ID</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>CHIP</default>
+	</attribute>
+	<attribute>
+		<id>LOCATION_CODE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>LOCATION_CODE_TYPE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRU_ID</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>POSITION</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default></default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>SWITCH.gpio-master-0</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>SWITCH.gpio-master</instance_name>
+	<position>0</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>OUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+</targetInstances>
+</partInstance>
diff --git a/xml/parts/TCA6408A.xml b/xml/parts/TCA6408A.xml
new file mode 100644
index 0000000..1d72c7b
--- /dev/null
+++ b/xml/parts/TCA6408A.xml
@@ -0,0 +1,103 @@
+<partInstance>

+<version>2.1</version>

+<targetInstances>

+<targetPart>

+	<id>TCA6408A</id>

+	<type>chip-TCA6408A</type>

+	<is_root>true</is_root>

+	<instance_name>TCA6408A</instance_name>

+	<position>-1</position>

+	<parent>chip</parent>

+	<parent_type>card-motherboard</parent_type>

+	<parent_type>card-daughtercard</parent_type>

+	<child_id>TCA6408A.i2c-0</child_id>

+	<attribute>

+		<id>CCIN</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>CHIP_ID</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>CHIP</default>

+	</attribute>

+	<attribute>

+		<id>LOCATION_CODE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>LOCATION_CODE_TYPE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRU_ID</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>POSITION</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default></default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>TCA6408A.i2c-0</id>

+	<type>unit-i2c-slave</type>

+	<is_root>false</is_root>

+	<instance_name>TCA6408A.i2c</instance_name>

+	<position>0</position>

+	<parent>unit</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>I2C</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>IN</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+			<attribute>

+			<id>I2C_ADDRESS</id>

+	</attribute>

+</targetPart>

+</targetInstances>

+</partInstance>

diff --git a/xml/parts/TOD_BATTERY.xml b/xml/parts/TOD_BATTERY.xml
new file mode 100644
index 0000000..5c7264b
--- /dev/null
+++ b/xml/parts/TOD_BATTERY.xml
@@ -0,0 +1,165 @@
+<partInstance>
+<version>2.1</version>
+<targetInstances>
+<targetPart>
+	<id>TOD_BATTERY</id>
+	<type>chip-TOD_BATTERY</type>
+	<is_root>true</is_root>
+	<instance_name>TOD_BATTERY</instance_name>
+	<position>-1</position>
+	<parent>chip</parent>
+	<parent_type>card-motherboard</parent_type>
+	<parent_type>card-daughtercard</parent_type>
+	<child_id>TOD_BATTERY.gpio-master-0</child_id>
+	<child_id>TOD_BATTERY.gpio-slave-1</child_id>
+	<attribute>
+		<id>CCIN</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>CHIP_ID</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>CHIP</default>
+	</attribute>
+	<attribute>
+		<id>LOCATION_CODE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>LOCATION_CODE_TYPE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRU_ID</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>POSITION</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default></default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>TOD_BATTERY.gpio-master-0</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>TOD_BATTERY.gpio-master</instance_name>
+	<position>0</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>OUT</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>TOD_BATTERY.gpio-slave-1</id>
+	<type>unit-gpio-generic</type>
+	<is_root>false</is_root>
+	<instance_name>TOD_BATTERY.gpio-slave</instance_name>
+	<position>1</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>GPIO</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>IN</default>
+	</attribute>
+	<attribute>
+		<id>GPIO_TYPE</id>
+		<default>GENERIC_OUTPUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>SCHEMATIC_INTERFACE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+</targetInstances>
+</partInstance>
diff --git a/xml/parts/TPS544C25.xml b/xml/parts/TPS544C25.xml
new file mode 100644
index 0000000..04f85a3
--- /dev/null
+++ b/xml/parts/TPS544C25.xml
@@ -0,0 +1,510 @@
+<partInstance>

+<version>2.1</version>

+<targetInstances>

+<targetPart>

+	<id>TPS544C25</id>

+	<type>chip-TPS544C25</type>

+	<is_root>true</is_root>

+	<instance_name>TPS544C25</instance_name>

+	<position>-1</position>

+	<parent>chip</parent>

+	<parent_type>card-motherboard</parent_type>

+	<parent_type>card-daughtercard</parent_type>

+	<child_id>TPS544C25.vout-0</child_id>

+	<child_id>TPS544C25.i2c-0</child_id>

+	<child_id>TPS544C25.i2c-1</child_id>

+	<child_id>TPS544C25.enable-0</child_id>

+	<child_id>TPS544C25.pgood-0</child_id>

+	<child_id>TPS544C25.gpio-0</child_id>

+	<child_id>TPS544C25.gpio-1</child_id>

+	<child_id>TPS544C25.gpio-2</child_id>

+	<child_id>TPS544C25.gpio-3</child_id>

+	<attribute>

+		<id>CCIN</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>CHIP_ID</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>CHIP</default>

+	</attribute>

+	<attribute>

+		<id>LOCATION_CODE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>LOCATION_CODE_TYPE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRU_ID</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>VOLTAGE_REGULATOR</default>

+	</attribute>

+	<attribute>

+		<id>POSITION</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default></default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>TPS544C25.vout-0</id>

+	<type>unit-vout-generic</type>

+	<is_root>false</is_root>

+	<instance_name>TPS544C25.vout</instance_name>

+	<position>0</position>

+	<parent>unit</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>POWER</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>OUT</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>RAIL_NAME</id>

+		<default>UNKNOWN</default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>TPS544C25.i2c-0</id>

+	<type>unit-i2c-slave</type>

+	<is_root>false</is_root>

+	<instance_name>TPS544C25.i2c</instance_name>

+	<position>0</position>

+	<parent>unit</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>I2C</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>IN</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+			<attribute>

+			<id>I2C_ADDRESS</id>

+		</attribute>

+</targetPart>

+<targetPart>

+	<id>TPS544C25.i2c-1</id>

+	<type>unit-i2c-slave</type>

+	<is_root>false</is_root>

+	<instance_name>TPS544C25.i2c</instance_name>

+	<position>1</position>

+	<parent>unit</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>I2C</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>IN</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+			<attribute>

+			<id>I2C_ADDRESS</id>

+		</attribute>

+</targetPart>

+<targetPart>

+	<id>TPS544C25.enable-0</id>

+	<type>unit-enable-generic</type>

+	<is_root>false</is_root>

+	<instance_name>TPS544C25.enable</instance_name>

+	<position>0</position>

+	<parent>unit-gpio-generic</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>GPIO</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>IN</default>

+	</attribute>

+	<attribute>

+		<id>GPIO_TYPE</id>

+		<default>ENABLE</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>PIN_NAME</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>SCHEMATIC_INTERFACE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>TPS544C25.pgood-0</id>

+	<type>unit-pgood-generic</type>

+	<is_root>false</is_root>

+	<instance_name>TPS544C25.pgood</instance_name>

+	<position>0</position>

+	<parent>unit-gpio-generic</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>GPIO</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>IN</default>

+	</attribute>

+	<attribute>

+		<id>GPIO_TYPE</id>

+		<default>PGOOD</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>PIN_NAME</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>SCHEMATIC_INTERFACE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>TPS544C25.gpio-0</id>

+	<type>unit-gpio-generic</type>

+	<is_root>false</is_root>

+	<instance_name>TPS544C25.gpio</instance_name>

+	<position>0</position>

+	<parent>unit</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>GPIO</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>INOUT</default>

+	</attribute>

+	<attribute>

+		<id>GPIO_TYPE</id>

+		<default>GENERIC_OUTPUT</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>PIN_NAME</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>SCHEMATIC_INTERFACE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>TPS544C25.gpio-1</id>

+	<type>unit-gpio-generic</type>

+	<is_root>false</is_root>

+	<instance_name>TPS544C25.gpio</instance_name>

+	<position>1</position>

+	<parent>unit</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>GPIO</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>INOUT</default>

+	</attribute>

+	<attribute>

+		<id>GPIO_TYPE</id>

+		<default>GENERIC_OUTPUT</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>PIN_NAME</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>SCHEMATIC_INTERFACE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>TPS544C25.gpio-2</id>

+	<type>unit-gpio-generic</type>

+	<is_root>false</is_root>

+	<instance_name>TPS544C25.gpio</instance_name>

+	<position>2</position>

+	<parent>unit</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>GPIO</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>INOUT</default>

+	</attribute>

+	<attribute>

+		<id>GPIO_TYPE</id>

+		<default>GENERIC_OUTPUT</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>PIN_NAME</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>SCHEMATIC_INTERFACE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>TPS544C25.gpio-3</id>

+	<type>unit-gpio-generic</type>

+	<is_root>false</is_root>

+	<instance_name>TPS544C25.gpio</instance_name>

+	<position>3</position>

+	<parent>unit</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>GPIO</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>INOUT</default>

+	</attribute>

+	<attribute>

+		<id>GPIO_TYPE</id>

+		<default>GENERIC_OUTPUT</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>PIN_NAME</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>SCHEMATIC_INTERFACE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+</targetInstances>

+</partInstance>

diff --git a/xml/parts/UART_1PORT.xml b/xml/parts/UART_1PORT.xml
new file mode 100644
index 0000000..452016a
--- /dev/null
+++ b/xml/parts/UART_1PORT.xml
@@ -0,0 +1,88 @@
+<partInstance>
+<version>2.1</version>
+<targetInstances>
+<targetPart>
+	<id>UART_1PORT</id>
+	<type>chip-UART_1PORT</type>
+	<is_root>true</is_root>
+	<instance_name>UART_1PORT</instance_name>
+	<position>-1</position>
+	<parent>chip</parent>
+	<parent_type>card-motherboard</parent_type>
+	<parent_type>card-daughtercard</parent_type>
+	<child_id>UART_1PORT.uart-0</child_id>
+	<attribute>
+		<id>CHIP_ID</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>CHIP</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRU_ID</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>POSITION</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default></default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>UART_1PORT.uart-0</id>
+	<type>unit-uart-slave</type>
+	<is_root>false</is_root>
+	<instance_name>UART_1PORT.uart</instance_name>
+	<position>0</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>U750</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>IN</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+</targetInstances>
+</partInstance>
diff --git a/xml/parts/USB2_1PORT.xml b/xml/parts/USB2_1PORT.xml
new file mode 100644
index 0000000..e752de4
--- /dev/null
+++ b/xml/parts/USB2_1PORT.xml
@@ -0,0 +1,88 @@
+<partInstance>
+<version>2.1</version>
+<targetInstances>
+<targetPart>
+	<id>USB2_1PORT</id>
+	<type>chip-USB2_1PORT</type>
+	<is_root>true</is_root>
+	<instance_name>USB2_1PORT</instance_name>
+	<position>-1</position>
+	<parent>chip</parent>
+	<parent_type>card-motherboard</parent_type>
+	<parent_type>card-daughtercard</parent_type>
+	<child_id>USB2_1PORT.usb-0</child_id>
+	<attribute>
+		<id>CHIP_ID</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>CHIP</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRU_ID</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>POSITION</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default></default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>USB2_1PORT.usb-0</id>
+	<type>unit-usb-master</type>
+	<is_root>false</is_root>
+	<instance_name>USB2_1PORT.usb</instance_name>
+	<position>0</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>USB</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>OUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+</targetInstances>
+</partInstance>
diff --git a/xml/parts/USB2_2PORT.xml b/xml/parts/USB2_2PORT.xml
new file mode 100644
index 0000000..ffc1220
--- /dev/null
+++ b/xml/parts/USB2_2PORT.xml
@@ -0,0 +1,129 @@
+<partInstance>
+<version>2.1</version>
+<targetInstances>
+<targetPart>
+	<id>USB2_2PORT</id>
+	<type>chip-USB2</type>
+	<is_root>true</is_root>
+	<instance_name>USB2_2PORT</instance_name>
+	<position>-1</position>
+	<parent>chip</parent>
+	<parent_type>card-motherboard</parent_type>
+	<parent_type>card-daughtercard</parent_type>
+	<child_id>USB2_2PORT.usb-0</child_id>
+	<child_id>USB2_2PORT.usb-1</child_id>
+	<attribute>
+		<id>CHIP_ID</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>CHIP</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRU_ID</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>POSITION</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default></default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>USB2_2PORT.usb-0</id>
+	<type>unit-usb-master</type>
+	<is_root>false</is_root>
+	<instance_name>USB2_2PORT.usb</instance_name>
+	<position>0</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>USB</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>OUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>USB2_2PORT.usb-1</id>
+	<type>unit-usb-master</type>
+	<is_root>false</is_root>
+	<instance_name>USB2_2PORT.usb</instance_name>
+	<position>1</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>USB</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>OUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+</targetInstances>
+</partInstance>
diff --git a/xml/parts/USB3_1PORT.xml b/xml/parts/USB3_1PORT.xml
new file mode 100644
index 0000000..b308151
--- /dev/null
+++ b/xml/parts/USB3_1PORT.xml
@@ -0,0 +1,100 @@
+<partInstance>
+<version>2.1</version>
+<targetInstances>
+<targetPart>
+	<id>USB3_1PORT</id>
+	<type>chip-USB3_1PORT</type>
+	<is_root>true</is_root>
+	<instance_name>USB3_1PORT</instance_name>
+	<position>-1</position>
+	<parent>chip</parent>
+	<parent_type>card-motherboard</parent_type>
+	<parent_type>card-daughtercard</parent_type>
+	<child_id>USB3_1PORT.usb-0</child_id>
+	<attribute>
+		<id>CHIP_ID</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>CHIP</default>
+	</attribute>
+	<attribute>
+		<id>LOCATION_CODE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>LOCATION_CODE_TYPE</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRU_ID</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>POSITION</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default></default>
+	</attribute>
+</targetPart>
+<targetPart>
+	<id>USB3_1PORT.usb-0</id>
+	<type>unit-usb-master</type>
+	<is_root>false</is_root>
+	<instance_name>USB3_1PORT.usb</instance_name>
+	<position>0</position>
+	<parent>unit</parent>
+	<attribute>
+		<id>BUS_TYPE</id>
+		<default>USB</default>
+	</attribute>
+	<attribute>
+		<id>CHIP_UNIT</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>CLASS</id>
+		<default>UNIT</default>
+	</attribute>
+	<attribute>
+		<id>DIRECTION</id>
+		<default>OUT</default>
+	</attribute>
+	<attribute>
+		<id>MODEL</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>MRW_TYPE</id>
+		<default>NA</default>
+	</attribute>
+	<attribute>
+		<id>PIN_NAME</id>
+		<default></default>
+	</attribute>
+	<attribute>
+		<id>RESOURCE_IS_CRITICAL</id>
+		<default>0</default>
+	</attribute>
+	<attribute>
+		<id>TYPE</id>
+		<default>NA</default>
+	</attribute>
+</targetPart>
+</targetInstances>
+</partInstance>
diff --git a/xml/parts/apss.xml b/xml/parts/apss.xml
new file mode 100644
index 0000000..a82e52c
--- /dev/null
+++ b/xml/parts/apss.xml
@@ -0,0 +1,1196 @@
+<partInstance>

+<version>2.1</version>

+<targets>

+	<targetPart>

+		<instance_name>apss</instance_name>

+		<type>chip-apss-power9</type>

+		<id>apss</id>

+		<is_root>true</is_root>

+		<instance_name>apss</instance_name>

+		<position>-1</position>

+		<parent>chip</parent>

+		<parent_type>card-motherboard</parent_type>

+		<parent_type>card-daughtercard</parent_type>		

+		<child_id>apss.ADCCH0</child_id>

+		<child_id>apss.ADCCH1</child_id>

+		<child_id>apss.ADCCH10</child_id>

+		<child_id>apss.ADCCH11</child_id>

+		<child_id>apss.ADCCH12</child_id>

+		<child_id>apss.ADCCH13</child_id>

+		<child_id>apss.ADCCH14</child_id>

+		<child_id>apss.ADCCH15</child_id>

+		<child_id>apss.ADCCH2</child_id>

+		<child_id>apss.ADCCH3</child_id>

+		<child_id>apss.ADCCH4</child_id>

+		<child_id>apss.ADCCH5</child_id>

+		<child_id>apss.ADCCH6</child_id>

+		<child_id>apss.ADCCH7</child_id>

+		<child_id>apss.ADCCH8</child_id>

+		<child_id>apss.ADCCH9</child_id>

+		<child_id>apss.ADC-Global</child_id>

+		<child_id>apss.BOOT_SEL</child_id>

+		<child_id>apss.GPIO0</child_id>

+		<child_id>apss.GPIO1</child_id>

+		<child_id>apss.GPIO10</child_id>

+		<child_id>apss.GPIO11</child_id>

+		<child_id>apss.GPIO12</child_id>

+		<child_id>apss.GPIO13</child_id>

+		<child_id>apss.GPIO14</child_id>

+		<child_id>apss.GPIO15</child_id>

+		<child_id>apss.GPIO2</child_id>

+		<child_id>apss.GPIO3</child_id>

+		<child_id>apss.GPIO4</child_id>

+		<child_id>apss.GPIO5</child_id>

+		<child_id>apss.GPIO6</child_id>

+		<child_id>apss.GPIO7</child_id>

+		<child_id>apss.GPIO8</child_id>

+		<child_id>apss.GPIO9</child_id>

+		<child_id>apss.GPIO_P0</child_id>

+		<child_id>apss.GPIO_P1</child_id>

+		<child_id>apss.RESET</child_id>

+		<child_id>apss.RO_INPUT0</child_id>

+		<child_id>apss.RO_INPUT1</child_id>

+		<child_id>apss.RO_INPUT2</child_id>

+		<child_id>apss.RO_INPUT3</child_id>

+		<child_id>apss.I2C-S0</child_id>

+		<child_id>apss.VDD</child_id>

+		<child_id>apss.PWMCH0</child_id>

+		<child_id>apss.PWMCH1</child_id>

+		<child_id>apss.PWMCH2</child_id>

+		<child_id>apss.PWMCH3</child_id>

+		<child_id>apss.PWMCH4</child_id>

+		<child_id>apss.PWMCH5</child_id>

+		<child_id>apss.PWMCH6</child_id>

+		<child_id>apss.PWMCH7</child_id>

+		<child_id>apss.SPI-S0</child_id>

+		<child_id>apss.UART-S0</child_id>

+	<attribute>

+		<id>TYPE</id>

+		<default>APSS</default>

+	</attribute>

+		

+	</targetPart>

+	<targetPart>

+		<id>apss.ADCCH0</id>

+		<type>apss.unit-adc-generic</type>

+		<instance_name>apss.ADCCH0</instance_name>

+		<attribute>

+			<id>CHANNEL</id>

+			<default>0</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_ID</id>

+			<default>1</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_NAME</id>

+			<default>ADC_MEMORY_PROC_0</default>

+		</attribute>

+		<attribute>

+			<id>GAIN</id>

+			<default>20.04</default>

+		</attribute>

+		<attribute>

+			<id>GND</id>

+		</attribute>

+		<attribute>

+			<id>OFFSET</id>

+			<default>0.005</default>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>adc_ch[0]</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.ADCCH1</id>

+		<type>apss.unit-adc-generic</type>

+		<instance_name>apss.ADCCH1</instance_name>

+		<attribute>

+			<id>CHANNEL</id>

+			<default>1</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_ID</id>

+			<default>2</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_NAME</id>

+			<default>ADC_MEMORY_PROC_1</default>

+		</attribute>

+		<attribute>

+			<id>GAIN</id>

+			<default>6.5</default>

+		</attribute>

+		<attribute>

+			<id>GND</id>

+		</attribute>

+		<attribute>

+			<id>OFFSET</id>

+			<default>0.005</default>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>adc_ch[1]</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.ADCCH10</id>

+		<type>apss.unit-adc-generic</type>

+		<instance_name>apss.ADCCH10</instance_name>

+		<attribute>

+			<id>CHANNEL</id>

+			<default>10</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_ID</id>

+			<default>11</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_NAME</id>

+			<default>ADC_VCS_VIO_VPCIE_PROC_2</default>

+		</attribute>

+		<attribute>

+			<id>GAIN</id>

+			<default>9.117</default>

+		</attribute>

+		<attribute>

+			<id>GND</id>

+		</attribute>

+		<attribute>

+			<id>OFFSET</id>

+			<default>0.005</default>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>adc_ch[10]</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.ADCCH11</id>

+		<type>apss.unit-adc-generic</type>

+		<instance_name>apss.ADCCH11</instance_name>

+		<attribute>

+			<id>CHANNEL</id>

+			<default>11</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_ID</id>

+			<default>12</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_NAME</id>

+			<default>ADC_VCS_VIO_VPCIE_PROC_3</default>

+		</attribute>

+		<attribute>

+			<id>GAIN</id>

+			<default>9.117</default>

+		</attribute>

+		<attribute>

+			<id>GND</id>

+		</attribute>

+		<attribute>

+			<id>OFFSET</id>

+			<default>0.005</default>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>adc_ch[11]</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.ADCCH12</id>

+		<type>apss.unit-adc-generic</type>

+		<instance_name>apss.ADCCH12</instance_name>

+		<attribute>

+			<id>CHANNEL</id>

+			<default>12</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_ID</id>

+			<default>20</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_NAME</id>

+			<default>ADC_12V_SENSE</default>

+		</attribute>

+		<attribute>

+			<id>GAIN</id>

+			<default>9.117</default>

+		</attribute>

+		<attribute>

+			<id>GND</id>

+		</attribute>

+		<attribute>

+			<id>OFFSET</id>

+			<default>0.005</default>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>adc_ch[12]</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.ADCCH13</id>

+		<type>apss.unit-adc-generic</type>

+		<instance_name>apss.ADCCH13</instance_name>

+		<attribute>

+			<id>CHANNEL</id>

+			<default>13</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_ID</id>

+			<default>22</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_NAME</id>

+			<default>ADC_TOTAL_SYS_CURRENT</default>

+		</attribute>

+		<attribute>

+			<id>GAIN</id>

+			<default>9.117</default>

+		</attribute>

+		<attribute>

+			<id>GND</id>

+		</attribute>

+		<attribute>

+			<id>OFFSET</id>

+			<default>0.005</default>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>adc_ch[13]</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.ADCCH14</id>

+		<type>apss.unit-adc-generic</type>

+		<instance_name>apss.ADCCH14</instance_name>

+		<attribute>

+			<id>CHANNEL</id>

+			<default>14</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_ID</id>

+			<default>23</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_NAME</id>

+			<default>ADC_MEM_CACHE</default>

+		</attribute>

+		<attribute>

+			<id>GAIN</id>

+			<default>9.117</default>

+		</attribute>

+		<attribute>

+			<id>GND</id>

+		</attribute>

+		<attribute>

+			<id>OFFSET</id>

+			<default>0.005</default>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>adc_ch[14]</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.ADCCH15</id>

+		<type>apss.unit-adc-generic</type>

+		<instance_name>apss.ADCCH15</instance_name>

+		<attribute>

+			<id>CHANNEL</id>

+			<default>15</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_ID</id>

+			<default>13</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_NAME</id>

+			<default>ADC_IO_A</default>

+		</attribute>

+		<attribute>

+			<id>GAIN</id>

+			<default>20.04</default>

+		</attribute>

+		<attribute>

+			<id>GND</id>

+		</attribute>

+		<attribute>

+			<id>OFFSET</id>

+			<default>0.005</default>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>adc_ch[15]</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.ADCCH2</id>

+		<type>apss.unit-adc-generic</type>

+		<instance_name>apss.ADCCH2</instance_name>

+		<attribute>

+			<id>CHANNEL</id>

+			<default>2</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_ID</id>

+			<default>3</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_NAME</id>

+			<default>ADC_MEMORY_PROC_2</default>

+		</attribute>

+		<attribute>

+			<id>GAIN</id>

+			<default>20.04</default>

+		</attribute>

+		<attribute>

+			<id>GND</id>

+		</attribute>

+		<attribute>

+			<id>OFFSET</id>

+			<default>0.005</default>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>adc_ch[2]</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.ADCCH3</id>

+		<type>apss.unit-adc-generic</type>

+		<instance_name>apss.ADCCH3</instance_name>

+		<attribute>

+			<id>CHANNEL</id>

+			<default>3</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_ID</id>

+			<default>4</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_NAME</id>

+			<default>ADC_MEMORY_PROC_3</default>

+		</attribute>

+		<attribute>

+			<id>GAIN</id>

+			<default>20.04</default>

+		</attribute>

+		<attribute>

+			<id>GND</id>

+		</attribute>

+		<attribute>

+			<id>OFFSET</id>

+			<default>0.005</default>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>adc_ch[3]</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.ADCCH4</id>

+		<type>apss.unit-adc-generic</type>

+		<instance_name>apss.ADCCH4</instance_name>

+		<attribute>

+			<id>CHANNEL</id>

+			<default>4</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_ID</id>

+			<default>5</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_NAME</id>

+			<default>ADC_VDD_PROC_0</default>

+		</attribute>

+		<attribute>

+			<id>GAIN</id>

+			<default>10</default>

+		</attribute>

+		<attribute>

+			<id>GND</id>

+		</attribute>

+		<attribute>

+			<id>OFFSET</id>

+			<default>0.005</default>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>adc_ch[4]</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.ADCCH5</id>

+		<type>apss.unit-adc-generic</type>

+		<instance_name>apss.ADCCH5</instance_name>

+		<attribute>

+			<id>CHANNEL</id>

+			<default>5</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_ID</id>

+			<default>6</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_NAME</id>

+			<default>ADC_VDD_PROC_1</default>

+		</attribute>

+		<attribute>

+			<id>GAIN</id>

+			<default>10</default>

+		</attribute>

+		<attribute>

+			<id>GND</id>

+		</attribute>

+		<attribute>

+			<id>OFFSET</id>

+			<default>0.005</default>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>adc_ch[5]</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.ADCCH6</id>

+		<type>apss.unit-adc-generic</type>

+		<instance_name>apss.ADCCH6</instance_name>

+		<attribute>

+			<id>CHANNEL</id>

+			<default>6</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_ID</id>

+			<default>7</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_NAME</id>

+			<default>ADC_VDD_PROC_2</default>

+		</attribute>

+		<attribute>

+			<id>GAIN</id>

+			<default>9.117</default>

+		</attribute>

+		<attribute>

+			<id>GND</id>

+		</attribute>

+		<attribute>

+			<id>OFFSET</id>

+			<default>0.005</default>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>adc_ch[6]</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.ADCCH7</id>

+		<type>apss.unit-adc-generic</type>

+		<instance_name>apss.ADCCH7</instance_name>

+		<attribute>

+			<id>CHANNEL</id>

+			<default>7</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_ID</id>

+			<default>8</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_NAME</id>

+			<default>ADC_VDD_PROC_3</default>

+		</attribute>

+		<attribute>

+			<id>GAIN</id>

+			<default>9.117</default>

+		</attribute>

+		<attribute>

+			<id>GND</id>

+		</attribute>

+		<attribute>

+			<id>OFFSET</id>

+			<default>0.005</default>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>adc_ch[7]</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.ADCCH8</id>

+		<type>apss.unit-adc-generic</type>

+		<instance_name>apss.ADCCH8</instance_name>

+		<attribute>

+			<id>CHANNEL</id>

+			<default>8</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_ID</id>

+			<default>9</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_NAME</id>

+			<default>ADC_VCS_VIO_VPCIE_PROC_0</default>

+		</attribute>

+		<attribute>

+			<id>GAIN</id>

+			<default>1</default>

+		</attribute>

+		<attribute>

+			<id>GND</id>

+		</attribute>

+		<attribute>

+			<id>OFFSET</id>

+			<default>0</default>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>adc_ch[8]</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.ADCCH9</id>

+		<type>apss.unit-adc-generic</type>

+		<instance_name>apss.ADCCH9</instance_name>

+		<attribute>

+			<id>CHANNEL</id>

+			<default>9</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_ID</id>

+			<default>10</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_NAME</id>

+			<default>ADC_VCS_VIO_VPCIE_PROC_1</default>

+		</attribute>

+		<attribute>

+			<id>GAIN</id>

+			<default>6.494</default>

+		</attribute>

+		<attribute>

+			<id>GND</id>

+		</attribute>

+		<attribute>

+			<id>OFFSET</id>

+			<default>0.005</default>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>adc_ch[9]</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.ADC-Global</id>

+		<type>apss.unit-adc_global-generic</type>

+		<instance_name>apss.ADC-Global</instance_name>

+		<attribute>

+			<id>ADC_MAX</id>

+			<default>0xFFF</default>

+		</attribute>

+		<attribute>

+			<id>ADC_VREF</id>

+			<default>2.048</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.BOOT_SEL</id>

+		<type>apss.unit-gpio-generic</type>

+		<instance_name>apss.BOOT_SEL</instance_name>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>BOOT_MODE</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.GPIO0</id>

+		<type>apss.unit-gpio-generic</type>

+		<instance_name>apss.GPIO0</instance_name>

+		<attribute>

+			<id>FUNCTION_ID</id>

+			<default>1</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_NAME</id>

+			<default>GPIO_FAN_WATCHDOG_ERROR</default>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>gpio_port[0]</default>

+		</attribute>

+		<attribute>

+			<id>PORT</id>

+			<default>0</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.GPIO1</id>

+		<type>apss.unit-gpio-generic</type>

+		<instance_name>apss.GPIO1</instance_name>

+		<attribute>

+			<id>FUNCTION_ID</id>

+			<default>2</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_NAME</id>

+			<default>GPIO_FAN_FULL_SPEED</default>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>gpio_port[1]</default>

+		</attribute>

+		<attribute>

+			<id>PORT</id>

+			<default>1</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.GPIO10</id>

+		<type>apss.unit-gpio-generic</type>

+		<instance_name>apss.GPIO10</instance_name>

+		<attribute>

+			<id>FUNCTION_ID</id>

+			<default>#N/A</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_NAME</id>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>gpio_port[10]</default>

+		</attribute>

+		<attribute>

+			<id>PORT</id>

+			<default>10</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.GPIO11</id>

+		<type>apss.unit-gpio-generic</type>

+		<instance_name>apss.GPIO11</instance_name>

+		<attribute>

+			<id>FUNCTION_ID</id>

+			<default>#N/A</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_NAME</id>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>gpio_port[11]</default>

+		</attribute>

+		<attribute>

+			<id>PORT</id>

+			<default>11</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.GPIO12</id>

+		<type>apss.unit-gpio-generic</type>

+		<instance_name>apss.GPIO12</instance_name>

+		<attribute>

+			<id>FUNCTION_ID</id>

+			<default>#N/A</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_NAME</id>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>gpio_port[12]</default>

+		</attribute>

+		<attribute>

+			<id>PORT</id>

+			<default>12</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.GPIO13</id>

+		<type>apss.unit-gpio-generic</type>

+		<instance_name>apss.GPIO13</instance_name>

+		<attribute>

+			<id>FUNCTION_ID</id>

+			<default>#N/A</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_NAME</id>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>gpio_port[13]</default>

+		</attribute>

+		<attribute>

+			<id>PORT</id>

+			<default>13</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.GPIO14</id>

+		<type>apss.unit-gpio-generic</type>

+		<instance_name>apss.GPIO14</instance_name>

+		<attribute>

+			<id>FUNCTION_ID</id>

+			<default>#N/A</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_NAME</id>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>gpio_port[14]</default>

+		</attribute>

+		<attribute>

+			<id>PORT</id>

+			<default>14</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.GPIO15</id>

+		<type>apss.unit-gpio-generic</type>

+		<instance_name>apss.GPIO15</instance_name>

+		<attribute>

+			<id>FUNCTION_ID</id>

+			<default>#N/A</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_NAME</id>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>gpio_port[15]</default>

+		</attribute>

+		<attribute>

+			<id>PORT</id>

+			<default>15</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.GPIO2</id>

+		<type>apss.unit-gpio-generic</type>

+		<instance_name>apss.GPIO2</instance_name>

+		<attribute>

+			<id>FUNCTION_ID</id>

+			<default>#N/A</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_NAME</id>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>gpio_port[2]</default>

+		</attribute>

+		<attribute>

+			<id>PORT</id>

+			<default>2</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.GPIO3</id>

+		<type>apss.unit-gpio-generic</type>

+		<instance_name>apss.GPIO3</instance_name>

+		<attribute>

+			<id>FUNCTION_ID</id>

+			<default>4</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_NAME</id>

+			<default>GPIO_FAN_RESERVED</default>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>gpio_port[3]</default>

+		</attribute>

+		<attribute>

+			<id>PORT</id>

+			<default>3</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.GPIO4</id>

+		<type>apss.unit-gpio-generic</type>

+		<instance_name>apss.GPIO4</instance_name>

+		<attribute>

+			<id>FUNCTION_ID</id>

+			<default>5</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_NAME</id>

+			<default>GPIO_VR_HOT_MEM_PROC_0</default>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>gpio_port[4]</default>

+		</attribute>

+		<attribute>

+			<id>PORT</id>

+			<default>4</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.GPIO5</id>

+		<type>apss.unit-gpio-generic</type>

+		<instance_name>apss.GPIO5</instance_name>

+		<attribute>

+			<id>FUNCTION_ID</id>

+			<default>6</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_NAME</id>

+			<default>GPIO_VR_HOT_MEM_PROC_1</default>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>gpio_port[5]</default>

+		</attribute>

+		<attribute>

+			<id>PORT</id>

+			<default>5</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.GPIO6</id>

+		<type>apss.unit-gpio-generic</type>

+		<instance_name>apss.GPIO6</instance_name>

+		<attribute>

+			<id>FUNCTION_ID</id>

+			<default>#N/A</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_NAME</id>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>gpio_port[6]</default>

+		</attribute>

+		<attribute>

+			<id>PORT</id>

+			<default>6</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.GPIO7</id>

+		<type>apss.unit-gpio-generic</type>

+		<instance_name>apss.GPIO7</instance_name>

+		<attribute>

+			<id>FUNCTION_ID</id>

+			<default>#N/A</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_NAME</id>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>gpio_port[7]</default>

+		</attribute>

+		<attribute>

+			<id>PORT</id>

+			<default>7</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.GPIO8</id>

+		<type>apss.unit-gpio-generic</type>

+		<instance_name>apss.GPIO8</instance_name>

+		<attribute>

+			<id>FUNCTION_ID</id>

+			<default>#N/A</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_NAME</id>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>gpio_port[8]</default>

+		</attribute>

+		<attribute>

+			<id>PORT</id>

+			<default>8</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.GPIO9</id>

+		<type>apss.unit-gpio-generic</type>

+		<instance_name>apss.GPIO9</instance_name>

+		<attribute>

+			<id>FUNCTION_ID</id>

+			<default>#N/A</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_NAME</id>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>gpio_port[9]</default>

+		</attribute>

+		<attribute>

+			<id>PORT</id>

+			<default>9</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.GPIO_P0</id>

+		<type>apss.unit-gpio-generic</type>

+		<instance_name>apss.GPIO_P0</instance_name>

+		<attribute>

+			<id>GPIO_P0_MODE</id>

+			<default>0x0</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.GPIO_P1</id>

+		<type>apss.unit-gpio-generic</type>

+		<instance_name>apss.GPIO_P1</instance_name>

+		<attribute>

+			<id>GPIO_P1_MODE</id>

+			<default>0x0</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.RESET</id>

+		<type>apss.unit-gpio-generic</type>

+		<instance_name>apss.RESET</instance_name>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>RESET_N</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.RO_INPUT0</id>

+		<type>apss.unit-gpio-generic</type>

+		<instance_name>apss.RO_INPUT0</instance_name>

+		<attribute>

+			<id>FUNCTION_ID</id>

+			<default>#N/A</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_NAME</id>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>ro_input0</default>

+		</attribute>

+		<attribute>

+			<id>PORT</id>

+			<default>0</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.RO_INPUT1</id>

+		<type>apss.unit-gpio-generic</type>

+		<instance_name>apss.RO_INPUT1</instance_name>

+		<attribute>

+			<id>FUNCTION_ID</id>

+			<default>#N/A</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_NAME</id>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>ro_input1</default>

+		</attribute>

+		<attribute>

+			<id>PORT</id>

+			<default>1</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.RO_INPUT2</id>

+		<type>apss.unit-gpio-generic</type>

+		<instance_name>apss.RO_INPUT2</instance_name>

+		<attribute>

+			<id>FUNCTION_ID</id>

+			<default>#N/A</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_NAME</id>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>ro_input3</default>

+		</attribute>

+		<attribute>

+			<id>PORT</id>

+			<default>2</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.RO_INPUT3</id>

+		<type>apss.unit-gpio-generic</type>

+		<instance_name>apss.RO_INPUT3</instance_name>

+		<attribute>

+			<id>FUNCTION_ID</id>

+			<default>#N/A</default>

+		</attribute>

+		<attribute>

+			<id>FUNCTION_NAME</id>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>ro_input4</default>

+		</attribute>

+		<attribute>

+			<id>PORT</id>

+			<default>3</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.I2C-S0</id>

+		<type>apss.unit-i2c-slave</type>

+		<instance_name>apss.I2C-S0</instance_name>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>I2C-S0</default>

+		</attribute>

+		<attribute>

+			<id>DIRECTION</id>

+			<default>IN</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.VDD</id>

+		<type>apss.unit-power-generic</type>

+		<instance_name>apss.VDD</instance_name>

+		<attribute>

+			<id>CURRENT_MAX</id>

+			<default>0.1</default>

+		</attribute>

+		<attribute>

+			<id>CURRENT_NOM</id>

+			<default>0.05</default>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>VDD</default>

+		</attribute>

+		<attribute>

+			<id>VOLTAGE</id>

+			<default>3.3</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.PWMCH0</id>

+		<type>apss.unit-pwm-generic</type>

+		<instance_name>apss.PWMCH0</instance_name>

+		<attribute>

+			<id>CHANNEL</id>

+			<default>0</default>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>pwm_ch[0]</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.PWMCH1</id>

+		<type>apss.unit-pwm-generic</type>

+		<instance_name>apss.PWMCH1</instance_name>

+		<attribute>

+			<id>CHANNEL</id>

+			<default>1</default>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>pwm_ch[1]</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.PWMCH2</id>

+		<type>apss.unit-pwm-generic</type>

+		<instance_name>apss.PWMCH2</instance_name>

+		<attribute>

+			<id>CHANNEL</id>

+			<default>2</default>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>pwm_ch[2]</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.PWMCH3</id>

+		<type>apss.unit-pwm-generic</type>

+		<instance_name>apss.PWMCH3</instance_name>

+		<attribute>

+			<id>CHANNEL</id>

+			<default>3</default>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>pwm_ch[3]</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.PWMCH4</id>

+		<type>apss.unit-pwm-generic</type>

+		<instance_name>apss.PWMCH4</instance_name>

+		<attribute>

+			<id>CHANNEL</id>

+			<default>4</default>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>pwm_ch[4]</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.PWMCH5</id>

+		<type>apss.unit-pwm-generic</type>

+		<instance_name>apss.PWMCH5</instance_name>

+		<attribute>

+			<id>CHANNEL</id>

+			<default>5</default>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>pwm_ch[5]</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.PWMCH6</id>

+		<type>apss.unit-pwm-generic</type>

+		<instance_name>apss.PWMCH6</instance_name>

+		<attribute>

+			<id>CHANNEL</id>

+			<default>6</default>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>pwm_ch[6]</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.PWMCH7</id>

+		<type>apss.unit-pwm-generic</type>

+		<instance_name>apss.PWMCH7</instance_name>

+		<attribute>

+			<id>CHANNEL</id>

+			<default>7</default>

+		</attribute>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>pwm_ch[7]</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.SPI-S0</id>

+		<type>apss.unit-spi-slave</type>

+		<instance_name>apss.SPI-S0</instance_name>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>SPI-S0</default>

+		</attribute>

+	</targetPart>

+	<targetPart>

+		<id>apss.UART-S0</id>

+		<type>apss.unit-uart-slave</type>

+		<instance_name>apss.UART-S0</instance_name>

+		<attribute>

+			<id>PIN-NAME</id>

+			<default>UART-S0</default>

+		</attribute>

+	</targetPart>

+</targets>

+</partInstance>

diff --git a/xml/parts/card-daughtercard.xml b/xml/parts/card-daughtercard.xml
new file mode 100644
index 0000000..882d2ad
--- /dev/null
+++ b/xml/parts/card-daughtercard.xml
@@ -0,0 +1,26 @@
+<partInstance>

+  <targetPart>

+    <id>card-daughtercard</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>CARD</default>

+    </attribute>

+    <attribute>

+      <id>FRU_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>card</instance_name>

+    <is_root>true</is_root>

+    <parent>card</parent>

+    <parent_type>connector-card-generic</parent_type>

+    <parent_type>connector-usb-generic</parent_type>

+    <parent_type>connector-hmc-generic</parent_type>

+    <parent_type>connector-uart-generic</parent_type>

+    <position>-1</position>

+    <type>card-daughtercard</type>

+  </targetPart>

+</partInstance>

diff --git a/xml/parts/card-motherboard.xml b/xml/parts/card-motherboard.xml
new file mode 100644
index 0000000..7947610
--- /dev/null
+++ b/xml/parts/card-motherboard.xml
@@ -0,0 +1,49 @@
+<partInstance>

+  <targetPart>

+    <id>card-motherboard</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>CARD</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <child_id>vpd_assoc_child</child_id>

+    <instance_name>motherboard</instance_name>

+    <is_root>true</is_root>

+    <parent>card</parent>

+    <parent_type>enc-node-power8</parent_type>

+    <parent_type>enc-node-power9</parent_type>

+    <position>0</position>

+    <type>card-motherboard</type>

+  </targetPart>

+  <targetPart>

+    <id>vpd_assoc_child</id>

+    <attribute>

+      <id>ASSOCIATION_TYPE</id>

+      <default>VPD</default>

+    </attribute>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>LOGICAL_ASSOCIATION</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>IN</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>vpd_assoc_child</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-logic_assoc-generic</type>

+  </targetPart>

+</partInstance>

diff --git a/xml/parts/card-pciecard-cablecard.xml b/xml/parts/card-pciecard-cablecard.xml
new file mode 100644
index 0000000..8296eae
--- /dev/null
+++ b/xml/parts/card-pciecard-cablecard.xml
@@ -0,0 +1,68 @@
+<partInstance>

+  <targetPart>

+    <id>card-pciecard-cablecard</id>

+    <child_id>pciep</child_id>

+    <child_id>i2c-slave</child_id>

+    <instance_name>pciecablecard</instance_name>

+    <is_root>true</is_root>

+    <parent>card-pciecard</parent>

+    <parent_type>slot-pcieslot-generic</parent_type>

+    <position>0</position>

+    <type>card-pciecard-cablecard</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-slave</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>IN</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ADDRESS</id>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-slave</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-slave</type>

+  </targetPart>

+  <targetPart>

+    <id>pciep</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>PCIE</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>IN</default>

+    </attribute>

+    <instance_name>pciep</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-pcie-endpoint</type>

+  </targetPart>

+</partInstance>

diff --git a/xml/parts/card-pciecard-card.xml b/xml/parts/card-pciecard-card.xml
new file mode 100644
index 0000000..5f9f18d
--- /dev/null
+++ b/xml/parts/card-pciecard-card.xml
@@ -0,0 +1,32 @@
+<partInstance>

+  <targetPart>

+    <id>card-pciecard-card</id>

+    <child_id>pciep</child_id>

+    <instance_name>pciecard</instance_name>

+    <is_root>true</is_root>

+    <parent>card-pciecard</parent>

+    <parent_type>slot-pcieslot-generic</parent_type>

+    <position>0</position>

+    <type>card-pciecard-card</type>

+  </targetPart>

+  <targetPart>

+    <id>pciep</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>PCIE</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>IN</default>

+    </attribute>

+    <instance_name>pciep</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-pcie-endpoint</type>

+  </targetPart>

+</partInstance>

diff --git a/xml/parts/card-pciecard.xml b/xml/parts/card-pciecard.xml
new file mode 100644
index 0000000..e793775
--- /dev/null
+++ b/xml/parts/card-pciecard.xml
@@ -0,0 +1,14 @@
+<partInstance>

+  <targetPart>

+    <id>card-pciecard</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>CARD</default>

+    </attribute>

+    <instance_name>card</instance_name>

+    <is_root>true</is_root>

+    <parent>base</parent>

+    <position>-1</position>

+    <type>card-pciecard</type>

+  </targetPart>

+</partInstance>

diff --git a/xml/parts/chip-apss-psoc.xml b/xml/parts/chip-apss-psoc.xml
new file mode 100644
index 0000000..386d5d3
--- /dev/null
+++ b/xml/parts/chip-apss-psoc.xml
@@ -0,0 +1,1420 @@
+<partInstance>

+  <targetPart>

+    <id>12V_Sense</id>

+    <attribute>

+      <id>ADC_CHANNEL_ASSIGNMENT</id>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GAIN</id>

+      <default>34500</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GROUND</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_ID</id>

+      <default>20</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_OFFSET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD7</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>12V Sense</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC2</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>APSS_SENSOR</default>

+    </attribute>

+    <instance_name>12V_Sense</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ipmi-sensor</parent>

+    <position>-1</position>

+    <type>unit-apss-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>Fan_Power_A</id>

+    <attribute>

+      <id>ADC_CHANNEL_ASSIGNMENT</id>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GAIN</id>

+      <default>34500</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GROUND</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_ID</id>

+      <default>16</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_OFFSET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD7</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Fan_Power_A</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC2</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>APSS_SENSOR</default>

+    </attribute>

+    <instance_name>Fan_Power_A</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ipmi-sensor</parent>

+    <position>-1</position>

+    <type>unit-apss-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>Fan_Power_B</id>

+    <attribute>

+      <id>ADC_CHANNEL_ASSIGNMENT</id>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GAIN</id>

+      <default>34500</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GROUND</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_ID</id>

+      <default>17</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_OFFSET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD7</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Fan_Power_B</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC2</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>APSS_SENSOR</default>

+    </attribute>

+    <instance_name>Fan_Power_B</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ipmi-sensor</parent>

+    <position>-1</position>

+    <type>unit-apss-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>GPU_Sense</id>

+    <attribute>

+      <id>ADC_CHANNEL_ASSIGNMENT</id>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GAIN</id>

+      <default>34500</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GROUND</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_ID</id>

+      <default>24</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_OFFSET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD7</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>GPU Sense</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC2</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>APSS_SENSOR</default>

+    </attribute>

+    <instance_name>GPU_Sense</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ipmi-sensor</parent>

+    <position>-1</position>

+    <type>unit-apss-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>Ground_Sense</id>

+    <attribute>

+      <id>ADC_CHANNEL_ASSIGNMENT</id>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GAIN</id>

+      <default>34500</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GROUND</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_ID</id>

+      <default>21</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_OFFSET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD7</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Ground Sense</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC2</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>APSS_SENSOR</default>

+    </attribute>

+    <instance_name>Ground_Sense</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ipmi-sensor</parent>

+    <position>-1</position>

+    <type>unit-apss-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>IO_A_Power</id>

+    <attribute>

+      <id>ADC_CHANNEL_ASSIGNMENT</id>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GAIN</id>

+      <default>34500</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GROUND</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_ID</id>

+      <default>13</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_OFFSET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD7</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>IO_A_Power</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC2</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>APSS_SENSOR</default>

+    </attribute>

+    <instance_name>IO_A_Power</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ipmi-sensor</parent>

+    <position>-1</position>

+    <type>unit-apss-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>IO_B_Power</id>

+    <attribute>

+      <id>ADC_CHANNEL_ASSIGNMENT</id>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GAIN</id>

+      <default>34500</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GROUND</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_ID</id>

+      <default>14</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_OFFSET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD7</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>IO_B_Power</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC2</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>APSS_SENSOR</default>

+    </attribute>

+    <instance_name>IO_B_Power</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ipmi-sensor</parent>

+    <position>-1</position>

+    <type>unit-apss-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>IO_C_Power</id>

+    <attribute>

+      <id>ADC_CHANNEL_ASSIGNMENT</id>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GAIN</id>

+      <default>34500</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GROUND</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_ID</id>

+      <default>15</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_OFFSET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD7</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>IO_C_Power</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC2</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>APSS_SENSOR</default>

+    </attribute>

+    <instance_name>IO_C_Power</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ipmi-sensor</parent>

+    <position>-1</position>

+    <type>unit-apss-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>Memory_Cache_Power</id>

+    <attribute>

+      <id>ADC_CHANNEL_ASSIGNMENT</id>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GAIN</id>

+      <default>34500</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GROUND</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_ID</id>

+      <default>23</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_OFFSET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD7</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Memory_Cache_Power</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC2</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>APSS_SENSOR</default>

+    </attribute>

+    <instance_name>Memory_Cache_Power</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ipmi-sensor</parent>

+    <position>-1</position>

+    <type>unit-apss-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>Memory_Proc0_0_Power</id>

+    <attribute>

+      <id>ADC_CHANNEL_ASSIGNMENT</id>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GAIN</id>

+      <default>34500</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GROUND</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_ID</id>

+      <default>25</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_OFFSET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD7</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Memory_Proc0_0_Power</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC2</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>APSS_SENSOR</default>

+    </attribute>

+    <instance_name>Memory_Proc0_0_Power</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ipmi-sensor</parent>

+    <position>-1</position>

+    <type>unit-apss-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>Memory_Proc0_1_Power</id>

+    <attribute>

+      <id>ADC_CHANNEL_ASSIGNMENT</id>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GAIN</id>

+      <default>34500</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GROUND</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_ID</id>

+      <default>26</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_OFFSET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD7</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Memory_Proc0_1_Power</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC2</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>APSS_SENSOR</default>

+    </attribute>

+    <instance_name>Memory_Proc0_1_Power</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ipmi-sensor</parent>

+    <position>-1</position>

+    <type>unit-apss-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>Memory_Proc0_2_Power</id>

+    <attribute>

+      <id>ADC_CHANNEL_ASSIGNMENT</id>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GAIN</id>

+      <default>34500</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GROUND</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_ID</id>

+      <default>27</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_OFFSET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD7</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Memory_Proc0_2_Power</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC2</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>APSS_SENSOR</default>

+    </attribute>

+    <instance_name>Memory_Proc0_2_Power</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ipmi-sensor</parent>

+    <position>-1</position>

+    <type>unit-apss-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>Memory_Proc0_Power</id>

+    <attribute>

+      <id>ADC_CHANNEL_ASSIGNMENT</id>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GAIN</id>

+      <default>34500</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GROUND</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_ID</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_OFFSET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD7</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Memory_Proc0_Power</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC2</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>APSS_SENSOR</default>

+    </attribute>

+    <instance_name>Memory_Proc0_Power</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ipmi-sensor</parent>

+    <position>-1</position>

+    <type>unit-apss-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>Memory_Proc1_Power</id>

+    <attribute>

+      <id>ADC_CHANNEL_ASSIGNMENT</id>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GAIN</id>

+      <default>34500</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GROUND</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_ID</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_OFFSET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD7</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Memory_Proc1_Power</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC2</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>APSS_SENSOR</default>

+    </attribute>

+    <instance_name>Memory_Proc1_Power</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ipmi-sensor</parent>

+    <position>-1</position>

+    <type>unit-apss-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>Memory_Proc2_Power</id>

+    <attribute>

+      <id>ADC_CHANNEL_ASSIGNMENT</id>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GAIN</id>

+      <default>34500</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GROUND</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_ID</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_OFFSET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD7</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Memory_Proc2_Power</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC2</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>APSS_SENSOR</default>

+    </attribute>

+    <instance_name>Memory_Proc2_Power</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ipmi-sensor</parent>

+    <position>-1</position>

+    <type>unit-apss-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>Memory_Proc3_Power</id>

+    <attribute>

+      <id>ADC_CHANNEL_ASSIGNMENT</id>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GAIN</id>

+      <default>34500</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GROUND</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_ID</id>

+      <default>4</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_OFFSET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD7</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Memory_Proc3_Power</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC2</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>APSS_SENSOR</default>

+    </attribute>

+    <instance_name>Memory_Proc3_Power</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ipmi-sensor</parent>

+    <position>-1</position>

+    <type>unit-apss-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>PCIE_Proc0_Power</id>

+    <attribute>

+      <id>ADC_CHANNEL_ASSIGNMENT</id>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GAIN</id>

+      <default>34500</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GROUND</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_ID</id>

+      <default>9</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_OFFSET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD7</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>PCIE_Proc0_Power</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC2</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>APSS_SENSOR</default>

+    </attribute>

+    <instance_name>PCIE_Proc0_Power</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ipmi-sensor</parent>

+    <position>-1</position>

+    <type>unit-apss-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>PCIE_Proc1_Power</id>

+    <attribute>

+      <id>ADC_CHANNEL_ASSIGNMENT</id>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GAIN</id>

+      <default>34500</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GROUND</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_ID</id>

+      <default>10</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_OFFSET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD7</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>PCIE_Proc1_Power</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC2</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>APSS_SENSOR</default>

+    </attribute>

+    <instance_name>PCIE_Proc1_Power</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ipmi-sensor</parent>

+    <position>-1</position>

+    <type>unit-apss-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>PCIE_Proc2_Power</id>

+    <attribute>

+      <id>ADC_CHANNEL_ASSIGNMENT</id>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GAIN</id>

+      <default>34500</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GROUND</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_ID</id>

+      <default>11</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_OFFSET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD7</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>PCIE_Proc2_Power</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC2</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>APSS_SENSOR</default>

+    </attribute>

+    <instance_name>PCIE_Proc2_Power</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ipmi-sensor</parent>

+    <position>-1</position>

+    <type>unit-apss-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>PCIE_Proc3_Power</id>

+    <attribute>

+      <id>ADC_CHANNEL_ASSIGNMENT</id>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GAIN</id>

+      <default>34500</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GROUND</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_ID</id>

+      <default>12</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_OFFSET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD7</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>PCIE_Proc3_Power</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC2</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>APSS_SENSOR</default>

+    </attribute>

+    <instance_name>PCIE_Proc3_Power</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ipmi-sensor</parent>

+    <position>-1</position>

+    <type>unit-apss-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>Proc0_Power</id>

+    <attribute>

+      <id>ADC_CHANNEL_ASSIGNMENT</id>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GAIN</id>

+      <default>34500</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GROUND</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_ID</id>

+      <default>5</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_OFFSET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD7</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Proc0_Power</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC2</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>APSS_SENSOR</default>

+    </attribute>

+    <instance_name>Proc0_Power</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ipmi-sensor</parent>

+    <position>-1</position>

+    <type>unit-apss-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>Proc1_Power</id>

+    <attribute>

+      <id>ADC_CHANNEL_ASSIGNMENT</id>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GAIN</id>

+      <default>34500</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GROUND</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_ID</id>

+      <default>6</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_OFFSET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD7</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Proc1_Power</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC2</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>APSS_SENSOR</default>

+    </attribute>

+    <instance_name>Proc1_Power</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ipmi-sensor</parent>

+    <position>-1</position>

+    <type>unit-apss-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>Proc2_Power</id>

+    <attribute>

+      <id>ADC_CHANNEL_ASSIGNMENT</id>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GAIN</id>

+      <default>34500</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GROUND</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_ID</id>

+      <default>7</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_OFFSET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD7</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Proc2_Power</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC2</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>APSS_SENSOR</default>

+    </attribute>

+    <instance_name>Proc2_Power</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ipmi-sensor</parent>

+    <position>-1</position>

+    <type>unit-apss-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>Proc3_Power</id>

+    <attribute>

+      <id>ADC_CHANNEL_ASSIGNMENT</id>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GAIN</id>

+      <default>34500</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GROUND</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_ID</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_OFFSET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD7</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Proc3_Power</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC2</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>APSS_SENSOR</default>

+    </attribute>

+    <instance_name>Proc3_Power</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ipmi-sensor</parent>

+    <position>-1</position>

+    <type>unit-apss-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>Storage_Power_A</id>

+    <attribute>

+      <id>ADC_CHANNEL_ASSIGNMENT</id>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GAIN</id>

+      <default>34500</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GROUND</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_ID</id>

+      <default>18</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_OFFSET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD7</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Storage_Power_A</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC2</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>APSS_SENSOR</default>

+    </attribute>

+    <instance_name>Storage_Power_A</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ipmi-sensor</parent>

+    <position>-1</position>

+    <type>unit-apss-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>Storage_Power_B</id>

+    <attribute>

+      <id>ADC_CHANNEL_ASSIGNMENT</id>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GAIN</id>

+      <default>34500</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GROUND</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_ID</id>

+      <default>19</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_OFFSET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD7</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Storage_Power_B</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC2</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>APSS_SENSOR</default>

+    </attribute>

+    <instance_name>Storage_Power_B</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ipmi-sensor</parent>

+    <position>-1</position>

+    <type>unit-apss-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>Total_System_Power</id>

+    <attribute>

+      <id>ADC_CHANNEL_ASSIGNMENT</id>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GAIN</id>

+      <default>34500</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_GROUND</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_ID</id>

+      <default>22</default>

+    </attribute>

+    <attribute>

+      <id>ADC_CHANNEL_OFFSET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD7</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Total_System_Power</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC2</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>APSS_SENSOR</default>

+    </attribute>

+    <instance_name>Total_System_Power</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ipmi-sensor</parent>

+    <position>-1</position>

+    <type>unit-apss-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>chip-apss-psoc</id>

+    <attribute>

+      <id>TYPE</id>

+      <default>APSS</default>

+    </attribute>

+    <child_id>Memory_Proc0_Power</child_id>

+    <child_id>Memory_Proc1_Power</child_id>

+    <child_id>Memory_Proc2_Power</child_id>

+    <child_id>Memory_Proc3_Power</child_id>

+    <child_id>Proc0_Power</child_id>

+    <child_id>Proc1_Power</child_id>

+    <child_id>Proc2_Power</child_id>

+    <child_id>Proc3_Power</child_id>

+    <child_id>PCIE_Proc0_Power</child_id>

+    <child_id>PCIE_Proc1_Power</child_id>

+    <child_id>PCIE_Proc2_Power</child_id>

+    <child_id>PCIE_Proc3_Power</child_id>

+    <child_id>IO_A_Power</child_id>

+    <child_id>IO_B_Power</child_id>

+    <child_id>IO_C_Power</child_id>

+    <child_id>Fan_Power_A</child_id>

+    <child_id>Fan_Power_B</child_id>

+    <child_id>Storage_Power_A</child_id>

+    <child_id>Storage_Power_B</child_id>

+    <child_id>Total_System_Power</child_id>

+    <child_id>Memory_Cache_Power</child_id>

+    <child_id>Memory_Proc0_0_Power</child_id>

+    <child_id>Memory_Proc0_1_Power</child_id>

+    <child_id>Memory_Proc0_2_Power</child_id>

+    <child_id>12V_Sense</child_id>

+    <child_id>Ground_Sense</child_id>

+    <child_id>GPU_Sense</child_id>

+    <instance_name>apss</instance_name>

+    <is_root>true</is_root>

+    <parent>chip</parent>

+    <parent_type>sys-sys-power8</parent_type>

+    <parent_type>sys-sys-power9</parent_type>

+    <position>0</position>

+    <type>chip-apss-psoc</type>

+  </targetPart>

+</partInstance>

diff --git a/xml/parts/chip-gpioexp-generic.xml b/xml/parts/chip-gpioexp-generic.xml
new file mode 100644
index 0000000..6cdf2a2
--- /dev/null
+++ b/xml/parts/chip-gpioexp-generic.xml
@@ -0,0 +1,760 @@
+<partInstance>

+  <targetPart>

+    <id>chip-gpioexp-generic</id>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>GPIO_EXPANDER</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <child_id>i2c-slave</child_id>

+    <child_id>io-0</child_id>

+    <child_id>io-1</child_id>

+    <child_id>io-2</child_id>

+    <child_id>io-3</child_id>

+    <child_id>io-4</child_id>

+    <child_id>io-5</child_id>

+    <child_id>io-6</child_id>

+    <child_id>io-7</child_id>

+    <child_id>io1-0</child_id>

+    <child_id>io1-1</child_id>

+    <child_id>io1-2</child_id>

+    <child_id>io1-3</child_id>

+    <child_id>io1-4</child_id>

+    <child_id>io1-5</child_id>

+    <child_id>io1-6</child_id>

+    <child_id>io1-7</child_id>

+    <instance_name>gpio_expander</instance_name>

+    <is_root>true</is_root>

+    <parent>chip</parent>

+    <parent_type>card-motherboard</parent_type>

+    <parent_type>card-daughtercard</parent_type>

+    <position>0</position>

+    <type>chip-gpioexp-generic</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-slave</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>IN</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ADDRESS</id>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-slave</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-slave</type>

+  </targetPart>

+  <targetPart>

+    <id>io-0</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>GPIO</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>INOUT</default>

+    </attribute>

+    <attribute>

+      <id>DRIVER_TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <attribute>

+      <id>GPIO_TYPE</id>

+      <default>GENERIC_OUTPUT</default>

+    </attribute>

+    <attribute>

+      <id>PIN_NAME</id>

+    </attribute>

+    <attribute>

+      <id>POR_VALUE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>SCHEMATIC_INTERFACE</id>

+      <default>IO0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>io-0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-gpio-generic</type>

+  </targetPart>

+  <targetPart>

+    <id>io-1</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>GPIO</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>INOUT</default>

+    </attribute>

+    <attribute>

+      <id>DRIVER_TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <attribute>

+      <id>GPIO_TYPE</id>

+      <default>GENERIC_OUTPUT</default>

+    </attribute>

+    <attribute>

+      <id>PIN_NAME</id>

+    </attribute>

+    <attribute>

+      <id>POR_VALUE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>SCHEMATIC_INTERFACE</id>

+      <default>IO1</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>io-1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-gpio-generic</type>

+  </targetPart>

+  <targetPart>

+    <id>io-2</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>GPIO</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>INOUT</default>

+    </attribute>

+    <attribute>

+      <id>DRIVER_TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <attribute>

+      <id>GPIO_TYPE</id>

+      <default>GENERIC_OUTPUT</default>

+    </attribute>

+    <attribute>

+      <id>PIN_NAME</id>

+    </attribute>

+    <attribute>

+      <id>POR_VALUE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>SCHEMATIC_INTERFACE</id>

+      <default>IO2</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>io-2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-gpio-generic</type>

+  </targetPart>

+  <targetPart>

+    <id>io-3</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>GPIO</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>INOUT</default>

+    </attribute>

+    <attribute>

+      <id>DRIVER_TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <attribute>

+      <id>GPIO_TYPE</id>

+      <default>GENERIC_OUTPUT</default>

+    </attribute>

+    <attribute>

+      <id>PIN_NAME</id>

+    </attribute>

+    <attribute>

+      <id>POR_VALUE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>SCHEMATIC_INTERFACE</id>

+      <default>IO3</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>io-3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-gpio-generic</type>

+  </targetPart>

+  <targetPart>

+    <id>io-4</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>GPIO</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>4</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>INOUT</default>

+    </attribute>

+    <attribute>

+      <id>DRIVER_TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <attribute>

+      <id>GPIO_TYPE</id>

+      <default>GENERIC_OUTPUT</default>

+    </attribute>

+    <attribute>

+      <id>PIN_NAME</id>

+    </attribute>

+    <attribute>

+      <id>POR_VALUE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>SCHEMATIC_INTERFACE</id>

+      <default>IO4</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>io-4</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-gpio-generic</type>

+  </targetPart>

+  <targetPart>

+    <id>io-5</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>GPIO</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>5</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>INOUT</default>

+    </attribute>

+    <attribute>

+      <id>DRIVER_TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <attribute>

+      <id>GPIO_TYPE</id>

+      <default>GENERIC_OUTPUT</default>

+    </attribute>

+    <attribute>

+      <id>PIN_NAME</id>

+    </attribute>

+    <attribute>

+      <id>POR_VALUE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>SCHEMATIC_INTERFACE</id>

+      <default>IO5</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>io-5</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-gpio-generic</type>

+  </targetPart>

+  <targetPart>

+    <id>io-6</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>GPIO</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>6</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>INOUT</default>

+    </attribute>

+    <attribute>

+      <id>DRIVER_TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <attribute>

+      <id>GPIO_TYPE</id>

+      <default>GENERIC_OUTPUT</default>

+    </attribute>

+    <attribute>

+      <id>PIN_NAME</id>

+    </attribute>

+    <attribute>

+      <id>POR_VALUE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>SCHEMATIC_INTERFACE</id>

+      <default>IO6</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>io-6</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-gpio-generic</type>

+  </targetPart>

+  <targetPart>

+    <id>io-7</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>GPIO</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>7</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>INOUT</default>

+    </attribute>

+    <attribute>

+      <id>DRIVER_TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <attribute>

+      <id>GPIO_TYPE</id>

+      <default>GENERIC_OUTPUT</default>

+    </attribute>

+    <attribute>

+      <id>PIN_NAME</id>

+    </attribute>

+    <attribute>

+      <id>POR_VALUE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>SCHEMATIC_INTERFACE</id>

+      <default>IO7</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>io-7</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-gpio-generic</type>

+  </targetPart>

+  <targetPart>

+    <id>io1-0</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>GPIO</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>INOUT</default>

+    </attribute>

+    <attribute>

+      <id>DRIVER_TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <attribute>

+      <id>GPIO_TYPE</id>

+      <default>GENERIC_OUTPUT</default>

+    </attribute>

+    <attribute>

+      <id>PIN_NAME</id>

+    </attribute>

+    <attribute>

+      <id>POR_VALUE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>SCHEMATIC_INTERFACE</id>

+      <default>IO1.0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>io1-0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-gpio-generic</type>

+  </targetPart>

+  <targetPart>

+    <id>io1-1</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>GPIO</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>9</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>INOUT</default>

+    </attribute>

+    <attribute>

+      <id>DRIVER_TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <attribute>

+      <id>GPIO_TYPE</id>

+      <default>GENERIC_OUTPUT</default>

+    </attribute>

+    <attribute>

+      <id>PIN_NAME</id>

+    </attribute>

+    <attribute>

+      <id>POR_VALUE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>SCHEMATIC_INTERFACE</id>

+      <default>IO1.1</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>io1-1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-gpio-generic</type>

+  </targetPart>

+  <targetPart>

+    <id>io1-2</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>GPIO</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>10</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>INOUT</default>

+    </attribute>

+    <attribute>

+      <id>DRIVER_TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <attribute>

+      <id>GPIO_TYPE</id>

+      <default>GENERIC_OUTPUT</default>

+    </attribute>

+    <attribute>

+      <id>PIN_NAME</id>

+    </attribute>

+    <attribute>

+      <id>POR_VALUE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>SCHEMATIC_INTERFACE</id>

+      <default>IO1.2</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>io1-2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-gpio-generic</type>

+  </targetPart>

+  <targetPart>

+    <id>io1-3</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>GPIO</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>11</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>INOUT</default>

+    </attribute>

+    <attribute>

+      <id>DRIVER_TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <attribute>

+      <id>GPIO_TYPE</id>

+      <default>GENERIC_OUTPUT</default>

+    </attribute>

+    <attribute>

+      <id>PIN_NAME</id>

+    </attribute>

+    <attribute>

+      <id>POR_VALUE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>SCHEMATIC_INTERFACE</id>

+      <default>IO1.3</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>io1-3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-gpio-generic</type>

+  </targetPart>

+  <targetPart>

+    <id>io1-4</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>GPIO</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>12</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>INOUT</default>

+    </attribute>

+    <attribute>

+      <id>DRIVER_TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <attribute>

+      <id>GPIO_TYPE</id>

+      <default>GENERIC_OUTPUT</default>

+    </attribute>

+    <attribute>

+      <id>PIN_NAME</id>

+    </attribute>

+    <attribute>

+      <id>POR_VALUE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>SCHEMATIC_INTERFACE</id>

+      <default>IO1.4</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>io1-4</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-gpio-generic</type>

+  </targetPart>

+  <targetPart>

+    <id>io1-5</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>GPIO</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>13</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>INOUT</default>

+    </attribute>

+    <attribute>

+      <id>DRIVER_TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <attribute>

+      <id>GPIO_TYPE</id>

+      <default>GENERIC_OUTPUT</default>

+    </attribute>

+    <attribute>

+      <id>PIN_NAME</id>

+    </attribute>

+    <attribute>

+      <id>POR_VALUE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>SCHEMATIC_INTERFACE</id>

+      <default>IO1.5</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>io1-5</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-gpio-generic</type>

+  </targetPart>

+  <targetPart>

+    <id>io1-6</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>GPIO</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>14</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>INOUT</default>

+    </attribute>

+    <attribute>

+      <id>DRIVER_TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <attribute>

+      <id>GPIO_TYPE</id>

+      <default>GENERIC_OUTPUT</default>

+    </attribute>

+    <attribute>

+      <id>PIN_NAME</id>

+    </attribute>

+    <attribute>

+      <id>POR_VALUE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>SCHEMATIC_INTERFACE</id>

+      <default>IO1.6</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>io1-6</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-gpio-generic</type>

+  </targetPart>

+  <targetPart>

+    <id>io1-7</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>GPIO</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>15</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>INOUT</default>

+    </attribute>

+    <attribute>

+      <id>DRIVER_TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <attribute>

+      <id>GPIO_TYPE</id>

+      <default>GENERIC_OUTPUT</default>

+    </attribute>

+    <attribute>

+      <id>PIN_NAME</id>

+    </attribute>

+    <attribute>

+      <id>POR_VALUE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>SCHEMATIC_INTERFACE</id>

+      <default>IO1.7</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>io1-7</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-gpio-generic</type>

+  </targetPart>

+</partInstance>

diff --git a/xml/parts/chip-membuf-centaur.xml b/xml/parts/chip-membuf-centaur.xml
new file mode 100644
index 0000000..784c69c
--- /dev/null
+++ b/xml/parts/chip-membuf-centaur.xml
@@ -0,0 +1,658 @@
+<partInstance>

+  <targetPart>

+    <id>Port A:CS0</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>DDR3</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>MBA_DIMM</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MBA_PORT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CENTAUR</default>

+    </attribute>

+    <attribute>

+      <id>SCHEMATIC_INTERFACE</id>

+    </attribute>

+    <instance_name>Port A:CS0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-dimm_port-power8</type>

+  </targetPart>

+  <targetPart>

+    <id>Port A:CS1</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>DDR3</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>MBA_DIMM</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MBA_PORT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CENTAUR</default>

+    </attribute>

+    <attribute>

+      <id>SCHEMATIC_INTERFACE</id>

+    </attribute>

+    <instance_name>Port A:CS1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-dimm_port-power8</type>

+  </targetPart>

+  <targetPart>

+    <id>Port B:CS0</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>DDR3</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>MBA_DIMM</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MBA_PORT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CENTAUR</default>

+    </attribute>

+    <attribute>

+      <id>SCHEMATIC_INTERFACE</id>

+    </attribute>

+    <instance_name>Port B:CS0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-dimm_port-power8</type>

+  </targetPart>

+  <targetPart>

+    <id>Port B:CS1</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>DDR3</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>MBA_DIMM</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MBA_PORT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CENTAUR</default>

+    </attribute>

+    <attribute>

+      <id>SCHEMATIC_INTERFACE</id>

+    </attribute>

+    <instance_name>Port B:CS1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-dimm_port-power8</type>

+  </targetPart>

+  <targetPart>

+    <id>Port C:CS0</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>DDR3</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>MBA_DIMM</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MBA_PORT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CENTAUR</default>

+    </attribute>

+    <attribute>

+      <id>SCHEMATIC_INTERFACE</id>

+    </attribute>

+    <instance_name>Port C:CS0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-dimm_port-power8</type>

+  </targetPart>

+  <targetPart>

+    <id>Port C:CS1</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>DDR3</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>MBA_DIMM</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MBA_PORT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CENTAUR</default>

+    </attribute>

+    <attribute>

+      <id>SCHEMATIC_INTERFACE</id>

+    </attribute>

+    <instance_name>Port C:CS1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-dimm_port-power8</type>

+  </targetPart>

+  <targetPart>

+    <id>Port D:CS0</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>DDR3</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>MBA_DIMM</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MBA_PORT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CENTAUR</default>

+    </attribute>

+    <attribute>

+      <id>SCHEMATIC_INTERFACE</id>

+    </attribute>

+    <instance_name>Port D:CS0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-dimm_port-power8</type>

+  </targetPart>

+  <targetPart>

+    <id>Port D:CS1</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>DDR3</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>MBA_DIMM</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MBA_PORT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CENTAUR</default>

+    </attribute>

+    <attribute>

+      <id>SCHEMATIC_INTERFACE</id>

+    </attribute>

+    <instance_name>Port D:CS1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-dimm_port-power8</type>

+  </targetPart>

+  <targetPart>

+    <id>chip-membuf-centaur</id>

+    <attribute>

+      <id>CENTAUR_ECID_FRU_ID</id>

+      <default>0xFF</default>

+    </attribute>

+    <attribute>

+      <id>FRU_ID</id>

+    </attribute>

+    <attribute>

+      <id>FRU_NAME</id>

+    </attribute>

+    <attribute>

+      <id>I2C_BUS_SPEED_ARRAY</id>

+      <default>400,400,0,0,0,0</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_INSTANCE</id>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CENTAUR</default>

+    </attribute>

+    <attribute>

+      <id>MSS_FREQ_OVERRIDE</id>

+    </attribute>

+    <attribute>

+      <id>MSS_VOLT_OVERRIDE</id>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>MEMBUF</default>

+    </attribute>

+    <child_id>dmi</child_id>

+    <child_id>l4</child_id>

+    <child_id>mba-0</child_id>

+    <child_id>mba-1</child_id>

+    <child_id>i2c-master</child_id>

+    <child_id>i2c-spare</child_id>

+    <child_id>fsi-slave-membuf</child_id>

+    <child_id>vddr</child_id>

+    <child_id>vpd_assoc_child</child_id>

+    <hidden_child_id>membuf_temp_sensor</hidden_child_id>

+    <hidden_child_id>membuf_func_sensor</hidden_child_id>

+    <instance_name>membuf</instance_name>

+    <is_root>true</is_root>

+    <parent>chip</parent>

+    <parent_type>card-motherboard</parent_type>

+    <parent_type>card-daughtercard</parent_type>

+    <position>0</position>

+    <type>chip-membuf-centaur</type>

+  </targetPart>

+  <targetPart>

+    <id>dmi</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>DMI</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>IN</default>

+    </attribute>

+    <instance_name>dmi</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-dmi-centaur</type>

+  </targetPart>

+  <targetPart>

+    <id>fsi-slave-membuf</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>FSICM</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>IN</default>

+    </attribute>

+    <attribute>

+      <id>FSI_ENGINE</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>FSI_LINK</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>FSI_PORT</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>FSI</default>

+    </attribute>

+    <instance_name>fsi-slave-membuf</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-fsicm-slave</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-spare</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-spare</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>l4</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CENTAUR</default>

+    </attribute>

+    <instance_name>l4</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-l4-power9</parent>

+    <position>-1</position>

+    <type>unit-l4-centaur</type>

+  </targetPart>

+  <targetPart>

+    <id>mba-0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MBA_NUM</id>

+      <default>0</default>

+    </attribute>

+    <child_id>Port A:CS0</child_id>

+    <child_id>Port A:CS1</child_id>

+    <child_id>Port B:CS0</child_id>

+    <child_id>Port B:CS1</child_id>

+    <instance_name>mba-0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-mba-power8</parent>

+    <position>-1</position>

+    <type>unit-mba-centaur</type>

+  </targetPart>

+  <targetPart>

+    <id>mba-1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MBA_NUM</id>

+      <default>1</default>

+    </attribute>

+    <child_id>Port C:CS0</child_id>

+    <child_id>Port C:CS1</child_id>

+    <child_id>Port D:CS0</child_id>

+    <child_id>Port D:CS1</child_id>

+    <instance_name>mba-1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-mba-power8</parent>

+    <position>-1</position>

+    <type>unit-mba-centaur</type>

+  </targetPart>

+  <targetPart>

+    <id>membuf_func_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD1</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Func</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default>0x04,0x08</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x6F</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0x0C</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>membuf_func_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>membuf_temp_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD1</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Temp</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>membuf_temp_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>vddr</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>POWER</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>IN</default>

+    </attribute>

+    <attribute>

+      <id>RAIL_NAME</id>

+      <default>VDDR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>vddr</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-power-generic</type>

+  </targetPart>

+  <targetPart>

+    <id>vpd_assoc_child</id>

+    <attribute>

+      <id>ASSOCIATION_TYPE</id>

+      <default>VPD</default>

+    </attribute>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>LOGICAL_ASSOCIATION</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>IN</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>vpd_assoc_child</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-logic_assoc-generic</type>

+  </targetPart>

+</partInstance>

diff --git a/xml/parts/chip-membuf_vpd-device.xml b/xml/parts/chip-membuf_vpd-device.xml
new file mode 100644
index 0000000..5d04342
--- /dev/null
+++ b/xml/parts/chip-membuf_vpd-device.xml
@@ -0,0 +1,96 @@
+<partInstance>

+  <targetPart>

+    <id>chip-membuf_vpd-device</id>

+    <attribute>

+      <id>BYTE_ADDRESS_OFFSET</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MEMORY_SIZE_IN_KB</id>

+      <default>0x40</default>

+    </attribute>

+    <attribute>

+      <id>VPD_TYPE</id>

+      <default>CVPD</default>

+    </attribute>

+    <attribute>

+      <id>WRITE_CYCLE_TIME</id>

+      <default>0x05</default>

+    </attribute>

+    <attribute>

+      <id>WRITE_PAGE_SIZE</id>

+      <default>0x80</default>

+    </attribute>

+    <child_id>i2c-slave</child_id>

+    <child_id>vpd_assoc_parent</child_id>

+    <instance_name>membuf_vpd</instance_name>

+    <is_root>true</is_root>

+    <parent>chip-vpd-device</parent>

+    <parent_type>card-daughtercard</parent_type>

+    <position>0</position>

+    <type>chip-membuf_vpd-device</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-slave</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>IN</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ADDRESS</id>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-slave</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-slave</type>

+  </targetPart>

+  <targetPart>

+    <id>vpd_assoc_parent</id>

+    <attribute>

+      <id>ASSOCIATION_TYPE</id>

+      <default>VPD</default>

+    </attribute>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>LOGICAL_ASSOCIATION</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>vpd_assoc_parent</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-logic_assoc-generic</type>

+  </targetPart>

+</partInstance>

diff --git a/xml/parts/chip-pcie-endpoint.xml b/xml/parts/chip-pcie-endpoint.xml
new file mode 100644
index 0000000..5d746d8
--- /dev/null
+++ b/xml/parts/chip-pcie-endpoint.xml
@@ -0,0 +1,33 @@
+<partInstance>

+  <targetPart>

+    <id>chip-pcie-endpoint</id>

+    <child_id>pciep</child_id>

+    <instance_name>pci_endpoint</instance_name>

+    <is_root>true</is_root>

+    <parent>chip</parent>

+    <parent_type>card-motherboard</parent_type>

+    <parent_type>card-daughtercard</parent_type>

+    <position>0</position>

+    <type>chip-pcie-endpoint</type>

+  </targetPart>

+  <targetPart>

+    <id>pciep</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>PCIE</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>IN</default>

+    </attribute>

+    <instance_name>pciep</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-pcie-endpoint</type>

+  </targetPart>

+</partInstance>

diff --git a/xml/parts/chip-planar_vpd-device.xml b/xml/parts/chip-planar_vpd-device.xml
new file mode 100644
index 0000000..134e78a
--- /dev/null
+++ b/xml/parts/chip-planar_vpd-device.xml
@@ -0,0 +1,97 @@
+<partInstance>

+  <targetPart>

+    <id>chip-planar_vpd-device</id>

+    <attribute>

+      <id>BYTE_ADDRESS_OFFSET</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MEMORY_SIZE_IN_KB</id>

+      <default>0x40</default>

+    </attribute>

+    <attribute>

+      <id>VPD_TYPE</id>

+      <default>PVPD</default>

+    </attribute>

+    <attribute>

+      <id>WRITE_CYCLE_TIME</id>

+      <default>20</default>

+    </attribute>

+    <attribute>

+      <id>WRITE_PAGE_SIZE</id>

+      <default>32</default>

+    </attribute>

+    <child_id>i2c-slave</child_id>

+    <child_id>vpd_assoc_parent</child_id>

+    <instance_name>planar_vpd</instance_name>

+    <is_root>true</is_root>

+    <parent>chip-vpd-device</parent>

+    <parent_type>card-motherboard</parent_type>

+    <parent_type>card-daughtercard</parent_type>

+    <position>0</position>

+    <type>chip-planar_vpd-device</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-slave</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>IN</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ADDRESS</id>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-slave</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-slave</type>

+  </targetPart>

+  <targetPart>

+    <id>vpd_assoc_parent</id>

+    <attribute>

+      <id>ASSOCIATION_TYPE</id>

+      <default>VPD</default>

+    </attribute>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>LOGICAL_ASSOCIATION</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>vpd_assoc_parent</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-logic_assoc-generic</type>

+  </targetPart>

+</partInstance>

diff --git a/xml/parts/chip-vpd-device.xml b/xml/parts/chip-vpd-device.xml
new file mode 100644
index 0000000..487c51e
--- /dev/null
+++ b/xml/parts/chip-vpd-device.xml
@@ -0,0 +1,80 @@
+<partInstance>

+  <targetPart>

+    <id>chip-vpd-device</id>

+    <attribute>

+      <id>BYTE_ADDRESS_OFFSET</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ADDRESS</id>

+    </attribute>

+    <attribute>

+      <id>I2C_SPEED</id>

+    </attribute>

+    <attribute>

+      <id>MEMORY_SIZE_IN_KB</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>VPD</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <attribute>

+      <id>VPD_TYPE</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>WRITE_CYCLE_TIME</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>WRITE_PAGE_SIZE</id>

+      <default></default>

+    </attribute>

+    <child_id>i2c-slave</child_id>

+    <instance_name>vpdchip</instance_name>

+    <is_root>true</is_root>

+    <parent>chip</parent>

+    <position>0</position>

+    <type>chip-vpd-device</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-slave</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>IN</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ADDRESS</id>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-slave</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-slave</type>

+  </targetPart>

+</partInstance>

diff --git a/xml/parts/chip-vreg-generic.xml b/xml/parts/chip-vreg-generic.xml
new file mode 100644
index 0000000..4c4c075
--- /dev/null
+++ b/xml/parts/chip-vreg-generic.xml
@@ -0,0 +1,156 @@
+<partInstance>

+  <targetPart>

+    <id>avs</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>POWER</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>RAIL_NAME</id>

+      <default>UNKNOWN</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>avs</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-vreg_avs-generic</type>

+  </targetPart>

+  <targetPart>

+    <id>chip-vreg-generic</id>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>VOLTAGE_REGULATOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <child_id>i2c-slave</child_id>

+    <child_id>vreg_enable</child_id>

+    <child_id>vreg_pgood</child_id>

+    <child_id>vout</child_id>

+    <child_id>avs</child_id>

+    <instance_name>vreg</instance_name>

+    <is_root>true</is_root>

+    <parent>chip</parent>

+    <parent_type>card-motherboard</parent_type>

+    <parent_type>card-daughtercard</parent_type>

+    <position>0</position>

+    <type>chip-vreg-generic</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-slave</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>IN</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ADDRESS</id>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-slave</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-slave</type>

+  </targetPart>

+  <targetPart>

+    <id>vout</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>POWER</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>RAIL_NAME</id>

+      <default>UNKNOWN</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>vout</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-vreg_vout-generic</type>

+  </targetPart>

+  <targetPart>

+    <id>vreg_enable</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>GPIO</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>IN</default>

+    </attribute>

+    <attribute>

+      <id>GPIO_TYPE</id>

+      <default>ENABLE</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>vreg_enable</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-vreg_enable-generic</type>

+  </targetPart>

+  <targetPart>

+    <id>vreg_pgood</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>GPIO</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>GPIO_TYPE</id>

+      <default>PGOOD</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>vreg_pgood</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-vreg_pgood-generic</type>

+  </targetPart>

+</partInstance>

diff --git a/xml/parts/connector-card-generic.xml b/xml/parts/connector-card-generic.xml
new file mode 100644
index 0000000..dfa3fb9
--- /dev/null
+++ b/xml/parts/connector-card-generic.xml
@@ -0,0 +1,16 @@
+<partInstance>

+  <targetPart>

+    <id>connector-card-generic</id>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>connector</instance_name>

+    <is_root>true</is_root>

+    <parent>connector</parent>

+    <parent_type>card-motherboard</parent_type>

+    <parent_type>card-daughtercard</parent_type>

+    <position>-1</position>

+    <type>connector-card-generic</type>

+  </targetPart>

+</partInstance>

diff --git a/xml/parts/connector-cdimm-cdimm.xml b/xml/parts/connector-cdimm-cdimm.xml
new file mode 100644
index 0000000..da59bab
--- /dev/null
+++ b/xml/parts/connector-cdimm-cdimm.xml
@@ -0,0 +1,16 @@
+<partInstance>

+  <targetPart>

+    <id>connector-cdimm-cdimm</id>

+    <attribute>

+      <id>MODEL</id>

+      <default>JEDEC</default>

+    </attribute>

+    <instance_name>connector</instance_name>

+    <is_root>true</is_root>

+    <parent>connector</parent>

+    <parent_type>card-motherboard</parent_type>

+    <parent_type>card-daughtercard</parent_type>

+    <position>-1</position>

+    <type>connector-cdimm-cdimm</type>

+  </targetPart>

+</partInstance>

diff --git a/xml/parts/connector-dimmconn-dd4.xml b/xml/parts/connector-dimmconn-dd4.xml
new file mode 100644
index 0000000..8a88c9b
--- /dev/null
+++ b/xml/parts/connector-dimmconn-dd4.xml
@@ -0,0 +1,16 @@
+<partInstance>

+  <targetPart>

+    <id>connector-dimmconn-ddr4</id>

+    <attribute>

+      <id>MODEL</id>

+      <default>JEDEC</default>

+    </attribute>

+    <instance_name>connector</instance_name>

+    <is_root>true</is_root>

+    <parent>connector</parent>

+    <parent_type>card-motherboard</parent_type>

+    <parent_type>card-daughtercard</parent_type>

+    <position>-1</position>

+    <type>connector-dimmconn-ddr4</type>

+  </targetPart>

+</partInstance>

diff --git a/xml/parts/connector-dimmconn-ddr3_jedec.xml b/xml/parts/connector-dimmconn-ddr3_jedec.xml
new file mode 100644
index 0000000..64cc4ad
--- /dev/null
+++ b/xml/parts/connector-dimmconn-ddr3_jedec.xml
@@ -0,0 +1,16 @@
+<partInstance>

+  <targetPart>

+    <id>connector-dimmconn-ddr3_jedec</id>

+    <attribute>

+      <id>MODEL</id>

+      <default>JEDEC</default>

+    </attribute>

+    <instance_name>connector</instance_name>

+    <is_root>true</is_root>

+    <parent>connector</parent>

+    <parent_type>card-motherboard</parent_type>

+    <parent_type>card-daughtercard</parent_type>

+    <position>-1</position>

+    <type>connector-dimmconn-ddr3_jedec</type>

+  </targetPart>

+</partInstance>

diff --git a/xml/parts/connector-hmc-generic.xml b/xml/parts/connector-hmc-generic.xml
new file mode 100644
index 0000000..e845283
--- /dev/null
+++ b/xml/parts/connector-hmc-generic.xml
@@ -0,0 +1,16 @@
+<partInstance>

+  <targetPart>

+    <id>connector-hmc-generic</id>

+    <attribute>

+      <id>CONNECTOR_TYPE</id>

+      <default>HMC</default>

+    </attribute>

+    <instance_name>connector</instance_name>

+    <is_root>true</is_root>

+    <parent>connector</parent>

+    <parent_type>card-motherboard</parent_type>

+    <parent_type>card-daughtercard</parent_type>

+    <position>-1</position>

+    <type>connector-hmc-generic</type>

+  </targetPart>

+</partInstance>

diff --git a/xml/parts/connector-uart-generic.xml b/xml/parts/connector-uart-generic.xml
new file mode 100644
index 0000000..7279f3e
--- /dev/null
+++ b/xml/parts/connector-uart-generic.xml
@@ -0,0 +1,16 @@
+<partInstance>

+  <targetPart>

+    <id>connector-uart-generic</id>

+    <attribute>

+      <id>CONNECTOR_TYPE</id>

+      <default>SERIAL</default>

+    </attribute>

+    <instance_name>connector</instance_name>

+    <is_root>true</is_root>

+    <parent>connector</parent>

+    <parent_type>card-motherboard</parent_type>

+    <parent_type>card-daughtercard</parent_type>

+    <position>-1</position>

+    <type>connector-uart-generic</type>

+  </targetPart>

+</partInstance>

diff --git a/xml/parts/connector-usb-generic.xml b/xml/parts/connector-usb-generic.xml
new file mode 100644
index 0000000..a98c2ad
--- /dev/null
+++ b/xml/parts/connector-usb-generic.xml
@@ -0,0 +1,16 @@
+<partInstance>

+  <targetPart>

+    <id>connector-usb-generic</id>

+    <attribute>

+      <id>CONNECTOR_TYPE</id>

+      <default>USB</default>

+    </attribute>

+    <instance_name>connector</instance_name>

+    <is_root>true</is_root>

+    <parent>connector</parent>

+    <parent_type>card-motherboard</parent_type>

+    <parent_type>card-daughtercard</parent_type>

+    <position>-1</position>

+    <type>connector-usb-generic</type>

+  </targetPart>

+</partInstance>

diff --git a/xml/parts/dummy-presence-generic.xml b/xml/parts/dummy-presence-generic.xml
new file mode 100644
index 0000000..75472d2
--- /dev/null
+++ b/xml/parts/dummy-presence-generic.xml
@@ -0,0 +1,64 @@
+<partInstance>

+  <targetPart>

+    <id>dummy-presence-generic</id>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>GPIO_EXPANDER</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <child_id>io-0</child_id>

+    <instance_name>presence_detect</instance_name>

+    <is_root>true</is_root>

+    <parent>chip</parent>

+    <parent_type>card-motherboard</parent_type>

+    <parent_type>card-daughtercard</parent_type>

+    <position>0</position>

+    <type>dummy-presence-generic</type>

+  </targetPart>

+  <targetPart>

+    <id>io-0</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>GPIO</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>INOUT</default>

+    </attribute>

+    <attribute>

+      <id>DRIVER_TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <attribute>

+      <id>GPIO_TYPE</id>

+      <default>GENERIC_OUTPUT</default>

+    </attribute>

+    <attribute>

+      <id>PIN_NAME</id>

+    </attribute>

+    <attribute>

+      <id>POR_VALUE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>SCHEMATIC_INTERFACE</id>

+      <default>IO0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>io-0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-gpio-generic</type>

+  </targetPart>

+</partInstance>

diff --git a/xml/parts/enc-node-power8.xml b/xml/parts/enc-node-power8.xml
new file mode 100644
index 0000000..d6256c2
--- /dev/null
+++ b/xml/parts/enc-node-power8.xml
@@ -0,0 +1,259 @@
+<partInstance>

+  <targetPart>

+    <id>apss_fault_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD7</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>APSS_Fault</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x03</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC7</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>apss_fault_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>enc-node-power8</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>ENC</default>

+    </attribute>

+    <attribute>

+      <id>FRU_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>FRU_NAME</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_INSTANCE</id>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>POWER8</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NODE</default>

+    </attribute>

+    <hidden_child_id>motherboard_fault_sensor</hidden_child_id>

+    <hidden_child_id>ref_clk_sensor</hidden_child_id>

+    <hidden_child_id>pci_clk_sensor</hidden_child_id>

+    <hidden_child_id>tod_clk_sensor</hidden_child_id>

+    <hidden_child_id>apss_fault_sensor</hidden_child_id>

+    <instance_name>node</instance_name>

+    <is_root>true</is_root>

+    <parent>base</parent>

+    <parent_type>sys-sys-power8</parent_type>

+    <position>0</position>

+    <type>enc-node-power8</type>

+  </targetPart>

+  <targetPart>

+    <id>motherboard_fault_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0x07</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Motherboard_Fault</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default>0x00,0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x03</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC7</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>motherboard_fault_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>pci_clk_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD5</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>PCI_Clock</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default>0x0,0x1</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x03</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC7</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>pci_clk_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>ref_clk_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD4</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Ref_Clock</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default>0x0,0x1</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x03</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC7</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>ref_clk_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>tod_clk_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD6</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>TOD_Clock</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default>0x0,0x1</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x03</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC7</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>tod_clk_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+</partInstance>

diff --git a/xml/parts/enc-node-power9.xml b/xml/parts/enc-node-power9.xml
new file mode 100644
index 0000000..2dec53b
--- /dev/null
+++ b/xml/parts/enc-node-power9.xml
@@ -0,0 +1,272 @@
+<partInstance>

+  <targetPart>

+    <id>apss_fault_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD7</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>APSS_Fault</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x03</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC7</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>apss_fault_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>enc-node-power9</id>

+    <attribute>

+      <id>CDM_DOMAIN</id>

+      <default>NODE</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>ENC</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>FIELD_CORE_OVERRIDE</id>

+    </attribute>

+    <attribute>

+      <id>FRU_ID</id>

+    </attribute>

+    <attribute>

+      <id>HWAS_STATE_CHANGED_SUBSCRIPTION_MASK</id>

+      <default>0x00000009</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>POWER9</default>

+    </attribute>

+    <attribute>

+      <id>TPM_BACKUP_INFO</id>

+    </attribute>

+    <attribute>

+      <id>TPM_PRIMARY_INFO</id>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NODE</default>

+    </attribute>

+    <hidden_child_id>motherboard_fault_sensor</hidden_child_id>

+    <hidden_child_id>ref_clk_sensor</hidden_child_id>

+    <hidden_child_id>pci_clk_sensor</hidden_child_id>

+    <hidden_child_id>tod_clk_sensor</hidden_child_id>

+    <hidden_child_id>apss_fault_sensor</hidden_child_id>

+    <instance_name>node</instance_name>

+    <is_root>true</is_root>

+    <parent>base</parent>

+    <parent_type>sys-sys-power9</parent_type>

+    <position>0</position>

+    <type>enc-node-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>motherboard_fault_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0x07</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Motherboard_Fault</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default>0x00,0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x03</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC7</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>motherboard_fault_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>pci_clk_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD5</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>PCI_Clock</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default>0x0,0x1</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x03</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC7</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>pci_clk_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>ref_clk_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD4</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Ref_Clock</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default>0x0,0x1</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x03</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC7</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>ref_clk_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>tod_clk_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD6</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>TOD_Clock</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default>0x0,0x1</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x03</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC7</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>tod_clk_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+</partInstance>

diff --git a/xml/parts/fsi_passthrough.xml b/xml/parts/fsi_passthrough.xml
new file mode 100644
index 0000000..fb46d27
--- /dev/null
+++ b/xml/parts/fsi_passthrough.xml
@@ -0,0 +1,169 @@
+<partInstance>

+<version>2.1</version>

+<targetInstances>

+<targetPart>

+	<id>passthrough-fsi-dummy</id>

+	<type>passthrough-fsi-dummy</type>

+	<is_root>true</is_root>

+	<instance_name>passthrough-fsi-dummy</instance_name>

+	<position>-1</position>

+	<parent>chip</parent>

+	<parent_type>card-motherboard</parent_type>

+	<parent_type>card-daughtercard</parent_type>

+	<child_id>passthrough-fsi-dummy.fsi-in-0</child_id>

+	<child_id>passthrough-fsi-dummy.fsi-out-0</child_id>

+	<attribute>

+		<id>CCIN</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>CHIP_ID</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>CHIP</default>

+	</attribute>

+	<attribute>

+		<id>LOCATION_CODE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>LOCATION_CODE_TYPE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRU_ID</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>PASSTHROUGH</default>

+	</attribute>

+	<attribute>

+		<id>POSITION</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default></default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>passthrough-fsi-dummy.fsi-in-0</id>

+	<type>unit-fsi-slave</type>

+	<is_root>false</is_root>

+	<instance_name>passthrough-fsi-dummy.fsi-in</instance_name>

+	<position>0</position>

+	<parent>unit</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>FSIM</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>IN</default>

+	</attribute>

+	<attribute>

+		<id>FSI_ENGINE</id>

+		<default>0x00</default>

+	</attribute>

+	<attribute>

+		<id>FSI_LINK</id>

+		<default>0x00</default>

+	</attribute>

+	<attribute>

+		<id>FSI_PORT</id>

+		<default>0x00</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>FSI</default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>passthrough-fsi-dummy.fsi-out-0</id>

+	<type>unit-fsi-master</type>

+	<is_root>false</is_root>

+	<instance_name>passthrough-fsi-dummy.fsi-out</instance_name>

+	<position>0</position>

+	<parent>unit</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>FSIM</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>CMFSI</id>

+		<default>0x00</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>OUT</default>

+	</attribute>

+	<attribute>

+		<id>FSI_ENGINE</id>

+		<default>0x00</default>

+	</attribute>

+	<attribute>

+		<id>FSI_LINK</id>

+		<default>0x00</default>

+	</attribute>

+	<attribute>

+		<id>FSI_PORT</id>

+		<default>0x00</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>FSIM</default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>FSI</default>

+	</attribute>

+</targetPart>

+</targetInstances>

+</partInstance>

diff --git a/xml/parts/i2c_passthrough.xml b/xml/parts/i2c_passthrough.xml
new file mode 100644
index 0000000..e39fda1
--- /dev/null
+++ b/xml/parts/i2c_passthrough.xml
@@ -0,0 +1,161 @@
+<partInstance>

+<version>2.1</version>

+<targetInstances>

+<targetPart>

+	<id>passthrough-i2c-dummy</id>

+	<type>passthrough-i2c-dummy</type>

+	<is_root>true</is_root>

+	<instance_name>passthrough-i2c-dummy</instance_name>

+	<position>-1</position>

+	<parent>chip</parent>

+	<parent_type>card-motherboard</parent_type>

+	<parent_type>card-daughtercard</parent_type>

+	<child_id>passthrough-i2c-dummy.i2c-in-0</child_id>

+	<child_id>passthrough-i2c-dummy.i2c-out-0</child_id>

+	<attribute>

+		<id>CCIN</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>CHIP_ID</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>CHIP</default>

+	</attribute>

+	<attribute>

+		<id>LOCATION_CODE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>LOCATION_CODE_TYPE</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRU_ID</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>PASSTHROUGH</default>

+	</attribute>

+	<attribute>

+		<id>POSITION</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default></default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>passthrough-i2c-dummy.i2c-in-0</id>

+	<type>unit-i2c-slave</type>

+	<is_root>false</is_root>

+	<instance_name>passthrough-i2c-dummy.i2c-in</instance_name>

+	<position>0</position>

+	<parent>unit</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>I2C</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>IN</default>

+	</attribute>

+	<attribute>

+		<id>I2C_ADDRESS</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>I2C_ENGINE</id>

+		<default>0x00</default>

+	</attribute>

+	<attribute>

+		<id>I2C_PORT</id>

+		<default>0x00</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+<targetPart>

+	<id>passthrough-i2c-dummy.i2c-out-0</id>

+	<type>unit-i2c-master</type>

+	<is_root>false</is_root>

+	<instance_name>passthrough-i2c-dummy.i2c-out</instance_name>

+	<position>0</position>

+	<parent>unit</parent>

+	<attribute>

+		<id>BUS_TYPE</id>

+		<default>I2C</default>

+	</attribute>

+	<attribute>

+		<id>CHIP_UNIT</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>CLASS</id>

+		<default>UNIT</default>

+	</attribute>

+	<attribute>

+		<id>DIRECTION</id>

+		<default>OUT</default>

+	</attribute>

+	<attribute>

+		<id>I2C_ENGINE</id>

+		<default>0x00</default>

+	</attribute>

+	<attribute>

+		<id>I2C_PORT</id>

+		<default>0x00</default>

+	</attribute>

+	<attribute>

+		<id>MODEL</id>

+		<default></default>

+	</attribute>

+	<attribute>

+		<id>MRW_TYPE</id>

+		<default>NA</default>

+	</attribute>

+	<attribute>

+		<id>RESOURCE_IS_CRITICAL</id>

+		<default>0</default>

+	</attribute>

+	<attribute>

+		<id>TYPE</id>

+		<default>NA</default>

+	</attribute>

+</targetPart>

+</targetInstances>

+</partInstance>

diff --git a/xml/parts/lcard-dimm-ddr4.xml b/xml/parts/lcard-dimm-ddr4.xml
new file mode 100644
index 0000000..f35ef92
--- /dev/null
+++ b/xml/parts/lcard-dimm-ddr4.xml
@@ -0,0 +1,207 @@
+<partInstance>

+  <targetPart>

+    <id>ddr4</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>DDR4</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>IN</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>JEDEC</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>ddr4</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ddr4-jedec</type>

+  </targetPart>

+  <targetPart>

+    <id>dimm_func_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0x20</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Func</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default>0x04,0x08</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x6F</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0x0C</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>dimm_func_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>dimm_temp_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0x20</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Temp</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>dimm_temp_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-slave</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>IN</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ADDRESS</id>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-slave</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-slave</type>

+  </targetPart>

+  <targetPart>

+    <id>lcard-dimm-ddr4</id>

+    <attribute>

+      <id>MODEL</id>

+      <default>JEDEC</default>

+    </attribute>

+    <child_id>ddr4</child_id>

+    <child_id>spd</child_id>

+    <hidden_child_id>dimm_temp_sensor</hidden_child_id>

+    <hidden_child_id>dimm_func_sensor</hidden_child_id>

+    <instance_name>dimm</instance_name>

+    <is_root>true</is_root>

+    <parent>lcard-dimm</parent>

+    <parent_type>connector-dimmconn-ddr4</parent_type>

+    <position>0</position>

+    <type>lcard-dimm-ddr4</type>

+  </targetPart>

+  <targetPart>

+    <id>spd</id>

+    <attribute>

+      <id>BYTE_ADDRESS_OFFSET</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>MEMORY_SIZE_IN_KB</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>SPD</default>

+    </attribute>

+    <attribute>

+      <id>VPD_TYPE</id>

+      <default>SPD</default>

+    </attribute>

+    <attribute>

+      <id>WRITE_CYCLE_TIME</id>

+      <default>0x05</default>

+    </attribute>

+    <attribute>

+      <id>WRITE_PAGE_SIZE</id>

+      <default>0x50</default>

+    </attribute>

+    <child_id>i2c-slave</child_id>

+    <instance_name>spd</instance_name>

+    <is_root>false</is_root>

+    <parent>chip-vpd-device</parent>

+    <position>-1</position>

+    <type>chip-spd-device</type>

+  </targetPart>

+</partInstance>

diff --git a/xml/parts/lcard-dimm-jedec.xml b/xml/parts/lcard-dimm-jedec.xml
new file mode 100644
index 0000000..748c67f
--- /dev/null
+++ b/xml/parts/lcard-dimm-jedec.xml
@@ -0,0 +1,207 @@
+<partInstance>

+  <targetPart>

+    <id>ddr3</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>DDR3</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>IN</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>JEDEC</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>ddr3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ddr3-jedec</type>

+  </targetPart>

+  <targetPart>

+    <id>dimm_func_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0x20</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Func</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default>0x04,0x08</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x6F</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0x0C</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>dimm_func_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>dimm_temp_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0x20</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Temp</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>dimm_temp_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-slave</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>IN</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ADDRESS</id>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-slave</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-slave</type>

+  </targetPart>

+  <targetPart>

+    <id>lcard-dimm-jedec</id>

+    <attribute>

+      <id>MODEL</id>

+      <default>JEDEC</default>

+    </attribute>

+    <child_id>ddr3</child_id>

+    <child_id>spd</child_id>

+    <hidden_child_id>dimm_temp_sensor</hidden_child_id>

+    <hidden_child_id>dimm_func_sensor</hidden_child_id>

+    <instance_name>dimm</instance_name>

+    <is_root>true</is_root>

+    <parent>lcard-dimm</parent>

+    <parent_type>connector-dimmconn-ddr3_jedec</parent_type>

+    <position>0</position>

+    <type>lcard-dimm-jedec</type>

+  </targetPart>

+  <targetPart>

+    <id>spd</id>

+    <attribute>

+      <id>BYTE_ADDRESS_OFFSET</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>MEMORY_SIZE_IN_KB</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>SPD</default>

+    </attribute>

+    <attribute>

+      <id>VPD_TYPE</id>

+      <default>SPD</default>

+    </attribute>

+    <attribute>

+      <id>WRITE_CYCLE_TIME</id>

+      <default>0x05</default>

+    </attribute>

+    <attribute>

+      <id>WRITE_PAGE_SIZE</id>

+      <default>0x50</default>

+    </attribute>

+    <child_id>i2c-slave</child_id>

+    <instance_name>spd</instance_name>

+    <is_root>false</is_root>

+    <parent>chip-vpd-device</parent>

+    <position>-1</position>

+    <type>chip-spd-device</type>

+  </targetPart>

+</partInstance>

diff --git a/xml/parts/lcard-dimm.xml b/xml/parts/lcard-dimm.xml
new file mode 100644
index 0000000..dc73410
--- /dev/null
+++ b/xml/parts/lcard-dimm.xml
@@ -0,0 +1,27 @@
+<partInstance>

+  <targetPart>

+    <id>lcard-dimm</id>

+    <attribute>

+      <id>FRU_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>FRU_NAME</id>

+    </attribute>

+    <attribute>

+      <id>IPMI_INSTANCE</id>

+    </attribute>

+    <attribute>

+      <id>POSITION</id>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>DIMM</default>

+    </attribute>

+    <instance_name>lcard</instance_name>

+    <is_root>true</is_root>

+    <parent>card</parent>

+    <position>-1</position>

+    <type>lcard-dimm</type>

+  </targetPart>

+</partInstance>

diff --git a/xml/parts/led-led-generic.xml b/xml/parts/led-led-generic.xml
new file mode 100644
index 0000000..ef1a71e
--- /dev/null
+++ b/xml/parts/led-led-generic.xml
@@ -0,0 +1,92 @@
+<partInstance>

+  <targetPart>

+    <id>led-led-generic</id>

+    <attribute>

+      <id>LED_COLOR</id>

+      <default>GREEN</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>LED</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <child_id>led_enable</child_id>

+    <child_id>generic-logic-assoc</child_id>

+    <instance_name>led</instance_name>

+    <is_root>true</is_root>

+    <parent>base</parent>

+    <parent_type>card-motherboard</parent_type>

+    <parent_type>card-daughtercard</parent_type>

+    <position>0</position>

+    <type>led-led-generic</type>

+  </targetPart>

+  <targetPart>

+    <id>generic-logic-assoc</id>

+    <attribute>

+      <id>ASSOCIATION_TYPE</id>

+      <default>FRU</default>

+    </attribute>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>LOGICAL_ASSOCIATION</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>generic-logic-assoc</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-logic_assoc-generic</type>

+  </targetPart>

+  <targetPart>

+    <id>led_enable</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>GPIO</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>IN</default>

+    </attribute>

+    <attribute>

+      <id>DRIVER_TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <attribute>

+      <id>GPIO_TYPE</id>

+      <default>ENABLE</default>

+    </attribute>

+    <attribute>

+      <id>PIN_NAME</id>

+    </attribute>

+    <attribute>

+      <id>POR_VALUE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>SCHEMATIC_INTERFACE</id>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>led_enable</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-gpio-generic</type>

+  </targetPart>

+</partInstance>

diff --git a/xml/parts/module-module-dellovo.xml b/xml/parts/module-module-dellovo.xml
new file mode 100644
index 0000000..45cebd1
--- /dev/null
+++ b/xml/parts/module-module-dellovo.xml
@@ -0,0 +1,2015 @@
+<partInstance>

+  <targetPart>

+    <id>cpu_func_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0x03</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Func</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default>0x07,0x08,0x0b,0x0a,0x0b</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x6F</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0x07</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>cpu_func_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>cpu_temp_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0x03</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Temp</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>cpu_temp_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>cpucore_func_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD0</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Func</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default>0x07,0x08,0x0b,0x0a,0x0b</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x6F</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0x07</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>cpucore_func_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>cpucore_temp_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD0</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Temp</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>cpucore_temp_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>fsi-cm-0</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>FSICM</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>CMFSI</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>FSI_ENGINE</id>

+      <default>0x0C</default>

+    </attribute>

+    <attribute>

+      <id>FSI_LINK</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>FSI_PORT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>FSICM</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>FSI</default>

+    </attribute>

+    <instance_name>fsi-cm-0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-fsi-membuf</type>

+  </targetPart>

+  <targetPart>

+    <id>fsi-cm-1</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>FSICM</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>CMFSI</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>FSI_ENGINE</id>

+      <default>0x0C</default>

+    </attribute>

+    <attribute>

+      <id>FSI_LINK</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>FSI_PORT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>FSICM</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>FSI</default>

+    </attribute>

+    <instance_name>fsi-cm-1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-fsi-membuf</type>

+  </targetPart>

+  <targetPart>

+    <id>fsi-cm-2</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>FSICM</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>CMFSI</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>FSI_ENGINE</id>

+      <default>0x0C</default>

+    </attribute>

+    <attribute>

+      <id>FSI_LINK</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>FSI_PORT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>FSICM</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>FSI</default>

+    </attribute>

+    <instance_name>fsi-cm-2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-fsi-membuf</type>

+  </targetPart>

+  <targetPart>

+    <id>fsi-cm-3</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>FSICM</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>CMFSI</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>FSI_ENGINE</id>

+      <default>0x0C</default>

+    </attribute>

+    <attribute>

+      <id>FSI_LINK</id>

+      <default>0x03</default>

+    </attribute>

+    <attribute>

+      <id>FSI_PORT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>FSICM</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>FSI</default>

+    </attribute>

+    <instance_name>fsi-cm-3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-fsi-membuf</type>

+  </targetPart>

+  <targetPart>

+    <id>fsi-slave-0</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>FSIM</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>IN</default>

+    </attribute>

+    <attribute>

+      <id>FSI_ENGINE</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>FSI_LINK</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>FSI_PORT</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <attribute>

+      <id>RESOURCE_IS_CRITICAL</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>FSI</default>

+    </attribute>

+    <instance_name>fsi-slave-0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-fsi-slave</type>

+  </targetPart>

+  <targetPart>

+    <id>fsim-0</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>FSIM</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>CMFSI</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>FSI_ENGINE</id>

+      <default>0x0D</default>

+    </attribute>

+    <attribute>

+      <id>FSI_LINK</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>FSI_PORT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>FSIM</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>FSI</default>

+    </attribute>

+    <instance_name>fsim-0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-fsi-proc</type>

+  </targetPart>

+  <targetPart>

+    <id>fsim-1</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>FSIM</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>CMFSI</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>FSI_ENGINE</id>

+      <default>0x0D</default>

+    </attribute>

+    <attribute>

+      <id>FSI_LINK</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>FSI_PORT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>FSIM</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>FSI</default>

+    </attribute>

+    <instance_name>fsim-1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-fsi-proc</type>

+  </targetPart>

+  <targetPart>

+    <id>fsim-2</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>FSIM</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>CMFSI</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>FSI_ENGINE</id>

+      <default>0x0D</default>

+    </attribute>

+    <attribute>

+      <id>FSI_LINK</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>FSI_PORT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>FSIM</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>FSI</default>

+    </attribute>

+    <instance_name>fsim-2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-fsi-proc</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-hotplug</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-hotplug</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-lightpath</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-lightpath</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-slave</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>IN</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ADDRESS</id>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-slave</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-slave</type>

+  </targetPart>

+  <targetPart>

+    <id>lpc-slave</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>LPC</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>IN</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>lpc-slave</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-lpc-slave</type>

+  </targetPart>

+  <targetPart>

+    <id>module-module-dellovo</id>

+    <attribute>

+      <id>POSITION</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <child_id>p8p_proc</child_id>

+    <instance_name>module</instance_name>

+    <is_root>true</is_root>

+    <parent>card</parent>

+    <parent_type>socket-proc_socket-50mm</parent_type>

+    <position>0</position>

+    <type>module-module-dellovo</type>

+  </targetPart>

+  <targetPart>

+    <id>p8p_E0_x16</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>NAPLES</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default>0xFFFF</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>16</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>0</default>

+    </attribute>

+    <instance_name>p8p_E0_x16</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power8</parent>

+    <position>-1</position>

+    <type>unit-pci-naples</type>

+  </targetPart>

+  <targetPart>

+    <id>p8p_E0_x16:E1_x16:E2_x8</id>

+    <attribute>

+      <id>IO_CONFIG_NUM</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>NAPLES</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>PCI_CONFIG</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_CONFIG_NUM</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SWAP_TABLE</id>

+      <default>

+		000,010,001,011,111,101,110,100,

+		000,010,001,011,110,101,110,100

+		 </default>

+    </attribute>

+    <child_id>p8p_E0_x16</child_id>

+    <child_id>p8p_E1_x16</child_id>

+    <child_id>p8p_E2_x8</child_id>

+    <instance_name>p8p_E0_x16:E1_x16:E2_x8</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-pciconfig0-naples</type>

+  </targetPart>

+  <targetPart>

+    <id>p8p_E0_x16:E1_x8x8:E2_x8</id>

+    <attribute>

+      <id>IO_CONFIG_NUM</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>NAPLES</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>PCI_CONFIG</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_CONFIG_NUM</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SWAP_TABLE</id>

+      <default>

+		000,010,001,011,111,101,110,100,

+		000,010,001,011,000,010,001,011

+		 </default>

+    </attribute>

+    <child_id>p8p_E0_x16</child_id>

+    <child_id>p8p_E1_CLK0_x8</child_id>

+    <child_id>p8p_E1_CLK1_x8</child_id>

+    <child_id>p8p_E2_x8</child_id>

+    <instance_name>p8p_E0_x16:E1_x8x8:E2_x8</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-pciconfig1-naples</type>

+  </targetPart>

+  <targetPart>

+    <id>p8p_E1_CLK0_x8</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>NAPLES</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default>0xFF00</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>1</default>

+    </attribute>

+    <instance_name>p8p_E1_CLK0_x8</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power8</parent>

+    <position>-1</position>

+    <type>unit-pci-naples</type>

+  </targetPart>

+  <targetPart>

+    <id>p8p_E1_CLK1_x8</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>NAPLES</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default>0x00FF</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>2</default>

+    </attribute>

+    <instance_name>p8p_E1_CLK1_x8</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power8</parent>

+    <position>-1</position>

+    <type>unit-pci-naples</type>

+  </targetPart>

+  <targetPart>

+    <id>p8p_E1_x16</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>NAPLES</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default>0xFFFF</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>16</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>1</default>

+    </attribute>

+    <instance_name>p8p_E1_x16</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power8</parent>

+    <position>-1</position>

+    <type>unit-pci-naples</type>

+  </targetPart>

+  <targetPart>

+    <id>p8p_E2_x8</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>NAPLES</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default>0xFF00</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>3</default>

+    </attribute>

+    <instance_name>p8p_E2_x8</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power8</parent>

+    <position>-1</position>

+    <type>unit-pci-naples</type>

+  </targetPart>

+  <targetPart>

+    <id>p8p_capp-0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>NAPLES</default>

+    </attribute>

+    <instance_name>p8p_capp-0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-capp-power8</parent>

+    <position>-1</position>

+    <type>unit-capp-naples</type>

+  </targetPart>

+  <targetPart>

+    <id>p8p_capp-1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>NAPLES</default>

+    </attribute>

+    <instance_name>p8p_capp-1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-capp-power8</parent>

+    <position>-1</position>

+    <type>unit-capp-naples</type>

+  </targetPart>

+  <targetPart>

+    <id>p8p_core-0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>NAPLES</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <instance_name>p8p_core-0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-core-power8</parent>

+    <position>-1</position>

+    <type>unit-core-naples</type>

+  </targetPart>

+  <targetPart>

+    <id>p8p_ex-1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>NAPLES</default>

+    </attribute>

+    <child_id>p8p_core-0</child_id>

+    <instance_name>p8p_ex-1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ex-power8</parent>

+    <position>-1</position>

+    <type>unit-ex-naples</type>

+  </targetPart>

+  <targetPart>

+    <id>p8p_ex-10</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>10</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>NAPLES</default>

+    </attribute>

+    <child_id>p8p_core-0</child_id>

+    <instance_name>p8p_ex-10</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ex-power8</parent>

+    <position>-1</position>

+    <type>unit-ex-naples</type>

+  </targetPart>

+  <targetPart>

+    <id>p8p_ex-11</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>11</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>NAPLES</default>

+    </attribute>

+    <child_id>p8p_core-0</child_id>

+    <instance_name>p8p_ex-11</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ex-power8</parent>

+    <position>-1</position>

+    <type>unit-ex-naples</type>

+  </targetPart>

+  <targetPart>

+    <id>p8p_ex-12</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>12</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>NAPLES</default>

+    </attribute>

+    <child_id>p8p_core-0</child_id>

+    <instance_name>p8p_ex-12</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ex-power8</parent>

+    <position>-1</position>

+    <type>unit-ex-naples</type>

+  </targetPart>

+  <targetPart>

+    <id>p8p_ex-13</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>13</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>NAPLES</default>

+    </attribute>

+    <child_id>p8p_core-0</child_id>

+    <instance_name>p8p_ex-13</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ex-power8</parent>

+    <position>-1</position>

+    <type>unit-ex-naples</type>

+  </targetPart>

+  <targetPart>

+    <id>p8p_ex-14</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>14</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>NAPLES</default>

+    </attribute>

+    <child_id>p8p_core-0</child_id>

+    <instance_name>p8p_ex-14</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ex-power8</parent>

+    <position>-1</position>

+    <type>unit-ex-naples</type>

+  </targetPart>

+  <targetPart>

+    <id>p8p_ex-2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>NAPLES</default>

+    </attribute>

+    <child_id>p8p_core-0</child_id>

+    <instance_name>p8p_ex-2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ex-power8</parent>

+    <position>-1</position>

+    <type>unit-ex-naples</type>

+  </targetPart>

+  <targetPart>

+    <id>p8p_ex-3</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>NAPLES</default>

+    </attribute>

+    <child_id>p8p_core-0</child_id>

+    <instance_name>p8p_ex-3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ex-power8</parent>

+    <position>-1</position>

+    <type>unit-ex-naples</type>

+  </targetPart>

+  <targetPart>

+    <id>p8p_ex-4</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>4</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>NAPLES</default>

+    </attribute>

+    <child_id>p8p_core-0</child_id>

+    <instance_name>p8p_ex-4</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ex-power8</parent>

+    <position>-1</position>

+    <type>unit-ex-naples</type>

+  </targetPart>

+  <targetPart>

+    <id>p8p_ex-5</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>5</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>NAPLES</default>

+    </attribute>

+    <child_id>p8p_core-0</child_id>

+    <instance_name>p8p_ex-5</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ex-power8</parent>

+    <position>-1</position>

+    <type>unit-ex-naples</type>

+  </targetPart>

+  <targetPart>

+    <id>p8p_ex-6</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>6</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>NAPLES</default>

+    </attribute>

+    <child_id>p8p_core-0</child_id>

+    <instance_name>p8p_ex-6</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ex-power8</parent>

+    <position>-1</position>

+    <type>unit-ex-naples</type>

+  </targetPart>

+  <targetPart>

+    <id>p8p_ex-9</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>9</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>NAPLES</default>

+    </attribute>

+    <child_id>p8p_core-0</child_id>

+    <instance_name>p8p_ex-9</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ex-power8</parent>

+    <position>-1</position>

+    <type>unit-ex-naples</type>

+  </targetPart>

+  <targetPart>

+    <id>p8p_mcs-0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>NAPLES</default>

+    </attribute>

+    <attribute>

+      <id>SCHEMATIC_INTERFACE</id>

+      <default>M0 DMI D</default>

+    </attribute>

+    <instance_name>p8p_mcs-0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-mcs-power8</parent>

+    <position>-1</position>

+    <type>unit-mcs-naples</type>

+  </targetPart>

+  <targetPart>

+    <id>p8p_mcs-1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>NAPLES</default>

+    </attribute>

+    <attribute>

+      <id>SCHEMATIC_INTERFACE</id>

+      <default>M0 DMI C</default>

+    </attribute>

+    <instance_name>p8p_mcs-1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-mcs-power8</parent>

+    <position>-1</position>

+    <type>unit-mcs-naples</type>

+  </targetPart>

+  <targetPart>

+    <id>p8p_mcs-2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>NAPLES</default>

+    </attribute>

+    <attribute>

+      <id>SCHEMATIC_INTERFACE</id>

+      <default>M1 DMI A</default>

+    </attribute>

+    <instance_name>p8p_mcs-2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-mcs-power8</parent>

+    <position>-1</position>

+    <type>unit-mcs-naples</type>

+  </targetPart>

+  <targetPart>

+    <id>p8p_mcs-3</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>NAPLES</default>

+    </attribute>

+    <attribute>

+      <id>SCHEMATIC_INTERFACE</id>

+      <default>M1 DMI B</default>

+    </attribute>

+    <instance_name>p8p_mcs-3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-mcs-power8</parent>

+    <position>-1</position>

+    <type>unit-mcs-naples</type>

+  </targetPart>

+  <targetPart>

+    <id>p8p_mcs-4</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>4</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>NAPLES</default>

+    </attribute>

+    <attribute>

+      <id>SCHEMATIC_INTERFACE</id>

+      <default>M1 DMI D</default>

+    </attribute>

+    <instance_name>p8p_mcs-4</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-mcs-power8</parent>

+    <position>-1</position>

+    <type>unit-mcs-naples</type>

+  </targetPart>

+  <targetPart>

+    <id>p8p_mcs-5</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>5</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>NAPLES</default>

+    </attribute>

+    <attribute>

+      <id>SCHEMATIC_INTERFACE</id>

+      <default>M1 DMI C</default>

+    </attribute>

+    <instance_name>p8p_mcs-5</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-mcs-power8</parent>

+    <position>-1</position>

+    <type>unit-mcs-naples</type>

+  </targetPart>

+  <targetPart>

+    <id>p8p_mcs-6</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>6</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>NAPLES</default>

+    </attribute>

+    <attribute>

+      <id>SCHEMATIC_INTERFACE</id>

+      <default>M0 DMI C</default>

+    </attribute>

+    <instance_name>p8p_mcs-6</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-mcs-power8</parent>

+    <position>-1</position>

+    <type>unit-mcs-naples</type>

+  </targetPart>

+  <targetPart>

+    <id>p8p_mcs-7</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>7</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>NAPLES</default>

+    </attribute>

+    <attribute>

+      <id>SCHEMATIC_INTERFACE</id>

+      <default>M0 DMI C</default>

+    </attribute>

+    <instance_name>p8p_mcs-7</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-mcs-power8</parent>

+    <position>-1</position>

+    <type>unit-mcs-naples</type>

+  </targetPart>

+  <targetPart>

+    <id>p8p_nx-0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>NAPLES</default>

+    </attribute>

+    <instance_name>p8p_nx-0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-nx-power8</parent>

+    <position>-1</position>

+    <type>unit-nx-naples</type>

+  </targetPart>

+  <targetPart>

+    <id>p8p_pci-0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>NAPLES</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>16</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>0</default>

+    </attribute>

+    <instance_name>p8p_pci-0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power8</parent>

+    <position>-1</position>

+    <type>unit-pci-naples</type>

+  </targetPart>

+  <targetPart>

+    <id>p8p_pci-1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>NAPLES</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>16</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>0</default>

+    </attribute>

+    <instance_name>p8p_pci-1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power8</parent>

+    <position>-1</position>

+    <type>unit-pci-naples</type>

+  </targetPart>

+  <targetPart>

+    <id>p8p_pci-2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>NAPLES</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>16</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>0</default>

+    </attribute>

+    <instance_name>p8p_pci-2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power8</parent>

+    <position>-1</position>

+    <type>unit-pci-naples</type>

+  </targetPart>

+  <targetPart>

+    <id>p8p_pci-3</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>NAPLES</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>16</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>0</default>

+    </attribute>

+    <instance_name>p8p_pci-3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power8</parent>

+    <position>-1</position>

+    <type>unit-pci-naples</type>

+  </targetPart>

+  <targetPart>

+    <id>p8p_pci_configs</id>

+    <attribute>

+      <id>IO_CONFIG_SELECT</id>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>NAPLES</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>PCI_CONFIGS</default>

+    </attribute>

+    <child_id>p8p_E0_x16:E1_x16:E2_x8</child_id>

+    <child_id>p8p_E0_x16:E1_x8x8:E2_x8</child_id>

+    <instance_name>p8p_pci_configs</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-pciconfigs-naples</type>

+  </targetPart>

+  <targetPart>

+    <id>p8p_pore-0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>NAPLES</default>

+    </attribute>

+    <instance_name>p8p_pore-0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pore-power8</parent>

+    <position>-1</position>

+    <type>unit-pore-naples</type>

+  </targetPart>

+  <targetPart>

+    <id>p8p_proc</id>

+    <attribute>

+      <id>EEPROM_SBE_BACKUP_INFO</id>

+      <default>

+        <id>field</id>

+        <byteAddrOffset>

+          <value>0x02</value>

+        </byteAddrOffset>

+        <devAddr>

+          <value>0xA2</value>

+        </devAddr>

+        <engine>

+          <value>0</value>

+        </engine>

+        <i2cMasterPath>

+          <value>physical:sys-0/node-0/proc-0</value>

+        </i2cMasterPath>

+        <maxMemorySizeKB>

+          <value>0x40</value>

+        </maxMemorySizeKB>

+        <port>

+          <value>1</value>

+        </port>

+        <writeCycleTime>

+          <value>0x05</value>

+        </writeCycleTime>

+        <writePageSize>

+          <value>0x80</value>

+        </writePageSize>

+      </default>

+    </attribute>

+    <attribute>

+      <id>EEPROM_SBE_PRIMARY_INFO</id>

+      <default>

+        <id>field</id>

+        <byteAddrOffset>

+          <value>0x02</value>

+        </byteAddrOffset>

+        <devAddr>

+          <value>0xA2</value>

+        </devAddr>

+        <engine>

+          <value>0</value>

+        </engine>

+        <i2cMasterPath>

+          <value>physical:sys-0/node-0/proc-0</value>

+        </i2cMasterPath>

+        <maxMemorySizeKB>

+          <value>0x40</value>

+        </maxMemorySizeKB>

+        <port>

+          <value>0</value>

+        </port>

+        <writeCycleTime>

+          <value>0x05</value>

+        </writeCycleTime>

+        <writePageSize>

+          <value>0x80</value>

+        </writePageSize>

+      </default>

+    </attribute>

+    <attribute>

+      <id>EEPROM_VPD_BACKUP_INFO</id>

+      <default>

+        <id>field</id>

+        <byteAddrOffset>

+          <value>0x02</value>

+        </byteAddrOffset>

+        <devAddr>

+          <value>0xA0</value>

+        </devAddr>

+        <engine>

+          <value>0</value>

+        </engine>

+        <i2cMasterPath>

+          <value>physical:sys-0/node-0/proc-0</value>

+        </i2cMasterPath>

+        <maxMemorySizeKB>

+          <value>0x40</value>

+        </maxMemorySizeKB>

+        <port>

+          <value>1</value>

+        </port>

+        <writeCycleTime>

+          <value>0x05</value>

+        </writeCycleTime>

+        <writePageSize>

+          <value>0x80</value>

+        </writePageSize>

+      </default>

+    </attribute>

+    <attribute>

+      <id>EEPROM_VPD_PRIMARY_INFO</id>

+      <default>

+        <id>field</id>

+        <byteAddrOffset>

+          <value>0x02</value>

+        </byteAddrOffset>

+        <devAddr>

+          <value>0xA0</value>

+        </devAddr>

+        <engine>

+          <value>0</value>

+        </engine>

+        <i2cMasterPath>

+          <value>physical:sys-0/node-0/proc-0</value>

+        </i2cMasterPath>

+        <maxMemorySizeKB>

+          <value>0x40</value>

+        </maxMemorySizeKB>

+        <port>

+          <value>0</value>

+        </port>

+        <writeCycleTime>

+          <value>0x05</value>

+        </writeCycleTime>

+        <writePageSize>

+          <value>0x80</value>

+        </writePageSize>

+      </default>

+    </attribute>

+    <attribute>

+      <id>FRU_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>FRU_NAME</id>

+    </attribute>

+    <attribute>

+      <id>FSP_BASE_ADDR</id>

+      <default>0,0x0000000000000000</default>

+    </attribute>

+    <attribute>

+      <id>I2C_BUS_SPEED_ARRAY</id>

+      <default>1000,1000,0,0,0,0</default>

+    </attribute>

+    <attribute>

+      <id>IBSCOM_PROC_BASE_ADDR</id>

+      <default>1,0x0003E00000000000,0x40000000000,0x10000000000,0</default>

+    </attribute>

+    <attribute>

+      <id>INTP_BASE_ADDR</id>

+      <default>1,0x0003FFFF80000000,0x400000,0x100000,0</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_INSTANCE</id>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>NAPLES</default>

+    </attribute>

+    <attribute>

+      <id>MSS_INTERLEAVE_ENABLE</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PCI_BASE_ADDRS_32</id>

+      <default>4,0x0003FF8000000000,0x800000000,0x200000000,0x80000000

+			</default>

+    </attribute>

+    <attribute>

+      <id>PCI_BASE_ADDRS_64</id>

+      <default>4,0x0003D00000000000,0x10000000000,0x4000000000,0x1000000000

+			</default>

+    </attribute>

+    <attribute>

+      <id>PHB_BASE_ADDRS</id>

+      <default>4,0x0003FFFE40000000,0x1000000,0x400000,0x100000</default>

+    </attribute>

+    <attribute>

+      <id>PM_APSS_CHIP_SELECT</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>PM_PBAX_BRDCST_ID_VECTOR</id>

+      <default>0x0</default>

+    </attribute>

+    <attribute>

+      <id>PM_PBAX_CHIPID</id>

+      <default>0x0</default>

+    </attribute>

+    <attribute>

+      <id>PM_PBAX_NODEID</id>

+      <default>0x0</default>

+    </attribute>

+    <attribute>

+      <id>PM_SLEEP_ENTRY</id>

+      <default>0x0</default>

+    </attribute>

+    <attribute>

+      <id>PM_SLEEP_EXIT</id>

+      <default>0x0</default>

+    </attribute>

+    <attribute>

+      <id>PM_SLEEP_TYPE</id>

+      <default>0x0</default>

+    </attribute>

+    <attribute>

+      <id>PM_SPIVID_PORT_ENABLE</id>

+      <default>0x4</default>

+    </attribute>

+    <attribute>

+      <id>PM_UNDERVOLTING_FREQ_MAXIMUM</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PM_UNDERVOLTING_FRQ_MINIMUM</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PM_WINKLE_ENTRY</id>

+      <default>0x0</default>

+    </attribute>

+    <attribute>

+      <id>PM_WINKLE_EXIT</id>

+      <default>0x0</default>

+    </attribute>

+    <attribute>

+      <id>PM_WINKLE_TYPE</id>

+      <default>0x0</default>

+    </attribute>

+    <attribute>

+      <id>POSITION</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PROC_DCM_INSTALLED</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PROC_R_DISTLOSS_VCS</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PROC_R_DISTLOSS_VDD</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PROC_R_LOADLINE_VCS</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PROC_R_LOADLINE_VDD</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PROC_VRM_VOFFSET_VCS</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PROC_VRM_VOFFSET_VDD</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PSI_BRIDGE_BASE_ADDR</id>

+      <default>0,0x0000000000000000</default>

+    </attribute>

+    <attribute>

+      <id>RNG_BASE_ADDR</id>

+      <default>1,0x0003FFFF40000000,0x4000,0x1000,0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>PROC</default>

+    </attribute>

+    <child_id>p8p_ex-1</child_id>

+    <child_id>p8p_ex-2</child_id>

+    <child_id>p8p_ex-3</child_id>

+    <child_id>p8p_ex-4</child_id>

+    <child_id>p8p_ex-5</child_id>

+    <child_id>p8p_ex-6</child_id>

+    <child_id>p8p_ex-9</child_id>

+    <child_id>p8p_ex-10</child_id>

+    <child_id>p8p_ex-11</child_id>

+    <child_id>p8p_ex-12</child_id>

+    <child_id>p8p_ex-13</child_id>

+    <child_id>p8p_ex-14</child_id>

+    <child_id>p8p_pore-0</child_id>

+    <child_id>p8p_capp-0</child_id>

+    <child_id>p8p_capp-1</child_id>

+    <child_id>p8p_nx-0</child_id>

+    <child_id>p8p_pci_configs</child_id>

+    <child_id>p8p_xbus-1</child_id>

+    <child_id>p8p_mcs-0</child_id>

+    <child_id>p8p_mcs-1</child_id>

+    <child_id>p8p_mcs-4</child_id>

+    <child_id>p8p_mcs-5</child_id>

+    <child_id>fsi-slave-0</child_id>

+    <child_id>fsi-cm-0</child_id>

+    <child_id>fsi-cm-1</child_id>

+    <child_id>fsi-cm-2</child_id>

+    <child_id>fsi-cm-3</child_id>

+    <child_id>fsim-0</child_id>

+    <child_id>fsim-1</child_id>

+    <child_id>fsim-2</child_id>

+    <child_id>i2c-slave</child_id>

+    <child_id>i2c-master-lightpath</child_id>

+    <child_id>i2c-master-hotplug</child_id>

+    <child_id>lpc-slave</child_id>

+    <child_id>proc_fru_assoc</child_id>

+    <hidden_child_id>p8p_pci-0</hidden_child_id>

+    <hidden_child_id>p8p_pci-1</hidden_child_id>

+    <hidden_child_id>p8p_pci-2</hidden_child_id>

+    <hidden_child_id>p8p_pci-3</hidden_child_id>

+    <hidden_child_id>p8p_xbus-0</hidden_child_id>

+    <hidden_child_id>p8p_xbus-2</hidden_child_id>

+    <hidden_child_id>p8p_xbus-3</hidden_child_id>

+    <hidden_child_id>p8p_mcs-2</hidden_child_id>

+    <hidden_child_id>p8p_mcs-3</hidden_child_id>

+    <hidden_child_id>p8p_mcs-6</hidden_child_id>

+    <hidden_child_id>p8p_mcs-7</hidden_child_id>

+    <hidden_child_id>cpu_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpu_func_sensor</hidden_child_id>

+    <instance_name>p8p_proc</instance_name>

+    <is_root>false</is_root>

+    <parent>chip</parent>

+    <position>-1</position>

+    <type>chip-processor-naples</type>

+  </targetPart>

+  <targetPart>

+    <id>p8p_xbus-0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>NAPLES</default>

+    </attribute>

+    <instance_name>p8p_xbus-0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-xbus-power8</parent>

+    <position>-1</position>

+    <type>unit-xbus-naples</type>

+  </targetPart>

+  <targetPart>

+    <id>p8p_xbus-1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>NAPLES</default>

+    </attribute>

+    <instance_name>p8p_xbus-1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-xbus-power8</parent>

+    <position>-1</position>

+    <type>unit-xbus-naples</type>

+  </targetPart>

+  <targetPart>

+    <id>p8p_xbus-2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>NAPLES</default>

+    </attribute>

+    <instance_name>p8p_xbus-2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-xbus-power8</parent>

+    <position>-1</position>

+    <type>unit-xbus-naples</type>

+  </targetPart>

+  <targetPart>

+    <id>p8p_xbus-3</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>NAPLES</default>

+    </attribute>

+    <instance_name>p8p_xbus-3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-xbus-power8</parent>

+    <position>-1</position>

+    <type>unit-xbus-naples</type>

+  </targetPart>

+  <targetPart>

+    <id>proc_fru_assoc</id>

+    <attribute>

+      <id>ASSOCIATION_TYPE</id>

+      <default>FRU</default>

+    </attribute>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>LOGICAL_ASSOCIATION</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>IN</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>proc_fru_assoc</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-logic_assoc-generic</type>

+  </targetPart>

+</partInstance>

diff --git a/xml/parts/module-module-lagrange.xml b/xml/parts/module-module-lagrange.xml
new file mode 100644
index 0000000..6aa9b6f
--- /dev/null
+++ b/xml/parts/module-module-lagrange.xml
@@ -0,0 +1,4793 @@
+<partInstance>

+  <targetPart>

+    <id>ddr_ch0:cs0</id>

+    <instance_name>ddr_ch0:cs0</instance_name>

+    <is_root>false</is_root><parent>unit</parent><position>-1</position>

+    <type>unit-dimm_port-power9</type>

+    <attribute><id>BUS_TYPE</id><default>DDR4</default></attribute>

+    <attribute><id>CHIP_UNIT</id><default>0</default></attribute>

+    <attribute><id>DIRECTION</id><default>OUT</default></attribute>

+    <attribute><id>MBA_DIMM</id><default>1</default></attribute>

+    <attribute><id>MBA_PORT</id><default>1</default></attribute>

+  </targetPart>

+  <targetPart>

+    <id>ddr_ch0:cs1</id>

+    <instance_name>ddr_ch0:cs1</instance_name>

+    <is_root>false</is_root><parent>unit</parent><position>-1</position>

+    <type>unit-dimm_port-power9</type>

+    <attribute><id>BUS_TYPE</id><default>DDR4</default></attribute>

+    <attribute><id>CHIP_UNIT</id><default>0</default></attribute>

+    <attribute><id>DIRECTION</id><default>OUT</default></attribute>

+    <attribute><id>MBA_DIMM</id><default>1</default></attribute>

+    <attribute><id>MBA_PORT</id><default>1</default></attribute>

+  </targetPart>

+  <targetPart>

+    <id>ddr_ch1:cs0</id>

+    <instance_name>ddr_ch1:cs0</instance_name>

+    <is_root>false</is_root><parent>unit</parent><position>-1</position>

+    <type>unit-dimm_port-power9</type>

+    <attribute><id>BUS_TYPE</id><default>DDR4</default></attribute>

+    <attribute><id>CHIP_UNIT</id><default>0</default></attribute>

+    <attribute><id>DIRECTION</id><default>OUT</default></attribute>

+    <attribute><id>MBA_DIMM</id><default>1</default></attribute>

+    <attribute><id>MBA_PORT</id><default>1</default></attribute>

+  </targetPart>

+  <targetPart>

+    <id>ddr_ch1:cs1</id>

+    <instance_name>ddr_ch1:cs1</instance_name>

+    <is_root>false</is_root><parent>unit</parent><position>-1</position>

+    <type>unit-dimm_port-power9</type>

+    <attribute><id>BUS_TYPE</id><default>DDR4</default></attribute>

+    <attribute><id>CHIP_UNIT</id><default>0</default></attribute>

+    <attribute><id>DIRECTION</id><default>OUT</default></attribute>

+    <attribute><id>MBA_DIMM</id><default>1</default></attribute>

+    <attribute><id>MBA_PORT</id><default>1</default></attribute>

+  </targetPart>

+  <targetPart>

+    <id>ddr_ch2:cs0</id>

+    <instance_name>ddr_ch2:cs0</instance_name>

+    <is_root>false</is_root><parent>unit</parent><position>-1</position>

+    <type>unit-dimm_port-power9</type>

+    <attribute><id>BUS_TYPE</id><default>DDR4</default></attribute>

+    <attribute><id>CHIP_UNIT</id><default>0</default></attribute>

+    <attribute><id>DIRECTION</id><default>OUT</default></attribute>

+    <attribute><id>MBA_DIMM</id><default>1</default></attribute>

+    <attribute><id>MBA_PORT</id><default>1</default></attribute>

+  </targetPart>

+  <targetPart>

+    <id>ddr_ch2:cs1</id>

+    <instance_name>ddr_ch2:cs1</instance_name>

+    <is_root>false</is_root><parent>unit</parent><position>-1</position>

+    <type>unit-dimm_port-power9</type>

+    <attribute><id>BUS_TYPE</id><default>DDR4</default></attribute>

+    <attribute><id>CHIP_UNIT</id><default>0</default></attribute>

+    <attribute><id>DIRECTION</id><default>OUT</default></attribute>

+    <attribute><id>MBA_DIMM</id><default>1</default></attribute>

+    <attribute><id>MBA_PORT</id><default>1</default></attribute>

+  </targetPart>

+  <targetPart>

+    <id>ddr_ch3:cs0</id>

+    <instance_name>ddr_ch3:cs0</instance_name>

+    <is_root>false</is_root><parent>unit</parent><position>-1</position>

+    <type>unit-dimm_port-power9</type>

+    <attribute><id>BUS_TYPE</id><default>DDR4</default></attribute>

+    <attribute><id>CHIP_UNIT</id><default>0</default></attribute>

+    <attribute><id>DIRECTION</id><default>OUT</default></attribute>

+    <attribute><id>MBA_DIMM</id><default>1</default></attribute>

+    <attribute><id>MBA_PORT</id><default>1</default></attribute>

+  </targetPart>

+  <targetPart>

+    <id>ddr_ch3:cs1</id>

+    <instance_name>ddr_ch3:cs1</instance_name>

+    <is_root>false</is_root><parent>unit</parent><position>-1</position>

+    <type>unit-dimm_port-power9</type>

+    <attribute><id>BUS_TYPE</id><default>DDR4</default></attribute>

+    <attribute><id>CHIP_UNIT</id><default>0</default></attribute>

+    <attribute><id>DIRECTION</id><default>OUT</default></attribute>

+    <attribute><id>MBA_DIMM</id><default>1</default></attribute>

+    <attribute><id>MBA_PORT</id><default>1</default></attribute>

+  </targetPart>

+  <targetPart>

+    <id>ddr_ch4:cs0</id>

+    <instance_name>ddr_ch4:cs0</instance_name>

+    <is_root>false</is_root><parent>unit</parent><position>-1</position>

+    <type>unit-dimm_port-power9</type>

+    <attribute><id>BUS_TYPE</id><default>DDR4</default></attribute>

+    <attribute><id>CHIP_UNIT</id><default>0</default></attribute>

+    <attribute><id>DIRECTION</id><default>OUT</default></attribute>

+    <attribute><id>MBA_DIMM</id><default>1</default></attribute>

+    <attribute><id>MBA_PORT</id><default>1</default></attribute>

+  </targetPart>

+  <targetPart>

+    <id>ddr_ch4:cs1</id>

+    <instance_name>ddr_ch4:cs1</instance_name>

+    <is_root>false</is_root><parent>unit</parent><position>-1</position>

+    <type>unit-dimm_port-power9</type>

+    <attribute><id>BUS_TYPE</id><default>DDR4</default></attribute>

+    <attribute><id>CHIP_UNIT</id><default>0</default></attribute>

+    <attribute><id>DIRECTION</id><default>OUT</default></attribute>

+    <attribute><id>MBA_DIMM</id><default>1</default></attribute>

+    <attribute><id>MBA_PORT</id><default>1</default></attribute>

+  </targetPart>

+  <targetPart>

+    <id>ddr_ch5:cs0</id>

+    <instance_name>ddr_ch5:cs0</instance_name>

+    <is_root>false</is_root><parent>unit</parent><position>-1</position>

+    <type>unit-dimm_port-power9</type>

+    <attribute><id>BUS_TYPE</id><default>DDR4</default></attribute>

+    <attribute><id>CHIP_UNIT</id><default>0</default></attribute>

+    <attribute><id>DIRECTION</id><default>OUT</default></attribute>

+    <attribute><id>MBA_DIMM</id><default>1</default></attribute>

+    <attribute><id>MBA_PORT</id><default>1</default></attribute>

+  </targetPart>

+  <targetPart>

+    <id>ddr_ch5:cs1</id>

+    <instance_name>ddr_ch5:cs1</instance_name>

+    <is_root>false</is_root><parent>unit</parent><position>-1</position>

+    <type>unit-dimm_port-power9</type>

+    <attribute><id>BUS_TYPE</id><default>DDR4</default></attribute>

+    <attribute><id>CHIP_UNIT</id><default>0</default></attribute>

+    <attribute><id>DIRECTION</id><default>OUT</default></attribute>

+    <attribute><id>MBA_DIMM</id><default>1</default></attribute>

+    <attribute><id>MBA_PORT</id><default>1</default></attribute>

+  </targetPart>

+  <targetPart>

+    <id>ddr_ch6:cs0</id>

+    <instance_name>ddr_ch6:cs0</instance_name>

+    <is_root>false</is_root><parent>unit</parent><position>-1</position>

+    <type>unit-dimm_port-power9</type>

+    <attribute><id>BUS_TYPE</id><default>DDR4</default></attribute>

+    <attribute><id>CHIP_UNIT</id><default>0</default></attribute>

+    <attribute><id>DIRECTION</id><default>OUT</default></attribute>

+    <attribute><id>MBA_DIMM</id><default>1</default></attribute>

+    <attribute><id>MBA_PORT</id><default>1</default></attribute>

+  </targetPart>

+  <targetPart>

+    <id>ddr_ch6:cs1</id>

+    <instance_name>ddr_ch6:cs1</instance_name>

+    <is_root>false</is_root><parent>unit</parent><position>-1</position>

+    <type>unit-dimm_port-power9</type>

+    <attribute><id>BUS_TYPE</id><default>DDR4</default></attribute>

+    <attribute><id>CHIP_UNIT</id><default>0</default></attribute>

+    <attribute><id>DIRECTION</id><default>OUT</default></attribute>

+    <attribute><id>MBA_DIMM</id><default>1</default></attribute>

+    <attribute><id>MBA_PORT</id><default>1</default></attribute>

+  </targetPart>

+  <targetPart>

+    <id>ddr_ch7:cs0</id>

+    <instance_name>ddr_ch7:cs0</instance_name>

+    <is_root>false</is_root><parent>unit</parent><position>-1</position>

+    <type>unit-dimm_port-power9</type>

+    <attribute><id>BUS_TYPE</id><default>DDR4</default></attribute>

+    <attribute><id>CHIP_UNIT</id><default>0</default></attribute>

+    <attribute><id>DIRECTION</id><default>OUT</default></attribute>

+    <attribute><id>MBA_DIMM</id><default>1</default></attribute>

+    <attribute><id>MBA_PORT</id><default>1</default></attribute>

+  </targetPart>

+  <targetPart>

+    <id>ddr_ch7:cs1</id>

+    <instance_name>ddr_ch7:cs1</instance_name>

+    <is_root>false</is_root><parent>unit</parent><position>-1</position>

+    <type>unit-dimm_port-power9</type>

+    <attribute><id>BUS_TYPE</id><default>DDR4</default></attribute>

+    <attribute><id>CHIP_UNIT</id><default>0</default></attribute>

+    <attribute><id>DIRECTION</id><default>OUT</default></attribute>

+    <attribute><id>MBA_DIMM</id><default>1</default></attribute>

+    <attribute><id>MBA_PORT</id><default>1</default></attribute>

+  </targetPart>

+

+  <targetPart>

+    <id>PEC0_x16</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default>0xFFFF</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>16</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>0</default>

+    </attribute>

+    <instance_name>PEC0_x16</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power9</parent>

+    <position>-1</position>

+    <type>unit-pci-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>PEC0_x16:PEC1_x8x8:PEC2_x16</id>

+    <attribute>

+      <id>IO_CONFIG_NUM</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>PCI_CONFIG</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_CONFIG_NUM</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SWAP_TABLE</id>

+      <default></default>

+    </attribute>

+    <child_id>PEC0_x16</child_id>

+    <child_id>PEC1_CLK0_x8</child_id>

+    <child_id>PEC1_CLK1_x8</child_id>

+    <child_id>PEC2_x16</child_id>

+    <instance_name>PEC0_x16:PEC1_x8x8:PEC2_x16</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-pciconfig0-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>PEC0_x16:PEC1_x8x8:PEC2_x8x8</id>

+    <attribute>

+      <id>IO_CONFIG_NUM</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>PCI_CONFIG</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_CONFIG_NUM</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SWAP_TABLE</id>

+      <default></default>

+    </attribute>

+    <child_id>PEC0_x16</child_id>

+    <child_id>PEC1_CLK0_x8</child_id>

+    <child_id>PEC1_CLK1_x8</child_id>

+    <child_id>PEC2_CLK0_x8</child_id>

+    <child_id>PEC2_CLK1_x8</child_id>

+    <instance_name>PEC0_x16:PEC1_x8x8:PEC2_x8x8</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-pciconfig1-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>PEC1_CLK0_x8</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default>0xFF00</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>1</default>

+    </attribute>

+    <instance_name>PEC1_CLK0_x8</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power9</parent>

+    <position>-1</position>

+    <type>unit-pci-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>PEC1_CLK1_x8</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default>0x00FF</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>2</default>

+    </attribute>

+    <instance_name>PEC1_CLK1_x8</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power9</parent>

+    <position>-1</position>

+    <type>unit-pci-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>PEC2_CLK0_x8</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default>0xFF00</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>4</default>

+    </attribute>

+    <instance_name>PEC2_CLK0_x8</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power9</parent>

+    <position>-1</position>

+    <type>unit-pci-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>PEC2_CLK1_x8</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default>0x00FF</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>5</default>

+    </attribute>

+    <instance_name>PEC2_CLK1_x8</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power9</parent>

+    <position>-1</position>

+    <type>unit-pci-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>PEC2_x16</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default>0xFFFF</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>16</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>3</default>

+    </attribute>

+    <instance_name>PEC2_x16</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power9</parent>

+    <position>-1</position>

+    <type>unit-pci-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>capp0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>capp0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-capp-power9</parent>

+    <position>-1</position>

+    <type>unit-capp-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>capp1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>capp1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-capp-power9</parent>

+    <position>-1</position>

+    <type>unit-capp-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>core0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core10</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>10</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core10</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core11</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>11</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core11</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core12</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>12</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core12</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core13</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>13</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core13</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core14</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>14</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core14</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core15</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>15</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core15</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core16</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>16</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core16</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core17</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>17</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core17</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core18</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>18</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core18</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core19</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>19</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core19</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core20</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>20</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core20</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core21</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>21</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core21</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core22</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>22</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core22</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core23</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>23</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core23</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core3</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core4</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>4</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core4</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core5</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>5</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core5</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core6</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>6</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core6</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core7</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>7</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core7</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core8</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core8</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core9</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>9</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core9</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>cpu_func_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0x03</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Func</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default>0x07,0x08,0x0b,0x0a,0x0b</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x6F</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0x07</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>cpu_func_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>cpu_temp_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0x03</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Temp</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>cpu_temp_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>cpucore_freq_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD0</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Freq</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC1</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>cpucore_freq_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>cpucore_func_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD0</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Func</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default>0x07,0x08,0x0b,0x0a,0x0b</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x6F</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0x07</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>cpucore_func_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>cpucore_temp_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD0</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Temp</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>cpucore_temp_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>dmi0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>dmi0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-dmi-power9</parent>

+    <position>-1</position>

+    <type>unit-dmi-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>dmi1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>dmi1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-dmi-power9</parent>

+    <position>-1</position>

+    <type>unit-dmi-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>dmi2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>dmi2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-dmi-power9</parent>

+    <position>-1</position>

+    <type>unit-dmi-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>dmi3</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>dmi3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-dmi-power9</parent>

+    <position>-1</position>

+    <type>unit-dmi-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>dmi4</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>4</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>dmi4</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-dmi-power9</parent>

+    <position>-1</position>

+    <type>unit-dmi-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>dmi5</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>5</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>dmi5</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-dmi-power9</parent>

+    <position>-1</position>

+    <type>unit-dmi-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>dmi6</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>6</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>dmi6</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-dmi-power9</parent>

+    <position>-1</position>

+    <type>unit-dmi-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>dmi7</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>7</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>dmi7</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-dmi-power9</parent>

+    <position>-1</position>

+    <type>unit-dmi-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>eq0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EQ</default>

+    </attribute>

+    <child_id>ex0</child_id>

+    <child_id>ex1</child_id>

+    <instance_name>eq0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-eq-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>eq1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EQ</default>

+    </attribute>

+    <child_id>ex2</child_id>

+    <child_id>ex3</child_id>

+    <instance_name>eq1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-eq-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>eq2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EQ</default>

+    </attribute>

+    <child_id>ex4</child_id>

+    <child_id>ex5</child_id>

+    <instance_name>eq2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-eq-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>eq3</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EQ</default>

+    </attribute>

+    <child_id>ex6</child_id>

+    <child_id>ex7</child_id>

+    <instance_name>eq3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-eq-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>eq4</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>4</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EQ</default>

+    </attribute>

+    <child_id>ex8</child_id>

+    <child_id>ex9</child_id>

+    <instance_name>eq4</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-eq-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>eq5</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>5</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EQ</default>

+    </attribute>

+    <child_id>ex10</child_id>

+    <child_id>ex11</child_id>

+    <instance_name>eq5</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-eq-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>ex0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EX</default>

+    </attribute>

+    <child_id>core0</child_id>

+    <child_id>core1</child_id>

+    <instance_name>ex0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ex-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>ex1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EX</default>

+    </attribute>

+    <child_id>core2</child_id>

+    <child_id>core3</child_id>

+    <instance_name>ex1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ex-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>ex10</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>10</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EX</default>

+    </attribute>

+    <child_id>core20</child_id>

+    <child_id>core21</child_id>

+    <instance_name>ex10</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ex-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>ex11</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>11</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EX</default>

+    </attribute>

+    <child_id>core22</child_id>

+    <child_id>core23</child_id>

+    <instance_name>ex11</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ex-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>ex2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EX</default>

+    </attribute>

+    <child_id>core4</child_id>

+    <child_id>core5</child_id>

+    <instance_name>ex2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ex-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>ex3</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EX</default>

+    </attribute>

+    <child_id>core6</child_id>

+    <child_id>core7</child_id>

+    <instance_name>ex3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ex-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>ex4</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>4</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EX</default>

+    </attribute>

+    <child_id>core8</child_id>

+    <child_id>core9</child_id>

+    <instance_name>ex4</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ex-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>ex5</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>5</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EX</default>

+    </attribute>

+    <child_id>core10</child_id>

+    <child_id>core11</child_id>

+    <instance_name>ex5</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ex-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>ex6</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>6</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EX</default>

+    </attribute>

+    <child_id>core12</child_id>

+    <child_id>core13</child_id>

+    <instance_name>ex6</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ex-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>ex7</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>7</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EX</default>

+    </attribute>

+    <child_id>core14</child_id>

+    <child_id>core15</child_id>

+    <instance_name>ex7</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ex-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>ex8</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EX</default>

+    </attribute>

+    <child_id>core16</child_id>

+    <child_id>core17</child_id>

+    <instance_name>ex8</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ex-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>ex9</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>9</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EX</default>

+    </attribute>

+    <child_id>core18</child_id>

+    <child_id>core19</child_id>

+    <instance_name>ex9</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ex-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>fsi-cm-0</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>FSICM</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>CMFSI</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>FSI_ENGINE</id>

+      <default>0x0C</default>

+    </attribute>

+    <attribute>

+      <id>FSI_LINK</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>FSI_PORT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>FSICM</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>FSI</default>

+    </attribute>

+    <instance_name>fsi-cm-0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-fsi-membuf</type>

+  </targetPart>

+  <targetPart>

+    <id>fsi-cm-1</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>FSICM</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>CMFSI</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>FSI_ENGINE</id>

+      <default>0x0C</default>

+    </attribute>

+    <attribute>

+      <id>FSI_LINK</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>FSI_PORT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>FSICM</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>FSI</default>

+    </attribute>

+    <instance_name>fsi-cm-1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-fsi-membuf</type>

+  </targetPart>

+  <targetPart>

+    <id>fsi-cm-2</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>FSICM</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>CMFSI</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>FSI_ENGINE</id>

+      <default>0x0C</default>

+    </attribute>

+    <attribute>

+      <id>FSI_LINK</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>FSI_PORT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>FSICM</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>FSI</default>

+    </attribute>

+    <instance_name>fsi-cm-2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-fsi-membuf</type>

+  </targetPart>

+  <targetPart>

+    <id>fsi-cm-3</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>FSICM</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>CMFSI</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>FSI_ENGINE</id>

+      <default>0x0C</default>

+    </attribute>

+    <attribute>

+      <id>FSI_LINK</id>

+      <default>0x03</default>

+    </attribute>

+    <attribute>

+      <id>FSI_PORT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>FSICM</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>FSI</default>

+    </attribute>

+    <instance_name>fsi-cm-3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-fsi-membuf</type>

+  </targetPart>

+  <targetPart>

+    <id>fsi-slave-0</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>FSIM</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>IN</default>

+    </attribute>

+    <attribute>

+      <id>FSI_ENGINE</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>FSI_LINK</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>FSI_PORT</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <attribute>

+      <id>RESOURCE_IS_CRITICAL</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>FSI</default>

+    </attribute>

+    <instance_name>fsi-slave-0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-fsi-slave</type>

+  </targetPart>

+  <targetPart>

+    <id>fsi-slave-1</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>FSIM</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>IN</default>

+    </attribute>

+    <attribute>

+      <id>FSI_ENGINE</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>FSI_LINK</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>FSI_PORT</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>FSI</default>

+    </attribute>

+    <instance_name>fsi-slave-1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-fsi-slave</type>

+  </targetPart>

+  <targetPart>

+    <id>fsim-0</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>FSIM</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>CMFSI</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>FSI_ENGINE</id>

+      <default>0x0D</default>

+    </attribute>

+    <attribute>

+      <id>FSI_LINK</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>FSI_PORT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>FSIM</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>FSI</default>

+    </attribute>

+    <instance_name>fsim-0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-fsi-proc</type>

+  </targetPart>

+  <targetPart>

+    <id>fsim-1</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>FSIM</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>CMFSI</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>FSI_ENGINE</id>

+      <default>0x0D</default>

+    </attribute>

+    <attribute>

+      <id>FSI_LINK</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>FSI_PORT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>FSIM</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>FSI</default>

+    </attribute>

+    <instance_name>fsim-1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-fsi-proc</type>

+  </targetPart>

+  <targetPart>

+    <id>fsim-2</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>FSIM</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>CMFSI</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>FSI_ENGINE</id>

+      <default>0x0D</default>

+    </attribute>

+    <attribute>

+      <id>FSI_LINK</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>FSI_PORT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>FSIM</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>FSI</default>

+    </attribute>

+    <instance_name>fsim-2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-fsi-proc</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-dpss</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-dpss</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-hotplug</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-hotplug</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-lightpath</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-lightpath</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-op0a</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-op0a</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-op0b</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-op0b</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-proc-promb0</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-proc-promb0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-proc-promb1</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-proc-promb1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-proc-promc0</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-proc-promc0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-proc-promc1</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-proc-promc1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-proc-promc2</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-proc-promc2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-proc-promc3</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-proc-promc3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-prom0-mvpd-primary</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-prom0-mvpd-primary</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-prom1-sbe-primary</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-prom1-sbe-primary</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-prom2-mvpd-backup</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-prom2-mvpd-backup</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-prom3-sbe-backup</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-prom3-sbe-backup</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-tpm</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-tpm</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-slave</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>IN</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ADDRESS</id>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-slave</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-slave</type>

+  </targetPart>

+  <targetPart>

+    <id>lpc-master</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>LPC</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>lpc-master</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-lpc-master</type>

+  </targetPart>

+  <targetPart>

+    <id>mi0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <child_id>dmi0</child_id>

+    <child_id>dmi1</child_id>

+    <instance_name>mi0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-mi-power9</parent>

+    <position>-1</position>

+    <type>unit-mi-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>mi1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <child_id>dmi2</child_id>

+    <child_id>dmi3</child_id>

+    <instance_name>mi1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-mi-power9</parent>

+    <position>-1</position>

+    <type>unit-mi-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>mi2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <child_id>dmi4</child_id>

+    <child_id>dmi5</child_id>

+    <instance_name>mi2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-mi-power9</parent>

+    <position>-1</position>

+    <type>unit-mi-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>mi3</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <child_id>dmi6</child_id>

+    <child_id>dmi7</child_id>

+    <instance_name>mi3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-mi-power9</parent>

+    <position>-1</position>

+    <type>unit-mi-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>module-module-lagrange</id>

+    <attribute>

+      <id>POSITION</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <child_id>p9_proc_l</child_id>

+    <instance_name>module</instance_name>

+    <is_root>true</is_root>

+    <parent>card</parent>

+    <parent_type>socket-proc_socket-68mm</parent_type>

+    <position>0</position>

+    <type>module-module-lagrange</type>

+  </targetPart>

+  <targetPart>

+    <id>nvbus0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>nvbus0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-nvbus-power9</parent>

+    <position>-1</position>

+    <type>unit-nvbus-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>nvbus1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>nvbus1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-nvbus-power9</parent>

+    <position>-1</position>

+    <type>unit-nvbus-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>nvbus2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>nvbus2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-nvbus-power9</parent>

+    <position>-1</position>

+    <type>unit-nvbus-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>nvbus3</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>nvbus3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-nvbus-power9</parent>

+    <position>-1</position>

+    <type>unit-nvbus-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>nvbus4</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>4</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>nvbus4</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-nvbus-power9</parent>

+    <position>-1</position>

+    <type>unit-nvbus-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>nvbus5</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>5</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>nvbus5</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-nvbus-power9</parent>

+    <position>-1</position>

+    <type>unit-nvbus-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>obus0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>obus0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-obus-power9</parent>

+    <position>-1</position>

+    <type>unit-obus-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>obus1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>obus1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-obus-power9</parent>

+    <position>-1</position>

+    <type>unit-obus-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>obus2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>obus2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-obus-power9</parent>

+    <position>-1</position>

+    <type>unit-obus-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>obus3</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>obus3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-obus-power9</parent>

+    <position>-1</position>

+    <type>unit-obus-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>occ</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>occ</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-occ-power9</parent>

+    <position>-1</position>

+    <type>unit-occ-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>p9_pci-0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>16</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>0</default>

+    </attribute>

+    <instance_name>p9_pci-0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power9</parent>

+    <position>-1</position>

+    <type>unit-pci-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>p9_pci-1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>16</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>0</default>

+    </attribute>

+    <instance_name>p9_pci-1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power9</parent>

+    <position>-1</position>

+    <type>unit-pci-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>p9_pci-2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>16</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>0</default>

+    </attribute>

+    <instance_name>p9_pci-2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power9</parent>

+    <position>-1</position>

+    <type>unit-pci-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>p9_pci-3</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>16</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>0</default>

+    </attribute>

+    <instance_name>p9_pci-3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power9</parent>

+    <position>-1</position>

+    <type>unit-pci-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>p9_proc_l</id>

+    <child_id>eq0</child_id>

+    <child_id>eq1</child_id>

+    <child_id>eq2</child_id>

+    <child_id>eq3</child_id>

+    <child_id>eq4</child_id>

+    <child_id>eq5</child_id>

+    <child_id>occ</child_id>

+    <child_id>capp0</child_id>

+    <child_id>capp1</child_id>

+    <child_id>sbe</child_id>

+    <child_id>mi0</child_id>

+    <child_id>mi1</child_id>

+    <child_id>mi2</child_id>

+    <child_id>mi3</child_id>

+    <child_id>pec0</child_id>

+    <child_id>pec1</child_id>

+    <child_id>pec2</child_id>

+    <child_id>obus0</child_id>

+    <child_id>obus1</child_id>

+    <child_id>obus2</child_id>

+    <child_id>obus3</child_id>

+    <child_id>nvbus0</child_id>

+    <child_id>nvbus1</child_id>

+    <child_id>ddr_ch0:cs0</child_id>

+    <child_id>ddr_ch0:cs1</child_id>

+    <child_id>ddr_ch1:cs0</child_id>

+    <child_id>ddr_ch1:cs1</child_id>

+    <child_id>ddr_ch2:cs0</child_id>

+    <child_id>ddr_ch2:cs1</child_id>

+    <child_id>ddr_ch3:cs0</child_id>

+    <child_id>ddr_ch3:cs1</child_id>

+    <child_id>ddr_ch4:cs0</child_id>

+    <child_id>ddr_ch4:cs1</child_id>

+    <child_id>ddr_ch5:cs0</child_id>

+    <child_id>ddr_ch5:cs1</child_id>

+    <child_id>ddr_ch6:cs0</child_id>

+    <child_id>ddr_ch6:cs1</child_id>

+    <child_id>ddr_ch7:cs0</child_id>

+    <child_id>ddr_ch7:cs1</child_id>

+    <child_id>ppe0</child_id>

+    <child_id>ppe10</child_id>

+    <child_id>ppe11</child_id>

+    <child_id>ppe12</child_id>

+    <child_id>ppe13</child_id>

+    <child_id>ppe20</child_id>

+    <child_id>ppe21</child_id>

+    <child_id>ppe22</child_id>

+    <child_id>ppe23</child_id>

+    <child_id>ppe24</child_id>

+    <child_id>ppe25</child_id>

+    <child_id>ppe30</child_id>

+    <child_id>ppe31</child_id>

+    <child_id>ppe32</child_id>

+    <child_id>ppe33</child_id>

+    <child_id>ppe34</child_id>

+    <child_id>ppe35</child_id>

+    <child_id>ppe40</child_id>

+    <child_id>ppe41</child_id>

+    <child_id>ppe42</child_id>

+    <child_id>ppe43</child_id>

+    <child_id>ppe45</child_id>

+    <child_id>ppe50</child_id>

+    <child_id>perv1</child_id>

+    <child_id>perv2</child_id>

+    <child_id>perv3</child_id>

+    <child_id>perv4</child_id>

+    <child_id>perv5</child_id>

+    <child_id>perv6</child_id>

+    <child_id>perv7</child_id>

+    <child_id>perv8</child_id>

+    <child_id>perv9</child_id>

+    <child_id>perv12</child_id>

+    <child_id>perv13</child_id>

+    <child_id>perv14</child_id>

+    <child_id>perv15</child_id>

+    <child_id>perv16</child_id>

+    <child_id>perv17</child_id>

+    <child_id>perv18</child_id>

+    <child_id>perv19</child_id>

+    <child_id>perv20</child_id>

+    <child_id>perv21</child_id>

+    <child_id>perv32</child_id>

+    <child_id>perv33</child_id>

+    <child_id>perv34</child_id>

+    <child_id>perv35</child_id>

+    <child_id>perv36</child_id>

+    <child_id>perv37</child_id>

+    <child_id>perv38</child_id>

+    <child_id>perv39</child_id>

+    <child_id>perv40</child_id>

+    <child_id>perv41</child_id>

+    <child_id>perv42</child_id>

+    <child_id>perv43</child_id>

+    <child_id>perv44</child_id>

+    <child_id>perv45</child_id>

+    <child_id>perv46</child_id>

+    <child_id>perv47</child_id>

+    <child_id>perv48</child_id>

+    <child_id>perv49</child_id>

+    <child_id>perv50</child_id>

+    <child_id>perv51</child_id>

+    <child_id>perv52</child_id>

+    <child_id>perv53</child_id>

+    <child_id>perv54</child_id>

+    <child_id>perv55</child_id>

+    <child_id>xbus0</child_id>

+    <child_id>xbus1</child_id>

+    <child_id>pci_configs_power9</child_id>

+    <child_id>fsi-slave-0</child_id>

+    <child_id>fsi-slave-1</child_id>

+    <child_id>fsi-cm-0</child_id>

+    <child_id>fsi-cm-1</child_id>

+    <child_id>fsi-cm-2</child_id>

+    <child_id>fsi-cm-3</child_id>

+    <child_id>fsim-0</child_id>

+    <child_id>fsim-1</child_id>

+    <child_id>fsim-2</child_id>

+    <child_id>i2c-slave</child_id>

+    <child_id>i2c-master-prom0-mvpd-primary</child_id>

+    <child_id>i2c-master-prom1-sbe-primary</child_id>

+    <child_id>i2c-master-prom2-mvpd-backup</child_id>

+    <child_id>i2c-master-prom3-sbe-backup</child_id>

+    <child_id>i2c-master-proc-promb0</child_id>

+    <child_id>i2c-master-proc-promb1</child_id>

+    <child_id>i2c-master-proc-promc0</child_id>

+    <child_id>i2c-master-proc-promc1</child_id>

+    <child_id>i2c-master-proc-promc2</child_id>

+    <child_id>i2c-master-proc-promc3</child_id>

+    <child_id>i2c-master-lightpath</child_id>

+    <child_id>i2c-master-hotplug</child_id>

+    <child_id>i2c-master-tpm</child_id>

+    <child_id>i2c-master-dpss</child_id>

+    <child_id>i2c-master-op0a</child_id>

+    <child_id>i2c-master-op0b</child_id>

+    <child_id>lpc-master</child_id>

+    <child_id>psi-slave</child_id>

+    <child_id>spi-master</child_id>

+    <child_id>proc_fru_assoc</child_id>

+    <hidden_child_id>nvbus2</hidden_child_id>

+    <hidden_child_id>nvbus3</hidden_child_id>

+    <hidden_child_id>nvbus4</hidden_child_id>

+    <hidden_child_id>nvbus5</hidden_child_id>

+    <hidden_child_id>xbus2</hidden_child_id>

+    <hidden_child_id>p9_pci-0</hidden_child_id>

+    <hidden_child_id>p9_pci-1</hidden_child_id>

+    <hidden_child_id>p9_pci-2</hidden_child_id>

+    <hidden_child_id>p9_pci-3</hidden_child_id>

+    <hidden_child_id>cpu_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpu_func_sensor</hidden_child_id>

+    <instance_name>p9_proc_l</instance_name>

+    <is_root>false</is_root>

+    <parent>chip-processor-nimbus</parent>

+    <position>-1</position>

+    <type>chip-processor-lagrange</type>

+  </targetPart>

+  <targetPart>

+    <id>pci_configs_power9</id>

+    <attribute>

+      <id>IO_CONFIG_SELECT</id>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>PCI_CONFIGS</default>

+    </attribute>

+    <child_id>PEC0_x16:PEC1_x8x8:PEC2_x16</child_id>

+    <child_id>PEC0_x16:PEC1_x8x8:PEC2_x8x8</child_id>

+    <instance_name>pci_configs_power9</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-pciconfigs-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>pec0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>PROC_PCIE_REFCLOCK_ENABLE</id>

+      <default>0xE0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>PEC</default>

+    </attribute>

+    <child_id>phb0</child_id>

+    <instance_name>pec0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-pec-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>pec1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>PROC_PCIE_REFCLOCK_ENABLE</id>

+      <default>0xE0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>PEC</default>

+    </attribute>

+    <child_id>phb1</child_id>

+    <child_id>phb2</child_id>

+    <instance_name>pec1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-pec-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>pec2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>PROC_PCIE_REFCLOCK_ENABLE</id>

+      <default>0xE0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>PEC</default>

+    </attribute>

+    <child_id>phb3</child_id>

+    <child_id>phb4</child_id>

+    <child_id>phb5</child_id>

+    <instance_name>pec2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-pec-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>perv1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv12</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>12</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv12</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv13</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>13</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv13</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv14</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>14</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv14</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv15</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>15</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv15</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv16</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>16</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv16</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv17</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>17</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv17</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv18</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>18</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv18</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv19</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>19</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv19</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv20</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>20</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv20</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv21</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>21</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv21</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv3</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv32</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>32</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv32</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv33</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>33</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv33</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv34</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>34</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv34</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv35</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>35</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv35</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv36</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>36</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv36</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv37</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>37</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv37</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv38</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>38</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv38</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv39</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>39</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv39</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv4</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>4</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv4</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv40</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>40</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv40</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv41</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>41</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv41</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv42</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>42</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv42</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv43</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>43</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv43</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv44</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>44</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv44</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv45</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>45</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv45</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv46</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>46</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv46</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv47</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>47</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv47</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv48</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>48</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv48</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv49</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>49</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv49</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv5</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>5</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv5</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv50</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>50</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv50</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv51</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>51</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv51</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv52</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>52</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv52</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv53</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>53</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv53</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv54</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>54</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv54</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv55</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>55</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv55</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv6</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>6</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv6</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv7</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>7</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv7</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv8</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv8</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv9</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>9</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv9</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>phb0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>phb0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-phb-power9</parent>

+    <position>-1</position>

+    <type>unit-phb-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>phb1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>phb1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-phb-power9</parent>

+    <position>-1</position>

+    <type>unit-phb-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>phb2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>phb2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-phb-power9</parent>

+    <position>-1</position>

+    <type>unit-phb-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>phb3</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>phb3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-phb-power9</parent>

+    <position>-1</position>

+    <type>unit-phb-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>phb4</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>4</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>phb4</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-phb-power9</parent>

+    <position>-1</position>

+    <type>unit-phb-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>phb5</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>5</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>phb5</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-phb-power9</parent>

+    <position>-1</position>

+    <type>unit-phb-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe10</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>10</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe10</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe11</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>11</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe11</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe12</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>12</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe12</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe13</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>13</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe13</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe20</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>20</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe20</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe21</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>21</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe21</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe22</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>22</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe22</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe23</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>23</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe23</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe24</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>24</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe24</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe25</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>25</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe25</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe30</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>30</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe30</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe31</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>31</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe31</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe32</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>32</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe32</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe33</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>33</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe33</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe34</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>34</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe34</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe35</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>35</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe35</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe40</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>40</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe40</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe41</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>41</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe41</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe42</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>42</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe42</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe43</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>43</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe43</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe45</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>45</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe45</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe50</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>50</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe50</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>proc_fru_assoc</id>

+    <attribute>

+      <id>ASSOCIATION_TYPE</id>

+      <default>FRU</default>

+    </attribute>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>LOGICAL_ASSOCIATION</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>IN</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>proc_fru_assoc</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-logic_assoc-generic</type>

+  </targetPart>

+  <targetPart>

+    <id>psi-slave</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>PSI</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>IN</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>psi-slave</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-psi-slave</type>

+  </targetPart>

+  <targetPart>

+    <id>sbe</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>sbe</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-sbe-power9</parent>

+    <position>-1</position>

+    <type>unit-sbe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>spi-master</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>SPI</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>SPI_ENGINE</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>SPI_PORT</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>spi-master</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-spi-master</type>

+  </targetPart>

+  <targetPart>

+    <id>xbus0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>xbus0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-xbus-power9</parent>

+    <position>-1</position>

+    <type>unit-xbus-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>xbus1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>xbus1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-xbus-power9</parent>

+    <position>-1</position>

+    <type>unit-xbus-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>xbus2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>xbus2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-xbus-power9</parent>

+    <position>-1</position>

+    <type>unit-xbus-cumulus</type>

+  </targetPart>

+</partInstance>

diff --git a/xml/parts/module-module-monza.xml b/xml/parts/module-module-monza.xml
new file mode 100644
index 0000000..d087c3f
--- /dev/null
+++ b/xml/parts/module-module-monza.xml
@@ -0,0 +1,4792 @@
+<partInstance>

+  <targetPart>

+    <id>ddr_ch0:cs0</id>

+    <instance_name>ddr_ch0:cs0</instance_name>

+    <is_root>false</is_root><parent>unit</parent><position>-1</position>

+    <type>unit-dimm_port-power9</type>

+    <attribute><id>BUS_TYPE</id><default>DDR4</default></attribute>

+    <attribute><id>CHIP_UNIT</id><default>0</default></attribute>

+    <attribute><id>DIRECTION</id><default>OUT</default></attribute>

+    <attribute><id>MBA_DIMM</id><default>1</default></attribute>

+    <attribute><id>MBA_PORT</id><default>1</default></attribute>

+  </targetPart>

+  <targetPart>

+    <id>ddr_ch0:cs1</id>

+    <instance_name>ddr_ch0:cs1</instance_name>

+    <is_root>false</is_root><parent>unit</parent><position>-1</position>

+    <type>unit-dimm_port-power9</type>

+    <attribute><id>BUS_TYPE</id><default>DDR4</default></attribute>

+    <attribute><id>CHIP_UNIT</id><default>0</default></attribute>

+    <attribute><id>DIRECTION</id><default>OUT</default></attribute>

+    <attribute><id>MBA_DIMM</id><default>1</default></attribute>

+    <attribute><id>MBA_PORT</id><default>1</default></attribute>

+  </targetPart>

+  <targetPart>

+    <id>ddr_ch1:cs0</id>

+    <instance_name>ddr_ch1:cs0</instance_name>

+    <is_root>false</is_root><parent>unit</parent><position>-1</position>

+    <type>unit-dimm_port-power9</type>

+    <attribute><id>BUS_TYPE</id><default>DDR4</default></attribute>

+    <attribute><id>CHIP_UNIT</id><default>0</default></attribute>

+    <attribute><id>DIRECTION</id><default>OUT</default></attribute>

+    <attribute><id>MBA_DIMM</id><default>1</default></attribute>

+    <attribute><id>MBA_PORT</id><default>1</default></attribute>

+  </targetPart>

+  <targetPart>

+    <id>ddr_ch1:cs1</id>

+    <instance_name>ddr_ch1:cs1</instance_name>

+    <is_root>false</is_root><parent>unit</parent><position>-1</position>

+    <type>unit-dimm_port-power9</type>

+    <attribute><id>BUS_TYPE</id><default>DDR4</default></attribute>

+    <attribute><id>CHIP_UNIT</id><default>0</default></attribute>

+    <attribute><id>DIRECTION</id><default>OUT</default></attribute>

+    <attribute><id>MBA_DIMM</id><default>1</default></attribute>

+    <attribute><id>MBA_PORT</id><default>1</default></attribute>

+  </targetPart>

+  <targetPart>

+    <id>ddr_ch2:cs0</id>

+    <instance_name>ddr_ch2:cs0</instance_name>

+    <is_root>false</is_root><parent>unit</parent><position>-1</position>

+    <type>unit-dimm_port-power9</type>

+    <attribute><id>BUS_TYPE</id><default>DDR4</default></attribute>

+    <attribute><id>CHIP_UNIT</id><default>0</default></attribute>

+    <attribute><id>DIRECTION</id><default>OUT</default></attribute>

+    <attribute><id>MBA_DIMM</id><default>1</default></attribute>

+    <attribute><id>MBA_PORT</id><default>1</default></attribute>

+  </targetPart>

+  <targetPart>

+    <id>ddr_ch2:cs1</id>

+    <instance_name>ddr_ch2:cs1</instance_name>

+    <is_root>false</is_root><parent>unit</parent><position>-1</position>

+    <type>unit-dimm_port-power9</type>

+    <attribute><id>BUS_TYPE</id><default>DDR4</default></attribute>

+    <attribute><id>CHIP_UNIT</id><default>0</default></attribute>

+    <attribute><id>DIRECTION</id><default>OUT</default></attribute>

+    <attribute><id>MBA_DIMM</id><default>1</default></attribute>

+    <attribute><id>MBA_PORT</id><default>1</default></attribute>

+  </targetPart>

+  <targetPart>

+    <id>ddr_ch3:cs0</id>

+    <instance_name>ddr_ch3:cs0</instance_name>

+    <is_root>false</is_root><parent>unit</parent><position>-1</position>

+    <type>unit-dimm_port-power9</type>

+    <attribute><id>BUS_TYPE</id><default>DDR4</default></attribute>

+    <attribute><id>CHIP_UNIT</id><default>0</default></attribute>

+    <attribute><id>DIRECTION</id><default>OUT</default></attribute>

+    <attribute><id>MBA_DIMM</id><default>1</default></attribute>

+    <attribute><id>MBA_PORT</id><default>1</default></attribute>

+  </targetPart>

+  <targetPart>

+    <id>ddr_ch3:cs1</id>

+    <instance_name>ddr_ch3:cs1</instance_name>

+    <is_root>false</is_root><parent>unit</parent><position>-1</position>

+    <type>unit-dimm_port-power9</type>

+    <attribute><id>BUS_TYPE</id><default>DDR4</default></attribute>

+    <attribute><id>CHIP_UNIT</id><default>0</default></attribute>

+    <attribute><id>DIRECTION</id><default>OUT</default></attribute>

+    <attribute><id>MBA_DIMM</id><default>1</default></attribute>

+    <attribute><id>MBA_PORT</id><default>1</default></attribute>

+  </targetPart>

+  <targetPart>

+    <id>ddr_ch4:cs0</id>

+    <instance_name>ddr_ch4:cs0</instance_name>

+    <is_root>false</is_root><parent>unit</parent><position>-1</position>

+    <type>unit-dimm_port-power9</type>

+    <attribute><id>BUS_TYPE</id><default>DDR4</default></attribute>

+    <attribute><id>CHIP_UNIT</id><default>0</default></attribute>

+    <attribute><id>DIRECTION</id><default>OUT</default></attribute>

+    <attribute><id>MBA_DIMM</id><default>1</default></attribute>

+    <attribute><id>MBA_PORT</id><default>1</default></attribute>

+  </targetPart>

+  <targetPart>

+    <id>ddr_ch4:cs1</id>

+    <instance_name>ddr_ch4:cs1</instance_name>

+    <is_root>false</is_root><parent>unit</parent><position>-1</position>

+    <type>unit-dimm_port-power9</type>

+    <attribute><id>BUS_TYPE</id><default>DDR4</default></attribute>

+    <attribute><id>CHIP_UNIT</id><default>0</default></attribute>

+    <attribute><id>DIRECTION</id><default>OUT</default></attribute>

+    <attribute><id>MBA_DIMM</id><default>1</default></attribute>

+    <attribute><id>MBA_PORT</id><default>1</default></attribute>

+  </targetPart>

+  <targetPart>

+    <id>ddr_ch5:cs0</id>

+    <instance_name>ddr_ch5:cs0</instance_name>

+    <is_root>false</is_root><parent>unit</parent><position>-1</position>

+    <type>unit-dimm_port-power9</type>

+    <attribute><id>BUS_TYPE</id><default>DDR4</default></attribute>

+    <attribute><id>CHIP_UNIT</id><default>0</default></attribute>

+    <attribute><id>DIRECTION</id><default>OUT</default></attribute>

+    <attribute><id>MBA_DIMM</id><default>1</default></attribute>

+    <attribute><id>MBA_PORT</id><default>1</default></attribute>

+  </targetPart>

+  <targetPart>

+    <id>ddr_ch5:cs1</id>

+    <instance_name>ddr_ch5:cs1</instance_name>

+    <is_root>false</is_root><parent>unit</parent><position>-1</position>

+    <type>unit-dimm_port-power9</type>

+    <attribute><id>BUS_TYPE</id><default>DDR4</default></attribute>

+    <attribute><id>CHIP_UNIT</id><default>0</default></attribute>

+    <attribute><id>DIRECTION</id><default>OUT</default></attribute>

+    <attribute><id>MBA_DIMM</id><default>1</default></attribute>

+    <attribute><id>MBA_PORT</id><default>1</default></attribute>

+  </targetPart>

+  <targetPart>

+    <id>ddr_ch6:cs0</id>

+    <instance_name>ddr_ch6:cs0</instance_name>

+    <is_root>false</is_root><parent>unit</parent><position>-1</position>

+    <type>unit-dimm_port-power9</type>

+    <attribute><id>BUS_TYPE</id><default>DDR4</default></attribute>

+    <attribute><id>CHIP_UNIT</id><default>0</default></attribute>

+    <attribute><id>DIRECTION</id><default>OUT</default></attribute>

+    <attribute><id>MBA_DIMM</id><default>1</default></attribute>

+    <attribute><id>MBA_PORT</id><default>1</default></attribute>

+  </targetPart>

+  <targetPart>

+    <id>ddr_ch6:cs1</id>

+    <instance_name>ddr_ch6:cs1</instance_name>

+    <is_root>false</is_root><parent>unit</parent><position>-1</position>

+    <type>unit-dimm_port-power9</type>

+    <attribute><id>BUS_TYPE</id><default>DDR4</default></attribute>

+    <attribute><id>CHIP_UNIT</id><default>0</default></attribute>

+    <attribute><id>DIRECTION</id><default>OUT</default></attribute>

+    <attribute><id>MBA_DIMM</id><default>1</default></attribute>

+    <attribute><id>MBA_PORT</id><default>1</default></attribute>

+  </targetPart>

+  <targetPart>

+    <id>ddr_ch7:cs0</id>

+    <instance_name>ddr_ch7:cs0</instance_name>

+    <is_root>false</is_root><parent>unit</parent><position>-1</position>

+    <type>unit-dimm_port-power9</type>

+    <attribute><id>BUS_TYPE</id><default>DDR4</default></attribute>

+    <attribute><id>CHIP_UNIT</id><default>0</default></attribute>

+    <attribute><id>DIRECTION</id><default>OUT</default></attribute>

+    <attribute><id>MBA_DIMM</id><default>1</default></attribute>

+    <attribute><id>MBA_PORT</id><default>1</default></attribute>

+  </targetPart>

+  <targetPart>

+    <id>ddr_ch7:cs1</id>

+    <instance_name>ddr_ch7:cs1</instance_name>

+    <is_root>false</is_root><parent>unit</parent><position>-1</position>

+    <type>unit-dimm_port-power9</type>

+    <attribute><id>BUS_TYPE</id><default>DDR4</default></attribute>

+    <attribute><id>CHIP_UNIT</id><default>0</default></attribute>

+    <attribute><id>DIRECTION</id><default>OUT</default></attribute>

+    <attribute><id>MBA_DIMM</id><default>1</default></attribute>

+    <attribute><id>MBA_PORT</id><default>1</default></attribute>

+  </targetPart>

+  <targetPart>

+    <id>PEC0_x16</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default>0xFFFF</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>16</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>0</default>

+    </attribute>

+    <instance_name>PEC0_x16</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power9</parent>

+    <position>-1</position>

+    <type>unit-pci-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>PEC0_x16:PEC1_x8x8:PEC2_x16</id>

+    <attribute>

+      <id>IO_CONFIG_NUM</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>PCI_CONFIG</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_CONFIG_NUM</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SWAP_TABLE</id>

+      <default></default>

+    </attribute>

+    <child_id>PEC0_x16</child_id>

+    <child_id>PEC1_CLK0_x8</child_id>

+    <child_id>PEC1_CLK1_x8</child_id>

+    <child_id>PEC2_x16</child_id>

+    <instance_name>PEC0_x16:PEC1_x8x8:PEC2_x16</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-pciconfig0-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>PEC0_x16:PEC1_x8x8:PEC2_x8x8</id>

+    <attribute>

+      <id>IO_CONFIG_NUM</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>PCI_CONFIG</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_CONFIG_NUM</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SWAP_TABLE</id>

+      <default></default>

+    </attribute>

+    <child_id>PEC0_x16</child_id>

+    <child_id>PEC1_CLK0_x8</child_id>

+    <child_id>PEC1_CLK1_x8</child_id>

+    <child_id>PEC2_CLK0_x8</child_id>

+    <child_id>PEC2_CLK1_x8</child_id>

+    <instance_name>PEC0_x16:PEC1_x8x8:PEC2_x8x8</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-pciconfig1-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>PEC1_CLK0_x8</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default>0xFF00</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>1</default>

+    </attribute>

+    <instance_name>PEC1_CLK0_x8</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power9</parent>

+    <position>-1</position>

+    <type>unit-pci-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>PEC1_CLK1_x8</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default>0x00FF</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>2</default>

+    </attribute>

+    <instance_name>PEC1_CLK1_x8</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power9</parent>

+    <position>-1</position>

+    <type>unit-pci-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>PEC2_CLK0_x8</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default>0xFF00</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>4</default>

+    </attribute>

+    <instance_name>PEC2_CLK0_x8</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power9</parent>

+    <position>-1</position>

+    <type>unit-pci-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>PEC2_CLK1_x8</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default>0x00FF</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>5</default>

+    </attribute>

+    <instance_name>PEC2_CLK1_x8</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power9</parent>

+    <position>-1</position>

+    <type>unit-pci-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>PEC2_x16</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default>0xFFFF</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>16</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>3</default>

+    </attribute>

+    <instance_name>PEC2_x16</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power9</parent>

+    <position>-1</position>

+    <type>unit-pci-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>capp0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>capp0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-capp-power9</parent>

+    <position>-1</position>

+    <type>unit-capp-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>capp1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>capp1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-capp-power9</parent>

+    <position>-1</position>

+    <type>unit-capp-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>core0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core10</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>10</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core10</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core11</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>11</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core11</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core12</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>12</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core12</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core13</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>13</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core13</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core14</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>14</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core14</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core15</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>15</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core15</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core16</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>16</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core16</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core17</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>17</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core17</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core18</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>18</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core18</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core19</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>19</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core19</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core20</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>20</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core20</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core21</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>21</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core21</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core22</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>22</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core22</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core23</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>23</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core23</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core3</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core4</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>4</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core4</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core5</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>5</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core5</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core6</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>6</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core6</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core7</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>7</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core7</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core8</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core8</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core9</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>9</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core9</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>cpu_func_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0x03</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Func</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default>0x07,0x08,0x0b,0x0a,0x0b</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x6F</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0x07</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>cpu_func_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>cpu_temp_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0x03</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Temp</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>cpu_temp_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>cpucore_freq_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD0</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Freq</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC1</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>cpucore_freq_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>cpucore_func_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD0</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Func</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default>0x07,0x08,0x0b,0x0a,0x0b</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x6F</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0x07</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>cpucore_func_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>cpucore_temp_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD0</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Temp</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>cpucore_temp_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>dmi0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>dmi0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-dmi-power9</parent>

+    <position>-1</position>

+    <type>unit-dmi-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>dmi1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>dmi1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-dmi-power9</parent>

+    <position>-1</position>

+    <type>unit-dmi-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>dmi2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>dmi2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-dmi-power9</parent>

+    <position>-1</position>

+    <type>unit-dmi-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>dmi3</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>dmi3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-dmi-power9</parent>

+    <position>-1</position>

+    <type>unit-dmi-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>dmi4</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>4</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>dmi4</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-dmi-power9</parent>

+    <position>-1</position>

+    <type>unit-dmi-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>dmi5</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>5</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>dmi5</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-dmi-power9</parent>

+    <position>-1</position>

+    <type>unit-dmi-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>dmi6</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>6</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>dmi6</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-dmi-power9</parent>

+    <position>-1</position>

+    <type>unit-dmi-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>dmi7</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>7</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>dmi7</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-dmi-power9</parent>

+    <position>-1</position>

+    <type>unit-dmi-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>eq0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EQ</default>

+    </attribute>

+    <child_id>ex0</child_id>

+    <child_id>ex1</child_id>

+    <instance_name>eq0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-eq-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>eq1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EQ</default>

+    </attribute>

+    <child_id>ex2</child_id>

+    <child_id>ex3</child_id>

+    <instance_name>eq1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-eq-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>eq2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EQ</default>

+    </attribute>

+    <child_id>ex4</child_id>

+    <child_id>ex5</child_id>

+    <instance_name>eq2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-eq-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>eq3</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EQ</default>

+    </attribute>

+    <child_id>ex6</child_id>

+    <child_id>ex7</child_id>

+    <instance_name>eq3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-eq-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>eq4</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>4</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EQ</default>

+    </attribute>

+    <child_id>ex8</child_id>

+    <child_id>ex9</child_id>

+    <instance_name>eq4</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-eq-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>eq5</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>5</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EQ</default>

+    </attribute>

+    <child_id>ex10</child_id>

+    <child_id>ex11</child_id>

+    <instance_name>eq5</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-eq-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>ex0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EX</default>

+    </attribute>

+    <child_id>core0</child_id>

+    <child_id>core1</child_id>

+    <instance_name>ex0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ex-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>ex1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EX</default>

+    </attribute>

+    <child_id>core2</child_id>

+    <child_id>core3</child_id>

+    <instance_name>ex1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ex-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>ex10</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>10</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EX</default>

+    </attribute>

+    <child_id>core20</child_id>

+    <child_id>core21</child_id>

+    <instance_name>ex10</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ex-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>ex11</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>11</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EX</default>

+    </attribute>

+    <child_id>core22</child_id>

+    <child_id>core23</child_id>

+    <instance_name>ex11</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ex-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>ex2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EX</default>

+    </attribute>

+    <child_id>core4</child_id>

+    <child_id>core5</child_id>

+    <instance_name>ex2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ex-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>ex3</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EX</default>

+    </attribute>

+    <child_id>core6</child_id>

+    <child_id>core7</child_id>

+    <instance_name>ex3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ex-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>ex4</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>4</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EX</default>

+    </attribute>

+    <child_id>core8</child_id>

+    <child_id>core9</child_id>

+    <instance_name>ex4</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ex-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>ex5</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>5</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EX</default>

+    </attribute>

+    <child_id>core10</child_id>

+    <child_id>core11</child_id>

+    <instance_name>ex5</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ex-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>ex6</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>6</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EX</default>

+    </attribute>

+    <child_id>core12</child_id>

+    <child_id>core13</child_id>

+    <instance_name>ex6</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ex-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>ex7</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>7</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EX</default>

+    </attribute>

+    <child_id>core14</child_id>

+    <child_id>core15</child_id>

+    <instance_name>ex7</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ex-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>ex8</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EX</default>

+    </attribute>

+    <child_id>core16</child_id>

+    <child_id>core17</child_id>

+    <instance_name>ex8</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ex-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>ex9</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>9</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EX</default>

+    </attribute>

+    <child_id>core18</child_id>

+    <child_id>core19</child_id>

+    <instance_name>ex9</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ex-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>fsi-cm-0</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>FSICM</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>CMFSI</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>FSI_ENGINE</id>

+      <default>0x0C</default>

+    </attribute>

+    <attribute>

+      <id>FSI_LINK</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>FSI_PORT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>FSICM</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>FSI</default>

+    </attribute>

+    <instance_name>fsi-cm-0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-fsi-membuf</type>

+  </targetPart>

+  <targetPart>

+    <id>fsi-cm-1</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>FSICM</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>CMFSI</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>FSI_ENGINE</id>

+      <default>0x0C</default>

+    </attribute>

+    <attribute>

+      <id>FSI_LINK</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>FSI_PORT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>FSICM</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>FSI</default>

+    </attribute>

+    <instance_name>fsi-cm-1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-fsi-membuf</type>

+  </targetPart>

+  <targetPart>

+    <id>fsi-cm-2</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>FSICM</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>CMFSI</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>FSI_ENGINE</id>

+      <default>0x0C</default>

+    </attribute>

+    <attribute>

+      <id>FSI_LINK</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>FSI_PORT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>FSICM</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>FSI</default>

+    </attribute>

+    <instance_name>fsi-cm-2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-fsi-membuf</type>

+  </targetPart>

+  <targetPart>

+    <id>fsi-cm-3</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>FSICM</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>CMFSI</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>FSI_ENGINE</id>

+      <default>0x0C</default>

+    </attribute>

+    <attribute>

+      <id>FSI_LINK</id>

+      <default>0x03</default>

+    </attribute>

+    <attribute>

+      <id>FSI_PORT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>FSICM</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>FSI</default>

+    </attribute>

+    <instance_name>fsi-cm-3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-fsi-membuf</type>

+  </targetPart>

+  <targetPart>

+    <id>fsi-slave-0</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>FSIM</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>IN</default>

+    </attribute>

+    <attribute>

+      <id>FSI_ENGINE</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>FSI_LINK</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>FSI_PORT</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <attribute>

+      <id>RESOURCE_IS_CRITICAL</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>FSI</default>

+    </attribute>

+    <instance_name>fsi-slave-0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-fsi-slave</type>

+  </targetPart>

+  <targetPart>

+    <id>fsi-slave-1</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>FSIM</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>IN</default>

+    </attribute>

+    <attribute>

+      <id>FSI_ENGINE</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>FSI_LINK</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>FSI_PORT</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>FSI</default>

+    </attribute>

+    <instance_name>fsi-slave-1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-fsi-slave</type>

+  </targetPart>

+  <targetPart>

+    <id>fsim-0</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>FSIM</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>CMFSI</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>FSI_ENGINE</id>

+      <default>0x0D</default>

+    </attribute>

+    <attribute>

+      <id>FSI_LINK</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>FSI_PORT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>FSIM</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>FSI</default>

+    </attribute>

+    <instance_name>fsim-0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-fsi-proc</type>

+  </targetPart>

+  <targetPart>

+    <id>fsim-1</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>FSIM</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>CMFSI</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>FSI_ENGINE</id>

+      <default>0x0D</default>

+    </attribute>

+    <attribute>

+      <id>FSI_LINK</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>FSI_PORT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>FSIM</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>FSI</default>

+    </attribute>

+    <instance_name>fsim-1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-fsi-proc</type>

+  </targetPart>

+  <targetPart>

+    <id>fsim-2</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>FSIM</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>CMFSI</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>FSI_ENGINE</id>

+      <default>0x0D</default>

+    </attribute>

+    <attribute>

+      <id>FSI_LINK</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>FSI_PORT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>FSIM</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>FSI</default>

+    </attribute>

+    <instance_name>fsim-2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-fsi-proc</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-dpss</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-dpss</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-hotplug</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-hotplug</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-lightpath</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-lightpath</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-op0a</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-op0a</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-op0b</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-op0b</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-proc-promb0</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-proc-promb0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-proc-promb1</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-proc-promb1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-proc-promc0</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-proc-promc0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-proc-promc1</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-proc-promc1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-proc-promc2</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-proc-promc2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-proc-promc3</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-proc-promc3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-prom0-mvpd-primary</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-prom0-mvpd-primary</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-prom1-sbe-primary</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-prom1-sbe-primary</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-prom2-mvpd-backup</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-prom2-mvpd-backup</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-prom3-sbe-backup</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-prom3-sbe-backup</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-tpm</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-tpm</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-slave</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>IN</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ADDRESS</id>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-slave</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-slave</type>

+  </targetPart>

+  <targetPart>

+    <id>lpc-master</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>LPC</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>lpc-master</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-lpc-master</type>

+  </targetPart>

+  <targetPart>

+    <id>mi0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <child_id>dmi0</child_id>

+    <child_id>dmi1</child_id>

+    <instance_name>mi0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-mi-power9</parent>

+    <position>-1</position>

+    <type>unit-mi-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>mi1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <child_id>dmi2</child_id>

+    <child_id>dmi3</child_id>

+    <instance_name>mi1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-mi-power9</parent>

+    <position>-1</position>

+    <type>unit-mi-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>mi2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <child_id>dmi4</child_id>

+    <child_id>dmi5</child_id>

+    <instance_name>mi2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-mi-power9</parent>

+    <position>-1</position>

+    <type>unit-mi-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>mi3</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <child_id>dmi6</child_id>

+    <child_id>dmi7</child_id>

+    <instance_name>mi3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-mi-power9</parent>

+    <position>-1</position>

+    <type>unit-mi-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>module-module-monza</id>

+    <attribute>

+      <id>POSITION</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <child_id>p9_proc_m</child_id>

+    <instance_name>module</instance_name>

+    <is_root>true</is_root>

+    <parent>card</parent>

+    <parent_type>socket-proc_socket-68mm</parent_type>

+    <position>0</position>

+    <type>module-module-monza</type>

+  </targetPart>

+  <targetPart>

+    <id>nvbus0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>nvbus0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-nvbus-power9</parent>

+    <position>-1</position>

+    <type>unit-nvbus-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>nvbus1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>nvbus1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-nvbus-power9</parent>

+    <position>-1</position>

+    <type>unit-nvbus-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>nvbus2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>nvbus2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-nvbus-power9</parent>

+    <position>-1</position>

+    <type>unit-nvbus-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>nvbus3</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>nvbus3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-nvbus-power9</parent>

+    <position>-1</position>

+    <type>unit-nvbus-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>nvbus4</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>4</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>nvbus4</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-nvbus-power9</parent>

+    <position>-1</position>

+    <type>unit-nvbus-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>nvbus5</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>5</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>nvbus5</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-nvbus-power9</parent>

+    <position>-1</position>

+    <type>unit-nvbus-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>obus0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>obus0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-obus-power9</parent>

+    <position>-1</position>

+    <type>unit-obus-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>obus1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>obus1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-obus-power9</parent>

+    <position>-1</position>

+    <type>unit-obus-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>obus2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>obus2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-obus-power9</parent>

+    <position>-1</position>

+    <type>unit-obus-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>obus3</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>obus3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-obus-power9</parent>

+    <position>-1</position>

+    <type>unit-obus-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>occ</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>occ</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-occ-power9</parent>

+    <position>-1</position>

+    <type>unit-occ-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>p9_pci-0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>16</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>0</default>

+    </attribute>

+    <instance_name>p9_pci-0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power9</parent>

+    <position>-1</position>

+    <type>unit-pci-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>p9_pci-1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>16</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>0</default>

+    </attribute>

+    <instance_name>p9_pci-1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power9</parent>

+    <position>-1</position>

+    <type>unit-pci-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>p9_pci-2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>16</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>0</default>

+    </attribute>

+    <instance_name>p9_pci-2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power9</parent>

+    <position>-1</position>

+    <type>unit-pci-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>p9_pci-3</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>16</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>0</default>

+    </attribute>

+    <instance_name>p9_pci-3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power9</parent>

+    <position>-1</position>

+    <type>unit-pci-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>p9_proc_m</id>

+    <child_id>eq0</child_id>

+    <child_id>eq1</child_id>

+    <child_id>eq2</child_id>

+    <child_id>eq3</child_id>

+    <child_id>eq4</child_id>

+    <child_id>eq5</child_id>

+    <child_id>occ</child_id>

+    <child_id>capp0</child_id>

+    <child_id>capp1</child_id>

+    <child_id>sbe</child_id>

+    <child_id>mi0</child_id>

+    <child_id>mi1</child_id>

+    <child_id>mi2</child_id>

+    <child_id>mi3</child_id>

+    <child_id>pec0</child_id>

+    <child_id>pec1</child_id>

+    <child_id>pec2</child_id>

+    <child_id>obus0</child_id>

+    <child_id>obus1</child_id>

+    <child_id>obus2</child_id>

+    <child_id>obus3</child_id>

+    <child_id>nvbus0</child_id>

+    <child_id>nvbus1</child_id>

+    <child_id>nvbus2</child_id>

+    <child_id>nvbus3</child_id>

+    <child_id>nvbus4</child_id>

+    <child_id>nvbus5</child_id>

+    <child_id>ddr_ch0:cs0</child_id>

+    <child_id>ddr_ch0:cs1</child_id>

+    <child_id>ddr_ch1:cs0</child_id>

+    <child_id>ddr_ch1:cs1</child_id>

+    <child_id>ddr_ch2:cs0</child_id>

+    <child_id>ddr_ch2:cs1</child_id>

+    <child_id>ddr_ch3:cs0</child_id>

+    <child_id>ddr_ch3:cs1</child_id>

+    <child_id>ddr_ch4:cs0</child_id>

+    <child_id>ddr_ch4:cs1</child_id>

+    <child_id>ddr_ch5:cs0</child_id>

+    <child_id>ddr_ch5:cs1</child_id>

+    <child_id>ddr_ch6:cs0</child_id>

+    <child_id>ddr_ch6:cs1</child_id>

+    <child_id>ddr_ch7:cs0</child_id>

+    <child_id>ddr_ch7:cs1</child_id>    

+    <child_id>ppe0</child_id>

+    <child_id>ppe10</child_id>

+    <child_id>ppe11</child_id>

+    <child_id>ppe12</child_id>

+    <child_id>ppe13</child_id>

+    <child_id>ppe20</child_id>

+    <child_id>ppe21</child_id>

+    <child_id>ppe22</child_id>

+    <child_id>ppe23</child_id>

+    <child_id>ppe24</child_id>

+    <child_id>ppe25</child_id>

+    <child_id>ppe30</child_id>

+    <child_id>ppe31</child_id>

+    <child_id>ppe32</child_id>

+    <child_id>ppe33</child_id>

+    <child_id>ppe34</child_id>

+    <child_id>ppe35</child_id>

+    <child_id>ppe40</child_id>

+    <child_id>ppe41</child_id>

+    <child_id>ppe42</child_id>

+    <child_id>ppe43</child_id>

+    <child_id>ppe45</child_id>

+    <child_id>ppe50</child_id>

+    <child_id>perv1</child_id>

+    <child_id>perv2</child_id>

+    <child_id>perv3</child_id>

+    <child_id>perv4</child_id>

+    <child_id>perv5</child_id>

+    <child_id>perv6</child_id>

+    <child_id>perv7</child_id>

+    <child_id>perv8</child_id>

+    <child_id>perv9</child_id>

+    <child_id>perv12</child_id>

+    <child_id>perv13</child_id>

+    <child_id>perv14</child_id>

+    <child_id>perv15</child_id>

+    <child_id>perv16</child_id>

+    <child_id>perv17</child_id>

+    <child_id>perv18</child_id>

+    <child_id>perv19</child_id>

+    <child_id>perv20</child_id>

+    <child_id>perv21</child_id>

+    <child_id>perv32</child_id>

+    <child_id>perv33</child_id>

+    <child_id>perv34</child_id>

+    <child_id>perv35</child_id>

+    <child_id>perv36</child_id>

+    <child_id>perv37</child_id>

+    <child_id>perv38</child_id>

+    <child_id>perv39</child_id>

+    <child_id>perv40</child_id>

+    <child_id>perv41</child_id>

+    <child_id>perv42</child_id>

+    <child_id>perv43</child_id>

+    <child_id>perv44</child_id>

+    <child_id>perv45</child_id>

+    <child_id>perv46</child_id>

+    <child_id>perv47</child_id>

+    <child_id>perv48</child_id>

+    <child_id>perv49</child_id>

+    <child_id>perv50</child_id>

+    <child_id>perv51</child_id>

+    <child_id>perv52</child_id>

+    <child_id>perv53</child_id>

+    <child_id>perv54</child_id>

+    <child_id>perv55</child_id>

+    <child_id>xbus0</child_id>

+    <child_id>pci_configs_power9</child_id>

+    <child_id>fsi-slave-0</child_id>

+    <child_id>fsi-slave-1</child_id>

+    <child_id>fsi-cm-0</child_id>

+    <child_id>fsi-cm-1</child_id>

+    <child_id>fsi-cm-2</child_id>

+    <child_id>fsi-cm-3</child_id>

+    <child_id>fsim-0</child_id>

+    <child_id>fsim-1</child_id>

+    <child_id>fsim-2</child_id>

+    <child_id>i2c-slave</child_id>

+    <child_id>i2c-master-prom0-mvpd-primary</child_id>

+    <child_id>i2c-master-prom1-sbe-primary</child_id>

+    <child_id>i2c-master-prom2-mvpd-backup</child_id>

+    <child_id>i2c-master-prom3-sbe-backup</child_id>

+    <child_id>i2c-master-proc-promb0</child_id>

+    <child_id>i2c-master-proc-promb1</child_id>

+    <child_id>i2c-master-proc-promc0</child_id>

+    <child_id>i2c-master-proc-promc1</child_id>

+    <child_id>i2c-master-proc-promc2</child_id>

+    <child_id>i2c-master-proc-promc3</child_id>

+    <child_id>i2c-master-lightpath</child_id>

+    <child_id>i2c-master-hotplug</child_id>

+    <child_id>i2c-master-tpm</child_id>

+    <child_id>i2c-master-dpss</child_id>

+    <child_id>i2c-master-op0a</child_id>

+    <child_id>i2c-master-op0b</child_id>

+    <child_id>lpc-master</child_id>

+    <child_id>psi-slave</child_id>

+    <child_id>spi-master</child_id>

+    <child_id>proc_fru_assoc</child_id>

+    <hidden_child_id>xbus1</hidden_child_id>

+    <hidden_child_id>xbus2</hidden_child_id>

+    <hidden_child_id>p9_pci-0</hidden_child_id>

+    <hidden_child_id>p9_pci-1</hidden_child_id>

+    <hidden_child_id>p9_pci-2</hidden_child_id>

+    <hidden_child_id>p9_pci-3</hidden_child_id>

+    <hidden_child_id>cpu_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpu_func_sensor</hidden_child_id>

+    <instance_name>p9_proc_m</instance_name>

+    <is_root>false</is_root>

+    <parent>chip-processor-nimbus</parent>

+    <position>-1</position>

+    <type>chip-processor-monza</type>

+  </targetPart>

+  <targetPart>

+    <id>pci_configs_power9</id>

+    <attribute>

+      <id>IO_CONFIG_SELECT</id>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>PCI_CONFIGS</default>

+    </attribute>

+    <child_id>PEC0_x16:PEC1_x8x8:PEC2_x16</child_id>

+    <child_id>PEC0_x16:PEC1_x8x8:PEC2_x8x8</child_id>

+    <instance_name>pci_configs_power9</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-pciconfigs-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>pec0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>PROC_PCIE_REFCLOCK_ENABLE</id>

+      <default>0xE0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>PEC</default>

+    </attribute>

+    <child_id>phb0</child_id>

+    <instance_name>pec0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-pec-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>pec1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>PROC_PCIE_REFCLOCK_ENABLE</id>

+      <default>0xE0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>PEC</default>

+    </attribute>

+    <child_id>phb1</child_id>

+    <child_id>phb2</child_id>

+    <instance_name>pec1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-pec-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>pec2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>PROC_PCIE_REFCLOCK_ENABLE</id>

+      <default>0xE0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>PEC</default>

+    </attribute>

+    <child_id>phb3</child_id>

+    <child_id>phb4</child_id>

+    <child_id>phb5</child_id>

+    <instance_name>pec2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-pec-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>perv1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv12</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>12</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv12</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv13</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>13</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv13</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv14</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>14</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv14</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv15</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>15</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv15</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv16</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>16</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv16</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv17</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>17</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv17</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv18</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>18</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv18</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv19</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>19</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv19</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv20</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>20</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv20</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv21</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>21</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv21</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv3</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv32</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>32</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv32</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv33</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>33</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv33</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv34</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>34</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv34</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv35</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>35</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv35</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv36</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>36</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv36</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv37</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>37</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv37</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv38</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>38</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv38</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv39</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>39</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv39</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv4</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>4</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv4</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv40</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>40</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv40</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv41</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>41</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv41</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv42</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>42</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv42</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv43</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>43</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv43</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv44</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>44</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv44</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv45</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>45</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv45</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv46</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>46</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv46</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv47</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>47</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv47</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv48</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>48</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv48</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv49</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>49</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv49</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv5</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>5</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv5</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv50</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>50</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv50</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv51</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>51</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv51</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv52</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>52</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv52</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv53</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>53</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv53</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv54</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>54</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv54</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv55</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>55</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv55</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv6</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>6</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv6</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv7</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>7</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv7</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv8</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv8</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv9</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>9</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv9</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>phb0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>phb0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-phb-power9</parent>

+    <position>-1</position>

+    <type>unit-phb-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>phb1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>phb1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-phb-power9</parent>

+    <position>-1</position>

+    <type>unit-phb-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>phb2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>phb2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-phb-power9</parent>

+    <position>-1</position>

+    <type>unit-phb-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>phb3</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>phb3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-phb-power9</parent>

+    <position>-1</position>

+    <type>unit-phb-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>phb4</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>4</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>phb4</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-phb-power9</parent>

+    <position>-1</position>

+    <type>unit-phb-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>phb5</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>5</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>phb5</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-phb-power9</parent>

+    <position>-1</position>

+    <type>unit-phb-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe10</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>10</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe10</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe11</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>11</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe11</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe12</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>12</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe12</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe13</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>13</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe13</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe20</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>20</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe20</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe21</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>21</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe21</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe22</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>22</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe22</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe23</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>23</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe23</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe24</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>24</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe24</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe25</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>25</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe25</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe30</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>30</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe30</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe31</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>31</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe31</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe32</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>32</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe32</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe33</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>33</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe33</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe34</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>34</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe34</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe35</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>35</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe35</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe40</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>40</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe40</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe41</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>41</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe41</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe42</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>42</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe42</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe43</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>43</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe43</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe45</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>45</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe45</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe50</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>50</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe50</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>proc_fru_assoc</id>

+    <attribute>

+      <id>ASSOCIATION_TYPE</id>

+      <default>FRU</default>

+    </attribute>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>LOGICAL_ASSOCIATION</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>IN</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>proc_fru_assoc</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-logic_assoc-generic</type>

+  </targetPart>

+  <targetPart>

+    <id>psi-slave</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>PSI</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>IN</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>psi-slave</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-psi-slave</type>

+  </targetPart>

+  <targetPart>

+    <id>sbe</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>sbe</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-sbe-power9</parent>

+    <position>-1</position>

+    <type>unit-sbe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>spi-master</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>SPI</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>SPI_ENGINE</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>SPI_PORT</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>spi-master</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-spi-master</type>

+  </targetPart>

+  <targetPart>

+    <id>xbus0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>xbus0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-xbus-power9</parent>

+    <position>-1</position>

+    <type>unit-xbus-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>xbus1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>xbus1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-xbus-power9</parent>

+    <position>-1</position>

+    <type>unit-xbus-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>xbus2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>xbus2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-xbus-power9</parent>

+    <position>-1</position>

+    <type>unit-xbus-cumulus</type>

+  </targetPart>

+</partInstance>

diff --git a/xml/parts/module-module-sforza.xml b/xml/parts/module-module-sforza.xml
new file mode 100644
index 0000000..e67e7e5
--- /dev/null
+++ b/xml/parts/module-module-sforza.xml
@@ -0,0 +1,4696 @@
+<partInstance>

+  <targetPart>

+    <id>ddr_ch0:cs0</id>

+    <instance_name>ddr_ch0:cs0</instance_name>

+    <is_root>false</is_root><parent>unit</parent><position>-1</position>

+    <type>unit-dimm_port-power9</type>

+    <attribute><id>BUS_TYPE</id><default>DDR4</default></attribute>

+    <attribute><id>CHIP_UNIT</id><default>0</default></attribute>

+    <attribute><id>DIRECTION</id><default>OUT</default></attribute>

+    <attribute><id>MBA_DIMM</id><default>1</default></attribute>

+    <attribute><id>MBA_PORT</id><default>1</default></attribute>

+  </targetPart>

+  <targetPart>

+    <id>ddr_ch0:cs1</id>

+    <instance_name>ddr_ch0:cs1</instance_name>

+    <is_root>false</is_root><parent>unit</parent><position>-1</position>

+    <type>unit-dimm_port-power9</type>

+    <attribute><id>BUS_TYPE</id><default>DDR4</default></attribute>

+    <attribute><id>CHIP_UNIT</id><default>0</default></attribute>

+    <attribute><id>DIRECTION</id><default>OUT</default></attribute>

+    <attribute><id>MBA_DIMM</id><default>1</default></attribute>

+    <attribute><id>MBA_PORT</id><default>1</default></attribute>

+  </targetPart>

+  <targetPart>

+    <id>ddr_ch1:cs0</id>

+    <instance_name>ddr_ch1:cs0</instance_name>

+    <is_root>false</is_root><parent>unit</parent><position>-1</position>

+    <type>unit-dimm_port-power9</type>

+    <attribute><id>BUS_TYPE</id><default>DDR4</default></attribute>

+    <attribute><id>CHIP_UNIT</id><default>0</default></attribute>

+    <attribute><id>DIRECTION</id><default>OUT</default></attribute>

+    <attribute><id>MBA_DIMM</id><default>1</default></attribute>

+    <attribute><id>MBA_PORT</id><default>1</default></attribute>

+  </targetPart>

+  <targetPart>

+    <id>ddr_ch1:cs1</id>

+    <instance_name>ddr_ch1:cs1</instance_name>

+    <is_root>false</is_root><parent>unit</parent><position>-1</position>

+    <type>unit-dimm_port-power9</type>

+    <attribute><id>BUS_TYPE</id><default>DDR4</default></attribute>

+    <attribute><id>CHIP_UNIT</id><default>0</default></attribute>

+    <attribute><id>DIRECTION</id><default>OUT</default></attribute>

+    <attribute><id>MBA_DIMM</id><default>1</default></attribute>

+    <attribute><id>MBA_PORT</id><default>1</default></attribute>

+  </targetPart>

+  <targetPart>

+    <id>ddr_ch2:cs0</id>

+    <instance_name>ddr_ch2:cs0</instance_name>

+    <is_root>false</is_root><parent>unit</parent><position>-1</position>

+    <type>unit-dimm_port-power9</type>

+    <attribute><id>BUS_TYPE</id><default>DDR4</default></attribute>

+    <attribute><id>CHIP_UNIT</id><default>0</default></attribute>

+    <attribute><id>DIRECTION</id><default>OUT</default></attribute>

+    <attribute><id>MBA_DIMM</id><default>1</default></attribute>

+    <attribute><id>MBA_PORT</id><default>1</default></attribute>

+  </targetPart>

+  <targetPart>

+    <id>ddr_ch2:cs1</id>

+    <instance_name>ddr_ch2:cs1</instance_name>

+    <is_root>false</is_root><parent>unit</parent><position>-1</position>

+    <type>unit-dimm_port-power9</type>

+    <attribute><id>BUS_TYPE</id><default>DDR4</default></attribute>

+    <attribute><id>CHIP_UNIT</id><default>0</default></attribute>

+    <attribute><id>DIRECTION</id><default>OUT</default></attribute>

+    <attribute><id>MBA_DIMM</id><default>1</default></attribute>

+    <attribute><id>MBA_PORT</id><default>1</default></attribute>

+  </targetPart>

+  <targetPart>

+    <id>ddr_ch3:cs0</id>

+    <instance_name>ddr_ch3:cs0</instance_name>

+    <is_root>false</is_root><parent>unit</parent><position>-1</position>

+    <type>unit-dimm_port-power9</type>

+    <attribute><id>BUS_TYPE</id><default>DDR4</default></attribute>

+    <attribute><id>CHIP_UNIT</id><default>0</default></attribute>

+    <attribute><id>DIRECTION</id><default>OUT</default></attribute>

+    <attribute><id>MBA_DIMM</id><default>1</default></attribute>

+    <attribute><id>MBA_PORT</id><default>1</default></attribute>

+  </targetPart>

+  <targetPart>

+    <id>ddr_ch3:cs1</id>

+    <instance_name>ddr_ch3:cs1</instance_name>

+    <is_root>false</is_root><parent>unit</parent><position>-1</position>

+    <type>unit-dimm_port-power9</type>

+    <attribute><id>BUS_TYPE</id><default>DDR4</default></attribute>

+    <attribute><id>CHIP_UNIT</id><default>0</default></attribute>

+    <attribute><id>DIRECTION</id><default>OUT</default></attribute>

+    <attribute><id>MBA_DIMM</id><default>1</default></attribute>

+    <attribute><id>MBA_PORT</id><default>1</default></attribute>

+  </targetPart>

+  <targetPart>

+    <id>PEC0_x16</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default>0xFFFF</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>16</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>0</default>

+    </attribute>

+    <instance_name>PEC0_x16</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power9</parent>

+    <position>-1</position>

+    <type>unit-pci-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>PEC0_x16:PEC1_x8x8:PEC2_x16</id>

+    <attribute>

+      <id>IO_CONFIG_NUM</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>PCI_CONFIG</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_CONFIG_NUM</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SWAP_TABLE</id>

+      <default></default>

+    </attribute>

+    <child_id>PEC0_x16</child_id>

+    <child_id>PEC1_CLK0_x8</child_id>

+    <child_id>PEC1_CLK1_x8</child_id>

+    <child_id>PEC2_x16</child_id>

+    <instance_name>PEC0_x16:PEC1_x8x8:PEC2_x16</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-pciconfig0-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>PEC0_x16:PEC1_x8x8:PEC2_x8x8</id>

+    <attribute>

+      <id>IO_CONFIG_NUM</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>PCI_CONFIG</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_CONFIG_NUM</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SWAP_TABLE</id>

+      <default></default>

+    </attribute>

+    <child_id>PEC0_x16</child_id>

+    <child_id>PEC1_CLK0_x8</child_id>

+    <child_id>PEC1_CLK1_x8</child_id>

+    <child_id>PEC2_CLK0_x8</child_id>

+    <child_id>PEC2_CLK1_x8</child_id>

+    <instance_name>PEC0_x16:PEC1_x8x8:PEC2_x8x8</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-pciconfig1-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>PEC1_CLK0_x8</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default>0xFF00</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>1</default>

+    </attribute>

+    <instance_name>PEC1_CLK0_x8</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power9</parent>

+    <position>-1</position>

+    <type>unit-pci-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>PEC1_CLK1_x8</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default>0x00FF</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>2</default>

+    </attribute>

+    <instance_name>PEC1_CLK1_x8</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power9</parent>

+    <position>-1</position>

+    <type>unit-pci-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>PEC2_CLK0_x8</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default>0xFF00</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>4</default>

+    </attribute>

+    <instance_name>PEC2_CLK0_x8</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power9</parent>

+    <position>-1</position>

+    <type>unit-pci-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>PEC2_CLK1_x8</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default>0x00FF</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>5</default>

+    </attribute>

+    <instance_name>PEC2_CLK1_x8</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power9</parent>

+    <position>-1</position>

+    <type>unit-pci-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>PEC2_x16</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default>0xFFFF</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>16</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>3</default>

+    </attribute>

+    <instance_name>PEC2_x16</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power9</parent>

+    <position>-1</position>

+    <type>unit-pci-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>capp0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>capp0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-capp-power9</parent>

+    <position>-1</position>

+    <type>unit-capp-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>capp1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>capp1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-capp-power9</parent>

+    <position>-1</position>

+    <type>unit-capp-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>core0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core10</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>10</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core10</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core11</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>11</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core11</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core12</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>12</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core12</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core13</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>13</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core13</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core14</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>14</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core14</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core15</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>15</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core15</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core16</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>16</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core16</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core17</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>17</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core17</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core18</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>18</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core18</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core19</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>19</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core19</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core20</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>20</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core20</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core21</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>21</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core21</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core22</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>22</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core22</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core23</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>23</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core23</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core3</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core4</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>4</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core4</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core5</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>5</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core5</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core6</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>6</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core6</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core7</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>7</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core7</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core8</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core8</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>core9</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>9</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>CORE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core9</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-core-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>cpu_func_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0x03</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Func</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default>0x07,0x08,0x0b,0x0a,0x0b</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x6F</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0x07</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>cpu_func_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>cpu_temp_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0x03</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Temp</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>cpu_temp_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>cpucore_freq_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD0</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Freq</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC1</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>cpucore_freq_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>cpucore_func_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD0</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Func</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default>0x07,0x08,0x0b,0x0a,0x0b</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x6F</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0x07</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>cpucore_func_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>cpucore_temp_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD0</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Temp</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>cpucore_temp_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>dmi0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>dmi0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-dmi-power9</parent>

+    <position>-1</position>

+    <type>unit-dmi-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>dmi1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>dmi1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-dmi-power9</parent>

+    <position>-1</position>

+    <type>unit-dmi-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>dmi2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>dmi2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-dmi-power9</parent>

+    <position>-1</position>

+    <type>unit-dmi-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>dmi3</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>dmi3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-dmi-power9</parent>

+    <position>-1</position>

+    <type>unit-dmi-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>dmi4</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>4</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>dmi4</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-dmi-power9</parent>

+    <position>-1</position>

+    <type>unit-dmi-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>dmi5</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>5</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>dmi5</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-dmi-power9</parent>

+    <position>-1</position>

+    <type>unit-dmi-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>dmi6</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>6</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>dmi6</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-dmi-power9</parent>

+    <position>-1</position>

+    <type>unit-dmi-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>dmi7</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>7</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>dmi7</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-dmi-power9</parent>

+    <position>-1</position>

+    <type>unit-dmi-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>eq0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EQ</default>

+    </attribute>

+    <child_id>ex0</child_id>

+    <child_id>ex1</child_id>

+    <instance_name>eq0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-eq-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>eq1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EQ</default>

+    </attribute>

+    <child_id>ex2</child_id>

+    <child_id>ex3</child_id>

+    <instance_name>eq1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-eq-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>eq2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EQ</default>

+    </attribute>

+    <child_id>ex4</child_id>

+    <child_id>ex5</child_id>

+    <instance_name>eq2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-eq-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>eq3</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EQ</default>

+    </attribute>

+    <child_id>ex6</child_id>

+    <child_id>ex7</child_id>

+    <instance_name>eq3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-eq-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>eq4</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>4</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EQ</default>

+    </attribute>

+    <child_id>ex8</child_id>

+    <child_id>ex9</child_id>

+    <instance_name>eq4</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-eq-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>eq5</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>5</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EQ</default>

+    </attribute>

+    <child_id>ex10</child_id>

+    <child_id>ex11</child_id>

+    <instance_name>eq5</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-eq-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>ex0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EX</default>

+    </attribute>

+    <child_id>core0</child_id>

+    <child_id>core1</child_id>

+    <instance_name>ex0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ex-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>ex1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EX</default>

+    </attribute>

+    <child_id>core2</child_id>

+    <child_id>core3</child_id>

+    <instance_name>ex1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ex-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>ex10</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>10</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EX</default>

+    </attribute>

+    <child_id>core20</child_id>

+    <child_id>core21</child_id>

+    <instance_name>ex10</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ex-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>ex11</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>11</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EX</default>

+    </attribute>

+    <child_id>core22</child_id>

+    <child_id>core23</child_id>

+    <instance_name>ex11</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ex-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>ex2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EX</default>

+    </attribute>

+    <child_id>core4</child_id>

+    <child_id>core5</child_id>

+    <instance_name>ex2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ex-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>ex3</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EX</default>

+    </attribute>

+    <child_id>core6</child_id>

+    <child_id>core7</child_id>

+    <instance_name>ex3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ex-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>ex4</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>4</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EX</default>

+    </attribute>

+    <child_id>core8</child_id>

+    <child_id>core9</child_id>

+    <instance_name>ex4</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ex-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>ex5</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>5</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EX</default>

+    </attribute>

+    <child_id>core10</child_id>

+    <child_id>core11</child_id>

+    <instance_name>ex5</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ex-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>ex6</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>6</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EX</default>

+    </attribute>

+    <child_id>core12</child_id>

+    <child_id>core13</child_id>

+    <instance_name>ex6</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ex-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>ex7</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>7</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EX</default>

+    </attribute>

+    <child_id>core14</child_id>

+    <child_id>core15</child_id>

+    <instance_name>ex7</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ex-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>ex8</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EX</default>

+    </attribute>

+    <child_id>core16</child_id>

+    <child_id>core17</child_id>

+    <instance_name>ex8</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ex-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>ex9</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>9</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>EX</default>

+    </attribute>

+    <child_id>core18</child_id>

+    <child_id>core19</child_id>

+    <instance_name>ex9</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ex-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>fsi-cm-0</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>FSICM</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>CMFSI</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>FSI_ENGINE</id>

+      <default>0x0C</default>

+    </attribute>

+    <attribute>

+      <id>FSI_LINK</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>FSI_PORT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>FSICM</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>FSI</default>

+    </attribute>

+    <instance_name>fsi-cm-0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-fsi-membuf</type>

+  </targetPart>

+  <targetPart>

+    <id>fsi-cm-1</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>FSICM</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>CMFSI</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>FSI_ENGINE</id>

+      <default>0x0C</default>

+    </attribute>

+    <attribute>

+      <id>FSI_LINK</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>FSI_PORT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>FSICM</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>FSI</default>

+    </attribute>

+    <instance_name>fsi-cm-1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-fsi-membuf</type>

+  </targetPart>

+  <targetPart>

+    <id>fsi-cm-2</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>FSICM</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>CMFSI</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>FSI_ENGINE</id>

+      <default>0x0C</default>

+    </attribute>

+    <attribute>

+      <id>FSI_LINK</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>FSI_PORT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>FSICM</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>FSI</default>

+    </attribute>

+    <instance_name>fsi-cm-2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-fsi-membuf</type>

+  </targetPart>

+  <targetPart>

+    <id>fsi-cm-3</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>FSICM</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>CMFSI</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>FSI_ENGINE</id>

+      <default>0x0C</default>

+    </attribute>

+    <attribute>

+      <id>FSI_LINK</id>

+      <default>0x03</default>

+    </attribute>

+    <attribute>

+      <id>FSI_PORT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>FSICM</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>FSI</default>

+    </attribute>

+    <instance_name>fsi-cm-3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-fsi-membuf</type>

+  </targetPart>

+  <targetPart>

+    <id>fsi-slave-0</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>FSIM</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>IN</default>

+    </attribute>

+    <attribute>

+      <id>FSI_ENGINE</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>FSI_LINK</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>FSI_PORT</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <attribute>

+      <id>RESOURCE_IS_CRITICAL</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>FSI</default>

+    </attribute>

+    <instance_name>fsi-slave-0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-fsi-slave</type>

+  </targetPart>

+  <targetPart>

+    <id>fsi-slave-1</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>FSIM</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>IN</default>

+    </attribute>

+    <attribute>

+      <id>FSI_ENGINE</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>FSI_LINK</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>FSI_PORT</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>FSI</default>

+    </attribute>

+    <instance_name>fsi-slave-1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-fsi-slave</type>

+  </targetPart>

+  <targetPart>

+    <id>fsim-0</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>FSIM</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>CMFSI</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>FSI_ENGINE</id>

+      <default>0x0D</default>

+    </attribute>

+    <attribute>

+      <id>FSI_LINK</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>FSI_PORT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>FSIM</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>FSI</default>

+    </attribute>

+    <instance_name>fsim-0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-fsi-proc</type>

+  </targetPart>

+  <targetPart>

+    <id>fsim-1</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>FSIM</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>CMFSI</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>FSI_ENGINE</id>

+      <default>0x0D</default>

+    </attribute>

+    <attribute>

+      <id>FSI_LINK</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>FSI_PORT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>FSIM</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>FSI</default>

+    </attribute>

+    <instance_name>fsim-1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-fsi-proc</type>

+  </targetPart>

+  <targetPart>

+    <id>fsim-2</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>FSIM</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>CMFSI</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>FSI_ENGINE</id>

+      <default>0x0D</default>

+    </attribute>

+    <attribute>

+      <id>FSI_LINK</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>FSI_PORT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>FSIM</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>FSI</default>

+    </attribute>

+    <instance_name>fsim-2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-fsi-proc</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-dpss</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-dpss</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-hotplug</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-hotplug</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-lightpath</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-lightpath</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-op0a</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-op0a</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-op0b</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-op0b</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-proc-promb0</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-proc-promb0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-proc-promb1</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-proc-promb1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-proc-promc0</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-proc-promc0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-proc-promc1</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-proc-promc1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-proc-promc2</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-proc-promc2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-proc-promc3</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-proc-promc3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-prom0-mvpd-primary</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-prom0-mvpd-primary</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-prom1-sbe-primary</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-prom1-sbe-primary</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-prom2-mvpd-backup</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-prom2-mvpd-backup</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-prom3-sbe-backup</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-prom3-sbe-backup</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-tpm</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-tpm</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-slave</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>IN</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ADDRESS</id>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-slave</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-slave</type>

+  </targetPart>

+  <targetPart>

+    <id>lpc-master</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>LPC</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>lpc-master</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-lpc-master</type>

+  </targetPart>

+  <targetPart>

+    <id>mi0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <child_id>dmi0</child_id>

+    <child_id>dmi1</child_id>

+    <instance_name>mi0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-mi-power9</parent>

+    <position>-1</position>

+    <type>unit-mi-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>mi1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <child_id>dmi2</child_id>

+    <child_id>dmi3</child_id>

+    <instance_name>mi1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-mi-power9</parent>

+    <position>-1</position>

+    <type>unit-mi-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>mi2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <child_id>dmi4</child_id>

+    <child_id>dmi5</child_id>

+    <instance_name>mi2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-mi-power9</parent>

+    <position>-1</position>

+    <type>unit-mi-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>mi3</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <child_id>dmi6</child_id>

+    <child_id>dmi7</child_id>

+    <instance_name>mi3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-mi-power9</parent>

+    <position>-1</position>

+    <type>unit-mi-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>module-module-sforza</id>

+    <attribute>

+      <id>POSITION</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <child_id>p9_proc_s</child_id>

+    <instance_name>module</instance_name>

+    <is_root>true</is_root>

+    <parent>card</parent>

+    <parent_type>socket-proc_socket-50mm</parent_type>

+    <position>0</position>

+    <type>module-module-sforza</type>

+  </targetPart>

+  <targetPart>

+    <id>nvbus0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>nvbus0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-nvbus-power9</parent>

+    <position>-1</position>

+    <type>unit-nvbus-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>nvbus1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>nvbus1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-nvbus-power9</parent>

+    <position>-1</position>

+    <type>unit-nvbus-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>nvbus2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>nvbus2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-nvbus-power9</parent>

+    <position>-1</position>

+    <type>unit-nvbus-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>nvbus3</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>nvbus3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-nvbus-power9</parent>

+    <position>-1</position>

+    <type>unit-nvbus-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>nvbus4</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>4</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>nvbus4</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-nvbus-power9</parent>

+    <position>-1</position>

+    <type>unit-nvbus-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>nvbus5</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>5</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>nvbus5</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-nvbus-power9</parent>

+    <position>-1</position>

+    <type>unit-nvbus-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>obus0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>obus0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-obus-power9</parent>

+    <position>-1</position>

+    <type>unit-obus-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>obus1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>obus1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-obus-power9</parent>

+    <position>-1</position>

+    <type>unit-obus-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>obus2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>obus2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-obus-power9</parent>

+    <position>-1</position>

+    <type>unit-obus-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>obus3</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>obus3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-obus-power9</parent>

+    <position>-1</position>

+    <type>unit-obus-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>occ</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>occ</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-occ-power9</parent>

+    <position>-1</position>

+    <type>unit-occ-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>p9_pci-0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>16</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>0</default>

+    </attribute>

+    <instance_name>p9_pci-0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power9</parent>

+    <position>-1</position>

+    <type>unit-pci-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>p9_pci-1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>16</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>0</default>

+    </attribute>

+    <instance_name>p9_pci-1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power9</parent>

+    <position>-1</position>

+    <type>unit-pci-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>p9_pci-2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>16</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>0</default>

+    </attribute>

+    <instance_name>p9_pci-2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power9</parent>

+    <position>-1</position>

+    <type>unit-pci-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>p9_pci-3</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>16</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>0</default>

+    </attribute>

+    <instance_name>p9_pci-3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power9</parent>

+    <position>-1</position>

+    <type>unit-pci-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>p9_proc_s</id>

+    <child_id>eq0</child_id>

+    <child_id>eq1</child_id>

+    <child_id>eq2</child_id>

+    <child_id>eq3</child_id>

+    <child_id>eq4</child_id>

+    <child_id>eq5</child_id>

+    <child_id>occ</child_id>

+    <child_id>capp0</child_id>

+    <child_id>capp1</child_id>

+    <child_id>sbe</child_id>

+    <child_id>mi0</child_id>

+    <child_id>mi1</child_id>

+    <child_id>mi2</child_id>

+    <child_id>mi3</child_id>

+    <child_id>pec0</child_id>

+    <child_id>pec1</child_id>

+    <child_id>pec2</child_id>

+    <child_id>obus0</child_id>

+    <child_id>obus1</child_id>

+    <child_id>obus2</child_id>

+    <child_id>obus3</child_id>

+    <child_id>ddr_ch0:cs0</child_id>

+    <child_id>ddr_ch0:cs1</child_id>

+    <child_id>ddr_ch1:cs0</child_id>

+    <child_id>ddr_ch1:cs1</child_id>

+    <child_id>ddr_ch2:cs0</child_id>

+    <child_id>ddr_ch2:cs1</child_id>

+    <child_id>ddr_ch3:cs0</child_id>

+    <child_id>ddr_ch3:cs1</child_id>

+    <child_id>ppe0</child_id>

+    <child_id>ppe10</child_id>

+    <child_id>ppe11</child_id>

+    <child_id>ppe12</child_id>

+    <child_id>ppe13</child_id>

+    <child_id>ppe20</child_id>

+    <child_id>ppe21</child_id>

+    <child_id>ppe22</child_id>

+    <child_id>ppe23</child_id>

+    <child_id>ppe24</child_id>

+    <child_id>ppe25</child_id>

+    <child_id>ppe30</child_id>

+    <child_id>ppe31</child_id>

+    <child_id>ppe32</child_id>

+    <child_id>ppe33</child_id>

+    <child_id>ppe34</child_id>

+    <child_id>ppe35</child_id>

+    <child_id>ppe40</child_id>

+    <child_id>ppe41</child_id>

+    <child_id>ppe42</child_id>

+    <child_id>ppe43</child_id>

+    <child_id>ppe45</child_id>

+    <child_id>ppe50</child_id>

+    <child_id>perv1</child_id>

+    <child_id>perv2</child_id>

+    <child_id>perv3</child_id>

+    <child_id>perv4</child_id>

+    <child_id>perv5</child_id>

+    <child_id>perv6</child_id>

+    <child_id>perv7</child_id>

+    <child_id>perv8</child_id>

+    <child_id>perv9</child_id>

+    <child_id>perv12</child_id>

+    <child_id>perv13</child_id>

+    <child_id>perv14</child_id>

+    <child_id>perv15</child_id>

+    <child_id>perv16</child_id>

+    <child_id>perv17</child_id>

+    <child_id>perv18</child_id>

+    <child_id>perv19</child_id>

+    <child_id>perv20</child_id>

+    <child_id>perv21</child_id>

+    <child_id>perv32</child_id>

+    <child_id>perv33</child_id>

+    <child_id>perv34</child_id>

+    <child_id>perv35</child_id>

+    <child_id>perv36</child_id>

+    <child_id>perv37</child_id>

+    <child_id>perv38</child_id>

+    <child_id>perv39</child_id>

+    <child_id>perv40</child_id>

+    <child_id>perv41</child_id>

+    <child_id>perv42</child_id>

+    <child_id>perv43</child_id>

+    <child_id>perv44</child_id>

+    <child_id>perv45</child_id>

+    <child_id>perv46</child_id>

+    <child_id>perv47</child_id>

+    <child_id>perv48</child_id>

+    <child_id>perv49</child_id>

+    <child_id>perv50</child_id>

+    <child_id>perv51</child_id>

+    <child_id>perv52</child_id>

+    <child_id>perv53</child_id>

+    <child_id>perv54</child_id>

+    <child_id>perv55</child_id>

+    <child_id>xbus0</child_id>

+    <child_id>pci_configs_power9</child_id>

+    <child_id>fsi-slave-0</child_id>

+    <child_id>fsi-slave-1</child_id>

+    <child_id>fsi-cm-0</child_id>

+    <child_id>fsi-cm-1</child_id>

+    <child_id>fsi-cm-2</child_id>

+    <child_id>fsi-cm-3</child_id>

+    <child_id>fsim-0</child_id>

+    <child_id>fsim-1</child_id>

+    <child_id>fsim-2</child_id>

+    <child_id>i2c-slave</child_id>

+    <child_id>i2c-master-prom0-mvpd-primary</child_id>

+    <child_id>i2c-master-prom1-sbe-primary</child_id>

+    <child_id>i2c-master-prom2-mvpd-backup</child_id>

+    <child_id>i2c-master-prom3-sbe-backup</child_id>

+    <child_id>i2c-master-proc-promb0</child_id>

+    <child_id>i2c-master-proc-promb1</child_id>

+    <child_id>i2c-master-proc-promc0</child_id>

+    <child_id>i2c-master-proc-promc1</child_id>

+    <child_id>i2c-master-proc-promc2</child_id>

+    <child_id>i2c-master-proc-promc3</child_id>

+    <child_id>i2c-master-lightpath</child_id>

+    <child_id>i2c-master-hotplug</child_id>

+    <child_id>i2c-master-tpm</child_id>

+    <child_id>i2c-master-dpss</child_id>

+    <child_id>i2c-master-op0a</child_id>

+    <child_id>i2c-master-op0b</child_id>

+    <child_id>lpc-master</child_id>

+    <child_id>psi-slave</child_id>

+    <child_id>spi-master</child_id>

+    <child_id>proc_fru_assoc</child_id>

+    <hidden_child_id>nvbus0</hidden_child_id>

+    <hidden_child_id>nvbus1</hidden_child_id>

+    <hidden_child_id>nvbus2</hidden_child_id>

+    <hidden_child_id>nvbus3</hidden_child_id>

+    <hidden_child_id>nvbus4</hidden_child_id>

+    <hidden_child_id>nvbus5</hidden_child_id>

+    <hidden_child_id>xbus1</hidden_child_id>

+    <hidden_child_id>xbus2</hidden_child_id>

+    <hidden_child_id>p9_pci-0</hidden_child_id>

+    <hidden_child_id>p9_pci-1</hidden_child_id>

+    <hidden_child_id>p9_pci-2</hidden_child_id>

+    <hidden_child_id>p9_pci-3</hidden_child_id>

+    <hidden_child_id>cpu_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpu_func_sensor</hidden_child_id>

+    <instance_name>p9_proc_s</instance_name>

+    <is_root>false</is_root>

+    <parent>chip-processor-nimbus</parent>

+    <position>-1</position>

+    <type>chip-processor-sforza</type>

+  </targetPart>

+  <targetPart>

+    <id>pci_configs_power9</id>

+    <attribute>

+      <id>IO_CONFIG_SELECT</id>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>PCI_CONFIGS</default>

+    </attribute>

+    <child_id>PEC0_x16:PEC1_x8x8:PEC2_x16</child_id>

+    <child_id>PEC0_x16:PEC1_x8x8:PEC2_x8x8</child_id>

+    <instance_name>pci_configs_power9</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-pciconfigs-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>pec0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>PROC_PCIE_REFCLOCK_ENABLE</id>

+      <default>0xE0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>PEC</default>

+    </attribute>

+    <child_id>phb0</child_id>

+    <instance_name>pec0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-pec-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>pec1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>PROC_PCIE_REFCLOCK_ENABLE</id>

+      <default>0xE0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>PEC</default>

+    </attribute>

+    <child_id>phb1</child_id>

+    <child_id>phb2</child_id>

+    <instance_name>pec1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-pec-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>pec2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>DECONFIG_GARDABLE</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>PROC_PCIE_REFCLOCK_ENABLE</id>

+      <default>0xE0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>PEC</default>

+    </attribute>

+    <child_id>phb3</child_id>

+    <child_id>phb4</child_id>

+    <child_id>phb5</child_id>

+    <instance_name>pec2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-pec-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>perv1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv12</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>12</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv12</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv13</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>13</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv13</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv14</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>14</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv14</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv15</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>15</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv15</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv16</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>16</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv16</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv17</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>17</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv17</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv18</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>18</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv18</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv19</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>19</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv19</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv20</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>20</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv20</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv21</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>21</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv21</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv3</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv32</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>32</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv32</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv33</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>33</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv33</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv34</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>34</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv34</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv35</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>35</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv35</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv36</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>36</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv36</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv37</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>37</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv37</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv38</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>38</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv38</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv39</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>39</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv39</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv4</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>4</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv4</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv40</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>40</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv40</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv41</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>41</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv41</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv42</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>42</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv42</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv43</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>43</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv43</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv44</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>44</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv44</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv45</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>45</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv45</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv46</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>46</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv46</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv47</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>47</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv47</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv48</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>48</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv48</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv49</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>49</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv49</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv5</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>5</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv5</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv50</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>50</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv50</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv51</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>51</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv51</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv52</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>52</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv52</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv53</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>53</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv53</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv54</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>54</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv54</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv55</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>55</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv55</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv6</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>6</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv6</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv7</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>7</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv7</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv8</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv8</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>perv9</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>9</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>perv9</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-perv-power9</parent>

+    <position>-1</position>

+    <type>unit-perv-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>phb0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>phb0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-phb-power9</parent>

+    <position>-1</position>

+    <type>unit-phb-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>phb1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>phb1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-phb-power9</parent>

+    <position>-1</position>

+    <type>unit-phb-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>phb2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>phb2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-phb-power9</parent>

+    <position>-1</position>

+    <type>unit-phb-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>phb3</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>phb3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-phb-power9</parent>

+    <position>-1</position>

+    <type>unit-phb-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>phb4</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>4</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>phb4</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-phb-power9</parent>

+    <position>-1</position>

+    <type>unit-phb-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>phb5</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>5</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>phb5</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-phb-power9</parent>

+    <position>-1</position>

+    <type>unit-phb-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe10</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>10</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe10</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe11</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>11</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe11</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe12</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>12</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe12</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe13</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>13</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe13</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe20</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>20</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe20</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe21</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>21</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe21</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe22</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>22</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe22</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe23</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>23</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe23</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe24</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>24</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe24</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe25</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>25</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe25</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe30</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>30</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe30</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe31</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>31</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe31</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe32</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>32</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe32</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe33</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>33</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe33</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe34</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>34</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe34</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe35</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>35</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe35</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe40</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>40</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe40</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe41</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>41</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe41</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe42</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>42</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe42</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe43</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>43</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe43</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe45</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>45</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe45</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>ppe50</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>50</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>ppe50</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ppe-power9</parent>

+    <position>-1</position>

+    <type>unit-ppe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>proc_fru_assoc</id>

+    <attribute>

+      <id>ASSOCIATION_TYPE</id>

+      <default>FRU</default>

+    </attribute>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>LOGICAL_ASSOCIATION</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>IN</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>proc_fru_assoc</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-logic_assoc-generic</type>

+  </targetPart>

+  <targetPart>

+    <id>psi-slave</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>PSI</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>IN</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>psi-slave</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-psi-slave</type>

+  </targetPart>

+  <targetPart>

+    <id>sbe</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>sbe</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-sbe-power9</parent>

+    <position>-1</position>

+    <type>unit-sbe-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>spi-master</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>SPI</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>SPI_ENGINE</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>SPI_PORT</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>spi-master</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-spi-master</type>

+  </targetPart>

+  <targetPart>

+    <id>xbus0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>xbus0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-xbus-power9</parent>

+    <position>-1</position>

+    <type>unit-xbus-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>xbus1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>xbus1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-xbus-power9</parent>

+    <position>-1</position>

+    <type>unit-xbus-cumulus</type>

+  </targetPart>

+  <targetPart>

+    <id>xbus2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>CUMULUS</default>

+    </attribute>

+    <instance_name>xbus2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-xbus-power9</parent>

+    <position>-1</position>

+    <type>unit-xbus-cumulus</type>

+  </targetPart>

+</partInstance>

diff --git a/xml/parts/module-module-turismo.xml b/xml/parts/module-module-turismo.xml
new file mode 100644
index 0000000..5e69a77
--- /dev/null
+++ b/xml/parts/module-module-turismo.xml
@@ -0,0 +1,2130 @@
+<partInstance>

+  <targetPart>

+    <id>E0_x16</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default>0xFFFF</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>16</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>0</default>

+    </attribute>

+    <instance_name>E0_x16</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power8</parent>

+    <position>-1</position>

+    <type>unit-pci-venice</type>

+  </targetPart>

+  <targetPart>

+    <id>E0_x16:E1_x16</id>

+    <attribute>

+      <id>IO_CONFIG_NUM</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>PCI_CONFIG</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_CONFIG_NUM</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SWAP_TABLE</id>

+      <default>

+		000,010,001,011,111,101,110,100,

+		000,010,001,011,110,101,110,100

+		 </default>

+    </attribute>

+    <child_id>E0_x16</child_id>

+    <child_id>E1_x16</child_id>

+    <instance_name>E0_x16:E1_x16</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-pciconfig0-venice</type>

+  </targetPart>

+  <targetPart>

+    <id>E0_x16:E1_x8x8</id>

+    <attribute>

+      <id>IO_CONFIG_NUM</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>PCI_CONFIG</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_CONFIG_NUM</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SWAP_TABLE</id>

+      <default>

+		000,010,001,011,111,101,110,100,

+		000,010,001,011,000,010,001,011

+		 </default>

+    </attribute>

+    <child_id>E0_x16</child_id>

+    <child_id>E1_CLK0_x8</child_id>

+    <child_id>E1_CLK1_x8</child_id>

+    <instance_name>E0_x16:E1_x8x8</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-pciconfig1-venice</type>

+  </targetPart>

+  <targetPart>

+    <id>E1_CLK0_x8</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default>0xFF00</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>1</default>

+    </attribute>

+    <instance_name>E1_CLK0_x8</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power8</parent>

+    <position>-1</position>

+    <type>unit-pci-venice</type>

+  </targetPart>

+  <targetPart>

+    <id>E1_CLK1_x8</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default>0x00FF</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>2</default>

+    </attribute>

+    <instance_name>E1_CLK1_x8</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power8</parent>

+    <position>-1</position>

+    <type>unit-pci-venice</type>

+  </targetPart>

+  <targetPart>

+    <id>E1_x16</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default>0xFFFF</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>16</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>1</default>

+    </attribute>

+    <instance_name>E1_x16</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power8</parent>

+    <position>-1</position>

+    <type>unit-pci-venice</type>

+  </targetPart>

+  <targetPart>

+    <id>abus-0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <instance_name>abus-0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-abus-power8</parent>

+    <position>-1</position>

+    <type>unit-abus-venice</type>

+  </targetPart>

+  <targetPart>

+    <id>abus-1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <instance_name>abus-1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-abus-power8</parent>

+    <position>-1</position>

+    <type>unit-abus-venice</type>

+  </targetPart>

+  <targetPart>

+    <id>abus-2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <instance_name>abus-2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-abus-power8</parent>

+    <position>-1</position>

+    <type>unit-abus-venice</type>

+  </targetPart>

+  <targetPart>

+    <id>capp-0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <instance_name>capp-0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-capp-power8</parent>

+    <position>-1</position>

+    <type>unit-capp-venice</type>

+  </targetPart>

+  <targetPart>

+    <id>core-0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <hidden_child_id>cpucore_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_func_sensor</hidden_child_id>

+    <hidden_child_id>cpucore_freq_sensor</hidden_child_id>

+    <instance_name>core-0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-core-power8</parent>

+    <position>-1</position>

+    <type>unit-core-venice</type>

+  </targetPart>

+  <targetPart>

+    <id>cpu_func_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0x03</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Func</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default>0x07,0x08,0x0b,0x0a,0x0b</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x6F</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0x07</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>cpu_func_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>cpu_temp_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0x03</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Temp</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>cpu_temp_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>cpucore_freq_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD0</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Freq</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC1</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>cpucore_freq_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>cpucore_func_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD0</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Func</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default>0x07,0x08,0x0b,0x0a,0x0b</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x6F</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0x07</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>cpucore_func_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>cpucore_temp_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD0</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Temp</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>cpucore_temp_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>ex-1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <child_id>core-0</child_id>

+    <instance_name>ex-1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ex-power8</parent>

+    <position>-1</position>

+    <type>unit-ex-venice</type>

+  </targetPart>

+  <targetPart>

+    <id>ex-10</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>10</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <child_id>core-0</child_id>

+    <instance_name>ex-10</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ex-power8</parent>

+    <position>-1</position>

+    <type>unit-ex-venice</type>

+  </targetPart>

+  <targetPart>

+    <id>ex-11</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>11</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <child_id>core-0</child_id>

+    <instance_name>ex-11</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ex-power8</parent>

+    <position>-1</position>

+    <type>unit-ex-venice</type>

+  </targetPart>

+  <targetPart>

+    <id>ex-12</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>12</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <child_id>core-0</child_id>

+    <instance_name>ex-12</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ex-power8</parent>

+    <position>-1</position>

+    <type>unit-ex-venice</type>

+  </targetPart>

+  <targetPart>

+    <id>ex-13</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>13</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <child_id>core-0</child_id>

+    <instance_name>ex-13</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ex-power8</parent>

+    <position>-1</position>

+    <type>unit-ex-venice</type>

+  </targetPart>

+  <targetPart>

+    <id>ex-14</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>14</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <child_id>core-0</child_id>

+    <instance_name>ex-14</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ex-power8</parent>

+    <position>-1</position>

+    <type>unit-ex-venice</type>

+  </targetPart>

+  <targetPart>

+    <id>ex-2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <child_id>core-0</child_id>

+    <instance_name>ex-2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ex-power8</parent>

+    <position>-1</position>

+    <type>unit-ex-venice</type>

+  </targetPart>

+  <targetPart>

+    <id>ex-3</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <child_id>core-0</child_id>

+    <instance_name>ex-3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ex-power8</parent>

+    <position>-1</position>

+    <type>unit-ex-venice</type>

+  </targetPart>

+  <targetPart>

+    <id>ex-4</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>4</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <child_id>core-0</child_id>

+    <instance_name>ex-4</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ex-power8</parent>

+    <position>-1</position>

+    <type>unit-ex-venice</type>

+  </targetPart>

+  <targetPart>

+    <id>ex-5</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>5</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <child_id>core-0</child_id>

+    <instance_name>ex-5</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ex-power8</parent>

+    <position>-1</position>

+    <type>unit-ex-venice</type>

+  </targetPart>

+  <targetPart>

+    <id>ex-6</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>6</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <child_id>core-0</child_id>

+    <instance_name>ex-6</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ex-power8</parent>

+    <position>-1</position>

+    <type>unit-ex-venice</type>

+  </targetPart>

+  <targetPart>

+    <id>ex-9</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>9</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <child_id>core-0</child_id>

+    <instance_name>ex-9</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-ex-power8</parent>

+    <position>-1</position>

+    <type>unit-ex-venice</type>

+  </targetPart>

+  <targetPart>

+    <id>fsi-cm-0</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>FSICM</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>CMFSI</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>FSI_ENGINE</id>

+      <default>0x0C</default>

+    </attribute>

+    <attribute>

+      <id>FSI_LINK</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>FSI_PORT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>FSICM</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>FSI</default>

+    </attribute>

+    <instance_name>fsi-cm-0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-fsi-membuf</type>

+  </targetPart>

+  <targetPart>

+    <id>fsi-cm-1</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>FSICM</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>CMFSI</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>FSI_ENGINE</id>

+      <default>0x0C</default>

+    </attribute>

+    <attribute>

+      <id>FSI_LINK</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>FSI_PORT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>FSICM</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>FSI</default>

+    </attribute>

+    <instance_name>fsi-cm-1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-fsi-membuf</type>

+  </targetPart>

+  <targetPart>

+    <id>fsi-cm-2</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>FSICM</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>CMFSI</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>FSI_ENGINE</id>

+      <default>0x0C</default>

+    </attribute>

+    <attribute>

+      <id>FSI_LINK</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>FSI_PORT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>FSICM</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>FSI</default>

+    </attribute>

+    <instance_name>fsi-cm-2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-fsi-membuf</type>

+  </targetPart>

+  <targetPart>

+    <id>fsi-cm-3</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>FSICM</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>CMFSI</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>FSI_ENGINE</id>

+      <default>0x0C</default>

+    </attribute>

+    <attribute>

+      <id>FSI_LINK</id>

+      <default>0x03</default>

+    </attribute>

+    <attribute>

+      <id>FSI_PORT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>FSICM</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>FSI</default>

+    </attribute>

+    <instance_name>fsi-cm-3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-fsi-membuf</type>

+  </targetPart>

+  <targetPart>

+    <id>fsi-slave-0</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>FSIM</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>IN</default>

+    </attribute>

+    <attribute>

+      <id>FSI_ENGINE</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>FSI_LINK</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>FSI_PORT</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <attribute>

+      <id>RESOURCE_IS_CRITICAL</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>FSI</default>

+    </attribute>

+    <instance_name>fsi-slave-0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-fsi-slave</type>

+  </targetPart>

+  <targetPart>

+    <id>fsim-0</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>FSIM</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>CMFSI</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>FSI_ENGINE</id>

+      <default>0x0D</default>

+    </attribute>

+    <attribute>

+      <id>FSI_LINK</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>FSI_PORT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>FSIM</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>FSI</default>

+    </attribute>

+    <instance_name>fsim-0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-fsi-proc</type>

+  </targetPart>

+  <targetPart>

+    <id>fsim-1</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>FSIM</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>CMFSI</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>FSI_ENGINE</id>

+      <default>0x0D</default>

+    </attribute>

+    <attribute>

+      <id>FSI_LINK</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>FSI_PORT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>FSIM</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>FSI</default>

+    </attribute>

+    <instance_name>fsim-1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-fsi-proc</type>

+  </targetPart>

+  <targetPart>

+    <id>fsim-2</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>FSIM</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>CMFSI</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>FSI_ENGINE</id>

+      <default>0x0D</default>

+    </attribute>

+    <attribute>

+      <id>FSI_LINK</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>FSI_PORT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>FSIM</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>FSI</default>

+    </attribute>

+    <instance_name>fsim-2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-fsi-proc</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-hotplug</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-hotplug</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-master-lightpath</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>OUT</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-master-lightpath</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-master</type>

+  </targetPart>

+  <targetPart>

+    <id>i2c-slave</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>I2C</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>IN</default>

+    </attribute>

+    <attribute>

+      <id>I2C_ADDRESS</id>

+    </attribute>

+    <attribute>

+      <id>I2C_ENGINE</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>I2C_PORT</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>i2c-slave</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-i2c-slave</type>

+  </targetPart>

+  <targetPart>

+    <id>lpc-slave</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>LPC</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>IN</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>lpc-slave</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-lpc-slave</type>

+  </targetPart>

+  <targetPart>

+    <id>mcs-0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <attribute>

+      <id>SCHEMATIC_INTERFACE</id>

+      <default>M0 DMI D</default>

+    </attribute>

+    <instance_name>mcs-0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-mcs-power8</parent>

+    <position>-1</position>

+    <type>unit-mcs-venice</type>

+  </targetPart>

+  <targetPart>

+    <id>mcs-1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <attribute>

+      <id>SCHEMATIC_INTERFACE</id>

+      <default>M0 DMI C</default>

+    </attribute>

+    <instance_name>mcs-1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-mcs-power8</parent>

+    <position>-1</position>

+    <type>unit-mcs-venice</type>

+  </targetPart>

+  <targetPart>

+    <id>mcs-2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <attribute>

+      <id>SCHEMATIC_INTERFACE</id>

+      <default>M1 DMI A</default>

+    </attribute>

+    <instance_name>mcs-2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-mcs-power8</parent>

+    <position>-1</position>

+    <type>unit-mcs-venice</type>

+  </targetPart>

+  <targetPart>

+    <id>mcs-3</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <attribute>

+      <id>SCHEMATIC_INTERFACE</id>

+      <default>M1 DMI B</default>

+    </attribute>

+    <instance_name>mcs-3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-mcs-power8</parent>

+    <position>-1</position>

+    <type>unit-mcs-venice</type>

+  </targetPart>

+  <targetPart>

+    <id>mcs-4</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>4</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <attribute>

+      <id>SCHEMATIC_INTERFACE</id>

+      <default>M1 DMI D</default>

+    </attribute>

+    <instance_name>mcs-4</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-mcs-power8</parent>

+    <position>-1</position>

+    <type>unit-mcs-venice</type>

+  </targetPart>

+  <targetPart>

+    <id>mcs-5</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>5</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <attribute>

+      <id>SCHEMATIC_INTERFACE</id>

+      <default>M1 DMI C</default>

+    </attribute>

+    <instance_name>mcs-5</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-mcs-power8</parent>

+    <position>-1</position>

+    <type>unit-mcs-venice</type>

+  </targetPart>

+  <targetPart>

+    <id>mcs-6</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>6</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <attribute>

+      <id>SCHEMATIC_INTERFACE</id>

+      <default>M0 DMI C</default>

+    </attribute>

+    <instance_name>mcs-6</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-mcs-power8</parent>

+    <position>-1</position>

+    <type>unit-mcs-venice</type>

+  </targetPart>

+  <targetPart>

+    <id>mcs-7</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>7</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <attribute>

+      <id>SCHEMATIC_INTERFACE</id>

+      <default>M0 DMI C</default>

+    </attribute>

+    <instance_name>mcs-7</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-mcs-power8</parent>

+    <position>-1</position>

+    <type>unit-mcs-venice</type>

+  </targetPart>

+  <targetPart>

+    <id>module-module-turismo</id>

+    <attribute>

+      <id>POSITION</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <child_id>proc</child_id>

+    <instance_name>module</instance_name>

+    <is_root>true</is_root>

+    <parent>card</parent>

+    <parent_type>socket-proc_socket-50mm</parent_type>

+    <position>0</position>

+    <type>module-module-turismo</type>

+  </targetPart>

+  <targetPart>

+    <id>nx-0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <instance_name>nx-0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-nx-power8</parent>

+    <position>-1</position>

+    <type>unit-nx-venice</type>

+  </targetPart>

+  <targetPart>

+    <id>occ-0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>FRU_ID</id>

+    </attribute>

+    <attribute>

+      <id>FRU_NAME</id>

+    </attribute>

+    <attribute>

+      <id>IPMI_INSTANCE</id>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>POWER8</default>

+    </attribute>

+    <attribute>

+      <id>OCC_MASTER_CAPABLE</id>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>OCC</default>

+    </attribute>

+    <hidden_child_id>occ_active_sensor</hidden_child_id>

+    <instance_name>occ-0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>occ</type>

+  </targetPart>

+  <targetPart>

+    <id>occ_active_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0xD2</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>OCC_Active_Sensor</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default>0x00,0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x09</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0x07</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>occ_active_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>pci-0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>16</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>0</default>

+    </attribute>

+    <instance_name>pci-0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power8</parent>

+    <position>-1</position>

+    <type>unit-pci-venice</type>

+  </targetPart>

+  <targetPart>

+    <id>pci-1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>16</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>0</default>

+    </attribute>

+    <instance_name>pci-1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power8</parent>

+    <position>-1</position>

+    <type>unit-pci-venice</type>

+  </targetPart>

+  <targetPart>

+    <id>pci-2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>16</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>0</default>

+    </attribute>

+    <instance_name>pci-2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power8</parent>

+    <position>-1</position>

+    <type>unit-pci-venice</type>

+  </targetPart>

+  <targetPart>

+    <id>pci-3</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>ENABLE_CAPI</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>IOP_NUM</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_MASK</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PCIE_LANE_SET</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PCIE_NUM_LANES</id>

+      <default>16</default>

+    </attribute>

+    <attribute>

+      <id>PHB_NUM</id>

+      <default>0</default>

+    </attribute>

+    <instance_name>pci-3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pci-power8</parent>

+    <position>-1</position>

+    <type>unit-pci-venice</type>

+  </targetPart>

+  <targetPart>

+    <id>pci_configs</id>

+    <attribute>

+      <id>IO_CONFIG_SELECT</id>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>PCI_CONFIGS</default>

+    </attribute>

+    <child_id>E0_x16:E1_x16</child_id>

+    <child_id>E0_x16:E1_x8x8</child_id>

+    <instance_name>pci_configs</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-pciconfigs-venice</type>

+  </targetPart>

+  <targetPart>

+    <id>pore-0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <instance_name>pore-0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-pore-power8</parent>

+    <position>-1</position>

+    <type>unit-pore-venice</type>

+  </targetPart>

+  <targetPart>

+    <id>proc</id>

+    <attribute>

+      <id>EEPROM_SBE_BACKUP_INFO</id>

+      <default>

+        <id>field</id>

+        <byteAddrOffset>

+          <value>0x02</value>

+        </byteAddrOffset>

+        <devAddr>

+          <value>0xA2</value>

+        </devAddr>

+        <engine>

+          <value>0</value>

+        </engine>

+        <i2cMasterPath>

+          <value>physical:sys-0/node-0/proc-0</value>

+        </i2cMasterPath>

+        <maxMemorySizeKB>

+          <value>0x40</value>

+        </maxMemorySizeKB>

+        <port>

+          <value>1</value>

+        </port>

+        <writeCycleTime>

+          <value>0x05</value>

+        </writeCycleTime>

+        <writePageSize>

+          <value>0x80</value>

+        </writePageSize>

+      </default>

+    </attribute>

+    <attribute>

+      <id>EEPROM_SBE_PRIMARY_INFO</id>

+      <default>

+        <id>field</id>

+        <byteAddrOffset>

+          <value>0x02</value>

+        </byteAddrOffset>

+        <devAddr>

+          <value>0xA2</value>

+        </devAddr>

+        <engine>

+          <value>0</value>

+        </engine>

+        <i2cMasterPath>

+          <value>physical:sys-0/node-0/proc-0</value>

+        </i2cMasterPath>

+        <maxMemorySizeKB>

+          <value>0x40</value>

+        </maxMemorySizeKB>

+        <port>

+          <value>0</value>

+        </port>

+        <writeCycleTime>

+          <value>0x05</value>

+        </writeCycleTime>

+        <writePageSize>

+          <value>0x80</value>

+        </writePageSize>

+      </default>

+    </attribute>

+    <attribute>

+      <id>EEPROM_VPD_BACKUP_INFO</id>

+      <default>

+        <id>field</id>

+        <byteAddrOffset>

+          <value>0x02</value>

+        </byteAddrOffset>

+        <devAddr>

+          <value>0xA0</value>

+        </devAddr>

+        <engine>

+          <value>0</value>

+        </engine>

+        <i2cMasterPath>

+          <value>physical:sys-0/node-0/proc-0</value>

+        </i2cMasterPath>

+        <maxMemorySizeKB>

+          <value>0x40</value>

+        </maxMemorySizeKB>

+        <port>

+          <value>1</value>

+        </port>

+        <writeCycleTime>

+          <value>0x05</value>

+        </writeCycleTime>

+        <writePageSize>

+          <value>0x80</value>

+        </writePageSize>

+      </default>

+    </attribute>

+    <attribute>

+      <id>EEPROM_VPD_PRIMARY_INFO</id>

+      <default>

+        <id>field</id>

+        <byteAddrOffset>

+          <value>0x02</value>

+        </byteAddrOffset>

+        <devAddr>

+          <value>0xA0</value>

+        </devAddr>

+        <engine>

+          <value>0</value>

+        </engine>

+        <i2cMasterPath>

+          <value>physical:sys-0/node-0/proc-0</value>

+        </i2cMasterPath>

+        <maxMemorySizeKB>

+          <value>0x40</value>

+        </maxMemorySizeKB>

+        <port>

+          <value>0</value>

+        </port>

+        <writeCycleTime>

+          <value>0x05</value>

+        </writeCycleTime>

+        <writePageSize>

+          <value>0x80</value>

+        </writePageSize>

+      </default>

+    </attribute>

+    <attribute>

+      <id>FRU_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>FRU_NAME</id>

+    </attribute>

+    <attribute>

+      <id>FSP_BASE_ADDR</id>

+      <default>0,0x0000000000000000</default>

+    </attribute>

+    <attribute>

+      <id>I2C_BUS_SPEED_ARRAY</id>

+      <default>1000,1000,0,0,0,0</default>

+    </attribute>

+    <attribute>

+      <id>IBSCOM_PROC_BASE_ADDR</id>

+      <default>1,0x0003E00000000000,0x40000000000,0x10000000000,0</default>

+    </attribute>

+    <attribute>

+      <id>INTP_BASE_ADDR</id>

+      <default>1,0x0003FFFF80000000,0x400000,0x100000,0</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_INSTANCE</id>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <attribute>

+      <id>MSS_INTERLEAVE_ENABLE</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PCI_BASE_ADDRS_32</id>

+      <default>4,0x0003FF8000000000,0x800000000,0x200000000,0x80000000

+			</default>

+    </attribute>

+    <attribute>

+      <id>PCI_BASE_ADDRS_64</id>

+      <default>4,0x0003D00000000000,0x10000000000,0x4000000000,0x1000000000

+			</default>

+    </attribute>

+    <attribute>

+      <id>PHB_BASE_ADDRS</id>

+      <default>4,0x0003FFFE40000000,0x1000000,0x400000,0x100000</default>

+    </attribute>

+    <attribute>

+      <id>PM_APSS_CHIP_SELECT</id>

+      <default>0x00</default>

+    </attribute>

+    <attribute>

+      <id>PM_PBAX_BRDCST_ID_VECTOR</id>

+      <default>0x0</default>

+    </attribute>

+    <attribute>

+      <id>PM_PBAX_CHIPID</id>

+      <default>0x0</default>

+    </attribute>

+    <attribute>

+      <id>PM_PBAX_NODEID</id>

+      <default>0x0</default>

+    </attribute>

+    <attribute>

+      <id>PM_SLEEP_ENTRY</id>

+      <default>0x0</default>

+    </attribute>

+    <attribute>

+      <id>PM_SLEEP_EXIT</id>

+      <default>0x0</default>

+    </attribute>

+    <attribute>

+      <id>PM_SLEEP_TYPE</id>

+      <default>0x0</default>

+    </attribute>

+    <attribute>

+      <id>PM_SPIVID_PORT_ENABLE</id>

+      <default>0x4</default>

+    </attribute>

+    <attribute>

+      <id>PM_UNDERVOLTING_FREQ_MAXIMUM</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PM_UNDERVOLTING_FRQ_MINIMUM</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PM_WINKLE_ENTRY</id>

+      <default>0x0</default>

+    </attribute>

+    <attribute>

+      <id>PM_WINKLE_EXIT</id>

+      <default>0x0</default>

+    </attribute>

+    <attribute>

+      <id>PM_WINKLE_TYPE</id>

+      <default>0x0</default>

+    </attribute>

+    <attribute>

+      <id>POSITION</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PROC_DCM_INSTALLED</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PROC_R_DISTLOSS_VCS</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PROC_R_DISTLOSS_VDD</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PROC_R_LOADLINE_VCS</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PROC_R_LOADLINE_VDD</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PROC_VRM_VOFFSET_VCS</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PROC_VRM_VOFFSET_VDD</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PSI_BRIDGE_BASE_ADDR</id>

+      <default>0,0x0000000000000000</default>

+    </attribute>

+    <attribute>

+      <id>RNG_BASE_ADDR</id>

+      <default>1,0x0003FFFF40000000,0x4000,0x1000,0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>PROC</default>

+    </attribute>

+    <child_id>ex-1</child_id>

+    <child_id>ex-2</child_id>

+    <child_id>ex-3</child_id>

+    <child_id>ex-4</child_id>

+    <child_id>ex-5</child_id>

+    <child_id>ex-6</child_id>

+    <child_id>ex-9</child_id>

+    <child_id>ex-10</child_id>

+    <child_id>ex-11</child_id>

+    <child_id>ex-12</child_id>

+    <child_id>ex-13</child_id>

+    <child_id>ex-14</child_id>

+    <child_id>pore-0</child_id>

+    <child_id>capp-0</child_id>

+    <child_id>nx-0</child_id>

+    <child_id>occ-0</child_id>

+    <child_id>pci_configs</child_id>

+    <child_id>abus-0</child_id>

+    <child_id>abus-1</child_id>

+    <child_id>abus-2</child_id>

+    <child_id>mcs-0</child_id>

+    <child_id>mcs-1</child_id>

+    <child_id>mcs-4</child_id>

+    <child_id>mcs-5</child_id>

+    <child_id>fsi-slave-0</child_id>

+    <child_id>fsi-cm-0</child_id>

+    <child_id>fsi-cm-1</child_id>

+    <child_id>fsi-cm-2</child_id>

+    <child_id>fsi-cm-3</child_id>

+    <child_id>fsim-0</child_id>

+    <child_id>fsim-1</child_id>

+    <child_id>fsim-2</child_id>

+    <child_id>i2c-slave</child_id>

+    <child_id>i2c-master-lightpath</child_id>

+    <child_id>i2c-master-hotplug</child_id>

+    <child_id>lpc-slave</child_id>

+    <child_id>proc_fru_assoc</child_id>

+    <hidden_child_id>pci-0</hidden_child_id>

+    <hidden_child_id>pci-1</hidden_child_id>

+    <hidden_child_id>pci-2</hidden_child_id>

+    <hidden_child_id>pci-3</hidden_child_id>

+    <hidden_child_id>xbus-0</hidden_child_id>

+    <hidden_child_id>xbus-1</hidden_child_id>

+    <hidden_child_id>xbus-2</hidden_child_id>

+    <hidden_child_id>xbus-3</hidden_child_id>

+    <hidden_child_id>mcs-2</hidden_child_id>

+    <hidden_child_id>mcs-3</hidden_child_id>

+    <hidden_child_id>mcs-6</hidden_child_id>

+    <hidden_child_id>mcs-7</hidden_child_id>

+    <hidden_child_id>cpu_temp_sensor</hidden_child_id>

+    <hidden_child_id>cpu_func_sensor</hidden_child_id>

+    <instance_name>proc</instance_name>

+    <is_root>false</is_root>

+    <parent>chip</parent>

+    <position>-1</position>

+    <type>chip-processor-venice</type>

+  </targetPart>

+  <targetPart>

+    <id>proc_fru_assoc</id>

+    <attribute>

+      <id>ASSOCIATION_TYPE</id>

+      <default>FRU</default>

+    </attribute>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>LOGICAL_ASSOCIATION</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>IN</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>proc_fru_assoc</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-logic_assoc-generic</type>

+  </targetPart>

+  <targetPart>

+    <id>xbus-0</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <instance_name>xbus-0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-xbus-power8</parent>

+    <position>-1</position>

+    <type>unit-xbus-venice</type>

+  </targetPart>

+  <targetPart>

+    <id>xbus-1</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <instance_name>xbus-1</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-xbus-power8</parent>

+    <position>-1</position>

+    <type>unit-xbus-venice</type>

+  </targetPart>

+  <targetPart>

+    <id>xbus-2</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <instance_name>xbus-2</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-xbus-power8</parent>

+    <position>-1</position>

+    <type>unit-xbus-venice</type>

+  </targetPart>

+  <targetPart>

+    <id>xbus-3</id>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>3</default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>VENICE</default>

+    </attribute>

+    <instance_name>xbus-3</instance_name>

+    <is_root>false</is_root>

+    <parent>unit-xbus-power8</parent>

+    <position>-1</position>

+    <type>unit-xbus-venice</type>

+  </targetPart>

+</partInstance>

diff --git a/xml/parts/slot-pcieslot-generic.xml b/xml/parts/slot-pcieslot-generic.xml
new file mode 100644
index 0000000..5aa116b
--- /dev/null
+++ b/xml/parts/slot-pcieslot-generic.xml
@@ -0,0 +1,13 @@
+<partInstance>

+  <targetPart>

+		<id>slot-pcieslot-generic</id>

+		<parent>slot-pcieslot</parent>

+		<parent_type>card-motherboard</parent_type>

+		<parent_type>card-daughtercard</parent_type>

+	    <instance_name>pciecard</instance_name>

+   		<is_root>true</is_root>

+        <position>0</position>

+        <type>slot-pcieslot-generic</type>

+  </targetPart>

+</partInstance>

+	
\ No newline at end of file
diff --git a/xml/parts/smartchip-generic.xml b/xml/parts/smartchip-generic.xml
new file mode 100644
index 0000000..5e1d65c
--- /dev/null
+++ b/xml/parts/smartchip-generic.xml
@@ -0,0 +1,64 @@
+<partInstance>

+  <targetPart>

+    <id>io-0</id>

+    <attribute>

+      <id>BUS_TYPE</id>

+      <default>GPIO</default>

+    </attribute>

+    <attribute>

+      <id>CHIP_UNIT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>DIRECTION</id>

+      <default>INOUT</default>

+    </attribute>

+    <attribute>

+      <id>DRIVER_TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <attribute>

+      <id>GPIO_TYPE</id>

+      <default>GENERIC_OUTPUT</default>

+    </attribute>

+    <attribute>

+      <id>PIN_NAME</id>

+    </attribute>

+    <attribute>

+      <id>POR_VALUE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>SCHEMATIC_INTERFACE</id>

+      <default>IO0</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>io-0</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-gpio-generic</type>

+  </targetPart>

+  <targetPart>

+    <id>smartchip-generic</id>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>SMARTCHIP</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <child_id>io-0</child_id>

+    <instance_name>anchor</instance_name>

+    <is_root>true</is_root>

+    <parent>chip</parent>

+    <parent_type>card-motherboard</parent_type>

+    <parent_type>card-daughtercard</parent_type>

+    <position>0</position>

+    <type>smartchip-generic</type>

+  </targetPart>

+</partInstance>

diff --git a/xml/parts/socket-proc_socket-50mm.xml b/xml/parts/socket-proc_socket-50mm.xml
new file mode 100644
index 0000000..b104558
--- /dev/null
+++ b/xml/parts/socket-proc_socket-50mm.xml
@@ -0,0 +1,103 @@
+<partInstance>

+  <targetPart>

+    <id>socket-proc_socket-50mm</id>

+    <attribute>

+      <id>FABRIC_CHIP_ID</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>FABRIC_NODE_ID</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PROC_PCIE_IOP_CONFIG</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>PROC_PCIE_IOP_G2_PLL_CONTROL0</id>

+      <default>0x000018F4,0x000018F4

+			</default>

+    </attribute>

+    <attribute>

+      <id>PROC_PCIE_IOP_G3_PLL_CONTROL0</id>

+      <default>0x0000086C,0x0000086C

+			</default>

+    </attribute>

+    <attribute>

+      <id>PROC_PCIE_IOP_PCS_CONTROL0</id>

+      <default>0x00003AE8,0x00003AE8

+			</default>

+    </attribute>

+    <attribute>

+      <id>PROC_PCIE_IOP_PCS_CONTROL1</id>

+      <default>0x00005CB9,0x00005CB9

+			</default>

+    </attribute>

+    <attribute>

+      <id>PROC_PCIE_IOP_PLL_GLOBAL_CONTROL0</id>

+      <default>0x00000146,0x00000146

+			</default>

+    </attribute>

+    <attribute>

+      <id>PROC_PCIE_IOP_PLL_GLOBAL_CONTROL1</id>

+      <default>0x000006D7,0x000006D7

+			</default>

+    </attribute>

+    <attribute>

+      <id>PROC_PCIE_IOP_RX_PEAK</id>

+      <default>0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B

+			</default>

+    </attribute>

+    <attribute>

+      <id>PROC_PCIE_IOP_RX_SDL</id>

+      <default>0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A

+			</default>

+    </attribute>

+    <attribute>

+      <id>PROC_PCIE_IOP_RX_VGA_CONTROL2</id>

+      <default>0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451

+			</default>

+    </attribute>

+    <attribute>

+      <id>PROC_PCIE_IOP_TX_BWLOSS1</id>

+      <default>0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000

+			</default>

+    </attribute>

+    <attribute>

+      <id>PROC_PCIE_IOP_TX_FFE_GEN1</id>

+      <default>0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0

+			</default>

+    </attribute>

+    <attribute>

+      <id>PROC_PCIE_IOP_TX_FFE_GEN2</id>

+      <default>0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400

+			</default>

+    </attribute>

+    <attribute>

+      <id>PROC_PCIE_IOP_TX_FIFO_OFFSET</id>

+      <default>0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294

+			</default>

+    </attribute>

+    <attribute>

+      <id>PROC_PCIE_IOP_TX_RCVRDETCNTL</id>

+      <default>0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151

+			</default>

+    </attribute>

+    <attribute>

+      <id>PROC_PCIE_IOP_ZCAL_CONTROL</id>

+      <default>0x00000080,0x00000080

+			</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>socket</instance_name>

+    <is_root>true</is_root>

+    <parent>connector</parent>

+    <parent_type>card-motherboard</parent_type>

+    <parent_type>card-daughtercard</parent_type>

+    <position>-1</position>

+    <type>socket-proc_socket-50mm</type>

+  </targetPart>

+</partInstance>

diff --git a/xml/parts/socket-proc_socket-68mm.xml b/xml/parts/socket-proc_socket-68mm.xml
new file mode 100644
index 0000000..29ebad5
--- /dev/null
+++ b/xml/parts/socket-proc_socket-68mm.xml
@@ -0,0 +1,103 @@
+<partInstance>

+  <targetPart>

+    <id>socket-proc_socket-68mm</id>

+    <attribute>

+      <id>FABRIC_CHIP_ID</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>FABRIC_NODE_ID</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PROC_PCIE_IOP_CONFIG</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>PROC_PCIE_IOP_G2_PLL_CONTROL0</id>

+      <default>0x000018F4,0x000018F4

+			</default>

+    </attribute>

+    <attribute>

+      <id>PROC_PCIE_IOP_G3_PLL_CONTROL0</id>

+      <default>0x0000086C,0x0000086C

+			</default>

+    </attribute>

+    <attribute>

+      <id>PROC_PCIE_IOP_PCS_CONTROL0</id>

+      <default>0x00003AE8,0x00003AE8

+			</default>

+    </attribute>

+    <attribute>

+      <id>PROC_PCIE_IOP_PCS_CONTROL1</id>

+      <default>0x00005CB9,0x00005CB9

+			</default>

+    </attribute>

+    <attribute>

+      <id>PROC_PCIE_IOP_PLL_GLOBAL_CONTROL0</id>

+      <default>0x00000146,0x00000146

+			</default>

+    </attribute>

+    <attribute>

+      <id>PROC_PCIE_IOP_PLL_GLOBAL_CONTROL1</id>

+      <default>0x000006D7,0x000006D7

+			</default>

+    </attribute>

+    <attribute>

+      <id>PROC_PCIE_IOP_RX_PEAK</id>

+      <default>0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B

+			</default>

+    </attribute>

+    <attribute>

+      <id>PROC_PCIE_IOP_RX_SDL</id>

+      <default>0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A

+			</default>

+    </attribute>

+    <attribute>

+      <id>PROC_PCIE_IOP_RX_VGA_CONTROL2</id>

+      <default>0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451

+			</default>

+    </attribute>

+    <attribute>

+      <id>PROC_PCIE_IOP_TX_BWLOSS1</id>

+      <default>0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000

+			</default>

+    </attribute>

+    <attribute>

+      <id>PROC_PCIE_IOP_TX_FFE_GEN1</id>

+      <default>0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0

+			</default>

+    </attribute>

+    <attribute>

+      <id>PROC_PCIE_IOP_TX_FFE_GEN2</id>

+      <default>0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400

+			</default>

+    </attribute>

+    <attribute>

+      <id>PROC_PCIE_IOP_TX_FIFO_OFFSET</id>

+      <default>0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294

+			</default>

+    </attribute>

+    <attribute>

+      <id>PROC_PCIE_IOP_TX_RCVRDETCNTL</id>

+      <default>0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151

+			</default>

+    </attribute>

+    <attribute>

+      <id>PROC_PCIE_IOP_ZCAL_CONTROL</id>

+      <default>0x00000080,0x00000080

+			</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>socket</instance_name>

+    <is_root>true</is_root>

+    <parent>connector</parent>

+    <parent_type>card-motherboard</parent_type>

+    <parent_type>card-daughtercard</parent_type>

+    <position>-1</position>

+    <type>socket-proc_socket-68mm</type>

+  </targetPart>

+</partInstance>

diff --git a/xml/parts/sys-sys-power8.xml b/xml/parts/sys-sys-power8.xml
new file mode 100644
index 0000000..fcd0b7c
--- /dev/null
+++ b/xml/parts/sys-sys-power8.xml
@@ -0,0 +1,914 @@
+<partInstance>

+  <targetPart>

+    <id>boot_count_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0x22</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Boot_count</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x6F</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC3</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>boot_count_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>dimm_freq_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0x08</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Freq</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x6F</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC1</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>dimm_freq_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>fw_boot_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0x22</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Firmware_Boot_Progress</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default>0x01,0x03,0x13,0x14</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x6F</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0x0F</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>fw_boot_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>host_status_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0x23</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Host_Status</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x6F</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0x22</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>host_status_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>os_boot_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0x23</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>OS_Boot</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x6F</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0x1F</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>os_boot_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>pci_link_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0x23</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>PCIE_Link_Present</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default>0x00,0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x03</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC4</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>pci_link_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>power_cap_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0x17</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Power_Cap</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x6F</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC2</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>power_cap_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>power_limit_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0x15</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Power_Limit_Active</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default>0x00,0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x03</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC6</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>power_limit_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>ps_derating_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0x15</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>PS_Derating_Factor</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x6F</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC8</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>ps_derating_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>sys-sys-power8</id>

+    <attribute>

+    	<id>MRW_MCS_PREFETCH_RETRY_THRESHOLD</id>

+    	<default>0x07</default>

+    </attribute>

+    <attribute>

+    	<id>OPEN_POWER_N_PLUS_ONE_HPC_BULK_POWER_LIMIT_WATTS</id>

+    	<default>2300</default>

+    </attribute>

+    <attribute>

+      <id>ALL_MCS_IN_INTERLEAVING_GROUP</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>APSS_GPIO_PORT_MODES</id>

+      <default>0x0,0x3</default>

+    </attribute>

+    <attribute>

+      <id>APSS_GPIO_PORT_PINS</id>

+      <default>1,2,3,4,5,0,0,0,9,10,0,0,0,0,0,0</default>

+    </attribute>

+    <attribute>

+      <id>AVERAGE_IPL_TIME</id>

+    </attribute>

+    <attribute>

+      <id>A_EREPAIR_THRESHOLD_FIELD</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>A_EREPAIR_THRESHOLD_MNFG</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>BMC_FRU_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>BOOT_FREQ_MHZ</id>

+      <default>2400</default>

+    </attribute>

+    <attribute>

+      <id>CDM_POLICIES_BITMASK</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>CHECK_SCRIPT</id>

+      <default>run_checks.pl</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>SYS</default>

+    </attribute>

+    <attribute>

+      <id>DMI_EREPAIR_THRESHOLD_FIELD</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>DMI_EREPAIR_THRESHOLD_MNFG</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>EXECUTION_PLATFORM</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>FABRIC_TO_PHYSICAL_NODE_MAP</id>

+      <default>0,255,255,255,255,255,255,255</default>

+    </attribute>

+    <attribute>

+      <id>FREQ_A</id>

+      <default>6400</default>

+    </attribute>

+    <attribute>

+      <id>FREQ_CORE_MAX</id>

+      <default>4000</default>

+    </attribute>

+    <attribute>

+      <id>FREQ_MEM_REFCLOCK</id>

+      <default>133</default>

+    </attribute>

+    <attribute>

+      <id>FREQ_PB</id>

+      <default>2400</default>

+    </attribute>

+    <attribute>

+      <id>FREQ_PCIE</id>

+      <default>1000</default>

+    </attribute>

+    <attribute>

+      <id>FREQ_PROC_REFCLOCK</id>

+      <default>133</default>

+    </attribute>

+    <attribute>

+      <id>FREQ_PROC_REFCLOCK_KHZ</id>

+      <default>133333</default>

+    </attribute>

+    <attribute>

+      <id>FREQ_X</id>

+      <default>4800</default>

+    </attribute>

+    <attribute>

+      <id>FRU_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>FRU_NAME</id>

+    </attribute>

+    <attribute>

+      <id>HB_SETTINGS</id>

+      <default>

+        <id>field</id>

+        <reserved>

+          <value>0</value>

+        </reserved>

+        <traceContinuous>

+          <value>0</value>

+        </traceContinuous>

+        <traceScanDebug>

+          <value>0</value>

+        </traceScanDebug>

+      </default>

+    </attribute>

+    <attribute>

+      <id>IPMI_INSTANCE</id>

+    </attribute>

+    <attribute>

+      <id>MAX_CHIPLETS_PER_PROC</id>

+      <default>32</default>

+    </attribute>

+    <attribute>

+      <id>MAX_DIMMS_PER_MBA_PORT</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MAX_EXS_PER_PROC_CHIP</id>

+      <default>12</default>

+    </attribute>

+    <attribute>

+      <id>MAX_MBAS_PER_MEMBUF_CHIP</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MAX_MBA_PORTS_PER_MBA</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MAX_MCS_PER_SYSTEM</id>

+      <default>8</default>

+    </attribute>

+    <attribute>

+      <id>MAX_PROC_CHIPS_PER_NODE</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>MEM_MIRROR_PLACEMENT_POLICY</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MIN_FREQ_MHZ</id>

+      <default>1400</default>

+    </attribute>

+    <attribute>

+      <id>MNFG_ABUS_MIN_EYE_HEIGHT</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>MNFG_ABUS_MIN_EYE_WIDTH</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>MNFG_DMI_MIN_EYE_HEIGHT</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>MNFG_DMI_MIN_EYE_WIDTH</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>MNFG_XBUS_MIN_EYE_WIDTH</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>POWER8</default>

+    </attribute>

+    <attribute>

+      <id>MRW_CDIMM_MASTER_I2C_TEMP_SENSOR_ENABLE</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>MRW_CDIMM_SPARE_I2C_TEMP_SENSOR_ENABLE</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>MRW_DIMM_POWER_CURVE_PERCENT_UPLIFT</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MRW_DIMM_POWER_CURVE_PERCENT_UPLIFT_IDLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MRW_ENHANCED_GROUPING_NO_MIRRORING</id>

+      <default>true</default>

+    </attribute>

+    <attribute>

+      <id>MRW_MAX_DRAM_DATABUS_UTIL</id>

+      <default>5625</default>

+    </attribute>

+    <attribute>

+      <id>MRW_MBA_CACHELINE_INTERLEAVE_MODE_CONTROL</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>MRW_MEM_THROTTLE_DENOMINATOR</id>

+      <default>512</default>

+    </attribute>

+    <attribute>

+      <id>MRW_POWER_CONTROL_REQUESTED</id>

+      <default>NONE</default>

+    </attribute>

+    <attribute>

+      <id>MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_CHIP</id>

+      <default>32</default>

+    </attribute>

+    <attribute>

+      <id>MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_MBA</id>

+      <default>32</default>

+    </attribute>

+    <attribute>

+      <id>MRW_STRICT_MBA_PLUG_RULE_CHECKING</id>

+      <default>true</default>

+    </attribute>

+    <attribute>

+      <id>MRW_THERMAL_MEMORY_POWER_LIMIT</id>

+      <default>1500</default>

+    </attribute>

+    <attribute>

+      <id>MSS_DRAMINIT_RESET_DISABLE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>MSS_MBA_ADDR_INTERLEAVE_BIT</id>

+      <default>24</default>

+    </attribute>

+    <attribute>

+      <id>MSS_MBA_CACHELINE_INTERLEAVE_MODE</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>NEST_FREQ_MHZ</id>

+      <default>2400</default>

+    </attribute>

+    <attribute>

+      <id>NOMINAL_FREQ_MHZ</id>

+      <default>3000</default>

+    </attribute>

+    <attribute>

+      <id>OPAL_MODEL</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>OPEN_POWER_DIMM_ERROR_TEMP_DEG_C</id>

+      <default>96</default>

+    </attribute>

+    <attribute>

+      <id>OPEN_POWER_DIMM_READ_TIMEOUT_SEC</id>

+      <default>30</default>

+    </attribute>

+    <attribute>

+      <id>OPEN_POWER_DIMM_THROTTLE_TEMP_DEG_C</id>

+      <default>79</default>

+    </attribute>

+    <attribute>

+      <id>OPEN_POWER_MEMCTRL_ERROR_TEMP_DEG_C</id>

+      <default>99</default>

+    </attribute>

+    <attribute>

+      <id>OPEN_POWER_MEMCTRL_READ_TIMEOUT_SEC</id>

+      <default>30</default>

+    </attribute>

+    <attribute>

+      <id>OPEN_POWER_MEMCTRL_THROTTLE_TEMP_DEG_C</id>

+      <default>89</default>

+    </attribute>

+    <attribute>

+      <id>OPEN_POWER_MIN_MEM_UTILIZATION_THROTTLING</id>

+      <default>5</default>

+    </attribute>

+    <attribute>

+      <id>OPEN_POWER_MIN_POWER_CAP_WATTS</id>

+      <default>1100</default>

+    </attribute>

+    <attribute>

+      <id>OPEN_POWER_N_BULK_POWER_LIMIT_WATTS</id>

+      <default>1200</default>

+    </attribute>

+    <attribute>

+      <id>OPEN_POWER_N_MAX_MEM_POWER_WATTS</id>

+      <default>500</default>

+    </attribute>

+    <attribute>

+      <id>OPEN_POWER_N_PLUS_ONE_BULK_POWER_LIMIT_WATTS</id>

+      <default>2400</default>

+    </attribute>

+    <attribute>

+      <id>OPEN_POWER_N_PLUS_ONE_MAX_MEM_POWER_WATTS</id>

+      <default>500</default>

+    </attribute>

+    <attribute>

+      <id>OPEN_POWER_PROC_DVFS_TEMP_DEG_C</id>

+      <default>85</default>

+    </attribute>

+    <attribute>

+      <id>OPEN_POWER_PROC_ERROR_TEMP_DEG_C</id>

+      <default>95</default>

+    </attribute>

+    <attribute>

+      <id>OPEN_POWER_PROC_READ_TIMEOUT_SEC</id>

+      <default>5</default>

+    </attribute>

+    <attribute>

+      <id>OPEN_POWER_REGULATOR_EFFICIENCY_FACTOR</id>

+      <default>85</default>

+    </attribute>

+    <attribute>

+      <id>OPEN_POWER_TURBO_MODE_SUPPORTED</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>OPT_MEMMAP_GROUP_POLICY</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PAYLOAD_BASE</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+      <id>PAYLOAD_ENTRY</id>

+      <default>0x10</default>

+    </attribute>

+    <attribute>

+      <id>PAYLOAD_KIND</id>

+      <default>SAPPHIRE</default>

+    </attribute>

+    <attribute>

+      <id>PM_EXTERNAL_VRM_STEPDELAY</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PM_EXTERNAL_VRM_STEPSIZE</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PM_SAFE_FREQUENCY</id>

+      <default>2400</default>

+    </attribute>

+    <attribute>

+      <id>PM_SPIPSS_FREQUENCY</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PM_SPIVID_FREQUENCY</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PM_SYSTEM_IVRMS_ENABLED</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PM_SYSTEM_IVRM_VPD_MIN_LEVEL</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>PROC_EPS_TABLE_TYPE</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>PROC_FABRIC_PUMP_MODE</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>PROC_X_BUS_WIDTH</id>

+      <default>2</default>

+    </attribute>

+    <attribute>

+      <id>REDUNDANT_CLOCKS</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>REDUNDANT_FSPS</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>SP_FUNCTIONS</id>

+      <default>

+        <id>field</id>

+        <baseServices>

+          <value>0</value>

+        </baseServices>

+        <fsiMasterInit>

+          <value>0</value>

+        </fsiMasterInit>

+        <fsiSlaveInit>

+          <value>0</value>

+        </fsiSlaveInit>

+        <hardwareChangeDetection>

+          <value>0</value>

+        </hardwareChangeDetection>

+        <mailboxEnabled>

+          <value>0</value>

+        </mailboxEnabled>

+        <powerLineDisturbance>

+          <value>0</value>

+        </powerLineDisturbance>

+        <reserved>

+          <value>0</value>

+        </reserved>

+      </default>

+    </attribute>

+    <attribute>

+      <id>SYSTEM_NAME</id>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>SYS</default>

+    </attribute>

+    <attribute>

+      <id>X_EREPAIR_THRESHOLD_FIELD</id>

+      <default>1</default>

+    </attribute>

+    <attribute>

+      <id>X_EREPAIR_THRESHOLD_MNFG</id>

+      <default>0</default>

+    </attribute>

+    <hidden_child_id>system_event_sensor</hidden_child_id>

+    <hidden_child_id>host_status_sensor</hidden_child_id>

+    <hidden_child_id>fw_boot_sensor</hidden_child_id>

+    <hidden_child_id>pci_link_sensor</hidden_child_id>

+    <hidden_child_id>os_boot_sensor</hidden_child_id>

+    <hidden_child_id>power_cap_sensor</hidden_child_id>

+    <hidden_child_id>boot_count_sensor</hidden_child_id>

+    <hidden_child_id>power_limit_sensor</hidden_child_id>

+    <hidden_child_id>ps_derating_sensor</hidden_child_id>

+    <hidden_child_id>dimm_freq_sensor</hidden_child_id>

+    <instance_name>sys</instance_name>

+    <is_root>true</is_root>

+    <parent>base</parent>

+    <position>0</position>

+    <type>sys-sys-power8</type>

+  </targetPart>

+  <targetPart>

+    <id>system_event_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>System_Event</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x6F</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0x12</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>system_event_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+</partInstance>

diff --git a/xml/parts/sys-sys-power9.xml b/xml/parts/sys-sys-power9.xml
new file mode 100644
index 0000000..d85a87f
--- /dev/null
+++ b/xml/parts/sys-sys-power9.xml
@@ -0,0 +1,962 @@
+<partInstance>

+  <targetPart>

+    <id>boot_count_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0x22</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Boot_count</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x6F</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC3</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>boot_count_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>dimm_freq_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0x08</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Freq</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x6F</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC1</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>dimm_freq_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>fw_boot_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0x22</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Firmware_Boot_Progress</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default>0x01,0x03,0x13,0x14</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x6F</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0x0F</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>fw_boot_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>host_status_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0x23</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Host_Status</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x6F</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0x22</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>host_status_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>os_boot_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0x23</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>OS_Boot</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x6F</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0x1F</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>os_boot_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>pci_link_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0x23</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>PCIE_Link_Present</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default>0x00,0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x03</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC4</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>pci_link_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>power_cap_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0x17</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Power_Cap</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x6F</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC2</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>power_cap_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>power_limit_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0x15</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>Power_Limit_Active</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default>0x00,0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x03</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC6</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>power_limit_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>ps_derating_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0x15</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>PS_Derating_Factor</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x6F</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0xC8</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>ps_derating_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+  <targetPart>

+    <id>sys-sys-power9</id>

+    <attribute>

+      <id>AFFINITY_PATH</id>

+      <default>affinity:sys-0</default>

+    </attribute>

+    <attribute>

+      <id>ALL_MCS_IN_INTERLEAVING_GROUP</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>AVERAGE_IPL_TIME</id>

+    </attribute>

+    <attribute>

+      <id>A_EREPAIR_THRESHOLD_FIELD</id>

+    </attribute>

+    <attribute>

+      <id>A_EREPAIR_THRESHOLD_MNFG</id>

+    </attribute>

+    <attribute>

+      <id>BMC_FRU_ID</id>

+    </attribute>

+    <attribute>

+      <id>BOOT_FREQ_MHZ</id>

+    </attribute>

+    <attribute>

+      <id>BRAZOS_RX_FIFO_OVERRIDE</id>

+    </attribute>

+    <attribute>

+      <id>CDM_POLICIES</id>

+    </attribute>

+    <attribute>

+      <id>CEC_IPL_TYPE</id>

+    </attribute>

+    <attribute>

+      <id>CHECK_SCRIPT</id>

+      <default>run_checks.pl</default>

+    </attribute>

+    <attribute>

+      <id>CLASS</id>

+      <default>SYS</default>

+    </attribute>

+    <attribute>

+    	<id>DMI_DFE_OVERRIDE</id>

+    </attribute>

+    <attribute>

+      <id>DMI_EREPAIR_THRESHOLD_FIELD</id>

+    </attribute>

+    <attribute>

+      <id>DMI_EREPAIR_THRESHOLD_MNFG</id>

+    </attribute>

+    <attribute>

+      <id>DO_ABUS_DECONFIG</id>

+    </attribute>

+    <attribute>

+      <id>DUMMY_RW</id>

+    </attribute>

+    <attribute>

+      <id>EFFECTIVE_EC</id>

+    </attribute>

+    <attribute>

+      <id>ENABLED_THREADS</id>

+    </attribute>

+    <attribute>

+      <id>EXECUTION_PLATFORM</id>

+    </attribute>

+    <attribute>

+      <id>FABRIC_TO_PHYSICAL_NODE_MAP</id>

+    </attribute>

+    <attribute>

+      <id>FIELD_TH_P8EX_L2_COL_REPAIRS</id>

+    </attribute>

+    <attribute>

+      <id>FIELD_TH_P8EX_L2_LINE_DELETES</id>

+    </attribute>

+    <attribute>

+      <id>FIELD_TH_P8EX_L3_COL_REPAIRS</id>

+    </attribute>

+    <attribute>

+      <id>FIELD_TH_P8EX_L3_LINE_DELETES</id>

+    </attribute>

+    <attribute>

+      <id>FREQ_A</id>

+    </attribute>

+    <attribute>

+      <id>FREQ_CORE_MAX</id>

+    </attribute>

+    <attribute>

+      <id>FREQ_MEM_REFCLOCK</id>

+    </attribute>

+    <attribute>

+    	<id>FREQ_NEST_HFT</id>

+    </attribute>

+    <attribute>

+      <id>FREQ_PB</id>

+    </attribute>

+    <attribute>

+    	<id>FREQ_PB_HFT</id>

+    </attribute>

+    <attribute>

+      <id>FREQ_PCIE</id>

+    </attribute>

+    <attribute>

+      <id>FREQ_PROC_REFCLOCK</id>

+    </attribute>

+    <attribute>

+      <id>FREQ_PROC_REFCLOCK_KHZ</id>

+    </attribute>

+    <attribute>

+      <id>FREQ_X</id>

+    </attribute>

+    <attribute>

+    	<id>FREQ_X_HFT</id>

+    </attribute>

+    <attribute>

+      <id>FRU_ID</id>

+    </attribute>

+    <attribute>

+      <id>FUSED_CORE_OPTION</id>

+    </attribute>

+    <attribute>

+      <id>HB_HRMOR_NODAL_BASE</id>

+    </attribute>

+    <attribute>

+      <id>HB_RSV_MEM_SIZE_MB</id>

+    </attribute>

+    <attribute>

+      <id>HB_SETTINGS</id>

+    </attribute>

+    <attribute>

+      <id>HIDDEN_ERRLOGS_ENABLE</id>

+    </attribute>

+    <attribute>

+      <id>HUID</id>

+      <default>0x00010000</default>

+    </attribute>

+    <attribute>

+      <id>ISTEP_MODE</id>

+    </attribute>

+    <attribute>

+      <id>ISTEP_PAUSE_CONFIG</id>

+    </attribute>

+    <attribute>

+      <id>ISTEP_PAUSE_ENABLE</id>

+    </attribute>

+    <attribute>

+      <id>IS_SIMULATION</id>

+      <default>0</default>

+    </attribute>

+    <attribute>

+    	<id>LED_ON_DEFAULT_GPIO_VALUE</id>

+    </attribute>

+    <attribute>

+    	<id>LED_STRATEGY</id>

+    </attribute>

+    <attribute>

+      <id>MAX_CHIPLETS_PER_PROC</id>

+    </attribute>

+    <attribute>

+      <id>MAX_DIMMS_PER_MBA_PORT</id>

+    </attribute>

+    <attribute>

+      <id>MAX_EXS_PER_PROC_CHIP</id>

+    </attribute>

+    <attribute>

+      <id>MAX_MBAS_PER_MEMBUF_CHIP</id>

+    </attribute>

+    <attribute>

+      <id>MAX_MBA_PORTS_PER_MBA</id>

+    </attribute>

+    <attribute>

+      <id>MAX_MCS_PER_SYSTEM</id>

+    </attribute>

+    <attribute>

+      <id>MAX_PROC_CHIPS_PER_NODE</id>

+    </attribute>

+    <attribute>

+      <id>MEM_MIRROR_PLACEMENT_POLICY</id>

+    </attribute>

+    <attribute>

+      <id>MFG_TRACE_ENABLE</id>

+    </attribute>

+    <attribute>

+      <id>MIN_FREQ_MHZ</id>

+    </attribute>

+    <attribute>

+      <id>MIRROR_BASE_ADDRESS</id>

+    </attribute>

+    <attribute>

+      <id>MNFG_ABUS_MIN_EYE_HEIGHT</id>

+    </attribute>

+    <attribute>

+      <id>MNFG_ABUS_MIN_EYE_WIDTH</id>

+    </attribute>

+    <attribute>

+      <id>MNFG_DMI_MIN_EYE_HEIGHT</id>

+    </attribute>

+    <attribute>

+      <id>MNFG_DMI_MIN_EYE_WIDTH</id>

+    </attribute>

+    <attribute>

+      <id>MNFG_FLAGS</id>

+    </attribute>

+    <attribute>

+      <id>MNFG_TH_CEN_L4_CACHE_CES</id>

+    </attribute>

+    <attribute>

+      <id>MNFG_TH_CEN_MBA_IPL_SOFT_CE_TH_ALGO</id>

+    </attribute>

+    <attribute>

+      <id>MNFG_TH_CEN_MBA_RT_RCE_PER_RANK</id>

+    </attribute>

+    <attribute>

+      <id>MNFG_TH_CEN_MBA_RT_SOFT_CE_TH_ALGO</id>

+    </attribute>

+    <attribute>

+      <id>MNFG_TH_P8EX_L2_CACHE_CES</id>

+    </attribute>

+    <attribute>

+      <id>MNFG_TH_P8EX_L2_COL_REPAIRS</id>

+    </attribute>

+    <attribute>

+      <id>MNFG_TH_P8EX_L2_DIR_CES</id>

+    </attribute>

+    <attribute>

+      <id>MNFG_TH_P8EX_L2_LINE_DELETES</id>

+    </attribute>

+    <attribute>

+      <id>MNFG_TH_P8EX_L3_CACHE_CES</id>

+    </attribute>

+    <attribute>

+      <id>MNFG_TH_P8EX_L3_COL_REPAIRS</id>

+    </attribute>

+    <attribute>

+      <id>MNFG_TH_P8EX_L3_DIR_CES</id>

+    </attribute>

+    <attribute>

+      <id>MNFG_TH_P8EX_L3_LINE_DELETES</id>

+    </attribute>

+    <attribute>

+      <id>MNFG_XBUS_MIN_EYE_WIDTH</id>

+    </attribute>

+    <attribute>

+      <id>MODEL</id>

+      <default>POWER9</default>

+    </attribute>

+    <attribute>

+      <id>MRW_CDIMM_MASTER_I2C_TEMP_SENSOR_ENABLE</id>

+    </attribute>

+    <attribute>

+      <id>MRW_CDIMM_SPARE_I2C_TEMP_SENSOR_ENABLE</id>

+    </attribute>

+    <attribute>

+      <id>MRW_DIMM_POWER_CURVE_PERCENT_UPLIFT</id>

+    </attribute>

+    <attribute>

+      <id>MRW_DIMM_POWER_CURVE_PERCENT_UPLIFT_IDLE</id>

+    </attribute>

+    <attribute>

+    	<id>MRW_DDR3_VDDR_MAX_LIMIT</id>

+    </attribute>

+    <attribute>

+    	<id>MRW_DDR4_VDDR_MAX_LIMIT</id>

+    </attribute>

+    <attribute>

+      <id>MRW_ENHANCED_GROUPING_NO_MIRRORING</id>

+    </attribute>

+    <attribute>

+      <id>MRW_MAX_DRAM_DATABUS_UTIL</id>

+    </attribute>

+    <attribute>

+      <id>MRW_MAX_NUMBER_DIMMS_POSSIBLE_PER_VMEM_REGULATOR</id>

+    </attribute>

+    <attribute>

+      <id>MRW_MBA_CACHELINE_INTERLEAVE_MODE_CONTROL</id>

+    </attribute>

+    <attribute>

+    	<id>MRW_MEM_MIRRORING_ALLOWED</id>

+    </attribute>

+    <attribute>

+    	<id>MRW_MEM_MIRRORING_ENABLE_DEFAULT</id>

+    </attribute>

+    <attribute>

+		<id>MRW_MEM_POWER_CONTROL_USAGE</id>

+    </attribute>

+    <attribute>

+      <id>MRW_MEM_THROTTLE_DENOMINATOR</id>

+    </attribute>

+    <attribute>

+      <id>MRW_NEST_CAPABLE_FREQUENCIES_SYS</id>

+    </attribute>

+    <attribute>

+      <id>MRW_POWER_CONTROL_REQUESTED</id>

+    </attribute>

+    <attribute>

+      <id>MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_CHIP</id>

+    </attribute>

+    <attribute>

+      <id>MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_MBA</id>

+    </attribute>

+    <attribute>

+      <id>MRW_STRICT_MBA_PLUG_RULE_CHECKING</id>

+    </attribute>

+    <attribute>

+      <id>MRW_THERMAL_MEMORY_POWER_LIMIT</id>

+    </attribute>

+    <attribute>

+      <id>MRW_VMEM_REGULATOR_MEMORY_POWER_LIMIT_PER_DIMM</id>

+    </attribute>

+    <attribute>

+    	<id>MRW_VMEM_REGULATOR_MEMORY_POWER_LIMIT_PER_DIMM_DDR4</id>

+    </attribute>

+    <attribute>

+      <id>MRW_VMEM_REGULATOR_POWER_LIMIT_PER_DIMM_ADJ_ENABLE</id>

+    </attribute>

+    <attribute>

+    	<id>MSS_CLEANER_ENABLE</id>

+    </attribute>

+    <attribute>

+      <id>MSS_DRAMINIT_RESET_DISABLE</id>

+    </attribute>

+    <attribute>

+      <id>MSS_MBA_ADDR_INTERLEAVE_BIT</id>

+    </attribute>

+    <attribute>

+      <id>MSS_MBA_CACHELINE_INTERLEAVE_MODE</id>

+    </attribute>

+    <attribute>

+    	<id>MSS_MCA_HASH_MODE</id>

+    </attribute>

+    <attribute>

+    	<id>MSS_PREFETCH_ENABLE</id>

+    </attribute>

+    <attribute>

+    	<id>MSS_VOLT_VDDR_OFFSET_DISABLE</id>

+    </attribute>

+    <attribute>

+    	<id>MSS_VOLT_DDR3_VDDR_SLOPE</id>

+    </attribute>

+    <attribute>

+    	<id>MSS_VOLT_DDR4_VDDR_SLOPE</id>

+    </attribute>

+    <attribute>

+    	<id>MSS_VOLT_DDR3_VDDR_INTERCEPT</id>

+    </attribute>

+    <attribute>

+    	<id>MSS_VOLT_DDR4_VDDR_INTERCEPT</id>

+    </attribute>

+    <attribute>

+      <id>MULTI_SCOM_BUFFER_MAX_SIZE</id>

+    </attribute>

+    <attribute>

+      <id>NEST_FREQ_MHZ</id>

+    </attribute>

+    <attribute>

+      <id>NOMINAL_FREQ_MHZ</id>

+    </attribute>

+    <attribute>

+      <id>NUMERIC_POD_TYPE_TEST</id>

+    </attribute>

+    <attribute>

+    	<id>OCC_LOAD_TIMEOUT</id>

+    </attribute>

+    <attribute>

+    	<id>OCC_RESET_TIMEOUT</id>

+    </attribute>

+    <attribute>

+      <id>OPT_MEMMAP_GROUP_POLICY</id>

+    </attribute>

+    <attribute>

+      <id>PAYLOAD_BASE</id>

+    </attribute>

+    <attribute>

+      <id>PAYLOAD_ENTRY</id>

+    </attribute>

+    <attribute>

+      <id>PAYLOAD_IN_MIRROR_MEM</id>

+    </attribute>

+    <attribute>

+      <id>PAYLOAD_KIND</id>

+    </attribute>

+    <attribute>

+      <id>PCI_REFCLOCK_RCVR_TERM</id>

+    </attribute>

+    <attribute>

+    	<id>PCIE_DEFAULT_HDDW_SLOT_COUNT</id>

+    </attribute>

+    <attribute>

+    	<id>PCIE_MAX_HDDW_SLOT_COUNT</id>

+    </attribute>

+    <attribute>

+    	<id>PCIE_MIN_HDDW_SLOT_COUNT</id>

+    </attribute>

+    <attribute>

+      <id>PHYS_PATH</id>

+      <default>physical:sys-0</default>

+    </attribute>

+    <attribute>

+      <id>PLCK_IPL_ATTR_OVERRIDES_EXIST</id>

+    </attribute>

+    <attribute>

+      <id>PM_EXTERNAL_VRM_STEPDELAY</id>

+    </attribute>

+    <attribute>

+      <id>PM_EXTERNAL_VRM_STEPSIZE</id>

+    </attribute>

+    <attribute>

+      <id>PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY</id>

+    </attribute>

+    <attribute>

+      <id>PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY</id>

+    </attribute>

+    <attribute>

+      <id>PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY</id>

+    </attribute>

+    <attribute>

+      <id>PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY</id>

+    </attribute>

+    <attribute>

+      <id>PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY</id>

+    </attribute>

+    <attribute>

+      <id>PM_SAFE_FREQUENCY</id>

+    </attribute>

+    <attribute>

+      <id>PM_SPIPSS_FREQUENCY</id>

+    </attribute>

+    <attribute>

+      <id>PM_SPIVID_FREQUENCY</id>

+    </attribute>

+    <attribute>

+      <id>PM_SYSTEM_IVRMS_ENABLED</id>

+    </attribute>

+    <attribute>

+      <id>PM_SYSTEM_IVRM_VPD_MIN_LEVEL</id>

+    </attribute>

+    <attribute>

+      <id>PROC_EPS_TABLE_TYPE</id>

+    </attribute>

+    <attribute>

+      <id>PROC_FABRIC_PUMP_MODE</id>

+    </attribute>

+    <attribute>

+      <id>PROC_REFCLOCK_RCVR_TERM</id>

+    </attribute>

+    <attribute>

+      <id>PROC_X_BUS_WIDTH</id>

+    </attribute>

+    <attribute>

+    	<id>power-def-filenames</id>

+    </attribute>

+    <attribute>

+    	<id>powr-vrm-xml-filenames</id>

+    </attribute>

+    <attribute>

+      <id>RECONFIGURE_LOOP</id>

+    </attribute>

+    <attribute>

+      <id>RECONFIG_LOOP_TESTS_ENABLE</id>

+    </attribute>

+    <attribute>

+      <id>REDUNDANT_CLOCKS</id>

+    </attribute>

+    <attribute>

+      <id>REDUNDANT_FSPS</id>

+    </attribute>

+    <attribute>

+      <id>RUN_MAX_MEM_PATTERNS</id>

+    </attribute>

+    <attribute>

+      <id>SP_FUNCTIONS</id>

+    </attribute>

+    <attribute>

+      <id>SYNC_BETWEEN_STEPS</id>

+    </attribute>

+    <attribute>

+      <id>SYSTEM_MTM</id>

+    </attribute>

+    <attribute>

+      <id>TEST_MAX_STRING</id>

+    </attribute>

+    <attribute>

+      <id>TEST_MIN_STRING</id>

+      <default>Z</default>

+    </attribute>

+    <attribute>

+      <id>TEST_NO_DEFAULT_STRING</id>

+    </attribute>

+    <attribute>

+      <id>TEST_NULL_STRING</id>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>SYS</default>

+    </attribute>

+    <attribute>

+      <id>XSCOM_BASE_ADDRESS</id>

+    </attribute>

+    <attribute>

+      <id>X_EREPAIR_THRESHOLD_FIELD</id>

+    </attribute>

+    <attribute>

+      <id>X_EREPAIR_THRESHOLD_MNFG</id>

+    </attribute>

+    <hidden_child_id>system_event_sensor</hidden_child_id>

+    <hidden_child_id>host_status_sensor</hidden_child_id>

+    <hidden_child_id>fw_boot_sensor</hidden_child_id>

+    <hidden_child_id>pci_link_sensor</hidden_child_id>

+    <hidden_child_id>os_boot_sensor</hidden_child_id>

+    <hidden_child_id>power_cap_sensor</hidden_child_id>

+    <hidden_child_id>boot_count_sensor</hidden_child_id>

+    <hidden_child_id>power_limit_sensor</hidden_child_id>

+    <hidden_child_id>ps_derating_sensor</hidden_child_id>

+    <hidden_child_id>dimm_freq_sensor</hidden_child_id>

+    <instance_name>sys</instance_name>

+    <is_root>true</is_root>

+    <parent>base</parent>

+    <position>0</position>

+    <type>sys-sys-power9</type>

+  </targetPart>

+  <targetPart>

+    <id>system_event_sensor</id>

+    <attribute>

+      <id>CLASS</id>

+      <default>UNIT</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_ENTITY_ID</id>

+      <default>0x01</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_ID</id>

+      <default></default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_NAME_SUFFIX</id>

+      <default>System_Event</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_OFFSETS</id>

+      <default>0x02</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_READING_TYPE</id>

+      <default>0x6F</default>

+    </attribute>

+    <attribute>

+      <id>IPMI_SENSOR_TYPE</id>

+      <default>0x12</default>

+    </attribute>

+    <attribute>

+      <id>MRW_TYPE</id>

+      <default>IPMI_SENSOR</default>

+    </attribute>

+    <attribute>

+      <id>TYPE</id>

+      <default>NA</default>

+    </attribute>

+    <instance_name>system_event_sensor</instance_name>

+    <is_root>false</is_root>

+    <parent>unit</parent>

+    <position>-1</position>

+    <type>unit-ipmi-sensor</type>

+  </targetPart>

+</partInstance>

diff --git a/xml/target_instances_v3.xml b/xml/target_instances_v3.xml
deleted file mode 100644
index b7d1081..0000000
--- a/xml/target_instances_v3.xml
+++ /dev/null
@@ -1,14230 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
-<targetInstances>
-	<!-- Venice -->
-	<targetInstance>
-		<type>sys-sys-power8</type>
-		<instance_name>sys</instance_name>
-		<hidden_child_id>system_event_sensor</hidden_child_id>
-		<hidden_child_id>host_status_sensor</hidden_child_id>
-		<hidden_child_id>fw_boot_sensor</hidden_child_id>
-		<hidden_child_id>pci_link_sensor</hidden_child_id>
-		<hidden_child_id>os_boot_sensor</hidden_child_id>
-		<hidden_child_id>power_cap_sensor</hidden_child_id>
-		<hidden_child_id>boot_count_sensor</hidden_child_id>
-		<hidden_child_id>power_limit_sensor</hidden_child_id>
-		<hidden_child_id>ps_derating_sensor</hidden_child_id>
-		<hidden_child_id>dimm_freq_sensor</hidden_child_id>
-	</targetInstance>
-
-	<targetInstance>
-		<type>enc-node-power8</type>
-		<instance_name>node</instance_name>
-		<hidden_child_id>motherboard_fault_sensor</hidden_child_id>
-		<hidden_child_id>ref_clk_sensor</hidden_child_id>
-		<hidden_child_id>pci_clk_sensor</hidden_child_id>
-		<hidden_child_id>tod_clk_sensor</hidden_child_id>
-		<hidden_child_id>apss_fault_sensor</hidden_child_id>
-	</targetInstance>
-
-	<targetInstance>
-		<type>card-motherboard</type>
-		<instance_name>motherboard</instance_name>
-		<child_id>vpd_assoc_child</child_id>
-	</targetInstance>
-	<targetInstance>
-		<type>module-module-turismo</type>
-		<instance_name>module</instance_name>
-		<child_id>proc</child_id>
-		<attribute>
-			<id>POSITION</id>
-			<default>0</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>chip-apss-psoc</type>
-		<instance_name>apss</instance_name>
-			<child_id>Memory_Proc0_Power</child_id>
-	<child_id>Memory_Proc1_Power</child_id>
-	<child_id>Memory_Proc2_Power</child_id>
-	<child_id>Memory_Proc3_Power</child_id>
-	<child_id>Proc0_Power</child_id>
-	<child_id>Proc1_Power</child_id>
-	<child_id>Proc2_Power</child_id>
-	<child_id>Proc3_Power</child_id>
-	<child_id>PCIE_Proc0_Power</child_id>
-	<child_id>PCIE_Proc1_Power</child_id>
-	<child_id>PCIE_Proc2_Power</child_id>
-	<child_id>PCIE_Proc3_Power</child_id>
-	<child_id>IO_A_Power</child_id>
-	<child_id>IO_B_Power</child_id>
-	<child_id>IO_C_Power</child_id>
-	<child_id>Fan_Power_A</child_id>
-	<child_id>Fan_Power_B</child_id>
-	<child_id>Storage_Power_A</child_id>
-	<child_id>Storage_Power_B</child_id>
-	<child_id>Total_System_Power</child_id>
-	<child_id>Memory_Cache_Power</child_id>
-	<child_id>Memory_Proc0_0_Power</child_id>
-	<child_id>Memory_Proc0_1_Power</child_id>
-	<child_id>Memory_Proc0_2_Power</child_id>
-	<child_id>12V_Sense</child_id>
-	<child_id>Ground_Sense</child_id>
-	<child_id>GPU_Sense</child_id>
-	</targetInstance>
-	<targetInstance>
-		<type>chip-processor-venice</type>
-		<id>proc</id>
-		<child_id>ex-1</child_id>
-		<child_id>ex-2</child_id>
-		<child_id>ex-3</child_id>
-		<child_id>ex-4</child_id>
-		<child_id>ex-5</child_id>
-		<child_id>ex-6</child_id>
-		<child_id>ex-9</child_id>
-		<child_id>ex-10</child_id>
-		<child_id>ex-11</child_id>
-		<child_id>ex-12</child_id>
-		<child_id>ex-13</child_id>
-		<child_id>ex-14</child_id>
-		<child_id>pore-0</child_id>
-		<child_id>capp-0</child_id>
-		<child_id>nx-0</child_id>
-		<child_id>occ-0</child_id>
-		<child_id>pci_configs</child_id>
-		<hidden_child_id>pci-0</hidden_child_id>
-		<hidden_child_id>pci-1</hidden_child_id>
-		<hidden_child_id>pci-2</hidden_child_id>
-		<hidden_child_id>pci-3</hidden_child_id>
-		<child_id>abus-0</child_id>
-		<child_id>abus-1</child_id>
-		<child_id>abus-2</child_id>
-		<hidden_child_id>xbus-0</hidden_child_id>
-		<hidden_child_id>xbus-1</hidden_child_id>
-		<hidden_child_id>xbus-2</hidden_child_id>
-		<hidden_child_id>xbus-3</hidden_child_id>
-		<child_id>mcs-0</child_id>
-		<child_id>mcs-1</child_id>
-		<hidden_child_id>mcs-2</hidden_child_id>
-		<hidden_child_id>mcs-3</hidden_child_id>
-		<child_id>mcs-4</child_id>
-		<child_id>mcs-5</child_id>
-		<hidden_child_id>mcs-6</hidden_child_id>
-		<hidden_child_id>mcs-7</hidden_child_id>
-		<child_id>fsi-slave-0</child_id>
-		<child_id>fsi-cm-0</child_id>
-		<child_id>fsi-cm-1</child_id>
-		<child_id>fsi-cm-2</child_id>
-		<child_id>fsi-cm-3</child_id>
-		<child_id>fsim-0</child_id>
-		<child_id>fsim-1</child_id>
-		<child_id>fsim-2</child_id>
-		<child_id>i2c-slave</child_id>
-		<child_id>i2c-master-lightpath</child_id>
-		<child_id>i2c-master-hotplug</child_id>
-		<child_id>lpc-slave</child_id>
-		<child_id>proc_fru_assoc</child_id>
-		<hidden_child_id>cpu_temp_sensor</hidden_child_id>
-		<hidden_child_id>cpu_func_sensor</hidden_child_id>
-		<attribute>
-			<id>POSITION</id>
-			<default>0</default>
-		</attribute>
-	</targetInstance>
-		<targetInstance>
-		<type>unit-lpc-slave</type>
-		<id>lpc-slave</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>1</default>
-		</attribute>
-	</targetInstance>
-
-	<targetInstance>
-		<type>unit-ex-venice</type>
-		<id>ex-1</id>
-		<child_id>core-0</child_id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>1</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-ex-venice</type>
-		<id>ex-2</id>
-		<child_id>core-0</child_id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>2</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-ex-venice</type>
-		<id>ex-3</id>
-		<child_id>core-0</child_id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>3</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-ex-venice</type>
-		<id>ex-4</id>
-		<child_id>core-0</child_id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>4</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-ex-venice</type>
-		<id>ex-5</id>
-		<child_id>core-0</child_id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>5</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-ex-venice</type>
-		<id>ex-6</id>
-		<child_id>core-0</child_id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>6</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-ex-venice</type>
-		<id>ex-9</id>
-		<child_id>core-0</child_id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>9</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-ex-venice</type>
-		<id>ex-10</id>
-		<child_id>core-0</child_id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>10</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-ex-venice</type>
-		<id>ex-11</id>
-		<child_id>core-0</child_id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>11</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-ex-venice</type>
-		<id>ex-12</id>
-		<child_id>core-0</child_id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>12</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-ex-venice</type>
-		<id>ex-13</id>
-		<child_id>core-0</child_id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>13</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-ex-venice</type>
-		<id>ex-14</id>
-		<child_id>core-0</child_id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>14</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-core-venice</type>
-		<id>core-0</id>
-		<hidden_child_id>cpucore_temp_sensor</hidden_child_id>
-		<hidden_child_id>cpucore_func_sensor</hidden_child_id>
-		<hidden_child_id>cpucore_freq_sensor</hidden_child_id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-pore-venice</type>
-		<id>pore-0</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-nx-venice</type>
-		<id>nx-0</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>occ</type>
-		<id>occ-0</id>
-		<hidden_child_id>occ_active_sensor</hidden_child_id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-	</targetInstance>
-
-	<!-- PCIe instances -->
-	<targetInstance>
-		<type>unit-pciconfigs-venice</type>
-		<id>pci_configs</id>
-		<child_id>E0_x16:E1_x16</child_id>
-		<child_id>E0_x16:E1_x8x8</child_id>
-	</targetInstance>
-
-	<targetInstance>
-		<type>unit-pciconfig0-venice</type>
-		<id>E0_x16:E1_x16</id>
-		<child_id>E0_x16</child_id>
-		<child_id>E1_x16</child_id>
-			<attribute>
-		<id>PCIE_LANE_SWAP_TABLE</id>
-		<default>
-		000,010,001,011,111,101,110,100,
-		000,010,001,011,110,101,110,100
-		 </default>
-	</attribute>
-			<attribute>
-			<id>IO_CONFIG_NUM</id>
-			<default>1</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-pciconfig1-venice</type>
-		<id>E0_x16:E1_x8x8</id>
-		<child_id>E0_x16</child_id>
-		<child_id>E1_CLK0_x8</child_id>
-		<child_id>E1_CLK1_x8</child_id>
-			<attribute>
-		<id>PCIE_LANE_SWAP_TABLE</id>
-		<default>
-		000,010,001,011,111,101,110,100,
-		000,010,001,011,000,010,001,011
-		 </default>
-	</attribute>
-			<attribute>
-			<id>IO_CONFIG_NUM</id>
-			<default>2</default>
-		</attribute>
-	</targetInstance>
-
-	<!-- IOP0 config 0: PHB0=x16 -->
-	<targetInstance>
-		<type>unit-pci-venice</type>
-		<id>E0_x16</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>PCIE_NUM_LANES</id>
-			<default>16</default>
-		</attribute>
-		<attribute>
-			<id>PCIE_LANE_MASK</id>
-			<default>0xFFFF</default>
-		</attribute>
-		<attribute>
-			<id>PCIE_LANE_SET</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>PHB_NUM</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>IOP_NUM</id>
-			<default>0</default>
-		</attribute>
-	</targetInstance>
-
-	<!-- IOP1 config: PHB1=x16 -->
-	<targetInstance>
-		<type>unit-pci-venice</type>
-		<id>E1_x16</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>1</default>
-		</attribute>
-		<attribute>
-			<id>PCIE_NUM_LANES</id>
-			<default>16</default>
-		</attribute>
-		<attribute>
-			<id>PCIE_LANE_MASK</id>
-			<default>0xFFFF</default>
-		</attribute>
-		<attribute>
-			<id>PCIE_LANE_SET</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>PHB_NUM</id>
-			<default>1</default>
-		</attribute>
-		<attribute>
-			<id>IOP_NUM</id>
-			<default>1</default>
-		</attribute>
-	</targetInstance>
-
-	<!-- IOP1 config 1: PHB1=x8, PHB2=x8 -->
-	<targetInstance>
-		<type>unit-pci-venice</type>
-		<id>E1_CLK0_x8</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>1</default>
-		</attribute>
-		<attribute>
-			<id>PCIE_NUM_LANES</id>
-			<default>8</default>
-		</attribute>
-		<attribute>
-			<id>PCIE_LANE_MASK</id>
-			<default>0xFF00</default>
-		</attribute>
-		<attribute>
-			<id>PCIE_LANE_SET</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>PHB_NUM</id>
-			<default>1</default>
-		</attribute>
-		<attribute>
-			<id>IOP_NUM</id>
-			<default>1</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-pci-venice</type>
-		<id>E1_CLK1_x8</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>1</default>
-		</attribute>
-		<attribute>
-			<id>PCIE_NUM_LANES</id>
-			<default>8</default>
-		</attribute>
-		<attribute>
-			<id>PCIE_LANE_MASK</id>
-			<default>0x00FF</default>
-		</attribute>
-		<attribute>
-			<id>PCIE_LANE_SET</id>
-			<default>1</default>
-		</attribute>
-		<attribute>
-			<id>PHB_NUM</id>
-			<default>2</default>
-		</attribute>
-		<attribute>
-			<id>IOP_NUM</id>
-			<default>1</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-pci-venice</type>
-		<id>pci-0</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-pci-venice</type>
-		<id>pci-1</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>1</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-pci-venice</type>
-		<id>pci-2</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>2</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-pci-venice</type>
-		<id>pci-3</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>3</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-mcs-venice</type>
-		<id>mcs-0</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>SCHEMATIC_INTERFACE</id>
-			<default>M0 DMI D</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-mcs-venice</type>
-		<id>mcs-1</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>1</default>
-		</attribute>
-		<attribute>
-			<id>SCHEMATIC_INTERFACE</id>
-			<default>M0 DMI C</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-mcs-venice</type>
-		<id>mcs-2</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>2</default>
-		</attribute>
-		<attribute>
-			<id>SCHEMATIC_INTERFACE</id>
-			<default>M1 DMI A</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-mcs-venice</type>
-		<id>mcs-3</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>3</default>
-		</attribute>
-		<attribute>
-			<id>SCHEMATIC_INTERFACE</id>
-			<default>M1 DMI B</default>
-		</attribute>
-	</targetInstance>
-
-	<targetInstance>
-		<type>unit-mcs-venice</type>
-		<id>mcs-4</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>4</default>
-		</attribute>
-		<attribute>
-			<id>SCHEMATIC_INTERFACE</id>
-			<default>M1 DMI D</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-mcs-venice</type>
-		<id>mcs-5</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>5</default>
-		</attribute>
-		<attribute>
-			<id>SCHEMATIC_INTERFACE</id>
-			<default>M1 DMI C</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-mcs-venice</type>
-		<id>mcs-6</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>6</default>
-		</attribute>
-		<attribute>
-			<id>SCHEMATIC_INTERFACE</id>
-			<default>M0 DMI C</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-mcs-venice</type>
-		<id>mcs-7</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>7</default>
-		</attribute>
-		<attribute>
-			<id>SCHEMATIC_INTERFACE</id>
-			<default>M0 DMI C</default>
-		</attribute>
-	</targetInstance>
-
-	<targetInstance>
-		<type>unit-capp-venice</type>
-		<id>capp-0</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-xbus-venice</type>
-		<id>xbus-0</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-xbus-venice</type>
-		<id>xbus-1</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>1</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-xbus-venice</type>
-		<id>xbus-2</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>2</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-xbus-venice</type>
-		<id>xbus-3</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>3</default>
-		</attribute>
-	</targetInstance>
-
-	<targetInstance>
-		<type>unit-abus-venice</type>
-		<id>abus-0</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-abus-venice</type>
-		<id>abus-1</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>1</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-abus-venice</type>
-		<id>abus-2</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>2</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-fsi-slave</type>
-		<id>fsi-slave-0</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-	</targetInstance>
-
-	<targetInstance>
-		<type>unit-fsi-membuf</type>
-		<id>fsi-cm-0</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>CMFSI</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>FSI_ENGINE</id>
-			<default>0x0C</default>
-		</attribute>
-		<attribute>
-			<id>FSI_PORT</id>
-			<default>2</default>
-		</attribute>
-		<attribute>
-			<id>FSI_LINK</id>
-			<default>0x00</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-fsi-membuf</type>
-		<id>fsi-cm-1</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>1</default>
-		</attribute>
-		<attribute>
-			<id>CMFSI</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>FSI_ENGINE</id>
-			<default>0x0C</default>
-		</attribute>
-		<attribute>
-			<id>FSI_PORT</id>
-			<default>3</default>
-		</attribute>
-		<attribute>
-			<id>FSI_LINK</id>
-			<default>0x01</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-fsi-membuf</type>
-		<id>fsi-cm-2</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>2</default>
-		</attribute>
-		<attribute>
-			<id>CMFSI</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>FSI_ENGINE</id>
-			<default>0x0C</default>
-		</attribute>
-		<attribute>
-			<id>FSI_PORT</id>
-			<default>6</default>
-		</attribute>
-		<attribute>
-			<id>FSI_LINK</id>
-			<default>0x02</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-fsi-membuf</type>
-		<id>fsi-cm-3</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>3</default>
-		</attribute>
-		<attribute>
-			<id>CMFSI</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>FSI_ENGINE</id>
-			<default>0x0C</default>
-		</attribute>
-		<attribute>
-			<id>FSI_PORT</id>
-			<default>7</default>
-		</attribute>
-		<attribute>
-			<id>FSI_LINK</id>
-			<default>0x03</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-i2c-slave</type>
-		<id>i2c-slave</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-i2c-master</type>
-		<id>i2c-master-lightpath</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>I2C_PORT</id>
-			<default>0x02</default>
-		</attribute>
-		<attribute>
-			<id>I2C_ENGINE</id>
-			<default>0x01</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-i2c-master</type>
-		<id>i2c-master-hotplug</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>1</default>
-		</attribute>
-		<attribute>
-			<id>I2C_PORT</id>
-			<default>0x01</default>
-		</attribute>
-		<attribute>
-			<id>I2C_ENGINE</id>
-			<default>0x01</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-fsi-proc</type>
-		<id>fsim-0</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>FSI_ENGINE</id>
-			<default>0x0D</default>
-		</attribute>
-		<attribute>
-			<id>FSI_PORT</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>FSI_LINK</id>
-			<default>0x00</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-fsi-proc</type>
-		<id>fsim-1</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>1</default>
-		</attribute>
-		<attribute>
-			<id>FSI_ENGINE</id>
-			<default>0x0D</default>
-		</attribute>
-		<attribute>
-			<id>FSI_PORT</id>
-			<default>1</default>
-		</attribute>
-		<attribute>
-			<id>FSI_LINK</id>
-			<default>0x01</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-fsi-proc</type>
-		<id>fsim-2</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>2</default>
-		</attribute>
-		<attribute>
-			<id>FSI_ENGINE</id>
-			<default>0x0D</default>
-		</attribute>
-		<attribute>
-			<id>FSI_PORT</id>
-			<default>2</default>
-		</attribute>
-		<attribute>
-			<id>FSI_LINK</id>
-			<default>0x02</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>chip-vpd-device</type>
-		<id>mvpd_primary</id>
-		<attribute>
-			<id>VPD_TYPE</id>
-			<default>MVPD</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>chip-vpd-device</type>
-		<id>mvpd_backup</id>
-		<attribute>
-			<id>VPD_TYPE</id>
-			<default>MVPD</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>chip-vpd-device</type>
-		<id>sbe_primary</id>
-		<attribute>
-			<id>VPD_TYPE</id>
-			<default>SBE</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>chip-vpd-device</type>
-		<id>sbe_backup</id>
-		<attribute>
-			<id>VPD_TYPE</id>
-			<default>SBE</default>
-		</attribute>
-	</targetInstance>
-
-	<!-- Naples -->
-	<targetInstance>
-		<type>module-module-dellovo</type>
-		<instance_name>module</instance_name>
-		<child_id>p8p_proc</child_id>
-		<attribute>
-			<id>POSITION</id>
-			<default>0</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>chip-processor-naples</type>
-		<id>p8p_proc</id>
-		<child_id>p8p_ex-1</child_id>
-		<child_id>p8p_ex-2</child_id>
-		<child_id>p8p_ex-3</child_id>
-		<child_id>p8p_ex-4</child_id>
-		<child_id>p8p_ex-5</child_id>
-		<child_id>p8p_ex-6</child_id>
-		<child_id>p8p_ex-9</child_id>
-		<child_id>p8p_ex-10</child_id>
-		<child_id>p8p_ex-11</child_id>
-		<child_id>p8p_ex-12</child_id>
-		<child_id>p8p_ex-13</child_id>
-		<child_id>p8p_ex-14</child_id>
-		<child_id>p8p_pore-0</child_id>
-		<child_id>p8p_capp-0</child_id>
-		<child_id>p8p_capp-1</child_id>
-		<child_id>p8p_nx-0</child_id>
-		<child_id>p8p_occ-0</child_id>
-		<child_id>p8p_pci_configs</child_id>
-		<hidden_child_id>p8p_pci-0</hidden_child_id>
-		<hidden_child_id>p8p_pci-1</hidden_child_id>
-		<hidden_child_id>p8p_pci-2</hidden_child_id>
-		<hidden_child_id>p8p_pci-3</hidden_child_id>
-		<hidden_child_id>p8p_xbus-0</hidden_child_id>
-		<child_id>p8p_xbus-1</child_id>
-		<hidden_child_id>p8p_xbus-2</hidden_child_id>
-		<hidden_child_id>p8p_xbus-3</hidden_child_id>
-		<child_id>p8p_mcs-0</child_id>
-		<child_id>p8p_mcs-1</child_id>
-		<hidden_child_id>p8p_mcs-2</hidden_child_id>
-		<hidden_child_id>p8p_mcs-3</hidden_child_id>
-		<child_id>p8p_mcs-4</child_id>
-		<child_id>p8p_mcs-5</child_id>
-		<hidden_child_id>p8p_mcs-6</hidden_child_id>
-		<hidden_child_id>p8p_mcs-7</hidden_child_id>
-		<child_id>fsi-slave-0</child_id>
-		<child_id>fsi-cm-0</child_id>
-		<child_id>fsi-cm-1</child_id>
-		<child_id>fsi-cm-2</child_id>
-		<child_id>fsi-cm-3</child_id>
-		<child_id>fsim-0</child_id>
-		<child_id>fsim-1</child_id>
-		<child_id>fsim-2</child_id>
-		<child_id>i2c-slave</child_id>
-		<child_id>i2c-master-lightpath</child_id>
-		<child_id>i2c-master-hotplug</child_id>
-		<child_id>lpc-slave</child_id>
-		<child_id>proc_fru_assoc</child_id>
-		<hidden_child_id>cpu_temp_sensor</hidden_child_id>
-		<hidden_child_id>cpu_func_sensor</hidden_child_id>
-		<attribute>
-			<id>POSITION</id>
-			<default>0</default>
-		</attribute>
-	</targetInstance>
-
-	<targetInstance>
-		<type>unit-ex-naples</type>
-		<id>p8p_ex-1</id>
-		<child_id>p8p_core-0</child_id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>1</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-ex-naples</type>
-		<id>p8p_ex-2</id>
-		<child_id>p8p_core-0</child_id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>2</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-ex-naples</type>
-		<id>p8p_ex-3</id>
-		<child_id>p8p_core-0</child_id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>3</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-ex-naples</type>
-		<id>p8p_ex-4</id>
-		<child_id>p8p_core-0</child_id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>4</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-ex-naples</type>
-		<id>p8p_ex-5</id>
-		<child_id>p8p_core-0</child_id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>5</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-ex-naples</type>
-		<id>p8p_ex-6</id>
-		<child_id>p8p_core-0</child_id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>6</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-ex-naples</type>
-		<id>p8p_ex-9</id>
-		<child_id>p8p_core-0</child_id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>9</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-ex-naples</type>
-		<id>p8p_ex-10</id>
-		<child_id>p8p_core-0</child_id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>10</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-ex-naples</type>
-		<id>p8p_ex-11</id>
-		<child_id>p8p_core-0</child_id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>11</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-ex-naples</type>
-		<id>p8p_ex-12</id>
-		<child_id>p8p_core-0</child_id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>12</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-ex-naples</type>
-		<id>p8p_ex-13</id>
-		<child_id>p8p_core-0</child_id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>13</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-ex-naples</type>
-		<id>p8p_ex-14</id>
-		<child_id>p8p_core-0</child_id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>14</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-core-naples</type>
-		<id>p8p_core-0</id>
-		<hidden_child_id>cpucore_temp_sensor</hidden_child_id>
-		<hidden_child_id>cpucore_func_sensor</hidden_child_id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-pore-naples</type>
-		<id>p8p_pore-0</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-nx-naples</type>
-		<id>p8p_nx-0</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-	</targetInstance>
-
-	<targetInstance>
-		<type>occ</type>
-		<id>p8p_occ-0</id>
-		<hidden_child_id>occ_active_sensor</hidden_child_id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-	</targetInstance>
-
-
-	<!-- PCIe instances -->
-	<targetInstance>
-		<type>unit-pciconfigs-naples</type>
-		<id>p8p_pci_configs</id>
-		<child_id>p8p_E0_x16:E1_x16:E2_x8</child_id>
-		<child_id>p8p_E0_x16:E1_x8x8:E2_x8</child_id>
-	</targetInstance>
-
-	<targetInstance>
-		<type>unit-pciconfig0-naples</type>
-		<id>p8p_E0_x16:E1_x16:E2_x8</id>
-		<child_id>p8p_E0_x16</child_id>
-		<child_id>p8p_E1_x16</child_id>
-		<child_id>p8p_E2_x8</child_id>
-			<attribute>
-		<id>PCIE_LANE_SWAP_TABLE</id>
-		<default>
-		000,010,001,011,111,101,110,100,
-		000,010,001,011,110,101,110,100
-		 </default>
-		</attribute>
-			<attribute>
-			<id>IO_CONFIG_NUM</id>
-			<default>1</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-pciconfig1-naples</type>
-		<id>p8p_E0_x16:E1_x8x8:E2_x8</id>
-		<child_id>p8p_E0_x16</child_id>
-		<child_id>p8p_E1_CLK0_x8</child_id>
-		<child_id>p8p_E1_CLK1_x8</child_id>
-		<child_id>p8p_E2_x8</child_id>
-			<attribute>
-		<id>PCIE_LANE_SWAP_TABLE</id>
-		<default>
-		000,010,001,011,111,101,110,100,
-		000,010,001,011,000,010,001,011
-		 </default>
-		</attribute>
-			<attribute>
-			<id>IO_CONFIG_NUM</id>
-			<default>2</default>
-		</attribute>
-	</targetInstance>
-
-	<!-- IOP0 config 0: PHB0=x16 -->
-	<targetInstance>
-		<type>unit-pci-naples</type>
-		<id>p8p_E0_x16</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>PCIE_NUM_LANES</id>
-			<default>16</default>
-		</attribute>
-		<attribute>
-			<id>PCIE_LANE_MASK</id>
-			<default>0xFFFF</default>
-		</attribute>
-		<attribute>
-			<id>PCIE_LANE_SET</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>PHB_NUM</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>IOP_NUM</id>
-			<default>0</default>
-		</attribute>
-	</targetInstance>
-
-	<!-- IOP1 config: PHB1=x16 -->
-	<targetInstance>
-		<type>unit-pci-naples</type>
-		<id>p8p_E1_x16</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>1</default>
-		</attribute>
-		<attribute>
-			<id>PCIE_NUM_LANES</id>
-			<default>16</default>
-		</attribute>
-		<attribute>
-			<id>PCIE_LANE_MASK</id>
-			<default>0xFFFF</default>
-		</attribute>
-		<attribute>
-			<id>PCIE_LANE_SET</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>PHB_NUM</id>
-			<default>1</default>
-		</attribute>
-		<attribute>
-			<id>IOP_NUM</id>
-			<default>1</default>
-		</attribute>
-	</targetInstance>
-
-	<!-- IOP1 config 1: PHB1=x8, PHB2=x8 -->
-	<targetInstance>
-		<type>unit-pci-naples</type>
-		<id>p8p_E1_CLK0_x8</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>1</default>
-		</attribute>
-		<attribute>
-			<id>PCIE_NUM_LANES</id>
-			<default>8</default>
-		</attribute>
-		<attribute>
-			<id>PCIE_LANE_MASK</id>
-			<default>0xFF00</default>
-		</attribute>
-		<attribute>
-			<id>PCIE_LANE_SET</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>PHB_NUM</id>
-			<default>1</default>
-		</attribute>
-		<attribute>
-			<id>IOP_NUM</id>
-			<default>1</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-pci-naples</type>
-		<id>p8p_E1_CLK1_x8</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>1</default>
-		</attribute>
-		<attribute>
-			<id>PCIE_NUM_LANES</id>
-			<default>8</default>
-		</attribute>
-		<attribute>
-			<id>PCIE_LANE_MASK</id>
-			<default>0x00FF</default>
-		</attribute>
-		<attribute>
-			<id>PCIE_LANE_SET</id>
-			<default>1</default>
-		</attribute>
-		<attribute>
-			<id>PHB_NUM</id>
-			<default>2</default>
-		</attribute>
-		<attribute>
-			<id>IOP_NUM</id>
-			<default>1</default>
-		</attribute>
-	</targetInstance>
-        <!-- IOP2 config: PHB3=x8 -->
-        <targetInstance>
-                <type>unit-pci-naples</type>
-                <id>p8p_E2_x8</id>
-                <attribute>
-                        <id>CHIP_UNIT</id>
-                        <default>1</default>
-                </attribute>
-                <attribute>
-                        <id>PCIE_NUM_LANES</id>
-                        <default>8</default>
-                </attribute>
-                <attribute>
-                        <id>PCIE_LANE_MASK</id>
-                        <default>0xFF00</default>
-                </attribute>
-                <attribute>
-                        <id>PCIE_LANE_SET</id>
-                        <default>0</default>
-                </attribute>
-                <attribute>
-                        <id>PHB_NUM</id>
-                        <default>3</default>
-                </attribute>
-                <attribute>
-                        <id>IOP_NUM</id>
-                        <default>2</default>
-                </attribute>
-        </targetInstance>
-
-	<targetInstance>
-		<type>unit-pci-naples</type>
-		<id>p8p_pci-0</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-pci-naples</type>
-		<id>p8p_pci-1</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>1</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-pci-naples</type>
-		<id>p8p_pci-2</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>2</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-pci-naples</type>
-		<id>p8p_pci-3</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>3</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-mcs-naples</type>
-		<id>p8p_mcs-0</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>SCHEMATIC_INTERFACE</id>
-			<default>M0 DMI D</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-mcs-naples</type>
-		<id>p8p_mcs-1</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>1</default>
-		</attribute>
-		<attribute>
-			<id>SCHEMATIC_INTERFACE</id>
-			<default>M0 DMI C</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-mcs-naples</type>
-		<id>p8p_mcs-2</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>2</default>
-		</attribute>
-		<attribute>
-			<id>SCHEMATIC_INTERFACE</id>
-			<default>M1 DMI A</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-mcs-naples</type>
-		<id>p8p_mcs-3</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>3</default>
-		</attribute>
-		<attribute>
-			<id>SCHEMATIC_INTERFACE</id>
-			<default>M1 DMI B</default>
-		</attribute>
-	</targetInstance>
-
-	<targetInstance>
-		<type>unit-mcs-naples</type>
-		<id>p8p_mcs-4</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>4</default>
-		</attribute>
-		<attribute>
-			<id>SCHEMATIC_INTERFACE</id>
-			<default>M1 DMI D</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-mcs-naples</type>
-		<id>p8p_mcs-5</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>5</default>
-		</attribute>
-		<attribute>
-			<id>SCHEMATIC_INTERFACE</id>
-			<default>M1 DMI C</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-mcs-naples</type>
-		<id>p8p_mcs-6</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>6</default>
-		</attribute>
-		<attribute>
-			<id>SCHEMATIC_INTERFACE</id>
-			<default>M0 DMI C</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-mcs-naples</type>
-		<id>p8p_mcs-7</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>7</default>
-		</attribute>
-		<attribute>
-			<id>SCHEMATIC_INTERFACE</id>
-			<default>M0 DMI C</default>
-		</attribute>
-	</targetInstance>
-
-	<targetInstance>
-		<type>unit-capp-naples</type>
-		<id>p8p_capp-0</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-	</targetInstance>
-
-        <targetInstance>
-                <type>unit-capp-naples</type>
-                <id>p8p_capp-1</id>
-                <attribute>
-                        <id>CHIP_UNIT</id>
-                        <default>0</default>
-                </attribute>
-        </targetInstance>
-
-	<targetInstance>
-		<type>unit-xbus-naples</type>
-		<id>p8p_xbus-0</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-xbus-naples</type>
-		<id>p8p_xbus-1</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>1</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-xbus-naples</type>
-		<id>p8p_xbus-2</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>2</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-xbus-naples</type>
-		<id>p8p_xbus-3</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>3</default>
-		</attribute>
-	</targetInstance>
-
-
-	<!-- Centaur -->
-	<targetInstance>
-		<type>chip-membuf-centaur</type>
-		<instance_name>membuf</instance_name>
-		<child_id>dmi</child_id>
-		<child_id>l4</child_id>
-		<child_id>mba-0</child_id>
-		<child_id>mba-1</child_id>
-		<child_id>i2c-master</child_id>
-		<child_id>i2c-spare</child_id>
-		<child_id>fsi-slave-membuf</child_id>
-		<child_id>vddr</child_id>
-		<child_id>vpd_assoc_child</child_id>
-		<hidden_child_id>membuf_temp_sensor</hidden_child_id>
-		<hidden_child_id>membuf_func_sensor</hidden_child_id>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-fsicm-slave</type>
-		<id>fsi-slave-membuf</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-dimm_port-power8</type>
-		<id>Port A:CS0</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>MBA_PORT</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>MBA_DIMM</id>
-			<default>0</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-dimm_port-power8</type>
-		<id>Port A:CS1</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>MBA_PORT</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>MBA_DIMM</id>
-			<default>1</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-dimm_port-power8</type>
-		<id>Port B:CS0</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>MBA_PORT</id>
-			<default>1</default>
-		</attribute>
-		<attribute>
-			<id>MBA_DIMM</id>
-			<default>0</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-dimm_port-power8</type>
-		<id>Port B:CS1</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>MBA_PORT</id>
-			<default>1</default>
-		</attribute>
-		<attribute>
-			<id>MBA_DIMM</id>
-			<default>1</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-dimm_port-power8</type>
-		<id>Port C:CS0</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>MBA_PORT</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>MBA_DIMM</id>
-			<default>0</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-dimm_port-power8</type>
-		<id>Port C:CS1</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>MBA_PORT</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>MBA_DIMM</id>
-			<default>1</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-dimm_port-power8</type>
-		<id>Port D:CS0</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>MBA_PORT</id>
-			<default>1</default>
-		</attribute>
-		<attribute>
-			<id>MBA_DIMM</id>
-			<default>0</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-dimm_port-power8</type>
-		<id>Port D:CS1</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>MBA_PORT</id>
-			<default>1</default>
-		</attribute>
-		<attribute>
-			<id>MBA_DIMM</id>
-			<default>1</default>
-		</attribute>
-	</targetInstance>
-
-
-	<targetInstance>
-		<type>unit-dmi-centaur</type>
-		<id>dmi</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-l4-centaur</type>
-		<id>l4</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-mba-centaur</type>
-		<id>mba-0</id>
-		<child_id>Port A:CS0</child_id>
-		<child_id>Port A:CS1</child_id>
-		<child_id>Port B:CS0</child_id>
-		<child_id>Port B:CS1</child_id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>MBA_NUM</id>
-			<default>0</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-mba-centaur</type>
-		<id>mba-1</id>
-		<child_id>Port C:CS0</child_id>
-		<child_id>Port C:CS1</child_id>
-		<child_id>Port D:CS0</child_id>
-		<child_id>Port D:CS1</child_id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>1</default>
-		</attribute>
-		<attribute>
-			<id>MBA_NUM</id>
-			<default>1</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-i2c-master</type>
-		<id>i2c-master</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>I2C_PORT</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>I2C_ENGINE</id>
-			<default>0</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-i2c-master</type>
-		<id>i2c-spare</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>I2C_PORT</id>
-			<default>1</default>
-		</attribute>
-		<attribute>
-			<id>I2C_ENGINE</id>
-			<default>0</default>
-		</attribute>
-	</targetInstance>
-	<!-- Vreg DEvice -->
-	<targetInstance>
-		<type>chip-vreg-generic</type>
-		<instance_name>vreg</instance_name>
-		<child_id>vreg_enable</child_id>
-		<child_id>vreg_pgood</child_id>
-		<child_id>vout</child_id>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-vreg_enable-generic</type>
-		<id>vreg_enable</id>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-vreg_pgood-generic</type>
-		<id>vreg_pgood</id>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-vreg_vout-generic</type>
-		<id>vout</id>
-	</targetInstance>
-
-	<targetInstance>
-		<type>unit-power-generic</type>
-		<id>vddr</id>
-		<attribute>
-			<id>RAIL_NAME</id>
-			<default>VDDR</default>
-		</attribute>
-	</targetInstance>
-
-
-	<!-- VPD Device -->
-
-	<targetInstance>
-		<type>chip-vpd-device</type>
-		<instance_name>vpdchip</instance_name>
-		<child_id>i2c-slave</child_id>
-	</targetInstance>
-	<targetInstance>
-		<type>chip-membuf_vpd-device</type>
-		<instance_name>membuf_vpd</instance_name>
-		<child_id>i2c-slave</child_id>
-		<child_id>vpd_assoc_parent</child_id>
-	</targetInstance>
-	<targetInstance>
-		<type>chip-planar_vpd-device</type>
-		<instance_name>planar_vpd</instance_name>
-		<child_id>i2c-slave</child_id>
-		<child_id>vpd_assoc_parent</child_id>
-	</targetInstance>
-	<targetInstance>
-		<type>chip-spd-device</type>
-		<id>spd</id>
-		<child_id>i2c-slave</child_id>
-	</targetInstance>
-
-
-	<!-- GPIO Expander -->
-	<targetInstance>
-		<type>chip-gpioexp-generic</type>
-		<instance_name>gpio_expander</instance_name>
-		<child_id>i2c-slave</child_id>
-		<child_id>io-0</child_id>
-		<child_id>io-1</child_id>
-		<child_id>io-2</child_id>
-		<child_id>io-3</child_id>
-		<child_id>io-4</child_id>
-		<child_id>io-5</child_id>
-		<child_id>io-6</child_id>
-		<child_id>io-7</child_id>
-		<child_id>io1-0</child_id>
-		<child_id>io1-1</child_id>
-		<child_id>io1-2</child_id>
-		<child_id>io1-3</child_id>
-		<child_id>io1-4</child_id>
-		<child_id>io1-5</child_id>
-		<child_id>io1-6</child_id>
-		<child_id>io1-7</child_id>
-
-	</targetInstance>
-	<targetInstance>
-		<type>unit-gpio-generic</type>
-		<id>io-0</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>SCHEMATIC_INTERFACE</id>
-			<default>IO0</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-gpio-generic</type>
-		<id>io-1</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>1</default>
-		</attribute>
-		<attribute>
-			<id>SCHEMATIC_INTERFACE</id>
-			<default>IO1</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-gpio-generic</type>
-		<id>io-2</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>2</default>
-		</attribute>
-		<attribute>
-			<id>SCHEMATIC_INTERFACE</id>
-			<default>IO2</default>
-		</attribute>
-
-	</targetInstance>
-	<targetInstance>
-		<type>unit-gpio-generic</type>
-		<id>io-3</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>3</default>
-		</attribute>
-		<attribute>
-			<id>SCHEMATIC_INTERFACE</id>
-			<default>IO3</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-gpio-generic</type>
-		<id>io-4</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>4</default>
-		</attribute>
-		<attribute>
-			<id>SCHEMATIC_INTERFACE</id>
-			<default>IO4</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-gpio-generic</type>
-		<id>io-5</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>5</default>
-		</attribute>
-		<attribute>
-			<id>SCHEMATIC_INTERFACE</id>
-			<default>IO5</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-gpio-generic</type>
-		<id>io-6</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>6</default>
-		</attribute>
-		<attribute>
-			<id>SCHEMATIC_INTERFACE</id>
-			<default>IO6</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-gpio-generic</type>
-		<id>io-7</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>7</default>
-		</attribute>
-		<attribute>
-			<id>SCHEMATIC_INTERFACE</id>
-			<default>IO7</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-gpio-generic</type>
-		<id>io1-0</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>8</default>
-		</attribute>
-		<attribute>
-			<id>SCHEMATIC_INTERFACE</id>
-			<default>IO1.0</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-gpio-generic</type>
-		<id>io1-1</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>9</default>
-		</attribute>
-		<attribute>
-			<id>SCHEMATIC_INTERFACE</id>
-			<default>IO1.1</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-gpio-generic</type>
-		<id>io1-2</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>10</default>
-		</attribute>
-		<attribute>
-			<id>SCHEMATIC_INTERFACE</id>
-			<default>IO1.2</default>
-		</attribute>
-
-	</targetInstance>
-	<targetInstance>
-		<type>unit-gpio-generic</type>
-		<id>io1-3</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>11</default>
-		</attribute>
-		<attribute>
-			<id>SCHEMATIC_INTERFACE</id>
-			<default>IO1.3</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-gpio-generic</type>
-		<id>io1-4</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>12</default>
-		</attribute>
-		<attribute>
-			<id>SCHEMATIC_INTERFACE</id>
-			<default>IO1.4</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-gpio-generic</type>
-		<id>io1-5</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>13</default>
-		</attribute>
-		<attribute>
-			<id>SCHEMATIC_INTERFACE</id>
-			<default>IO1.5</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-gpio-generic</type>
-		<id>io1-6</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>14</default>
-		</attribute>
-		<attribute>
-			<id>SCHEMATIC_INTERFACE</id>
-			<default>IO1.6</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-gpio-generic</type>
-		<id>io1-7</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>15</default>
-		</attribute>
-		<attribute>
-			<id>SCHEMATIC_INTERFACE</id>
-			<default>IO1.7</default>
-		</attribute>
-	</targetInstance>
-
-
-	<!-- PCIe cards -->
-	<targetInstance>
-		<type>chip-pcie-endpoint</type>
-		<instance_name>pci_endpoint</instance_name>
-		<child_id>pciep</child_id>
-	</targetInstance>
-	<targetInstance>
-		<type>card-pciecard-card</type>
-		<instance_name>pciecard</instance_name>
-		<child_id>pciep</child_id>
-	</targetInstance>
-	<targetInstance>
-		<type>card-pciecard-cablecard</type>
-		<instance_name>pciecablecard</instance_name>
-		<child_id>pciep</child_id>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-pcie-endpoint</type>
-		<id>pciep</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-	</targetInstance>
-
-	<!-- DIMMS -->
-	<targetInstance>
-		<type>lcard-dimm-jedec</type>
-		<instance_name>dimm</instance_name>
-		<child_id>ddr3</child_id>
-		<child_id>spd</child_id>
-		<hidden_child_id>dimm_temp_sensor</hidden_child_id>
-		<hidden_child_id>dimm_func_sensor</hidden_child_id>
-	</targetInstance>
-	<targetInstance>
-		<type>dimm-cdimm-cdimm</type>
-		<child_id>dmi</child_id>
-		<child_id>spd</child_id>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-ddr3-jedec</type>
-		<id>ddr3</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-	</targetInstance>
-
-	<targetInstance>
-		<type>unit-ddr3-jedec</type>
-		<parent_id>dimm-cdimm-cdimm</parent_id>
-		<id>ddr3</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-logic_assoc-generic</type>
-		<id>vpd_assoc_child</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>ASSOCIATION_TYPE</id>
-			<default>VPD</default>
-		</attribute>
-		<attribute>
-			<id>DIRECTION</id>
-			<default>IN</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-logic_assoc-generic</type>
-		<id>vpd_assoc_parent</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>ASSOCIATION_TYPE</id>
-			<default>VPD</default>
-		</attribute>
-		<attribute>
-			<id>DIRECTION</id>
-			<default>OUT</default>
-		</attribute>
-	</targetInstance>
-
-	<!--  BMC -->
-	<targetInstance>
-		<type>chip-sp-bmc</type>
-		<instance_name>bmc</instance_name>
-		<child_id>bmc_lpc_master</child_id>
-		<child_id>bmc_i2c_master</child_id>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-lpc-master</type>
-		<id>bmc_lpc_master</id>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-i2c-master</type>
-		<id>bmc_i2c_master</id>
-	</targetInstance>
-
-	<!-- FSP -->
-		<targetInstance>
-		<type>unit-i2c-master</type>
-		<id>i2c_m0</id>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-i2c-master</type>
-		<id>i2c_m1</id>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-gpio-generic</type>
-		<id>gpio_0</id>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-gpio-generic</type>
-		<id>gpio_1</id>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-gpio-generic</type>
-		<id>gpio_2</id>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-gpio-generic</type>
-		<id>gpio_3</id>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-fsi-master</type>
-		<id>fsi_m0</id>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-fsi-master</type>
-		<id>fsi_m1</id>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-spcn-master</type>
-		<id>spcn_0</id>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-sc-master</type>
-		<id>sc_0</id>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-jtag-master</type>
-		<id>jtag_0</id>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-u750-master</type>
-		<id>u750_0</id>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-u5-master</type>
-		<id>u5_0</id>
-	</targetInstance>
-
-
-	<!-- LED -->
-	<targetInstance>
-		<type>led-led-generic</type>
-		<instance_name>led</instance_name>
-		<child_id>led_enable</child_id>
-		<child_id>led_assoc</child_id>
-	</targetInstance>
-
-	<targetInstance>
-		<type>unit-gpio-generic</type>
-		<id>led_enable</id>
-		<attribute>
-			<id>DIRECTION</id>
-			<default>IN</default>
-		</attribute>
-		<attribute>
-			<id>GPIO_TYPE</id>
-			<default>ENABLE</default>
-		</attribute>
-
-	</targetInstance>
-	<targetInstance>
-		<type>unit-logic_assoc-generic</type>
-		<id>led_assoc</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>ASSOCIATION_TYPE</id>
-			<default>FRU</default>
-		</attribute>
-		<attribute>
-			<id>DIRECTION</id>
-			<default>OUT</default>
-		</attribute>
-	</targetInstance>
-	<targetInstance>
-		<type>unit-logic_assoc-generic</type>
-		<id>proc_fru_assoc</id>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>ASSOCIATION_TYPE</id>
-			<default>FRU</default>
-		</attribute>
-		<attribute>
-			<id>DIRECTION</id>
-			<default>IN</default>
-		</attribute>
-	</targetInstance>
-
-
-	<!-- Auto generated -->
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio0_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>I2C_SCL[11]</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio0_i2c_config_1</id>
-	<child_id>i2c_m0</child_id>
-	<child_id>i2c_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>I2C_SCL[10]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>I2C_SDA[10]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>I2C_SCL[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>I2C_SDA[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>16</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio0_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_TDI[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_TDO[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_TCK[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>JTAG_TMS[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>14</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio0_spcn_config_3</id>
-	<child_id>spcn_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SPCN_RX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SPCN_TX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SPCN RXEN[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>SPCN TXEN[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>22</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio0_sc_config_4</id>
-	<child_id>sc_0</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SC_CLK[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SC_DIO[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SC_RST[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>12</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio0_u750_config_5</id>
-	<child_id>u750_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>6</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U750_RX[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U750_TX[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>U750_RX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>U750_TX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>15</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group0</id>
-	<child_id>fsp_dio0_gpio_config_0</child_id>
-	<child_id>fsp_dio0_i2c_config_1</child_id>
-	<child_id>fsp_dio0_jtag_config_2</child_id>
-	<child_id>fsp_dio0_spcn_config_3</child_id>
-	<child_id>fsp_dio0_sc_config_4</child_id>
-	<child_id>fsp_dio0_u750_config_5</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio4_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>I2C_SCL[13]</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio4_i2c_config_1</id>
-	<child_id>i2c_m0</child_id>
-	<child_id>i2c_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>I2C_SCL[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>I2C_SDA[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>I2C_SCL[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>I2C_SDA[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>16</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio4_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_TDI[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_TDO[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_TCK[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>JTAG_TMS[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>14</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio4_u5_config_3</id>
-	<child_id>u5_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U5_RXTX[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U5_RXTX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>U5_RXTX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>U5_RXTX[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>22</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio4_sc_config_4</id>
-	<child_id>sc_0</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SC_CLK[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SC_DIO[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SC_RST[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>12</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio4_u750_config_5</id>
-	<child_id>u750_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>6</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U750_RX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U750_TX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>U750_RX[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>U750_TX[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>15</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group1</id>
-	<child_id>fsp_dio4_gpio_config_0</child_id>
-	<child_id>fsp_dio4_i2c_config_1</child_id>
-	<child_id>fsp_dio4_jtag_config_2</child_id>
-	<child_id>fsp_dio4_u5_config_3</child_id>
-	<child_id>fsp_dio4_sc_config_4</child_id>
-	<child_id>fsp_dio4_u750_config_5</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio8_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[8]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[9]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[10]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[11]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>8</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>I2C_SCL[15]</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio8_i2c_config_1</id>
-	<child_id>i2c_m0</child_id>
-	<child_id>i2c_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>I2C_SCL[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>I2C_SDA[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>I2C_SCL[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>I2C_SDA[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>8</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>16</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio8_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_TDI[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_TDO[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_TCK[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>JTAG_TMS[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>8</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>14</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio8_u5_config_3</id>
-	<child_id>u5_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U5_RXTX[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U5_RXTX[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>U5_RXTX[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>U5_RXTX[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>8</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>22</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio8_sc_config_4</id>
-	<child_id>sc_0</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SC_CLK[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SC_DIO[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SC_RST[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[11]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>8</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>12</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio8_u750_config_5</id>
-	<child_id>u750_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>6</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U750_DSR[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U750_DTR[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>U750_DCD[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>U750_RI[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>8</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>15</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group2</id>
-	<child_id>fsp_dio8_gpio_config_0</child_id>
-	<child_id>fsp_dio8_i2c_config_1</child_id>
-	<child_id>fsp_dio8_jtag_config_2</child_id>
-	<child_id>fsp_dio8_u5_config_3</child_id>
-	<child_id>fsp_dio8_sc_config_4</child_id>
-	<child_id>fsp_dio8_u750_config_5</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio12_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[12]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[13]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[14]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[15]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>12</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>I2C_SCL[17]</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio12_i2c_config_1</id>
-	<child_id>i2c_m0</child_id>
-	<child_id>i2c_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>I2C_SCL[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>I2C_SDA[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>I2C_SCL[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>I2C_SDA[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>12</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>16</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio12_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_TDI[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_TDO[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_TCK[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>JTAG_TMS[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>12</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>14</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio12_spcn_config_3</id>
-	<child_id>spcn_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SPCN RX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SPCN TX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SPCN RXEN[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>SPCN TXEN[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>12</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>22</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio12_sc_config_4</id>
-	<child_id>sc_0</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SC_CLK[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SC_DIO[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SC_RST[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[15]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>12</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>12</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio12_u750_config_5</id>
-	<child_id>u750_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>6</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U750_RTS[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U750_CTS[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>U750_RX[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>U750_TX[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>12</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>15</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group3</id>
-	<child_id>fsp_dio12_gpio_config_0</child_id>
-	<child_id>fsp_dio12_i2c_config_1</child_id>
-	<child_id>fsp_dio12_jtag_config_2</child_id>
-	<child_id>fsp_dio12_spcn_config_3</child_id>
-	<child_id>fsp_dio12_sc_config_4</child_id>
-	<child_id>fsp_dio12_u750_config_5</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio16_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[16]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[17]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[18]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[19]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>16</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>I2C_SCL[19]</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio16_i2c_config_1</id>
-	<child_id>i2c_m0</child_id>
-	<child_id>i2c_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>I2C_SCL[8]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>I2C_SDA[8]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>I2C_SCL[9]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>I2C_SDA[9]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>16</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>16</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio16_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_ATTN[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_ATTN[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_ATTN[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>JTAG_ATTN[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>16</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>14</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio16_spcn_config_3</id>
-	<child_id>spcn_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SPCN_RX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SPCN_TX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SPCN RXEN[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>SPCN TXEN[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>16</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>22</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio16_sc_config_4</id>
-	<child_id>sc_0</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SC_CLK[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SC_DIO[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SC_RST[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[19]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>16</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>12</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio16_u750_config_5</id>
-	<child_id>u750_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>6</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U750_DSR[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U750_DTR[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>U750_DCD[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>U750_RI[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>16</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>15</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group4</id>
-	<child_id>fsp_dio16_gpio_config_0</child_id>
-	<child_id>fsp_dio16_i2c_config_1</child_id>
-	<child_id>fsp_dio16_jtag_config_2</child_id>
-	<child_id>fsp_dio16_spcn_config_3</child_id>
-	<child_id>fsp_dio16_sc_config_4</child_id>
-	<child_id>fsp_dio16_u750_config_5</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio20_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[20]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[21]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[22]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[23]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>20</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>I2C_SCL[21]</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio20_i2c_config_1</id>
-	<child_id>i2c_m0</child_id>
-	<child_id>i2c_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>I2CMD2_SCL</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>I2CMD2_SDA</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>I2CMD1_SCL</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>I2CMD1_SDA</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>20</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>16</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio20_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_TDI[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_TDO[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_TCK[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>JTAG_TMS[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>20</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>9</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio20_spcn_config_3</id>
-	<child_id>spcn_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SPCN RX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SPCN TX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SPCN RXEN[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>SPCN TXEN[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>20</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>22</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio20_sc_config_4</id>
-	<child_id>sc_0</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SC_CLK[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SC_DIO[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SC_RST[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[23]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>20</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>12</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio20_u750_config_5</id>
-	<child_id>u750_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>6</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U750_RTS[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U750_CTS[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>U750_RX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>U750_TX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>20</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>15</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group5</id>
-	<child_id>fsp_dio20_gpio_config_0</child_id>
-	<child_id>fsp_dio20_i2c_config_1</child_id>
-	<child_id>fsp_dio20_jtag_config_2</child_id>
-	<child_id>fsp_dio20_spcn_config_3</child_id>
-	<child_id>fsp_dio20_sc_config_4</child_id>
-	<child_id>fsp_dio20_u750_config_5</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio24_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[24]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[25]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[26]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[27]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>6</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>24</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>I2C_SCL[23]</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio24_i2c_config_1</id>
-	<child_id>i2c_m0</child_id>
-	<child_id>i2c_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>I2C_SCL[10]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>I2C_SDA[10]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>I2C_SCL[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>I2C_SDA[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>6</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>24</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>16</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio24_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_TDI[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_TDO[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_TCK[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>JTAG_TMS[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>6</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>24</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>14</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio24_spcn_config_3</id>
-	<child_id>spcn_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SPCN_RX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SPCN_TX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SPCN RXEN[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>SPCN TXEN[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>6</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>24</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>22</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio24_sc_config_4</id>
-	<child_id>sc_0</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SC_CLK[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SC_DIO[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SC_RST[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[27]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>6</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>24</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>12</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio24_u750_config_5</id>
-	<child_id>u750_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>6</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U750_RX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U750_TX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>U750_RX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>U750_TX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>6</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>24</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>15</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group6</id>
-	<child_id>fsp_dio24_gpio_config_0</child_id>
-	<child_id>fsp_dio24_i2c_config_1</child_id>
-	<child_id>fsp_dio24_jtag_config_2</child_id>
-	<child_id>fsp_dio24_spcn_config_3</child_id>
-	<child_id>fsp_dio24_sc_config_4</child_id>
-	<child_id>fsp_dio24_u750_config_5</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio28_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[28]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[29]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[30]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[31]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>7</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>28</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>I2C_SCL[25]</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio28_i2c_config_1</id>
-	<child_id>i2c_m0</child_id>
-	<child_id>i2c_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>I2C_SCL[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>I2C_SDA[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>I2C_SCL[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>I2C_SDA[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>7</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>28</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>16</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio28_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_TDI[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_TDO[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_TCK[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>JTAG_TMS[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>7</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>28</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>14</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio28_u5_config_3</id>
-	<child_id>u5_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U5_RXTX[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U5_RXTX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>U5_RXTX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>U5_RXTX[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>7</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>28</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>22</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio28_sc_config_4</id>
-	<child_id>sc_0</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SC_CLK[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SC_DIO[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SC_RST[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[31]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>7</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>28</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>12</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio28_u750_config_5</id>
-	<child_id>u750_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>6</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U750_RX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U750_TX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[30]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[31]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>7</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>28</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>15</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group7</id>
-	<child_id>fsp_dio28_gpio_config_0</child_id>
-	<child_id>fsp_dio28_i2c_config_1</child_id>
-	<child_id>fsp_dio28_jtag_config_2</child_id>
-	<child_id>fsp_dio28_u5_config_3</child_id>
-	<child_id>fsp_dio28_sc_config_4</child_id>
-	<child_id>fsp_dio28_u750_config_5</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio32_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[32]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[33]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[34]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[35]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>8</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>32</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>I2C_SCL[27]</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio32_i2c_config_1</id>
-	<child_id>i2c_m0</child_id>
-	<child_id>i2c_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>I2C_SCL[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>I2C_SDA[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>I2C_SCL[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>I2C_SDA[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>8</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>32</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>17</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio32_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_ATTN[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_ATTN[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_ATTN[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[35]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>8</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>32</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>14</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio32_u5_config_3</id>
-	<child_id>u5_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U5_RXTX[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U5_RXTX[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>U5_RXTX[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>U5_RXTX[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>8</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>32</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>22</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio32_sc_config_4</id>
-	<child_id>sc_0</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SC_CLK[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SC_DIO[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SC_RST[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[35]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>8</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>32</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>12</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio32_u750_config_5</id>
-	<child_id>u750_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>6</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U750_RX[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U750_TX[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>U750_RX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>U750_TX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>8</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>32</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>15</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group8</id>
-	<child_id>fsp_dio32_gpio_config_0</child_id>
-	<child_id>fsp_dio32_i2c_config_1</child_id>
-	<child_id>fsp_dio32_jtag_config_2</child_id>
-	<child_id>fsp_dio32_u5_config_3</child_id>
-	<child_id>fsp_dio32_sc_config_4</child_id>
-	<child_id>fsp_dio32_u750_config_5</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio36_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[36]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[37]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[38]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[39]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>9</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>36</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>I2C_SCL[29]</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio36_i2c_config_1</id>
-	<child_id>i2c_m0</child_id>
-	<child_id>i2c_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>I2C_SCL[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>I2C_SDA[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>I2C_SCL[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>I2C_SDA[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>9</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>36</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>17</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio36_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_TDI[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_TDO[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_TCK[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>JTAG_TMS[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>9</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>36</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>14</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio36_spcn_config_3</id>
-	<child_id>spcn_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SPCN RX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SPCN TX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SPCN RXEN[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>SPCN TXEN[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>9</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>36</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>22</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio36_sc_config_4</id>
-	<child_id>sc_0</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SC_CLK[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SC_DIO[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SC_RST[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[39]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>9</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>36</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>12</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio36_u750_config_5</id>
-	<child_id>u750_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>6</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U750_RX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U750_TX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>U750_RX[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>U750_TX[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>9</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>36</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>15</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group9</id>
-	<child_id>fsp_dio36_gpio_config_0</child_id>
-	<child_id>fsp_dio36_i2c_config_1</child_id>
-	<child_id>fsp_dio36_jtag_config_2</child_id>
-	<child_id>fsp_dio36_spcn_config_3</child_id>
-	<child_id>fsp_dio36_sc_config_4</child_id>
-	<child_id>fsp_dio36_u750_config_5</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio40_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[40]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[41]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[42]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[43]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>10</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>40</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>I2C_SCL[31]</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio40_i2c_config_1</id>
-	<child_id>i2c_m0</child_id>
-	<child_id>i2c_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>I2C_SCL[8]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>I2C_SDA[8]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>I2C_SCL[9]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>I2C_SDA[9]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>10</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>40</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>17</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio40_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_TDI[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_TDO[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_TCK[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>JTAG_TMS[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>10</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>40</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>14</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio40_spcn_config_3</id>
-	<child_id>spcn_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SPCN_RX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SPCN_TX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SPCN RXEN[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>SPCN TXEN[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>10</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>40</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>22</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio40_sc_config_4</id>
-	<child_id>sc_0</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SC_CLK[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SC_DIO[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SC_RST[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[43]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>10</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>40</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>12</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio40_u750_config_5</id>
-	<child_id>u750_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>6</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U750_DSR[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U750_DTR[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>U750_DCD[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>U750_RI[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>10</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>40</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>15</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group10</id>
-	<child_id>fsp_dio40_gpio_config_0</child_id>
-	<child_id>fsp_dio40_i2c_config_1</child_id>
-	<child_id>fsp_dio40_jtag_config_2</child_id>
-	<child_id>fsp_dio40_spcn_config_3</child_id>
-	<child_id>fsp_dio40_sc_config_4</child_id>
-	<child_id>fsp_dio40_u750_config_5</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio44_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[44]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[45]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[46]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[47]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>11</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>44</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>I2C_SCL[33]</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio44_i2c_config_1</id>
-	<child_id>i2c_m0</child_id>
-	<child_id>i2c_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>I2CMD2_SCL</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>I2CMD2_SDA</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>I2CMD1_SCL</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>I2CMD1_SDA</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>11</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>44</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>17</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio44_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_TDI[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_TDO[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_TCK[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>JTAG_TMS[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>11</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>44</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>9</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio44_spcn_config_3</id>
-	<child_id>spcn_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SPCN RX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SPCN TX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SPCN RXEN[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>SPCN TXEN[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>11</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>44</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>22</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio44_sc_config_4</id>
-	<child_id>sc_0</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SC_CLK[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SC_DIO[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SC_RST[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[47]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>11</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>44</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>12</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio44_u750_config_5</id>
-	<child_id>u750_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>6</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U750_RTS[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U750_CTS[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>U750_RX[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>U750_TX[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>11</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>44</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>15</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group11</id>
-	<child_id>fsp_dio44_gpio_config_0</child_id>
-	<child_id>fsp_dio44_i2c_config_1</child_id>
-	<child_id>fsp_dio44_jtag_config_2</child_id>
-	<child_id>fsp_dio44_spcn_config_3</child_id>
-	<child_id>fsp_dio44_sc_config_4</child_id>
-	<child_id>fsp_dio44_u750_config_5</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio48_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[48]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[49]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[50]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[51]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>12</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>48</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>I2C_SCL[10]</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio48_i2c_config_1</id>
-	<child_id>i2c_m0</child_id>
-	<child_id>i2c_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>I2C_SCL[10]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>I2C_SDA[10]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>I2C_SCL[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>I2C_SDA[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>12</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>48</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>17</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio48_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_TDI[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_TDO[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_TCK[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>JTAG_TMS[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>12</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>48</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>14</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio48_spcn_config_3</id>
-	<child_id>spcn_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SPCN_RX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SPCN_TX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SPCN RXEN[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>SPCN TXEN[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>12</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>48</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>22</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio48_sc_config_4</id>
-	<child_id>sc_0</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SC_CLK[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SC_DIO[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SC_RST[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[51]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>12</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>48</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>12</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio48_u750_config_5</id>
-	<child_id>u750_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>6</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U750_DSR[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U750_DTR[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>U750_DCD[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>U750_RI[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>12</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>48</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>15</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group12</id>
-	<child_id>fsp_dio48_gpio_config_0</child_id>
-	<child_id>fsp_dio48_i2c_config_1</child_id>
-	<child_id>fsp_dio48_jtag_config_2</child_id>
-	<child_id>fsp_dio48_spcn_config_3</child_id>
-	<child_id>fsp_dio48_sc_config_4</child_id>
-	<child_id>fsp_dio48_u750_config_5</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio52_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[52]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[53]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[54]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[55]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>13</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>52</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>I2C_SCL[2]</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio52_i2c_config_1</id>
-	<child_id>i2c_m0</child_id>
-	<child_id>i2c_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>I2C_SCL[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>I2C_SDA[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>I2C_SCL[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>I2C_SDA[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>13</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>52</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>17</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio52_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_ATTN[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_ATTN[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_ATTN[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>JTAG_ATTN[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>13</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>52</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>14</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio52_u5_config_3</id>
-	<child_id>u5_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U5_RXTX[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U5_RXTX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>U5_RXTX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>U5_RXTX[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>13</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>52</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>22</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio52_sc_config_4</id>
-	<child_id>sc_0</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SC_CLK[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SC_DIO[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SC_RST[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[55]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>13</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>52</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>12</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio52_u750_config_5</id>
-	<child_id>u750_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>6</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U750_RTS[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U750_CTS[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>U750_RX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>U750_TX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>13</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>52</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>15</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group13</id>
-	<child_id>fsp_dio52_gpio_config_0</child_id>
-	<child_id>fsp_dio52_i2c_config_1</child_id>
-	<child_id>fsp_dio52_jtag_config_2</child_id>
-	<child_id>fsp_dio52_u5_config_3</child_id>
-	<child_id>fsp_dio52_sc_config_4</child_id>
-	<child_id>fsp_dio52_u750_config_5</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio56_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[56]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[57]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[58]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[59]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>14</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>56</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>I2C_SCL[4]</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio56_i2c_config_1</id>
-	<child_id>i2c_m0</child_id>
-	<child_id>i2c_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>I2C_SCL[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>I2C_SDA[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>I2C_SCL[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>I2C_SDA[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>14</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>56</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>17</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio56_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_TDI[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_TDO[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_TCK[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>JTAG_TMS[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>14</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>56</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>14</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio56_u5_config_3</id>
-	<child_id>u5_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U5_RXTX[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U5_RXTX[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>U5_RXTX[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>U5_RXTX[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>14</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>56</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>22</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio56_sc_config_4</id>
-	<child_id>sc_0</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SC_CLK[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SC_DIO[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SC_RST[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[59]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>14</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>56</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>12</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio56_u750_config_5</id>
-	<child_id>u750_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>6</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U750_RX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U750_TX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>U750_RX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>U750_TX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>14</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>56</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>15</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group14</id>
-	<child_id>fsp_dio56_gpio_config_0</child_id>
-	<child_id>fsp_dio56_i2c_config_1</child_id>
-	<child_id>fsp_dio56_jtag_config_2</child_id>
-	<child_id>fsp_dio56_u5_config_3</child_id>
-	<child_id>fsp_dio56_sc_config_4</child_id>
-	<child_id>fsp_dio56_u750_config_5</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio60_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[60]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[61]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[62]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[63]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>15</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>60</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>I2C_SCL[6]</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio60_i2c_config_1</id>
-	<child_id>i2c_m0</child_id>
-	<child_id>i2c_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>I2C_SCL[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>I2C_SDA[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>I2C_SCL[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>I2C_SDA[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>15</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>60</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>17</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio60_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_TDI[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_TDO[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_TCK[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>JTAG_TMS[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>15</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>60</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>14</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio60_spcn_config_3</id>
-	<child_id>spcn_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SPCN RX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SPCN TX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SPCN RXEN[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>SPCN TXEN[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>15</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>60</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>22</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio60_sc_config_4</id>
-	<child_id>sc_0</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SC_CLK[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SC_DIO[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SC_RST[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[63]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>15</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>60</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>12</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio60_u750_config_5</id>
-	<child_id>u750_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>6</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U750_RX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U750_TX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[62]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[63]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>15</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>60</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>15</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group15</id>
-	<child_id>fsp_dio60_gpio_config_0</child_id>
-	<child_id>fsp_dio60_i2c_config_1</child_id>
-	<child_id>fsp_dio60_jtag_config_2</child_id>
-	<child_id>fsp_dio60_spcn_config_3</child_id>
-	<child_id>fsp_dio60_sc_config_4</child_id>
-	<child_id>fsp_dio60_u750_config_5</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio64_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[64]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[65]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[66]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[67]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>16</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>64</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>I2C_SCL[8]</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio64_i2c_config_1</id>
-	<child_id>i2c_m0</child_id>
-	<child_id>i2c_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>I2C_SCL[8]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>I2C_SDA[8]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>I2C_SCL[9]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>I2C_SDA[9]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>16</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>64</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>18</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio64_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_TDI[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_TDO[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_TCK[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>JTAG_TMS[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>16</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>64</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>14</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio64_spcn_config_3</id>
-	<child_id>spcn_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SPCN_RX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SPCN_TX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SPCN RXEN[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>SPCN TXEN[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>16</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>64</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>22</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio64_sc_config_4</id>
-	<child_id>sc_0</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SC_CLK[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SC_DIO[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SC_RST[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[67]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>16</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>64</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>12</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio64_u750_config_5</id>
-	<child_id>u750_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>6</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U750_RX[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U750_TX[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>U750_RX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>U750_TX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>16</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>64</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>15</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group16</id>
-	<child_id>fsp_dio64_gpio_config_0</child_id>
-	<child_id>fsp_dio64_i2c_config_1</child_id>
-	<child_id>fsp_dio64_jtag_config_2</child_id>
-	<child_id>fsp_dio64_spcn_config_3</child_id>
-	<child_id>fsp_dio64_sc_config_4</child_id>
-	<child_id>fsp_dio64_u750_config_5</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio68_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[68]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[69]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[70]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[71]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>17</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>68</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>I2CMD2_SCL</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio68_i2c_config_1</id>
-	<child_id>i2c_m0</child_id>
-	<child_id>i2c_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>I2CMD2_SCL</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>I2CMD2_SDA</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>I2CMD1_SCL</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>I2CMD1_SDA</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>17</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>68</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>18</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio68_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_ATTN[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_ATTN[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_ATTN[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[71]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>17</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>68</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>9</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio68_spcn_config_3</id>
-	<child_id>spcn_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SPCN RX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SPCN TX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SPCN RXEN[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>SPCN TXEN[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>17</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>68</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>22</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio68_sc_config_4</id>
-	<child_id>sc_0</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SC_CLK[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SC_DIO[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SC_RST[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[71]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>17</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>68</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>12</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio68_u750_config_5</id>
-	<child_id>u750_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>6</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U750_RX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U750_TX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>U750_RX[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>U750_TX[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>17</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>68</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>15</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group17</id>
-	<child_id>fsp_dio68_gpio_config_0</child_id>
-	<child_id>fsp_dio68_i2c_config_1</child_id>
-	<child_id>fsp_dio68_jtag_config_2</child_id>
-	<child_id>fsp_dio68_spcn_config_3</child_id>
-	<child_id>fsp_dio68_sc_config_4</child_id>
-	<child_id>fsp_dio68_u750_config_5</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio72_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[72]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[73]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[74]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[75]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>18</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>72</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>I2C_SCL[35]</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio72_i2c_config_1</id>
-	<child_id>i2c_m0</child_id>
-	<child_id>i2c_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>I2C_SCL[10]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>I2C_SDA[10]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>I2C_SCL[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>I2C_SDA[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>18</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>72</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>18</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio72_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_TDI[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_TDO[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_TCK[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>JTAG_TMS[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>18</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>72</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>14</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio72_spcn_config_3</id>
-	<child_id>spcn_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SPCN_RX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SPCN_TX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SPCN RXEN[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>SPCN TXEN[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>18</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>72</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>22</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio72_sc_config_4</id>
-	<child_id>sc_0</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SC_CLK[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SC_DIO[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SC_RST[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[75]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>18</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>72</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>12</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio72_u750_config_5</id>
-	<child_id>u750_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>6</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U750_DSR[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U750_DTR[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>U750_DCD[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>U750_RI[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>18</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>72</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>15</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group18</id>
-	<child_id>fsp_dio72_gpio_config_0</child_id>
-	<child_id>fsp_dio72_i2c_config_1</child_id>
-	<child_id>fsp_dio72_jtag_config_2</child_id>
-	<child_id>fsp_dio72_spcn_config_3</child_id>
-	<child_id>fsp_dio72_sc_config_4</child_id>
-	<child_id>fsp_dio72_u750_config_5</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio76_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[76]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[77]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[78]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[79]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>19</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>76</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>I2C_SCL[37]</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio76_i2c_config_1</id>
-	<child_id>i2c_m0</child_id>
-	<child_id>i2c_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>I2C_SCL[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>I2C_SDA[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>I2C_SCL[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>I2C_SDA[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>19</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>76</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>18</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio76_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_TDI[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_TDO[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_TCK[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>JTAG_TMS[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>19</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>76</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>14</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio76_u5_config_3</id>
-	<child_id>u5_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U5_RXTX[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U5_RXTX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>U5_RXTX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>U5_RXTX[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>19</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>76</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>22</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio76_sc_config_4</id>
-	<child_id>sc_0</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SC_CLK[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SC_DIO[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SC_RST[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[79]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>19</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>76</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>12</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio76_u750_config_5</id>
-	<child_id>u750_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>6</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U750_RTS[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U750_CTS[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>U750_RX[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>U750_TX[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>19</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>76</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>15</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group19</id>
-	<child_id>fsp_dio76_gpio_config_0</child_id>
-	<child_id>fsp_dio76_i2c_config_1</child_id>
-	<child_id>fsp_dio76_jtag_config_2</child_id>
-	<child_id>fsp_dio76_u5_config_3</child_id>
-	<child_id>fsp_dio76_sc_config_4</child_id>
-	<child_id>fsp_dio76_u750_config_5</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio80_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[80]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[81]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[82]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[83]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>20</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>80</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>I2C_SCL[39]</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio80_i2c_config_1</id>
-	<child_id>i2c_m0</child_id>
-	<child_id>i2c_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>I2C_SCL[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>I2C_SDA[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>I2C_SCL[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>I2C_SDA[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>20</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>80</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>18</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio80_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_TDI[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_TDO[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_TCK[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>JTAG_TMS[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>20</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>80</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>14</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio80_u5_config_3</id>
-	<child_id>u5_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U5_RXTX[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U5_RXTX[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>U5_RXTX[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>U5_RXTX[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>20</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>80</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>22</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio80_sc_config_4</id>
-	<child_id>sc_0</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SC_CLK[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SC_DIO[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SC_RST[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[83]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>20</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>80</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>12</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio80_u750_config_5</id>
-	<child_id>u750_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>6</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U750_DSR[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U750_DTR[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>U750_DCD[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>U750_RI[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>20</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>80</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>15</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group20</id>
-	<child_id>fsp_dio80_gpio_config_0</child_id>
-	<child_id>fsp_dio80_i2c_config_1</child_id>
-	<child_id>fsp_dio80_jtag_config_2</child_id>
-	<child_id>fsp_dio80_u5_config_3</child_id>
-	<child_id>fsp_dio80_sc_config_4</child_id>
-	<child_id>fsp_dio80_u750_config_5</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio84_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[84]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[85]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[86]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[87]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>21</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>84</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>I2C_SCL[41]</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio84_i2c_config_1</id>
-	<child_id>i2c_m0</child_id>
-	<child_id>i2c_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>I2C_SCL[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>I2C_SDA[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>I2C_SCL[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>I2C_SDA[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>21</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>84</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>18</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio84_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_TDI[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_TDO[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_TCK[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>JTAG_TMS[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>21</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>84</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>14</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio84_spcn_config_3</id>
-	<child_id>spcn_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SPCN RX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SPCN TX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SPCN RXEN[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>SPCN TXEN[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>21</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>84</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>22</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio84_sc_config_4</id>
-	<child_id>sc_0</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SC_CLK[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SC_DIO[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SC_RST[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[87]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>21</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>84</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>12</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio84_u750_config_5</id>
-	<child_id>u750_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>6</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U750_RTS[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U750_CTS[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>U750_RX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>U750_TX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>21</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>84</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>15</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group21</id>
-	<child_id>fsp_dio84_gpio_config_0</child_id>
-	<child_id>fsp_dio84_i2c_config_1</child_id>
-	<child_id>fsp_dio84_jtag_config_2</child_id>
-	<child_id>fsp_dio84_spcn_config_3</child_id>
-	<child_id>fsp_dio84_sc_config_4</child_id>
-	<child_id>fsp_dio84_u750_config_5</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio88_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[88]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[89]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[90]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[91]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>22</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>88</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>I2C_SCL[43]</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio88_i2c_config_1</id>
-	<child_id>i2c_m0</child_id>
-	<child_id>i2c_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>I2C_SCL[8]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>I2C_SDA[8]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>I2C_SCL[9]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>I2C_SDA[9]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>22</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>88</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>18</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio88_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_ATTN[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_ATTN[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_ATTN[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>JTAG_ATTN[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>22</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>88</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>14</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio88_spcn_config_3</id>
-	<child_id>spcn_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SPCN_RX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SPCN_TX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SPCN RXEN[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>SPCN TXEN[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>22</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>88</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>22</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio88_sc_config_4</id>
-	<child_id>sc_0</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SC_CLK[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SC_DIO[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SC_RST[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[91]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>22</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>88</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>12</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio88_u750_config_5</id>
-	<child_id>u750_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>6</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U750_RX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U750_TX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>U750_RX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>U750_TX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>22</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>88</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>15</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group22</id>
-	<child_id>fsp_dio88_gpio_config_0</child_id>
-	<child_id>fsp_dio88_i2c_config_1</child_id>
-	<child_id>fsp_dio88_jtag_config_2</child_id>
-	<child_id>fsp_dio88_spcn_config_3</child_id>
-	<child_id>fsp_dio88_sc_config_4</child_id>
-	<child_id>fsp_dio88_u750_config_5</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio92_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[92]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[93]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[94]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[95]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>23</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>92</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>I2C_SCL[45]</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio92_i2c_config_1</id>
-	<child_id>i2c_m0</child_id>
-	<child_id>i2c_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>I2CMD2_SCL</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>I2CMD2_SDA</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>I2CMD1_SCL</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>I2CMD1_SDA</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>23</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>92</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>18</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio92_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_TDI[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_TDO[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_TCK[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>JTAG_TMS[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>23</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>92</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>9</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio92_spcn_config_3</id>
-	<child_id>spcn_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SPCN RX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SPCN TX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SPCN RXEN[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>SPCN TXEN[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>23</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>92</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>22</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio92_sc_config_4</id>
-	<child_id>sc_0</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SC_CLK[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SC_DIO[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SC_RST[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[95]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>23</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>92</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>12</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio92_u750_config_5</id>
-	<child_id>u750_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>6</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U750_RX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U750_TX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[94]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[95]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>23</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>92</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>15</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group23</id>
-	<child_id>fsp_dio92_gpio_config_0</child_id>
-	<child_id>fsp_dio92_i2c_config_1</child_id>
-	<child_id>fsp_dio92_jtag_config_2</child_id>
-	<child_id>fsp_dio92_spcn_config_3</child_id>
-	<child_id>fsp_dio92_sc_config_4</child_id>
-	<child_id>fsp_dio92_u750_config_5</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio96_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[96]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[97]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[98]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[99]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>24</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>96</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default></default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio96_fsi_config_1</id>
-	<child_id>fsi_m0</child_id>
-	<child_id>fsi_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>FSIM_CLK[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>FSIM_DIO[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>FSIM_CLK[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>FSIM_DIO[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>24</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>96</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>19</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio96_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_TDI[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_TDO[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_TCK[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>JTAG_TMS[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>24</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>96</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>NA</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio96_spcn_config_3</id>
-	<child_id>spcn_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SPCN_RX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SPCN_TX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SPCN RXEN[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>SPCN TXEN[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>24</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>96</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>22</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio96_sc_config_4</id>
-	<child_id>sc_0</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SC_CLK[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SC_DIO[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SC_RST[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[99]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>24</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>96</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>12</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio96_u750_config_5</id>
-	<child_id>u750_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>6</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U750_RX[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U750_TX[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>U750_RX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>U750_TX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>24</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>96</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>15</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group24</id>
-	<child_id>fsp_dio96_gpio_config_0</child_id>
-	<child_id>fsp_dio96_fsi_config_1</child_id>
-	<child_id>fsp_dio96_jtag_config_2</child_id>
-	<child_id>fsp_dio96_spcn_config_3</child_id>
-	<child_id>fsp_dio96_sc_config_4</child_id>
-	<child_id>fsp_dio96_u750_config_5</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio100_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[100]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[101]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[102]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[103]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>25</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>100</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default></default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio100_fsi_config_1</id>
-	<child_id>fsi_m0</child_id>
-	<child_id>fsi_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>FSIM_CLK[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>FSIM_DIO[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>FSIM_CLK[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>FSIM_DIO[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>25</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>100</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>19</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio100_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_TDI[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_TDO[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_TCK[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>JTAG_TMS[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>25</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>100</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>NA</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio100_u5_config_3</id>
-	<child_id>u5_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U5_RXTX[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U5_RXTX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>U5_RXTX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>U5_RXTX[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>25</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>100</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>22</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio100_sc_config_4</id>
-	<child_id>sc_0</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SC_CLK[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SC_DIO[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SC_RST[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[103]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>25</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>100</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>12</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio100_u750_config_5</id>
-	<child_id>u750_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>6</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U750_RX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U750_TX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>U750_RX[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>U750_TX[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>25</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>100</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>15</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group25</id>
-	<child_id>fsp_dio100_gpio_config_0</child_id>
-	<child_id>fsp_dio100_fsi_config_1</child_id>
-	<child_id>fsp_dio100_jtag_config_2</child_id>
-	<child_id>fsp_dio100_u5_config_3</child_id>
-	<child_id>fsp_dio100_sc_config_4</child_id>
-	<child_id>fsp_dio100_u750_config_5</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio104_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[104]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[105]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[106]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[107]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>26</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>104</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default></default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio104_fsi_config_1</id>
-	<child_id>fsi_m0</child_id>
-	<child_id>fsi_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>FSIM_CLK[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>FSIM_DIO[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>FSIM_CLK[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>FSIM_DIO[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>26</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>104</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>19</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio104_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_ATTN[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_ATTN[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_ATTN[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[107]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>26</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>104</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>NA</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio104_u5_config_3</id>
-	<child_id>u5_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U5_RXTX[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U5_RXTX[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>U5_RXTX[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>U5_RXTX[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>26</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>104</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>22</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio104_sc_config_4</id>
-	<child_id>sc_0</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SC_CLK[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SC_DIO[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SC_RST[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[107]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>26</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>104</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>12</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio104_u750_config_5</id>
-	<child_id>u750_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>6</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U750_DSR[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U750_DTR[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>U750_DCD[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>U750_RI[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>26</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>104</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>15</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group26</id>
-	<child_id>fsp_dio104_gpio_config_0</child_id>
-	<child_id>fsp_dio104_fsi_config_1</child_id>
-	<child_id>fsp_dio104_jtag_config_2</child_id>
-	<child_id>fsp_dio104_u5_config_3</child_id>
-	<child_id>fsp_dio104_sc_config_4</child_id>
-	<child_id>fsp_dio104_u750_config_5</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio108_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[108]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[109]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[110]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[111]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>27</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>108</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default></default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio108_fsi_config_1</id>
-	<child_id>fsi_m0</child_id>
-	<child_id>fsi_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>FSIM_CLK[8]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>FSIM_DIO[8]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>FSIM_CLK[9]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>FSIM_DIO[9]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>27</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>108</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>19</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio108_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_TDI[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_TDO[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_TCK[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>JTAG_TMS[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>27</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>108</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>NA</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio108_spcn_config_3</id>
-	<child_id>spcn_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SPCN RX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SPCN TX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SPCN RXEN[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>SPCN TXEN[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>27</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>108</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>22</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio108_sc_config_4</id>
-	<child_id>sc_0</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SC_CLK[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SC_DIO[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SC_RST[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[111]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>27</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>108</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>12</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio108_u750_config_5</id>
-	<child_id>u750_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>6</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U750_RTS[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U750_CTS[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>U750_RX[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>U750_TX[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>27</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>108</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>15</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group27</id>
-	<child_id>fsp_dio108_gpio_config_0</child_id>
-	<child_id>fsp_dio108_fsi_config_1</child_id>
-	<child_id>fsp_dio108_jtag_config_2</child_id>
-	<child_id>fsp_dio108_spcn_config_3</child_id>
-	<child_id>fsp_dio108_sc_config_4</child_id>
-	<child_id>fsp_dio108_u750_config_5</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio112_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[112]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[113]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[114]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[115]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>28</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>112</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default></default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio112_fsi_config_1</id>
-	<child_id>fsi_m0</child_id>
-	<child_id>fsi_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>FSIM_CLK[10]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>FSIM_DIO[10]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>FSIM_CLK[11]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>FSIM_DIO[11]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>28</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>112</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>19</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio112_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_TDI[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_TDO[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_TCK[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>JTAG_TMS[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>28</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>112</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>NA</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio112_spcn_config_3</id>
-	<child_id>spcn_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SPCN_RX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SPCN_TX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SPCN RXEN[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>SPCN TXEN[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>28</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>112</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>22</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio112_sc_config_4</id>
-	<child_id>sc_0</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SC_CLK[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SC_DIO[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SC_RST[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[115]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>28</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>112</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>12</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio112_u750_config_5</id>
-	<child_id>u750_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>6</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U750_DSR[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U750_DTR[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>U750_DCD[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>U750_RI[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>28</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>112</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>15</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group28</id>
-	<child_id>fsp_dio112_gpio_config_0</child_id>
-	<child_id>fsp_dio112_fsi_config_1</child_id>
-	<child_id>fsp_dio112_jtag_config_2</child_id>
-	<child_id>fsp_dio112_spcn_config_3</child_id>
-	<child_id>fsp_dio112_sc_config_4</child_id>
-	<child_id>fsp_dio112_u750_config_5</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio116_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[116]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[117]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[118]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[119]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>29</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>116</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default></default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio116_fsi_config_1</id>
-	<child_id>fsi_m0</child_id>
-	<child_id>fsi_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>FSIM_CLK[12]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>FSIM_DIO[12]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>FSIM_CLK[13]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>FSIM_DIO[13]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>29</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>116</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>19</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio116_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_TDI[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_TDO[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_TCK[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>JTAG_TMS[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>29</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>116</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>NA</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio116_spcn_config_3</id>
-	<child_id>spcn_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SPCN RX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SPCN TX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SPCN RXEN[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>SPCN TXEN[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>29</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>116</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>22</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio116_sc_config_4</id>
-	<child_id>sc_0</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SC_CLK[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SC_DIO[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SC_RST[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[119]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>29</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>116</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>12</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio116_u750_config_5</id>
-	<child_id>u750_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>6</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U750_RTS[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U750_CTS[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>U750_RX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>U750_TX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>29</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>116</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>15</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group29</id>
-	<child_id>fsp_dio116_gpio_config_0</child_id>
-	<child_id>fsp_dio116_fsi_config_1</child_id>
-	<child_id>fsp_dio116_jtag_config_2</child_id>
-	<child_id>fsp_dio116_spcn_config_3</child_id>
-	<child_id>fsp_dio116_sc_config_4</child_id>
-	<child_id>fsp_dio116_u750_config_5</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio120_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[120]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[121]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[122]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[123]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>30</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>120</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default></default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio120_fsi_config_1</id>
-	<child_id>fsi_m0</child_id>
-	<child_id>fsi_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>FSIM_CLK[14]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>FSIM_DIO[14]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>FSIM_CLK[15]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>FSIM_DIO[15]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>30</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>120</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>19</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio120_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_TDI[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_TDO[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_TCK[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>JTAG_TMS[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>30</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>120</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>NA</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio120_spcn_config_3</id>
-	<child_id>spcn_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SPCN_RX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SPCN_TX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SPCN RXEN[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>SPCN TXEN[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>30</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>120</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>22</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio120_sc_config_4</id>
-	<child_id>sc_0</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SC_CLK[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SC_DIO[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SC_RST[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[123]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>30</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>120</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>12</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio120_u750_config_5</id>
-	<child_id>u750_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>6</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U750_RX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U750_TX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>U750_RX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>U750_TX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>30</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>120</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>15</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group30</id>
-	<child_id>fsp_dio120_gpio_config_0</child_id>
-	<child_id>fsp_dio120_fsi_config_1</child_id>
-	<child_id>fsp_dio120_jtag_config_2</child_id>
-	<child_id>fsp_dio120_spcn_config_3</child_id>
-	<child_id>fsp_dio120_sc_config_4</child_id>
-	<child_id>fsp_dio120_u750_config_5</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio124_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[124]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[125]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[126]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[127]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>31</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>124</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default></default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio124_fsi_config_1</id>
-	<child_id>fsi_m0</child_id>
-	<child_id>fsi_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>FSIM_CLK[16]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>FSIM_DIO[16]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>FSIM_CLK[17]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>FSIM_DIO[17]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>31</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>124</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>19</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio124_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_ATTN[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_ATTN[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_ATTN[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>JTAG_ATTN[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>31</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>124</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>NA</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio124_u5_config_3</id>
-	<child_id>u5_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U5_RXTX[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U5_RXTX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>U5_RXTX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>U5_RXTX[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>31</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>124</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>22</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio124_sc_config_4</id>
-	<child_id>sc_0</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SC_CLK[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SC_DIO[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SC_RST[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[127]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>31</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>124</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>12</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio124_u750_config_5</id>
-	<child_id>u750_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>6</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U750_RX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U750_TX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[126]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[127]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>31</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>124</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>15</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group31</id>
-	<child_id>fsp_dio124_gpio_config_0</child_id>
-	<child_id>fsp_dio124_fsi_config_1</child_id>
-	<child_id>fsp_dio124_jtag_config_2</child_id>
-	<child_id>fsp_dio124_u5_config_3</child_id>
-	<child_id>fsp_dio124_sc_config_4</child_id>
-	<child_id>fsp_dio124_u750_config_5</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio128_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[128]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[129]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[130]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[131]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>32</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>128</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default></default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio128_fsi_config_1</id>
-	<child_id>fsi_m0</child_id>
-	<child_id>fsi_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>FSIM_CLK[18]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>FSIM_DIO[18]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>FSIM_CLK[19]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>FSIM_DIO[19]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>32</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>128</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>20</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio128_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_TDI[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_TDO[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_TCK[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>JTAG_TMS[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>32</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>128</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>NA</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio128_u5_config_3</id>
-	<child_id>u5_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U5_RXTX[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U5_RXTX[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>U5_RXTX[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>U5_RXTX[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>32</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>128</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>22</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio128_sc_config_4</id>
-	<child_id>sc_0</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SC_CLK[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SC_DIO[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SC_RST[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[131]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>32</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>128</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>12</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio128_u750_config_5</id>
-	<child_id>u750_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>6</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U750_RX[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U750_TX[0]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>U750_RX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>U750_TX[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>32</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>128</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>15</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group32</id>
-	<child_id>fsp_dio128_gpio_config_0</child_id>
-	<child_id>fsp_dio128_fsi_config_1</child_id>
-	<child_id>fsp_dio128_jtag_config_2</child_id>
-	<child_id>fsp_dio128_u5_config_3</child_id>
-	<child_id>fsp_dio128_sc_config_4</child_id>
-	<child_id>fsp_dio128_u750_config_5</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio132_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[132]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[133]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[134]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[135]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>33</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>132</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default></default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio132_fsi_config_1</id>
-	<child_id>fsi_m0</child_id>
-	<child_id>fsi_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>FSIM_CLK[20]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>FSIM_DIO[20]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>FSIM_CLK[21]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>FSIM_DIO[21]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>33</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>132</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>20</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio132_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_TDI[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_TDO[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_TCK[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>JTAG_TMS[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>33</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>132</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>NA</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio132_spcn_config_3</id>
-	<child_id>spcn_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SPCN RX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SPCN TX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SPCN RXEN[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>SPCN TXEN[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>33</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>132</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>22</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio132_sc_config_4</id>
-	<child_id>sc_0</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>SC_CLK[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>SC_DIO[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>SC_RST[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[135]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>33</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>4</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>132</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>12</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio132_u750_config_5</id>
-	<child_id>u750_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>6</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>U750_RX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>U750_TX[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>U750_RX[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>U750_TX[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>33</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>5</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>132</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>15</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group33</id>
-	<child_id>fsp_dio132_gpio_config_0</child_id>
-	<child_id>fsp_dio132_fsi_config_1</child_id>
-	<child_id>fsp_dio132_jtag_config_2</child_id>
-	<child_id>fsp_dio132_spcn_config_3</child_id>
-	<child_id>fsp_dio132_sc_config_4</child_id>
-	<child_id>fsp_dio132_u750_config_5</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio136_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[136]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[137]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[138]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[139]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>34</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>136</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default></default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio136_fsi_config_1</id>
-	<child_id>fsi_m0</child_id>
-	<child_id>fsi_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>FSIM_CLK[22]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>FSIM_DIO[22]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>FSIM_CLK[23]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>FSIM_DIO[23]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>34</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>136</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>20</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio136_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_TDI[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_TDO[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_TCK[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>JTAG_TMS[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>34</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>136</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>NA</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group34</id>
-	<child_id>fsp_dio136_gpio_config_0</child_id>
-	<child_id>fsp_dio136_fsi_config_1</child_id>
-	<child_id>fsp_dio136_jtag_config_2</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio140_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[140]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[141]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[142]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[143]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>35</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>140</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default></default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio140_fsi_config_1</id>
-	<child_id>fsi_m0</child_id>
-	<child_id>fsi_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>FSIM_CLK[24]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>FSIM_DIO[24]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>FSIM_CLK[25]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>FSIM_DIO[25]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>35</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>140</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>20</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio140_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_TDI[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_TDO[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_TCK[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>JTAG_TMS[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>35</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>140</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>NA</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group35</id>
-	<child_id>fsp_dio140_gpio_config_0</child_id>
-	<child_id>fsp_dio140_fsi_config_1</child_id>
-	<child_id>fsp_dio140_jtag_config_2</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio144_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[144]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[145]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[146]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[147]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>36</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>144</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default></default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio144_fsi_config_1</id>
-	<child_id>fsi_m0</child_id>
-	<child_id>fsi_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>FSIM_CLK[26]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>FSIM_DIO[26]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>FSIM_CLK[27]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>FSIM_DIO[27]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>36</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>144</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>20</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio144_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_ATTN[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_ATTN[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_ATTN[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>JTAG_ATTN[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>36</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>144</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>NA</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group36</id>
-	<child_id>fsp_dio144_gpio_config_0</child_id>
-	<child_id>fsp_dio144_fsi_config_1</child_id>
-	<child_id>fsp_dio144_jtag_config_2</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio148_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[148]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[149]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[150]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[151]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>37</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>148</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default></default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio148_fsi_config_1</id>
-	<child_id>fsi_m0</child_id>
-	<child_id>fsi_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>FSIM_CLK[28]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>FSIM_DIO[28]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>FSIM_CLK[29]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>FSIM_DIO[29]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>37</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>148</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>20</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio148_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_TDI[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_TDO[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_TCK[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>JTAG_TMS[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>37</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>148</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>NA</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group37</id>
-	<child_id>fsp_dio148_gpio_config_0</child_id>
-	<child_id>fsp_dio148_fsi_config_1</child_id>
-	<child_id>fsp_dio148_jtag_config_2</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio152_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[152]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[153]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[154]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[155]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>38</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>152</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default></default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio152_fsi_config_1</id>
-	<child_id>fsi_m0</child_id>
-	<child_id>fsi_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>FSIM_CLK[30]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>FSIM_DIO[30]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>FSIM_CLK[31]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>FSIM_DIO[31]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>38</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>152</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>20</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio152_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_TDI[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_TDO[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_TCK[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>JTAG_TMS[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>38</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>152</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>NA</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group38</id>
-	<child_id>fsp_dio152_gpio_config_0</child_id>
-	<child_id>fsp_dio152_fsi_config_1</child_id>
-	<child_id>fsp_dio152_jtag_config_2</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio156_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[156]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[157]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[158]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[159]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>39</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>156</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default></default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio156_fsi_config_1</id>
-	<child_id>fsi_m0</child_id>
-	<child_id>fsi_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>FSIM_CLK[32]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>FSIM_DIO[32]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>FSIM_CLK[33]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>FSIM_DIO[33]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>39</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>156</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>20</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio156_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_TDI[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_TDO[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_TCK[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>JTAG_TMS[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>39</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>156</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>NA</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group39</id>
-	<child_id>fsp_dio156_gpio_config_0</child_id>
-	<child_id>fsp_dio156_fsi_config_1</child_id>
-	<child_id>fsp_dio156_jtag_config_2</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio160_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[160]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[161]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[162]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[163]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>40</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>160</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default></default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio160_fsi_config_1</id>
-	<child_id>fsi_m0</child_id>
-	<child_id>fsi_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>FSIM_CLK[34]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>FSIM_DIO[34]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>FSIM_CLK[35]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>FSIM_DIO[35]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>40</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>160</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>21</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio160_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_ATTN[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_ATTN[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_ATTN[7]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[163]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>40</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>160</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>NA</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group40</id>
-	<child_id>fsp_dio160_gpio_config_0</child_id>
-	<child_id>fsp_dio160_fsi_config_1</child_id>
-	<child_id>fsp_dio160_jtag_config_2</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio164_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[164]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[165]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[166]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[167]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>41</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>164</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default></default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio164_fsi_config_1</id>
-	<child_id>fsi_m0</child_id>
-	<child_id>fsi_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>FSIM_CLK[36]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>FSIM_DIO[36]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>FSIM_CLK[37]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>FSIM_DIO[37]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>41</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>164</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>21</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio164_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_TDI[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_TDO[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_TCK[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>JTAG_TMS[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>41</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>164</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>NA</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group41</id>
-	<child_id>fsp_dio164_gpio_config_0</child_id>
-	<child_id>fsp_dio164_fsi_config_1</child_id>
-	<child_id>fsp_dio164_jtag_config_2</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio168_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[168]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[169]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[170]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[171]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>42</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>168</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default></default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio168_fsi_config_1</id>
-	<child_id>fsi_m0</child_id>
-	<child_id>fsi_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>FSIM_CLK[38]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>FSIM_DIO[38]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>FSIM_CLK[39]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>FSIM_DIO[39]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>42</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>168</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>21</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio168_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_TDI[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_TDO[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_TCK[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>JTAG_TMS[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>42</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>168</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>NA</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group42</id>
-	<child_id>fsp_dio168_gpio_config_0</child_id>
-	<child_id>fsp_dio168_fsi_config_1</child_id>
-	<child_id>fsp_dio168_jtag_config_2</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio172_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[172]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[173]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[174]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[175]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>43</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>172</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default></default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio172_fsi_config_1</id>
-	<child_id>fsi_m0</child_id>
-	<child_id>fsi_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>FSIM_CLK[40]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>FSIM_DIO[40]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>FSIM_CLK[41]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>FSIM_DIO[41]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>43</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>172</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>21</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio172_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_TDI[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_TDO[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_TCK[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>JTAG_TMS[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>43</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>172</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>NA</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group43</id>
-	<child_id>fsp_dio172_gpio_config_0</child_id>
-	<child_id>fsp_dio172_fsi_config_1</child_id>
-	<child_id>fsp_dio172_jtag_config_2</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio176_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[176]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[177]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[178]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[179]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>44</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>176</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default></default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio176_fsi_config_1</id>
-	<child_id>fsi_m0</child_id>
-	<child_id>fsi_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>FSIM_CLK[42]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>FSIM_DIO[42]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>FSIM_CLK[43]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>FSIM_DIO[43]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>44</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>176</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>21</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio176_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_TDI[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_TDO[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_TCK[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>JTAG_TMS[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>44</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>176</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>NA</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group44</id>
-	<child_id>fsp_dio176_gpio_config_0</child_id>
-	<child_id>fsp_dio176_fsi_config_1</child_id>
-	<child_id>fsp_dio176_jtag_config_2</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio180_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[180]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[181]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[182]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[183]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>45</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>180</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default></default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio180_fsi_config_1</id>
-	<child_id>fsi_m0</child_id>
-	<child_id>fsi_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>FSIM_CLK[44]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>FSIM_DIO[44]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>FSIM_CLK[45]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>FSIM_DIO[45]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>45</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>180</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>21</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio180_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_ATTN[1]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_ATTN[2]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_ATTN[3]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>JTAG_ATTN[4]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>45</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>180</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>NA</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group45</id>
-	<child_id>fsp_dio180_gpio_config_0</child_id>
-	<child_id>fsp_dio180_fsi_config_1</child_id>
-	<child_id>fsp_dio180_jtag_config_2</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio184_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[184]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[185]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[186]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[187]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>46</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>184</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default></default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio184_fsi_config_1</id>
-	<child_id>fsi_m0</child_id>
-	<child_id>fsi_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>FSIM_CLK[46]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>FSIM_DIO[46]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>FSIM_CLK[47]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>FSIM_DIO[47]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>46</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>184</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>21</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio184_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_TDI[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_TDO[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_TCK[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>JTAG_TMS[5]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>46</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>184</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>NA</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group46</id>
-	<child_id>fsp_dio184_gpio_config_0</child_id>
-	<child_id>fsp_dio184_fsi_config_1</child_id>
-	<child_id>fsp_dio184_jtag_config_2</child_id>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio188_gpio_config_0</id>
-	<child_id>gpio_0</child_id>
-	<child_id>gpio_1</child_id>
-	<child_id>gpio_2</child_id>
-	<child_id>gpio_3</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>DIO[188]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>DIO[189]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>DIO[190]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>DIO[191]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>47</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>0</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>188</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default></default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio188_fsi_config_1</id>
-	<child_id>fsi_m0</child_id>
-	<child_id>fsi_m1</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>FSIM_CLK[48]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>FSIM_DIO[48]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>FSIM_CLK[49]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>FSIM_DIO[49]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>47</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>1</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>188</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>21</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_config-fsp2</type>
-	<id>fsp_dio188_jtag_config_2</id>
-	<child_id>jtag_0</child_id>
-	<attribute>
-		<id>IO_CONFIG_NUM</id>
-		<default>3</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME0</id>
-		<default>JTAG_TDI[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-		<default>JTAG_TDO[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-		<default>JTAG_TCK[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-		<default>JTAG_TMS[6]</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-		<default>47</default>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-		<default>2</default>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-		<default>188</default>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-		<default>NA</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-iomux_group-fsp2</type>
-	<id>fsp2_iomux_group47</id>
-	<child_id>fsp_dio188_gpio_config_0</child_id>
-	<child_id>fsp_dio188_fsi_config_1</child_id>
-	<child_id>fsp_dio188_jtag_config_2</child_id>
-</targetInstance>
-<targetInstance>
-	<type>chip-sp-fsp2</type>
-	<instance_name>fsp2</instance_name>
-	<child_id>fsp2_iomux_group0</child_id>
-	<child_id>fsp2_iomux_group1</child_id>
-	<child_id>fsp2_iomux_group2</child_id>
-	<child_id>fsp2_iomux_group3</child_id>
-	<child_id>fsp2_iomux_group4</child_id>
-	<child_id>fsp2_iomux_group5</child_id>
-	<child_id>fsp2_iomux_group6</child_id>
-	<child_id>fsp2_iomux_group7</child_id>
-	<child_id>fsp2_iomux_group8</child_id>
-	<child_id>fsp2_iomux_group9</child_id>
-	<child_id>fsp2_iomux_group10</child_id>
-	<child_id>fsp2_iomux_group11</child_id>
-	<child_id>fsp2_iomux_group12</child_id>
-	<child_id>fsp2_iomux_group13</child_id>
-	<child_id>fsp2_iomux_group14</child_id>
-	<child_id>fsp2_iomux_group15</child_id>
-	<child_id>fsp2_iomux_group16</child_id>
-	<child_id>fsp2_iomux_group17</child_id>
-	<child_id>fsp2_iomux_group18</child_id>
-	<child_id>fsp2_iomux_group19</child_id>
-	<child_id>fsp2_iomux_group20</child_id>
-	<child_id>fsp2_iomux_group21</child_id>
-	<child_id>fsp2_iomux_group22</child_id>
-	<child_id>fsp2_iomux_group23</child_id>
-	<child_id>fsp2_iomux_group24</child_id>
-	<child_id>fsp2_iomux_group25</child_id>
-	<child_id>fsp2_iomux_group26</child_id>
-	<child_id>fsp2_iomux_group27</child_id>
-	<child_id>fsp2_iomux_group28</child_id>
-	<child_id>fsp2_iomux_group29</child_id>
-	<child_id>fsp2_iomux_group30</child_id>
-	<child_id>fsp2_iomux_group31</child_id>
-	<child_id>fsp2_iomux_group32</child_id>
-	<child_id>fsp2_iomux_group33</child_id>
-	<child_id>fsp2_iomux_group34</child_id>
-	<child_id>fsp2_iomux_group35</child_id>
-	<child_id>fsp2_iomux_group36</child_id>
-	<child_id>fsp2_iomux_group37</child_id>
-	<child_id>fsp2_iomux_group38</child_id>
-	<child_id>fsp2_iomux_group39</child_id>
-	<child_id>fsp2_iomux_group40</child_id>
-	<child_id>fsp2_iomux_group41</child_id>
-	<child_id>fsp2_iomux_group42</child_id>
-	<child_id>fsp2_iomux_group43</child_id>
-	<child_id>fsp2_iomux_group44</child_id>
-	<child_id>fsp2_iomux_group45</child_id>
-	<child_id>fsp2_iomux_group46</child_id>
-	<child_id>fsp2_iomux_group47</child_id>
-</targetInstance>
-
-<!-- IPMI Sensors -->
-
-<targetInstance>
-	<type>unit-ipmi-sensor</type>
-	<id>cpu_temp_sensor</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>Temp</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0x03</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0x01</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x01</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-ipmi-sensor</type>
-	<id>cpucore_temp_sensor</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>Temp</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0xD0</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0x01</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x01</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-ipmi-sensor</type>
-	<id>cpu_func_sensor</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>Func</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0x03</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0x07</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x6F</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_OFFSETS</id>
-		<default>0x07,0x08,0x0b,0x0a,0x0b</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-ipmi-sensor</type>
-	<id>cpucore_func_sensor</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>Func</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0xD0</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0x07</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x6F</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_OFFSETS</id>
-		<default>0x07,0x08,0x0b,0x0a,0x0b</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-ipmi-sensor</type>
-	<id>cpucore_freq_sensor</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>Freq</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0xD0</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0xC1</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x01</default>
-	</attribute>
-</targetInstance>
-
-<targetInstance>
-	<type>unit-ipmi-sensor</type>
-	<id>membuf_temp_sensor</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>Temp</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0xD1</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0x01</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x01</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-ipmi-sensor</type>
-	<id>dimm_temp_sensor</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>Temp</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0x20</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0x01</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x01</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-ipmi-sensor</type>
-	<id>membuf_func_sensor</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>Func</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0xD1</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0x0C</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x6F</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_OFFSETS</id>
-		<default>0x04,0x08</default>
-	</attribute>
-</targetInstance>
-
-<targetInstance>
-	<type>unit-ipmi-sensor</type>
-	<id>dimm_func_sensor</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>Func</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0x20</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0x0C</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x6F</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_OFFSETS</id>
-		<default>0x04,0x08</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-ipmi-sensor</type>
-	<id>dimm_freq_sensor</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>Freq</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0x08</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0xC1</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x6F</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-ipmi-sensor</type>
-	<id>motherboard_fault_sensor</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>Motherboard_Fault</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0x07</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0xC7</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x03</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_OFFSETS</id>
-		<default>0x00,0x01</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-ipmi-sensor</type>
-	<id>system_event_sensor</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>System_Event</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0x01</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0x12</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x6F</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_OFFSETS</id>
-		<default>0x02</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-ipmi-sensor</type>
-	<id>host_status_sensor</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>Host_Status</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0x23</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0x22</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x6F</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_OFFSETS</id>
-		<default></default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-ipmi-sensor</type>
-	<id>fw_boot_sensor</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>Firmware_Boot_Progress</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0x22</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0x0F</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x6F</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_OFFSETS</id>
-		<default>0x01,0x03,0x13,0x14</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-ipmi-sensor</type>
-	<id>pci_link_sensor</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>PCIE_Link_Present</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0x23</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0xC4</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x03</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_OFFSETS</id>
-		<default>0x00,0x01</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-ipmi-sensor</type>
-	<id>os_boot_sensor</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>OS_Boot</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0x23</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0x1F</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x6F</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_OFFSETS</id>
-		<default></default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-ipmi-sensor</type>
-	<id>occ_active_sensor</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>OCC_Active_Sensor</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0xD2</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0x07</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x09</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_OFFSETS</id>
-		<default>0x00,0x01</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-ipmi-sensor</type>
-	<id>power_cap_sensor</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>Power_Cap</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0x17</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0xC2</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x6F</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_OFFSETS</id>
-		<default></default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-ipmi-sensor</type>
-	<id>apss_fault_sensor</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>APSS_Fault</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0xD7</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0xC7</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x03</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_OFFSETS</id>
-		<default>0x01</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-ipmi-sensor</type>
-	<id>boot_count_sensor</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>Boot_count</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0x22</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0xC3</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x6F</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_OFFSETS</id>
-		<default></default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-ipmi-sensor</type>
-	<id>power_limit_sensor</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>Power_Limit_Active</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0x15</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0xC6</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x03</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_OFFSETS</id>
-		<default>0x00,0x01</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-ipmi-sensor</type>
-	<id>ps_derating_sensor</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>PS_Derating_Factor</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0x15</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0xC8</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x6F</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_OFFSETS</id>
-		<default></default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-ipmi-sensor</type>
-	<id>ref_clk_sensor</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>Ref_Clock</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0xD4</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0xC7</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x03</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_OFFSETS</id>
-		<default>0x0,0x1</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-ipmi-sensor</type>
-	<id>pci_clk_sensor</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>PCI_Clock</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0xD5</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0xC7</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x03</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_OFFSETS</id>
-		<default>0x0,0x1</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-ipmi-sensor</type>
-	<id>tod_clk_sensor</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>TOD_Clock</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0xD6</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0xC7</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x03</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_OFFSETS</id>
-		<default>0x0,0x1</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-apss-sensor</type>
-	<id>Memory_Proc0_Power</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>Memory_Proc0_Power</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0xD7</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0xC2</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x01</default>
-	</attribute>
-	<attribute>
-		<id>ADC_CHANNEL_ID</id>
-		<default>1</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-apss-sensor</type>
-	<id>Memory_Proc1_Power</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>Memory_Proc1_Power</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0xD7</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0xC2</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x01</default>
-	</attribute>
-	<attribute>
-		<id>ADC_CHANNEL_ID</id>
-		<default>2</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-apss-sensor</type>
-	<id>Memory_Proc2_Power</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>Memory_Proc2_Power</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0xD7</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0xC2</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x01</default>
-	</attribute>
-	<attribute>
-		<id>ADC_CHANNEL_ID</id>
-		<default>3</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-apss-sensor</type>
-	<id>Memory_Proc3_Power</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>Memory_Proc3_Power</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0xD7</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0xC2</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x01</default>
-	</attribute>
-	<attribute>
-		<id>ADC_CHANNEL_ID</id>
-		<default>4</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-apss-sensor</type>
-	<id>Proc0_Power</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>Proc0_Power</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0xD7</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0xC2</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x01</default>
-	</attribute>
-	<attribute>
-		<id>ADC_CHANNEL_ID</id>
-		<default>5</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-apss-sensor</type>
-	<id>Proc1_Power</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>Proc1_Power</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0xD7</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0xC2</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x01</default>
-	</attribute>
-	<attribute>
-		<id>ADC_CHANNEL_ID</id>
-		<default>6</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-apss-sensor</type>
-	<id>Proc2_Power</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>Proc2_Power</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0xD7</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0xC2</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x01</default>
-	</attribute>
-	<attribute>
-		<id>ADC_CHANNEL_ID</id>
-		<default>7</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-apss-sensor</type>
-	<id>Proc3_Power</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>Proc3_Power</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0xD7</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0xC2</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x01</default>
-	</attribute>
-	<attribute>
-		<id>ADC_CHANNEL_ID</id>
-		<default>8</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-apss-sensor</type>
-	<id>PCIE_Proc0_Power</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>PCIE_Proc0_Power</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0xD7</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0xC2</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x01</default>
-	</attribute>
-	<attribute>
-		<id>ADC_CHANNEL_ID</id>
-		<default>9</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-apss-sensor</type>
-	<id>PCIE_Proc1_Power</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>PCIE_Proc1_Power</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0xD7</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0xC2</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x01</default>
-	</attribute>
-	<attribute>
-		<id>ADC_CHANNEL_ID</id>
-		<default>10</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-apss-sensor</type>
-	<id>PCIE_Proc2_Power</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>PCIE_Proc2_Power</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0xD7</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0xC2</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x01</default>
-	</attribute>
-	<attribute>
-		<id>ADC_CHANNEL_ID</id>
-		<default>11</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-apss-sensor</type>
-	<id>PCIE_Proc3_Power</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>PCIE_Proc3_Power</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0xD7</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0xC2</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x01</default>
-	</attribute>
-	<attribute>
-		<id>ADC_CHANNEL_ID</id>
-		<default>12</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-apss-sensor</type>
-	<id>IO_A_Power</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>IO_A_Power</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0xD7</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0xC2</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x01</default>
-	</attribute>
-	<attribute>
-		<id>ADC_CHANNEL_ID</id>
-		<default>13</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-apss-sensor</type>
-	<id>IO_B_Power</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>IO_B_Power</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0xD7</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0xC2</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x01</default>
-	</attribute>
-	<attribute>
-		<id>ADC_CHANNEL_ID</id>
-		<default>14</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-apss-sensor</type>
-	<id>IO_C_Power</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>IO_C_Power</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0xD7</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0xC2</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x01</default>
-	</attribute>
-	<attribute>
-		<id>ADC_CHANNEL_ID</id>
-		<default>15</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-apss-sensor</type>
-	<id>Fan_Power_A</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>Fan_Power_A</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0xD7</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0xC2</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x01</default>
-	</attribute>
-	<attribute>
-		<id>ADC_CHANNEL_ID</id>
-		<default>16</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-apss-sensor</type>
-	<id>Fan_Power_B</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>Fan_Power_B</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0xD7</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0xC2</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x01</default>
-	</attribute>
-	<attribute>
-		<id>ADC_CHANNEL_ID</id>
-		<default>17</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-apss-sensor</type>
-	<id>Storage_Power_A</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>Storage_Power_A</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0xD7</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0xC2</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x01</default>
-	</attribute>
-	<attribute>
-		<id>ADC_CHANNEL_ID</id>
-		<default>18</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-apss-sensor</type>
-	<id>Storage_Power_B</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>Storage_Power_B</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0xD7</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0xC2</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x01</default>
-	</attribute>
-	<attribute>
-		<id>ADC_CHANNEL_ID</id>
-		<default>19</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-apss-sensor</type>
-	<id>12V_Sense</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>12V Sense</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0xD7</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0xC2</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x01</default>
-	</attribute>
-	<attribute>
-		<id>ADC_CHANNEL_ID</id>
-		<default>20</default>
-	</attribute>
-</targetInstance>
-
-<targetInstance>
-	<type>unit-apss-sensor</type>
-	<id>Ground_Sense</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>Ground Sense</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0xD7</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0xC2</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x01</default>
-	</attribute>
-	<attribute>
-		<id>ADC_CHANNEL_ID</id>
-		<default>21</default>
-	</attribute>
-</targetInstance>
-
-<targetInstance>
-	<type>unit-apss-sensor</type>
-	<id>Total_System_Power</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>Total_System_Power</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0xD7</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0xC2</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x01</default>
-	</attribute>
-	<attribute>
-		<id>ADC_CHANNEL_ID</id>
-		<default>22</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-apss-sensor</type>
-	<id>Memory_Cache_Power</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>Memory_Cache_Power</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0xD7</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0xC2</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x01</default>
-	</attribute>
-	<attribute>
-		<id>ADC_CHANNEL_ID</id>
-		<default>23</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-apss-sensor</type>
-	<id>GPU_Sense</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>GPU Sense</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0xD7</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0xC2</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x01</default>
-	</attribute>
-	<attribute>
-		<id>ADC_CHANNEL_ID</id>
-		<default>24</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-apss-sensor</type>
-	<id>Memory_Proc0_0_Power</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>Memory_Proc0_0_Power</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0xD7</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0xC2</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x01</default>
-	</attribute>
-	<attribute>
-		<id>ADC_CHANNEL_ID</id>
-		<default>25</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-apss-sensor</type>
-	<id>Memory_Proc0_1_Power</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>Memory_Proc0_1_Power</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0xD7</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0xC2</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x01</default>
-	</attribute>
-	<attribute>
-		<id>ADC_CHANNEL_ID</id>
-		<default>26</default>
-	</attribute>
-</targetInstance>
-<targetInstance>
-	<type>unit-apss-sensor</type>
-	<id>Memory_Proc0_2_Power</id>
-	<attribute>
-		<id>IPMI_SENSOR_NAME_SUFFIX</id>
-		<default>Memory_Proc0_2_Power</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_ENTITY_ID</id>
-		<default>0xD7</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_TYPE</id>
-		<default>0xC2</default>
-	</attribute>
-	<attribute>
-		<id>IPMI_SENSOR_READING_TYPE</id>
-		<default>0x01</default>
-	</attribute>
-	<attribute>
-		<id>ADC_CHANNEL_ID</id>
-		<default>27</default>
-	</attribute>
-</targetInstance>
-</targetInstances>
diff --git a/xml/target_types_mrw.xml b/xml/target_types_mrw.xml
index ad8eced..723a0e1 100644
--- a/xml/target_types_mrw.xml
+++ b/xml/target_types_mrw.xml
@@ -1,503 +1,5 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <targetTypes>
-	<targetType>
-		<id>sys-sys-power8</id>
-		<parent>base</parent>
-		<attribute>
-			<id>CLASS</id>
-			<default>SYS</default>
-		</attribute>
-		<attribute>
-			<id>TYPE</id>
-			<default>SYS</default>
-		</attribute>
-		<attribute>
-			<id>IPMI_INSTANCE</id>
-		</attribute>
-		<attribute>
-			<id>FRU_NAME</id>
-		</attribute>
-		<attribute>
-			<id>FRU_ID</id>
-			<default></default>
-		</attribute>
-		<attribute>
-			<id>BMC_FRU_ID</id>
-			<default></default>
-        </attribute>
-        <attribute>
-			<id>OPAL_MODEL</id>
-			<default></default>
-		</attribute>
-		<attribute>
-			<id>CDM_POLICIES_BITMASK</id>
-			<default></default>
-		</attribute>
-		<attribute>
-			<id>ALL_MCS_IN_INTERLEAVING_GROUP</id>
-			<default></default>
-		</attribute>
-		<attribute>
-			<id>MODEL</id>
-			<default>POWER8</default>
-		</attribute>
-		<attribute>
-			<id>EXECUTION_PLATFORM</id>
-			<default>1</default>
-		</attribute>
-		<attribute>
-			<id>SYSTEM_NAME</id>
-		</attribute>
-		<attribute>
-			<id>FREQ_PROC_REFCLOCK</id>
-			<default>133</default>
-		</attribute>
-		<attribute>
-			<id>FREQ_PROC_REFCLOCK_KHZ</id>
-			<default>133333</default>
-		</attribute>
-		<attribute>
-			<id>FREQ_MEM_REFCLOCK</id>
-			<default>133</default>
-		</attribute>
-		<attribute>
-			<id>BOOT_FREQ_MHZ</id>
-			<default>2400</default>
-		</attribute>
-		<attribute>
-			<id>FREQ_A</id>
-			<default>6400</default>
-		</attribute>
-		<attribute>
-			<id>FREQ_PB</id>
-			<default>2400</default>
-		</attribute>
-		<attribute>
-			<id>NEST_FREQ_MHZ</id>
-			<default>2400</default>
-		</attribute>
-		<attribute>
-			<id>FREQ_PCIE</id>
-			<default>1000</default>
-		</attribute>
-		<attribute>
-			<id>FREQ_X</id>
-			<default>4800</default>
-		</attribute>
-		<attribute>
-			<id>MSS_MBA_ADDR_INTERLEAVE_BIT</id>
-			<default>24</default>
-		</attribute>
-		<attribute>
-			<id>MSS_MBA_CACHELINE_INTERLEAVE_MODE</id>
-			<default>1</default>
-		</attribute>
-		<attribute>
-			<id>PROC_EPS_TABLE_TYPE</id>
-			<default>2</default>
-		</attribute>
-		<attribute>
-			<id>PROC_FABRIC_PUMP_MODE</id>
-			<default>1</default>
-		</attribute>
-		<attribute>
-			<id>PROC_X_BUS_WIDTH</id>
-			<default>2</default>
-		</attribute>
-		<attribute>
-			<id>X_EREPAIR_THRESHOLD_FIELD</id>
-			<default>1</default>
-		</attribute>
-		<attribute>
-			<id>A_EREPAIR_THRESHOLD_FIELD</id>
-			<default>1</default>
-		</attribute>
-		<attribute>
-			<id>DMI_EREPAIR_THRESHOLD_FIELD</id>
-			<default>1</default>
-		</attribute>
-		<attribute>
-			<id>X_EREPAIR_THRESHOLD_MNFG</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>A_EREPAIR_THRESHOLD_MNFG</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>DMI_EREPAIR_THRESHOLD_MNFG</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_MBA</id>
-			<default>32</default>
-		</attribute>
-		<attribute>
-			<id>MRW_SAFEMODE_MEM_THROTTLE_NUMERATOR_PER_CHIP</id>
-			<default>32</default>
-		</attribute>
-		<attribute>
-			<id>MRW_THERMAL_MEMORY_POWER_LIMIT</id>
-			<default>1500</default>
-		</attribute>
-		<attribute>
-			<id>MSS_MBA_ADDR_INTERLEAVE_BIT</id>
-			<default>24</default>
-		</attribute>
-		<attribute>
-			<id>MSS_MBA_CACHELINE_INTERLEAVE_MODE</id>
-			<default>1</default>
-		</attribute>
-		<attribute>
-			<id>PM_EXTERNAL_VRM_STEPSIZE</id>
-			<default></default>
-		</attribute>
-		<attribute>
-			<id>PM_EXTERNAL_VRM_STEPDELAY</id>
-			<default></default>
-		</attribute>
-		<attribute>
-			<id>PM_SPIVID_FREQUENCY</id>
-			<default></default>
-		</attribute>
-		<attribute>
-			<id>PM_SAFE_FREQUENCY</id>
-			<default>2400</default>
-		</attribute>
-		<attribute>
-			<id>PM_RESONANT_CLOCK_FULL_CLOCK_SECTOR_BUFFER_FREQUENCY</id>
-			<default></default>
-		</attribute>
-		<attribute>
-			<id>PM_RESONANT_CLOCK_LOW_BAND_LOWER_FREQUENCY</id>
-			<default></default>
-		</attribute>
-		<attribute>
-			<id>PM_RESONANT_CLOCK_LOW_BAND_UPPER_FREQUENCY</id>
-			<default></default>
-		</attribute>
-		<attribute>
-			<id>PM_RESONANT_CLOCK_HIGH_BAND_LOWER_FREQUENCY</id>
-			<default></default>
-		</attribute>
-		<attribute>
-			<id>PM_RESONANT_CLOCK_HIGH_BAND_UPPER_FREQUENCY</id>
-			<default></default>
-		</attribute>
-		<attribute>
-			<id>PM_SPIPSS_FREQUENCY</id>
-			<default></default>
-		</attribute>
-		<attribute>
-			<id>MRW_POWER_CONTROL_REQUESTED</id>
-			<default>NONE</default>
-		</attribute>
-		<attribute>
-			<id>MEM_MIRROR_PLACEMENT_POLICY</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>MRW_DIMM_POWER_CURVE_PERCENT_UPLIFT</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>MRW_DIMM_POWER_CURVE_PERCENT_UPLIFT_IDLE</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>MRW_MEM_THROTTLE_DENOMINATOR</id>
-			<default>512</default>
-		</attribute>
-		<attribute>
-			<id>MRW_MAX_DRAM_DATABUS_UTIL</id>
-			<default>5625</default>
-		</attribute>
-		<attribute>
-			<id>MRW_CDIMM_MASTER_I2C_TEMP_SENSOR_ENABLE</id>
-			<default></default>
-		</attribute>
-		<attribute>
-			<id>MRW_CDIMM_SPARE_I2C_TEMP_SENSOR_ENABLE</id>
-			<default></default>
-		</attribute>
-		<attribute>
-			<id>PM_SYSTEM_IVRMS_ENABLED</id>
-			<default></default>
-		</attribute>
-		<attribute>
-			<id>PM_SYSTEM_IVRM_VPD_MIN_LEVEL</id>
-			<default></default>
-		</attribute>
-		<attribute>
-			<id>MRW_ENHANCED_GROUPING_NO_MIRRORING</id>
-			<default>true</default>
-		</attribute>
-		<attribute>
-			<id>MRW_STRICT_MBA_PLUG_RULE_CHECKING</id>
-			<default>true</default>
-		</attribute>
-		<attribute>
-			<id>MNFG_DMI_MIN_EYE_WIDTH</id>
-			<default></default>
-		</attribute>
-		<attribute>
-			<id>MNFG_DMI_MIN_EYE_HEIGHT</id>
-			<default></default>
-		</attribute>
-		<attribute>
-			<id>MNFG_ABUS_MIN_EYE_WIDTH</id>
-			<default></default>
-		</attribute>
-		<attribute>
-			<id>MNFG_ABUS_MIN_EYE_HEIGHT</id>
-			<default></default>
-		</attribute>
-		<attribute>
-			<id>MNFG_XBUS_MIN_EYE_WIDTH</id>
-			<default></default>
-		</attribute>
-		<attribute>
-			<id>REDUNDANT_CLOCKS</id>
-			<default></default>
-		</attribute>
-		<attribute>
-			<id>MSS_DRAMINIT_RESET_DISABLE</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>MRW_MBA_CACHELINE_INTERLEAVE_MODE_CONTROL</id>
-			<default>2</default>
-		</attribute>
-		<attribute>
-			<id>NOMINAL_FREQ_MHZ</id>
-			<default>3000</default>
-		</attribute>
-		<attribute>
-			<id>MIN_FREQ_MHZ</id>
-			<default>1400</default>
-		</attribute>
-		<attribute>
-			<id>FREQ_CORE_MAX</id>
-			<default>4000</default>
-		</attribute>
-		<!-- End System Attributes from MRW -->
-		<!-- _hb attributes -->
-		<attribute>
-			<id>APSS_GPIO_PORT_MODES</id>
-			<default>0x0,0x3</default>
-		</attribute>
-		<attribute>
-			<id>APSS_GPIO_PORT_PINS</id>
-			<default>1,2,3,4,5,0,0,0,9,10,0,0,0,0,0,0</default>
-		</attribute>
-		<!-- DIMMs -->
-		<attribute>
-			<id>OPEN_POWER_DIMM_THROTTLE_TEMP_DEG_C</id>
-			<default>79</default>
-		</attribute>
-		<attribute>
-			<id>OPEN_POWER_DIMM_ERROR_TEMP_DEG_C</id>
-			<default>96</default>
-		</attribute>
-		<attribute>
-			<id>OPEN_POWER_DIMM_READ_TIMEOUT_SEC</id>
-			<default>30</default>
-		</attribute>
-
-		<!-- MEMCTRL -->
-		<attribute>
-			<id>OPEN_POWER_MEMCTRL_THROTTLE_TEMP_DEG_C</id>
-			<default>89</default>
-		</attribute>
-		<attribute>
-			<id>OPEN_POWER_MEMCTRL_ERROR_TEMP_DEG_C</id>
-			<default>99</default>
-		</attribute>
-		<attribute>
-			<id>OPEN_POWER_MEMCTRL_READ_TIMEOUT_SEC</id>
-			<default>30</default>
-		</attribute>
-
-		<!-- PROC -->
-		<attribute>
-			<id>OPEN_POWER_PROC_ERROR_TEMP_DEG_C</id>
-			<default>95</default>
-		</attribute>
-		<attribute>
-			<id>OPEN_POWER_PROC_DVFS_TEMP_DEG_C</id>
-			<default>85</default>
-		</attribute>
-		<attribute>
-			<id>OPEN_POWER_PROC_READ_TIMEOUT_SEC</id>
-			<default>5</default>
-		</attribute>
-
-		<!-- N power capping -->
-		<attribute>
-			<id>OPEN_POWER_N_BULK_POWER_LIMIT_WATTS</id>
-			<default>1200</default>
-		</attribute>
-		<attribute>
-			<id>OPEN_POWER_N_MAX_MEM_POWER_WATTS</id>
-			<default>500</default>
-		</attribute>
-		<!-- N+1 power capping -->
-		<attribute>
-			<id>OPEN_POWER_N_PLUS_ONE_BULK_POWER_LIMIT_WATTS</id>
-			<default>2400</default>
-		</attribute>
-		<attribute>
-			<id>OPEN_POWER_N_PLUS_ONE_MAX_MEM_POWER_WATTS</id>
-			<default>500</default>
-		</attribute>
-
-		<attribute>
-			<id>OPEN_POWER_MIN_MEM_UTILIZATION_THROTTLING</id>
-			<default>5</default>
-		</attribute>
-		<attribute>
-			<id>OPEN_POWER_REGULATOR_EFFICIENCY_FACTOR</id>
-			<default>85</default>
-		</attribute>
-		<attribute>
-			<id>OPEN_POWER_MIN_POWER_CAP_WATTS</id>
-			<default>1100</default>
-		</attribute>
-		<attribute>
-			<id>OPEN_POWER_TURBO_MODE_SUPPORTED</id>
-			<default>1</default>
-		</attribute>
-		<attribute>
-			<id>SP_FUNCTIONS</id>
-			<default>
-				<field>
-					<id>baseServices</id>
-					<value>0</value>
-				</field>
-				<field>
-					<id>fsiSlaveInit</id>
-					<value>0</value>
-				</field>
-				<field>
-					<id>mailboxEnabled</id>
-					<value>0</value>
-				</field>
-				<field>
-					<id>fsiMasterInit</id>
-					<value>0</value>
-				</field>
-				<field>
-					<id>hardwareChangeDetection</id>
-					<value>0</value>
-				</field>
-				<field>
-					<id>powerLineDisturbance</id>
-					<value>0</value>
-				</field>
-				<field>
-					<id>reserved</id>
-					<value>0</value>
-				</field>
-			</default>
-		</attribute>
-		<attribute>
-			<id>HB_SETTINGS</id>
-			<default>
-				<field>
-					<id>traceContinuous</id>
-					<value>0</value>
-				</field>
-				<field>
-					<id>traceScanDebug</id>
-					<value>0</value>
-				</field>
-				<field>
-					<id>reserved</id>
-					<value>0</value>
-				</field>
-			</default>
-		</attribute>
-		<attribute>
-			<id>PAYLOAD_KIND</id>
-			<default>SAPPHIRE</default>
-		</attribute>
-		<attribute>
-			<id>PAYLOAD_BASE</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>PAYLOAD_ENTRY</id>
-			<default>0x10</default>
-		</attribute>
-		<attribute>
-			<id>MAX_PROC_CHIPS_PER_NODE</id>
-			<default>1</default>
-		</attribute>
-		<attribute>
-			<id>MAX_EXS_PER_PROC_CHIP</id>
-			<default>12</default>
-		</attribute>
-		<attribute>
-			<id>MAX_MBAS_PER_MEMBUF_CHIP</id>
-			<default>2</default>
-		</attribute>
-		<attribute>
-			<id>MAX_MBA_PORTS_PER_MBA</id>
-			<default>2</default>
-		</attribute>
-		<attribute>
-			<id>MAX_DIMMS_PER_MBA_PORT</id>
-			<default>2</default>
-		</attribute>
-		<attribute>
-			<id>MAX_CHIPLETS_PER_PROC</id>
-			<default>32</default>
-		</attribute>
-		<attribute>
-			<id>MAX_MCS_PER_SYSTEM</id>
-			<default>8</default>
-		</attribute>
-		<attribute>
-			<id>FABRIC_TO_PHYSICAL_NODE_MAP</id>
-			<default>0,255,255,255,255,255,255,255</default>
-		</attribute>
-		<attribute>
-			<id>OPT_MEMMAP_GROUP_POLICY</id>
-			<default>0</default>
-		</attribute>
-
-	</targetType>
-	<targetType>
-		<id>enc-node-power8</id>
-		<parent_type>sys-sys-power8</parent_type>
-		<parent>base</parent>
-		<attribute>
-			<id>CLASS</id>
-			<default>ENC</default>
-		</attribute>
-		<attribute>
-			<id>TYPE</id>
-			<default>NODE</default>
-		</attribute>
-		<attribute>
-			<id>MODEL</id>
-			<default>POWER8</default>
-		</attribute>
-		<attribute>
-			<id>IPMI_INSTANCE</id>
-		</attribute>
-		<attribute>
-			<id>FRU_NAME</id>
-		</attribute>
-		<attribute>
-			<id>FRU_ID</id>
-			<default></default>
-		</attribute>
-		<attribute>
-			<id>FRU_NAME</id>
-			<default></default>
-		</attribute>
-	</targetType>
 
 	<targetType>
 		<id>base</id>
@@ -522,6 +24,8 @@
 	<targetType>
 		<id>chip</id>
 		<parent>base</parent>
+		<parent_type>card-motherboard</parent_type>
+		<parent_type>card-daughtercard</parent_type>
 		<attribute>
 			<id>CLASS</id>
 			<default>CHIP</default>
@@ -530,15 +34,15 @@
 			<id>POSITION</id>
 		</attribute>
 		<attribute>
-			<id>LOCATION_CODE</id>
-		</attribute>
-		<attribute>
 			<id>CHIP_ID</id>
 		</attribute>
 		<attribute>
 			<id>MRU_ID</id>
 			<default>0</default>
 		</attribute>
+		<attribute>
+			<id>TYPE</id>
+		</attribute>
 	</targetType>
 	<targetType>
 		<id>card</id>
@@ -548,905 +52,63 @@
 			<default>CARD</default>
 		</attribute>
 		<attribute>
-			<id>POSITION</id>
-		</attribute>
-		<attribute>
 			<id>LOCATION_CODE</id>
 		</attribute>
 		<attribute>
-			<id>TYPE</id>
-			<default>NA</default>
-		</attribute>
-	</targetType>
-	<targetType>
-		<id>connector</id>
-		<parent>base</parent>
-		<attribute>
-			<id>CLASS</id>
-			<default>CONNECTOR</default>
-		</attribute>
+			<id>LOCATION_CODE_TYPE</id>
+		</attribute>	
 		<attribute>
 			<id>POSITION</id>
 		</attribute>
 		<attribute>
-			<id>LOCATION_CODE</id>
-		</attribute>
-		<attribute>
 			<id>TYPE</id>
 			<default>NA</default>
 		</attribute>
-	</targetType>
-	<targetType>
-		<id>unit</id>
-		<parent>base</parent>
-		<attribute>
-			<id>CLASS</id>
-			<default>UNIT</default>
-		</attribute>
-		<attribute>
-			<id>CHIP_UNIT</id>
-			<default>0</default>
-		</attribute>
 		<attribute>
-			<id>BUS_TYPE</id>
-			<default>NA</default>
+			<id>CARD_TYPE</id>
 		</attribute>
 	</targetType>
-	<!-- Cards -->
-
 	<targetType>
-		<id>card-motherboard</id>
-		<parent>card</parent>
-		<parent_type>enc-node-power8</parent_type>
-		<attribute>
-			<id>TYPE</id>
-			<default>NA</default>
-		</attribute>
+		<id>connector</id>
+		<parent>base</parent>
 		<attribute>
 			<id>CLASS</id>
-			<default>CARD</default>
-		</attribute>
-	</targetType>
-
-	<targetType>
-		<id>card-daughtercard</id>
-		<parent>card</parent>
-		<parent_type>connector-card-generic</parent_type>
-		<attribute>
-			<id>TYPE</id>
-			<default>NA</default>
+			<default>CONNECTOR</default>
 		</attribute>
 		<attribute>
-			<id>CLASS</id>
-			<default>CARD</default>
+			<id>LOCATION_CODE</id>
 		</attribute>
 		<attribute>
-			<id>FRU_ID</id>
-			<default></default>
+			<id>LOCATION_CODE_TYPE</id>
 		</attribute>
-	</targetType>
-
-	<targetType>
-		<id>connector-card-generic</id>
-		<parent>connector</parent>
-		<parent_type>card-motherboard</parent_type>
-		<parent_type>card-daughtercard</parent_type>
 		<attribute>
-			<id>TYPE</id>
-			<default>NA</default>
+			<id>POSITION</id>
 		</attribute>
-	</targetType>
-
-	<!-- Processor -->
-	<targetType>
-		<id>socket-proc_socket-50mm</id>
-		<parent>connector</parent>
-		<parent_type>card-motherboard</parent_type>
-		<parent_type>card-daughtercard</parent_type>
 		<attribute>
 			<id>TYPE</id>
 			<default>NA</default>
 		</attribute>
 		<attribute>
-			<id>FABRIC_NODE_ID</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>FABRIC_CHIP_ID</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>PROC_PCIE_IOP_G2_PLL_CONTROL0</id>
-			<default>0x000018F4,0x000018F4
-			</default>
-		</attribute>
-		<attribute>
-			<id>PROC_PCIE_IOP_G3_PLL_CONTROL0</id>
-			<default>0x0000086C,0x0000086C
-			</default>
-		</attribute>
-		<attribute>
-			<id>PROC_PCIE_IOP_PCS_CONTROL0</id>
-			<default>0x00003AE8,0x00003AE8
-			</default>
-		</attribute>
-		<attribute>
-			<id>PROC_PCIE_IOP_PCS_CONTROL1</id>
-			<default>0x00005CB9,0x00005CB9
-			</default>
-		</attribute>
-		<attribute>
-			<id>PROC_PCIE_IOP_PLL_GLOBAL_CONTROL0</id>
-			<default>0x00000146,0x00000146
-			</default>
-		</attribute>
-		<attribute>
-			<id>PROC_PCIE_IOP_PLL_GLOBAL_CONTROL1</id>
-			<default>0x000006D7,0x000006D7
-			</default>
-		</attribute>
-		<attribute>
-			<id>PROC_PCIE_IOP_RX_PEAK</id>
-			<default>0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B,0x00000B1B
-			</default>
-		</attribute>
-		<attribute>
-			<id>PROC_PCIE_IOP_RX_SDL</id>
-			<default>0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A
-			</default>
-		</attribute>
-		<attribute>
-			<id>PROC_PCIE_IOP_RX_VGA_CONTROL2</id>
-			<default>0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451
-			</default>
-		</attribute>
-		<attribute>
-			<id>PROC_PCIE_IOP_TX_BWLOSS1</id>
-			<default>0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000
-			</default>
-		</attribute>
-		<attribute>
-			<id>PROC_PCIE_IOP_TX_FIFO_OFFSET</id>
-			<default>0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294
-			</default>
-		</attribute>
-		<attribute>
-			<id>PROC_PCIE_IOP_TX_RCVRDETCNTL</id>
-			<default>0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151
-			</default>
-		</attribute>
-		<attribute>
-			<id>PROC_PCIE_IOP_TX_FFE_GEN1</id>
-			<default>0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0
-			</default>
-		</attribute>
-		<attribute>
-			<id>PROC_PCIE_IOP_TX_FFE_GEN2</id>
-			<default>0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400
-			</default>
-		</attribute>
-		<attribute>
-			<id>PROC_PCIE_IOP_ZCAL_CONTROL</id>
-			<default>0x00000080,0x00000080
-			</default>
-		</attribute>
-		<attribute>
-			<id>PROC_PCIE_IOP_CONFIG</id>
-			<default>1</default>
-		</attribute>
-	</targetType>
-	<targetType>
-		<id>module-module-turismo</id>
-		<parent>card</parent>
-		<parent_type>socket-proc_socket-50mm</parent_type>
-		<attribute>
-			<id>TYPE</id>
-			<default>NA</default>
+			<id>CONNECTOR_TYPE</id>
 		</attribute>
 	</targetType>
 	<targetType>
-		<id>socket-proc_socket_dellovo-50mm</id>
-		<parent>connector</parent>
-		<parent_type>card-motherboard</parent_type>
-		<parent_type>card-daughtercard</parent_type>
-		<attribute>
-			<id>TYPE</id>
-			<default>NA</default>
-		</attribute>
+		<id>unit</id>
+		<parent>base</parent>
 		<attribute>
-			<id>FABRIC_NODE_ID</id>
-			<default>0</default>
+			<id>CLASS</id>
+			<default>UNIT</default>
 		</attribute>
 		<attribute>
-			<id>FABRIC_CHIP_ID</id>
+			<id>CHIP_UNIT</id>
 			<default>0</default>
 		</attribute>
 		<attribute>
-			<id>PROC_PCIE_IOP_G2_PLL_CONTROL0</id>
-			<default>0x000018F4,0x000018F4,0x000018F4
-			</default>
-		</attribute>
-		<attribute>
-			<id>PROC_PCIE_IOP_G3_PLL_CONTROL0</id>
-			<default>0x0000086C,0x0000086C,0x0000086C
-			</default>
-		</attribute>
-		<attribute>
-			<id>PROC_PCIE_IOP_PCS_CONTROL0</id>
-			<default>0x00003AE8,0x00003AE8,0x00003AE8
-			</default>
-		</attribute>
-		<attribute>
-			<id>PROC_PCIE_IOP_PCS_CONTROL1</id>
-			<default>0x00005CB9,0x00005CB9,0x00005CB9
-			</default>
-		</attribute>
-		<attribute>
-			<id>PROC_PCIE_IOP_PLL_GLOBAL_CONTROL0</id>
-			<default>0x00000146,0x00000146,0x00000146
-			</default>
-		</attribute>
-		<attribute>
-			<id>PROC_PCIE_IOP_PLL_GLOBAL_CONTROL1</id>
-			<default>0x000006D7,0x000006D7,0x000006D7
-			</default>
-		</attribute>
-		<attribute>
-			<id>PROC_PCIE_IOP_RX_PEAK</id>
-			<default>0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8,0x00000FF8
-			</default>
-		</attribute>
-		<attribute>
-			<id>PROC_PCIE_IOP_RX_SDL</id>
-			<default>0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A,0x0000294A
-			</default>
-		</attribute>
-		<attribute>
-			<id>PROC_PCIE_IOP_RX_VGA_CONTROL2</id>
-			<default>0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451,0x00009451
-			</default>
-		</attribute>
-		<attribute>
-			<id>PROC_PCIE_IOP_TX_BWLOSS1</id>
-			<default>0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x00000000
-			</default>
-		</attribute>
-		<attribute>
-			<id>PROC_PCIE_IOP_TX_FIFO_OFFSET</id>
-			<default>0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294,0x00004294
-			</default>
-		</attribute>
-		<attribute>
-			<id>PROC_PCIE_IOP_TX_RCVRDETCNTL</id>
-			<default>0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151,0x00002151
-			</default>
-		</attribute>
-		<attribute>
-			<id>PROC_PCIE_IOP_TX_FFE_GEN1</id>
-			<default>0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0,0x000082C0
-			</default>
-		</attribute>
-		<attribute>
-			<id>PROC_PCIE_IOP_TX_FFE_GEN2</id>
-			<default>0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400,0x00008400
-			</default>
-		</attribute>
-		<attribute>
-			<id>PROC_PCIE_IOP_ZCAL_CONTROL</id>
-			<default>0x00000080,0x00000080,0x00000080
-			</default>
-		</attribute>
-		<attribute>
-			<id>PROC_PCIE_IOP_CONFIG</id>
-			<default>1</default>
-		</attribute>
-	</targetType>
-	<targetType>
-		<id>module-module-dellovo</id>
-		<parent>card</parent>
-		<parent_type>socket-proc_socket_dellovo-50mm</parent_type>
-		<attribute>
-			<id>TYPE</id>
+			<id>BUS_TYPE</id>
 			<default>NA</default>
 		</attribute>
 	</targetType>
 	<targetType>
-		<id>chip-processor-venice</id>
-		<parent>chip</parent>
-		<attribute>
-			<id>MODEL</id>
-			<default>VENICE</default>
-		</attribute>
-		<attribute>
-			<id>TYPE</id>
-			<default>PROC</default>
-		</attribute>
-		<attribute>
-			<id>IPMI_INSTANCE</id>
-		</attribute>
-		<attribute>
-			<id>FRU_NAME</id>
-		</attribute>
-		<attribute>
-			<id>FRU_ID</id>
-			<default></default>
-		</attribute>
-		<attribute>
-			<id>PROC_DCM_INSTALLED</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>PM_UNDERVOLTING_FRQ_MINIMUM</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>PM_UNDERVOLTING_FREQ_MAXIMUM</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>PM_SPIVID_PORT_ENABLE</id>
-			<default>0x4</default>
-		</attribute>
-		<attribute>
-			<id>PM_APSS_CHIP_SELECT</id>
-			<default>0x00</default>
-		</attribute>
-		<attribute>
-			<id>PM_PBAX_NODEID</id>
-			<default>0x0</default>
-		</attribute>
-		<attribute>
-			<id>PM_PBAX_CHIPID</id>
-			<default>0x0</default>
-		</attribute>
-		<attribute>
-			<id>PM_PBAX_BRDCST_ID_VECTOR</id>
-			<default>0x0</default>
-		</attribute>
-		<attribute>
-			<id>PM_SLEEP_ENTRY</id>
-			<default>0x0</default>
-		</attribute>
-		<attribute>
-			<id>PM_SLEEP_EXIT</id>
-			<default>0x0</default>
-		</attribute>
-		<attribute>
-			<id>PM_SLEEP_TYPE</id>
-			<default>0x0</default>
-		</attribute>
-		<attribute>
-			<id>PM_WINKLE_ENTRY</id>
-			<default>0x0</default>
-		</attribute>
-		<attribute>
-			<id>PM_WINKLE_EXIT</id>
-			<default>0x0</default>
-		</attribute>
-		<attribute>
-			<id>PM_WINKLE_TYPE</id>
-			<default>0x0</default>
-		</attribute>
-		<attribute>
-			<id>FSP_BASE_ADDR</id>
-			<default>0,0x0000000000000000</default>
-		</attribute>
-		<attribute>
-			<id>PSI_BRIDGE_BASE_ADDR</id>
-			<default>0,0x0000000000000000</default>
-		</attribute>
-		<attribute>
-			<id>INTP_BASE_ADDR</id>
-			<default>1,0x0003FFFF80000000,0x400000,0x100000,0</default>
-		</attribute>
-		<attribute>
-			<id>PHB_BASE_ADDRS</id>
-			<default>4,0x0003FFFE40000000,0x1000000,0x400000,0x100000</default>
-		</attribute>
-		<attribute>
-			<id>PCI_BASE_ADDRS_32</id>
-			<default>4,0x0003FF8000000000,0x800000000,0x200000000,0x80000000
-			</default>
-		</attribute>
-		<attribute>
-			<id>PCI_BASE_ADDRS_64</id>
-			<default>4,0x0003D00000000000,0x10000000000,0x4000000000,0x1000000000
-			</default>
-		</attribute>
-		<attribute>
-			<id>RNG_BASE_ADDR</id>
-			<default>1,0x0003FFFF40000000,0x4000,0x1000,0</default>
-		</attribute>
-		<attribute>
-			<id>IBSCOM_PROC_BASE_ADDR</id>
-			<default>1,0x0003E00000000000,0x40000000000,0x10000000000,0</default>
-        </attribute>
-	    <attribute>
-            <id>MSS_INTERLEAVE_ENABLE</id>
-            <default></default>
-        </attribute>
-		<attribute>
-			<id>EEPROM_SBE_BACKUP_INFO</id>
-			<default>
-				<field>
-					<id>byteAddrOffset</id>
-					<value>0x02</value>
-				</field>
-				<field>
-					<id>devAddr</id>
-					<value>0xA2</value>
-				</field>
-				<field>
-					<id>engine</id>
-					<value>0</value>
-				</field>
-				<field>
-					<id>i2cMasterPath</id>
-					<value>physical:sys-0/node-0/proc-0</value>
-				</field>
-				<field>
-					<id>maxMemorySizeKB</id>
-					<value>0x40</value>
-				</field>
-				<field>
-					<id>port</id>
-					<value>1</value>
-				</field>
-				<field>
-					<id>writeCycleTime</id>
-					<value>0x05</value>
-				</field>
-				<field>
-					<id>writePageSize</id>
-					<value>0x80</value>
-				</field>
-			</default>
-		</attribute>
-		<attribute>
-			<id>EEPROM_SBE_PRIMARY_INFO</id>
-			<default>
-				<field>
-					<id>byteAddrOffset</id>
-					<value>0x02</value>
-				</field>
-				<field>
-					<id>devAddr</id>
-					<value>0xA2</value>
-				</field>
-				<field>
-					<id>engine</id>
-					<value>0</value>
-				</field>
-				<field>
-					<id>i2cMasterPath</id>
-					<value>physical:sys-0/node-0/proc-0</value>
-				</field>
-				<field>
-					<id>maxMemorySizeKB</id>
-					<value>0x40</value>
-				</field>
-				<field>
-					<id>port</id>
-					<value>0</value>
-				</field>
-				<field>
-					<id>writeCycleTime</id>
-					<value>0x05</value>
-				</field>
-				<field>
-					<id>writePageSize</id>
-					<value>0x80</value>
-				</field>
-			</default>
-		</attribute>
-		<attribute>
-			<id>EEPROM_VPD_BACKUP_INFO</id>
-			<default>
-				<field>
-					<id>byteAddrOffset</id>
-					<value>0x02</value>
-				</field>
-				<field>
-					<id>devAddr</id>
-					<value>0xA0</value>
-				</field>
-				<field>
-					<id>engine</id>
-					<value>0</value>
-				</field>
-				<field>
-					<id>i2cMasterPath</id>
-					<value>physical:sys-0/node-0/proc-0</value>
-				</field>
-				<field>
-					<id>maxMemorySizeKB</id>
-					<value>0x40</value>
-				</field>
-				<field>
-					<id>port</id>
-					<value>1</value>
-				</field>
-				<field>
-					<id>writeCycleTime</id>
-					<value>0x05</value>
-				</field>
-				<field>
-					<id>writePageSize</id>
-					<value>0x80</value>
-				</field>
-			</default>
-		</attribute>
-		<attribute>
-			<id>EEPROM_VPD_PRIMARY_INFO</id>
-			<default>
-				<field>
-					<id>byteAddrOffset</id>
-					<value>0x02</value>
-				</field>
-				<field>
-					<id>devAddr</id>
-					<value>0xA0</value>
-				</field>
-				<field>
-					<id>engine</id>
-					<value>0</value>
-				</field>
-				<field>
-					<id>i2cMasterPath</id>
-					<value>physical:sys-0/node-0/proc-0</value>
-				</field>
-				<field>
-					<id>maxMemorySizeKB</id>
-					<value>0x40</value>
-				</field>
-				<field>
-					<id>port</id>
-					<value>0</value>
-				</field>
-				<field>
-					<id>writeCycleTime</id>
-					<value>0x05</value>
-				</field>
-				<field>
-					<id>writePageSize</id>
-					<value>0x80</value>
-				</field>
-			</default>
-		</attribute>
-		<attribute>
-			<id>I2C_BUS_SPEED_ARRAY</id>
-			<default>1000,1000,0,0,0,0</default>
-		</attribute>
-		<attribute>
-			<id>PROC_R_LOADLINE_VDD</id>
-			<default></default>
-		</attribute>
-		<attribute>
-			<id>PROC_R_DISTLOSS_VDD</id>
-			<default></default>
-		</attribute>
-		<attribute>
-			<id>PROC_VRM_VOFFSET_VDD</id>
-			<default></default>
-		</attribute>
-		<attribute>
-			<id>PROC_R_LOADLINE_VCS</id>
-			<default></default>
-		</attribute>
-		<attribute>
-			<id>PROC_R_DISTLOSS_VCS</id>
-			<default></default>
-		</attribute>
-		<attribute>
-			<id>PROC_VRM_VOFFSET_VCS</id>
-			<default></default>
-		</attribute>		
-	</targetType>
-	<targetType>
-		<id>chip-processor-naples</id>
-		<parent>chip</parent>
-		<attribute>
-			<id>MODEL</id>
-			<default>NAPLES</default>
-		</attribute>
-		<attribute>
-			<id>TYPE</id>
-			<default>PROC</default>
-		</attribute>
-		<attribute>
-			<id>IPMI_INSTANCE</id>
-		</attribute>
-		<attribute>
-			<id>FRU_NAME</id>
-		</attribute>
-		<attribute>
-			<id>FRU_ID</id>
-			<default></default>
-		</attribute>
-		<attribute>
-			<id>PROC_DCM_INSTALLED</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>PM_UNDERVOLTING_FRQ_MINIMUM</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>PM_UNDERVOLTING_FREQ_MAXIMUM</id>
-			<default>0</default>
-		</attribute>
-		<attribute>
-			<id>PM_SPIVID_PORT_ENABLE</id>
-			<default>0x4</default>
-		</attribute>
-		<attribute>
-			<id>PM_APSS_CHIP_SELECT</id>
-			<default>0x00</default>
-		</attribute>
-		<attribute>
-			<id>PM_PBAX_NODEID</id>
-			<default>0x0</default>
-		</attribute>
-		<attribute>
-			<id>PM_PBAX_CHIPID</id>
-			<default>0x0</default>
-		</attribute>
-		<attribute>
-			<id>PM_PBAX_BRDCST_ID_VECTOR</id>
-			<default>0x0</default>
-		</attribute>
-		<attribute>
-			<id>PM_SLEEP_ENTRY</id>
-			<default>0x0</default>
-		</attribute>
-		<attribute>
-			<id>PM_SLEEP_EXIT</id>
-			<default>0x0</default>
-		</attribute>
-		<attribute>
-			<id>PM_SLEEP_TYPE</id>
-			<default>0x0</default>
-		</attribute>
-		<attribute>
-			<id>PM_WINKLE_ENTRY</id>
-			<default>0x0</default>
-		</attribute>
-		<attribute>
-			<id>PM_WINKLE_EXIT</id>
-			<default>0x0</default>
-		</attribute>
-		<attribute>
-			<id>PM_WINKLE_TYPE</id>
-			<default>0x0</default>
-		</attribute>
-		<attribute>
-			<id>FSP_BASE_ADDR</id>
-			<default>0,0x0000000000000000</default>
-		</attribute>
-		<attribute>
-			<id>PSI_BRIDGE_BASE_ADDR</id>
-			<default>0,0x0000000000000000</default>
-		</attribute>
-		<attribute>
-			<id>INTP_BASE_ADDR</id>
-			<default>1,0x0003FFFF80000000,0x400000,0x100000,0</default>
-		</attribute>
-		<attribute>
-			<id>PHB_BASE_ADDRS</id>
-			<default>4,0x0003FFFE40000000,0x1000000,0x400000,0x100000</default>
-		</attribute>
-		<attribute>
-			<id>PCI_BASE_ADDRS_32</id>
-			<default>4,0x0003FF8000000000,0x800000000,0x200000000,0x80000000
-			</default>
-		</attribute>
-		<attribute>
-			<id>PCI_BASE_ADDRS_64</id>
-			<default>4,0x0003D00000000000,0x10000000000,0x4000000000,0x1000000000
-			</default>
-		</attribute>
-		<attribute>
-			<id>NPU_MMIO_BAR_ENABLE</id>
-			<default>0x01</default>
-		</attribute>
-		<attribute>
-			<id>NPU_MMIO_BAR_BASE_ADDR</id>
-			<default>8,0x0003FFF000000000,0x2000000,0x1000000,0x200000</default>
-		</attribute>
-		<attribute>
-			<id>NPU_MMIO_BAR_SIZE</id>
-			<default>0x200000</default>
-		</attribute>
-		<attribute>
-			<id>RNG_BASE_ADDR</id>
-			<default>1,0x0003FFFF40000000,0x4000,0x1000,0</default>
-		</attribute>
-		<attribute>
-			<id>IBSCOM_PROC_BASE_ADDR</id>
-			<default>1,0x0003E00000000000,0x40000000000,0x10000000000,0</default>
-        </attribute>
-	    <attribute>
-            <id>MSS_INTERLEAVE_ENABLE</id>
-            <default></default>
-        </attribute>
-		<attribute>
-			<id>EEPROM_SBE_BACKUP_INFO</id>
-			<default>
-				<field>
-					<id>byteAddrOffset</id>
-					<value>0x02</value>
-				</field>
-				<field>
-					<id>devAddr</id>
-					<value>0xA2</value>
-				</field>
-				<field>
-					<id>engine</id>
-					<value>0</value>
-				</field>
-				<field>
-					<id>i2cMasterPath</id>
-					<value>physical:sys-0/node-0/proc-0</value>
-				</field>
-				<field>
-					<id>maxMemorySizeKB</id>
-					<value>0x40</value>
-				</field>
-				<field>
-					<id>port</id>
-					<value>1</value>
-				</field>
-				<field>
-					<id>writeCycleTime</id>
-					<value>0x05</value>
-				</field>
-				<field>
-					<id>writePageSize</id>
-					<value>0x80</value>
-				</field>
-			</default>
-		</attribute>
-		<attribute>
-			<id>EEPROM_SBE_PRIMARY_INFO</id>
-			<default>
-				<field>
-					<id>byteAddrOffset</id>
-					<value>0x02</value>
-				</field>
-				<field>
-					<id>devAddr</id>
-					<value>0xA2</value>
-				</field>
-				<field>
-					<id>engine</id>
-					<value>0</value>
-				</field>
-				<field>
-					<id>i2cMasterPath</id>
-					<value>physical:sys-0/node-0/proc-0</value>
-				</field>
-				<field>
-					<id>maxMemorySizeKB</id>
-					<value>0x40</value>
-				</field>
-				<field>
-					<id>port</id>
-					<value>0</value>
-				</field>
-				<field>
-					<id>writeCycleTime</id>
-					<value>0x05</value>
-				</field>
-				<field>
-					<id>writePageSize</id>
-					<value>0x80</value>
-				</field>
-			</default>
-		</attribute>
-		<attribute>
-			<id>EEPROM_VPD_BACKUP_INFO</id>
-			<default>
-				<field>
-					<id>byteAddrOffset</id>
-					<value>0x02</value>
-				</field>
-				<field>
-					<id>devAddr</id>
-					<value>0xA0</value>
-				</field>
-				<field>
-					<id>engine</id>
-					<value>0</value>
-				</field>
-				<field>
-					<id>i2cMasterPath</id>
-					<value>physical:sys-0/node-0/proc-0</value>
-				</field>
-				<field>
-					<id>maxMemorySizeKB</id>
-					<value>0x40</value>
-				</field>
-				<field>
-					<id>port</id>
-					<value>1</value>
-				</field>
-				<field>
-					<id>writeCycleTime</id>
-					<value>0x05</value>
-				</field>
-				<field>
-					<id>writePageSize</id>
-					<value>0x80</value>
-				</field>
-			</default>
-		</attribute>
-		<attribute>
-			<id>EEPROM_VPD_PRIMARY_INFO</id>
-			<default>
-				<field>
-					<id>byteAddrOffset</id>
-					<value>0x02</value>
-				</field>
-				<field>
-					<id>devAddr</id>
-					<value>0xA0</value>
-				</field>
-				<field>
-					<id>engine</id>
-					<value>0</value>
-				</field>
-				<field>
-					<id>i2cMasterPath</id>
-					<value>physical:sys-0/node-0/proc-0</value>
-				</field>
-				<field>
-					<id>maxMemorySizeKB</id>
-					<value>0x40</value>
-				</field>
-				<field>
-					<id>port</id>
-					<value>0</value>
-				</field>
-				<field>
-					<id>writeCycleTime</id>
-					<value>0x05</value>
-				</field>
-				<field>
-					<id>writePageSize</id>
-					<value>0x80</value>
-				</field>
-			</default>
-		</attribute>
-		<attribute>
-			<id>I2C_BUS_SPEED_ARRAY</id>
-			<default>1000,1000,0,0,0,0</default>
-		</attribute>
-		<attribute>
-			<id>PROC_R_LOADLINE_VDD</id>
-			<default></default>
-		</attribute>
-		<attribute>
-			<id>PROC_R_DISTLOSS_VDD</id>
-			<default></default>
-		</attribute>
-		<attribute>
-			<id>PROC_VRM_VOFFSET_VDD</id>
-			<default></default>
-		</attribute>
-		<attribute>
-			<id>PROC_R_LOADLINE_VCS</id>
-			<default></default>
-		</attribute>
-		<attribute>
-			<id>PROC_R_DISTLOSS_VCS</id>
-			<default></default>
-		</attribute>
-		<attribute>
-			<id>PROC_VRM_VOFFSET_VCS</id>
-			<default></default>
-		</attribute>
-	</targetType>
-	<targetType>
 		<id>unit-ex-power8</id>
 		<parent>unit</parent>
 		<attribute>
@@ -1579,7 +241,60 @@
 			<default>1</default>
 		</attribute>
 	</targetType>
-
+	
+	<targetType>
+		<id>unit-pci-power9</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>TYPE</id>
+			<default>PCI</default>
+		</attribute>
+		<attribute>
+			<id>BUS_TYPE</id>
+			<default>PCIE</default>
+		</attribute>
+		<attribute>
+			<id>DIRECTION</id>
+			<default>OUT</default>
+		</attribute>
+		<attribute>
+			<id>SCHEMATIC_INTERFACE</id>
+		</attribute>
+	</targetType>
+	
+        <targetType>
+                <id>unit-pci-cumulus</id>
+                <parent>unit-pci-power9</parent>
+                <attribute>
+                        <id>MODEL</id>
+                        <default>CUMULUS</default>
+                </attribute>
+                <attribute>
+                        <id>PCIE_NUM_LANES</id>
+                        <default>16</default>
+                </attribute>
+                <attribute>
+                        <id>PCIE_LANE_MASK</id>
+                        <default></default>
+                </attribute>
+                <attribute>
+                        <id>PCIE_LANE_SET</id>
+                        <default>0</default>
+                </attribute>
+                <attribute>
+                        <id>PHB_NUM</id>
+                        <default>0</default>
+                </attribute>
+                <attribute>
+                        <id>ENABLE_CAPI</id>
+                        <default>1</default>
+                </attribute>
+                <attribute>
+                        <id>IOP_NUM</id>
+                        <default>1</default>
+                </attribute>
+        </targetType>
+        
 	<targetType>
 		<id>unit-pci-naples</id>
 		<parent>unit-pci-power8</parent>
@@ -1903,6 +618,28 @@
 		</attribute>
 
 	</targetType>
+	<targetType>
+		<id>unit-dimm_port-power9</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>BUS_TYPE</id>
+			<default>DDR3</default>
+		</attribute>
+		<attribute>
+			<id>DIRECTION</id>
+			<default>OUT</default>
+		</attribute>
+		<attribute>
+			<id>MBA_PORT</id>
+		</attribute>
+		<attribute>
+			<id>MBA_DIMM</id>
+		</attribute>
+		<attribute>
+			<id>SCHEMATIC_INTERFACE</id>
+		</attribute>
+
+	</targetType>
 
 
 	<!-- DIMMs -->
@@ -1973,17 +710,97 @@
 		</attribute>
 	</targetType>
 	<targetType>
+		<id>unit-ddr4-jedec</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>MODEL</id>
+			<default>JEDEC</default>
+		</attribute>
+		<attribute>
+			<id>TYPE</id>
+			<default>NA</default>
+		</attribute>
+		<attribute>
+			<id>MRW_TYPE</id>
+			<default>NA</default>
+		</attribute>
+		<attribute>
+			<id>BUS_TYPE</id>
+			<default>DDR4</default>
+		</attribute>
+		<attribute>
+			<id>DIRECTION</id>
+			<default>IN</default>
+		</attribute>
+	</targetType>	
+	<targetType>
+		<id>unit-ddr4-jedec</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>MODEL</id>
+			<default>JEDEC</default>
+		</attribute>
+		<attribute>
+			<id>TYPE</id>
+			<default>NA</default>
+		</attribute>
+		<attribute>
+			<id>MRW_TYPE</id>
+			<default>NA</default>
+		</attribute>
+		<attribute>
+			<id>BUS_TYPE</id>
+			<default>DDR4</default>
+		</attribute>
+		<attribute>
+			<id>DIRECTION</id>
+			<default>IN</default>
+		</attribute>
+	</targetType>
+	
+	<targetType>
 		<id>connector-cdimm-cdimm</id>
 		<parent>connector</parent>
 		<parent_type>card-motherboard</parent_type>
 		<parent_type>card-daughtercard</parent_type>
-
 		<attribute>
 			<id>MODEL</id>
 			<default>JEDEC</default>
 		</attribute>
 	</targetType>
+	
+	<targetType>
+		<id>connector-usb-generic</id>
+		<parent>connector</parent>
+		<parent_type>card-motherboard</parent_type>
+		<parent_type>card-daughtercard</parent_type>
+		<attribute>
+			<id>CONNECTOR_TYPE</id>
+			<default>USB</default>
+		</attribute>
+	</targetType>
+	
+	<targetType>
+		<id>connector-hmc-generic</id>
+		<parent>connector</parent>
+		<parent_type>card-motherboard</parent_type>
+		<parent_type>card-daughtercard</parent_type>
+		<attribute>
+			<id>CONNECTOR_TYPE</id>
+			<default>HMC</default>
+		</attribute>
+	</targetType>
 
+	<targetType>
+		<id>connector-uart-generic</id>
+		<parent>connector</parent>
+		<parent_type>card-motherboard</parent_type>
+		<parent_type>card-daughtercard</parent_type>
+		<attribute>
+			<id>CONNECTOR_TYPE</id>
+			<default>SERIAL</default>
+		</attribute>
+	</targetType>
 
 	<targetType>
 		<id>dimm-cdimm-cdimm</id>
@@ -2282,7 +1099,6 @@
 			<id>FSI_PORT</id>
 			<default>0x00</default>
 		</attribute>
-
 		<attribute>
 			<id>FSI_LINK</id>
 			<default>0x00</default>
@@ -2295,6 +1111,10 @@
 			<id>DIRECTION</id>
 			<default>IN</default>
 		</attribute>
+		<attribute>
+			<id>CMFSI</id>
+			<default>0x00</default>
+		</attribute>		
 	</targetType>
 	<targetType>
 		<id>unit-fsicm-slave</id>
@@ -2315,7 +1135,6 @@
 			<id>FSI_PORT</id>
 			<default>0x00</default>
 		</attribute>
-
 		<attribute>
 			<id>FSI_LINK</id>
 			<default>0x00</default>
@@ -2352,9 +1171,40 @@
 			<id>I2C_ENGINE</id>
 			<default>0x00</default>
 		</attribute>
-
+		<attribute>
+			<id>I2C_CONNECTION_TYPE</id>
+			<default>NA</default>
+		</attribute>		
 	</targetType>
 	<targetType>
+		<id>unit-i2cmd-master</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>TYPE</id>
+			<default>NA</default>
+		</attribute>
+		<attribute>
+			<id>BUS_TYPE</id>
+			<default>I2C</default>
+		</attribute>
+		<attribute>
+			<id>DIRECTION</id>
+			<default>OUT</default>
+		</attribute>
+		<attribute>
+			<id>I2C_PORT</id>
+			<default>0x00</default>
+		</attribute>
+		<attribute>
+			<id>I2C_ENGINE</id>
+			<default>0x00</default>
+		</attribute>
+		<attribute>
+			<id>I2C_CONNECTION_TYPE</id>
+			<default>NA</default>
+		</attribute>		
+	</targetType>	
+	<targetType>
 		<id>unit-i2c-slave</id>
 		<parent>unit</parent>
 		<attribute>
@@ -2369,8 +1219,154 @@
 			<id>DIRECTION</id>
 			<default>IN</default>
 		</attribute>
+		<attribute>
+			<id>VPD_SIZE</id>
+			<default>NA</default>
+		</attribute>
+		<attribute>
+			<id>I2C_ADDRESS</id>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>unit-usb-master</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>TYPE</id>
+			<default>NA</default>
+		</attribute>
+		<attribute>
+			<id>BUS_TYPE</id>
+			<default>USB</default>
+		</attribute>
+		<attribute>
+			<id>DIRECTION</id>
+			<default>OUT</default>
+		</attribute>
+		<attribute>
+			<id>PIN_NAME</id>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>unit-clk-master</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>TYPE</id>
+			<default>NA</default>
+		</attribute>
+		<attribute>
+			<id>BUS_TYPE</id>
+			<default>CLK</default>
+		</attribute>
+		<attribute>
+			<id>DIRECTION</id>
+			<default>OUT</default>
+		</attribute>
+		<attribute>
+			<id>PIN_NAME</id>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>unit-clk-slave</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>TYPE</id>
+			<default>NA</default>
+		</attribute>
+		<attribute>
+			<id>BUS_TYPE</id>
+			<default>CLK</default>
+		</attribute>
+		<attribute>
+			<id>DIRECTION</id>
+			<default>IN</default>
+		</attribute>
+		<attribute>
+			<id>PIN_NAME</id>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>unit-ethernet-master</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>TYPE</id>
+			<default>NA</default>
+		</attribute>
+		<attribute>
+			<id>BUS_TYPE</id>
+			<default>ETHERNET</default>
+		</attribute>
+		<attribute>
+			<id>DIRECTION</id>
+			<default>OUT</default>
+		</attribute>
+		<attribute>
+			<id>PIN_NAME</id>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>unit-spi-master</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>TYPE</id>
+			<default>NA</default>
+		</attribute>
+		<attribute>
+			<id>BUS_TYPE</id>
+			<default>SPI</default>
+		</attribute>
+		<attribute>
+			<id>DIRECTION</id>
+			<default>OUT</default>
+		</attribute>
+		<attribute>
+			<id>SPI_ENGINE</id>
+			<default>0x00</default>
+		</attribute>
+		<attribute>
+			<id>SPI_PORT</id>
+			<default>0x00</default>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>unit-spi-slave</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>TYPE</id>
+			<default>NA</default>
+		</attribute>
+		<attribute>
+			<id>BUS_TYPE</id>
+			<default>SPI</default>
+		</attribute>
+		<attribute>
+			<id>DIRECTION</id>
+			<default>IN</default>
+		</attribute>		
+		<attribute>
+			<id>SPI_ENGINE</id>
+			<default>0x00</default>
+		</attribute>
+		<attribute>
+			<id>SPI_PORT</id>
+			<default>0x00</default>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>unit-uart-slave</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>TYPE</id>
+			<default>NA</default>
+		</attribute>
+		<attribute>
+			<id>BUS_TYPE</id>
+			<default>U750</default>
+		</attribute>
+		<attribute>
+			<id>DIRECTION</id>
+			<default>IN</default>
+		</attribute>			
 	</targetType>
-
 	<targetType>
 		<id>unit-gpio-generic</id>
 		<parent>unit</parent>
@@ -2390,11 +1386,25 @@
 			<id>SCHEMATIC_INTERFACE</id>
 		</attribute>
 		<attribute>
+			<id>POR_VALUE</id>
+			<default>0</default>
+		</attribute>
+		<attribute>
+			<id>DRIVER_TYPE</id>
+			<default>NA</default>
+		</attribute>
+		<attribute>
 			<id>GPIO_TYPE</id>
 			<default>GENERIC_OUTPUT</default>
 		</attribute>
-
+		<attribute>
+			<id>PIN_NAME</id>
+		</attribute>
+		<attribute>
+			<id>PIN_NUM</id>
+		</attribute>
 	</targetType>
+	
 	<targetType>
 		<id>i2c-device</id>
 		<parent>base</parent>
@@ -2403,6 +1413,22 @@
 			<default>CHIP</default>
 		</attribute>
 	</targetType>
+	
+	<targetType>
+		<id>smartchip-generic</id>
+		<parent>chip</parent>
+		<parent_type>card-motherboard</parent_type>
+		<parent_type>card-daughtercard</parent_type>
+		<attribute>
+			<id>TYPE</id>
+			<default>NA</default>
+		</attribute>
+		<attribute>
+			<id>MRW_TYPE</id>
+			<default>SMARTCHIP</default>
+		</attribute>
+	</targetType>
+	
 	<targetType>
 		<id>chip-gpioexp-generic</id>
 		<parent>chip</parent>
@@ -2418,6 +1444,20 @@
 		</attribute>
 	</targetType>
 	<targetType>
+		<id>dummy-presence-generic</id>
+		<parent>chip</parent>
+		<parent_type>card-motherboard</parent_type>
+		<parent_type>card-daughtercard</parent_type>
+		<attribute>
+			<id>TYPE</id>
+			<default>NA</default>
+		</attribute>
+		<attribute>
+			<id>MRW_TYPE</id>
+			<default>GPIO_EXPANDER</default>
+		</attribute>
+	</targetType>
+	<targetType>
 		<id>chip-vreg-generic</id>
 		<parent>chip</parent>
 		<parent_type>card-motherboard</parent_type>
@@ -2490,8 +1530,128 @@
 			<id>RAIL_NAME</id>
 			<default>UNKNOWN</default>
 		</attribute>
+	</targetType>	
+	<targetType>
+		<id>unit-presence-generic</id>
+		<parent>unit-gpio-generic</parent>
+		<attribute>
+			<id>TYPE</id>
+			<default>NA</default>
+		</attribute>
+		<attribute>
+			<id>BUS_TYPE</id>
+			<default>GPIO</default>
+		</attribute>
+		<attribute>
+			<id>DIRECTION</id>
+			<default>IN</default>
+		</attribute>
+		<attribute>
+			<id>GPIO_TYPE</id>
+			<default>PRESENCE</default>
+		</attribute>
+	</targetType>	
+	<targetType>
+		<id>unit-pgood-generic</id>
+		<parent>unit-gpio-generic</parent>
+		<attribute>
+			<id>TYPE</id>
+			<default>NA</default>
+		</attribute>
+		<attribute>
+			<id>BUS_TYPE</id>
+			<default>GPIO</default>
+		</attribute>
+		<attribute>
+			<id>DIRECTION</id>
+			<default>IN</default>
+		</attribute>
+		<attribute>
+			<id>GPIO_TYPE</id>
+			<default>PGOOD</default>
+		</attribute>
+	</targetType>	
+	<targetType>
+		<id>unit-enable-generic</id>
+		<parent>unit-gpio-generic</parent>
+		<attribute>
+			<id>TYPE</id>
+			<default>NA</default>
+		</attribute>
+		<attribute>
+			<id>BUS_TYPE</id>
+			<default>GPIO</default>
+		</attribute>
+		<attribute>
+			<id>DIRECTION</id>
+			<default>IN</default>
+		</attribute>
+		<attribute>
+			<id>GPIO_TYPE</id>
+			<default>ENABLE</default>
+		</attribute>
+	</targetType>	
+	<targetType>
+		<id>unit-vin-generic</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>TYPE</id>
+			<default>NA</default>
+		</attribute>
+		<attribute>
+			<id>BUS_TYPE</id>
+			<default>POWER</default>
+		</attribute>
+		<attribute>
+			<id>DIRECTION</id>
+			<default>IN</default>
+		</attribute>
+		<attribute>
+			<id>RAIL_NAME</id>
+			<default>UNKNOWN</default>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>unit-vout-generic</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>TYPE</id>
+			<default>NA</default>
+		</attribute>
+		<attribute>
+			<id>BUS_TYPE</id>
+			<default>POWER</default>
+		</attribute>
+		<attribute>
+			<id>DIRECTION</id>
+			<default>OUT</default>
+		</attribute>
+		<attribute>
+			<id>RAIL_NAME</id>
+			<default>UNKNOWN</default>
+		</attribute>
 	</targetType>
 	<targetType>
+		<id>unit-vreg_avs-generic</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>TYPE</id>
+			<default>NA</default>
+		</attribute>
+		<attribute>
+			<id>BUS_TYPE</id>
+			<default>POWER</default>
+		</attribute>
+		<attribute>
+			<id>DIRECTION</id>
+			<default>OUT</default>
+		</attribute>
+		<attribute>
+			<id>RAIL_NAME</id>
+			<default>UNKNOWN</default>
+		</attribute>
+	</targetType>	
+	<targetType>
 		<id>unit-power-generic</id>
 		<parent>unit</parent>
 		<attribute>
@@ -2512,6 +1672,27 @@
 		</attribute>
 	</targetType>
 	<targetType>
+        <id>chip-tmp-device</id>
+        <parent>chip</parent>
+        <parent_type>card-motherboard</parent_type>
+		<parent_type>card-daughtercard</parent_type>
+        <attribute>
+            <id>I2C_ADDRESS</id>
+        </attribute>
+        <attribute>
+            <id>I2C_SPEED</id>
+        </attribute>
+        <attribute>
+            <id>TYPE</id>
+            <default>NA</default>
+        </attribute>
+        <attribute>
+            <id>MRW_TYPE</id>
+            <default>TMP</default>
+        </attribute>
+     </targetType>
+	
+	<targetType>
 		<id>chip-vpd-device</id>
 		<parent>chip</parent>
 		<attribute>
@@ -2572,7 +1753,7 @@
 		</attribute>
 		<attribute>
 			<id>WRITE_PAGE_SIZE</id>
-			<default>32</default>
+			<default>0x80</default>
 		</attribute>
 	</targetType>
 	<targetType>
@@ -2626,7 +1807,7 @@
 		</attribute>
 		<attribute>
 			<id>WRITE_PAGE_SIZE</id>
-			<default>0x08</default>
+			<default>0x50</default>
 		</attribute>
 	</targetType>
 
@@ -2649,7 +1830,39 @@
 		<parent_type>card-daughtercard</parent_type>
 	</targetType>
 
-
+	<!-- SXM2 -->
+	<targetType>
+		<id>slot-sxm2slot</id>
+		<parent>base</parent>
+		<attribute>
+			<id>CLASS</id>
+			<default>CONNECTOR</default>
+		</attribute>
+		<attribute>
+			<id>TYPE</id>
+			<default>NA</default>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>slot-sxm2slot-generic</id>
+		<parent>slot-sxm2slot</parent>
+		<parent_type>card-motherboard</parent_type>
+		<parent_type>card-daughtercard</parent_type>
+	</targetType>
+	<targetType>
+		<id>card-sxm2card</id>
+		<parent>base</parent>
+		<attribute>
+			<id>CLASS</id>
+			<default>CARD</default>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>card-sxm2card-volta</id>
+		<parent>card-sxm2card</parent>
+		<parent_type>slot-sxm2slot-generic</parent_type>
+	</targetType>
+	
 	<!-- PCIe -->
 	<targetType>
 		<id>slot-pcieslot</id>
@@ -2712,6 +1925,30 @@
 		</attribute>
 
 	</targetType>
+        <targetType>
+                <id>unit-pciconfig0-cumulus</id>
+                <parent>unit</parent>
+                <attribute>
+                        <id>MODEL</id>
+                        <default>CUMULUS</default>
+                </attribute>
+                <attribute>
+                        <id>MRW_TYPE</id>
+                        <default>PCI_CONFIG</default>
+                </attribute>
+                <attribute>
+                        <id>PCIE_CONFIG_NUM</id>
+                        <default>0x00</default>
+                </attribute>
+                <attribute>
+                        <id>IO_CONFIG_NUM</id>
+                </attribute>
+                <attribute>
+                        <id>PCIE_LANE_SWAP_TABLE</id>
+                        <default></default>
+                </attribute>
+
+        </targetType>
 	<targetType>
 		<id>unit-pciconfig1-venice</id>
 		<parent>unit</parent>
@@ -2735,6 +1972,52 @@
 			<default></default>
 		</attribute>
 	</targetType>
+        <targetType>
+                <id>unit-pciconfig1-cumulus</id>
+                <parent>unit</parent>
+                <attribute>
+                        <id>MODEL</id>
+                        <default>CUMULUS</default>
+                </attribute>
+                <attribute>
+                        <id>MRW_TYPE</id>
+                        <default>PCI_CONFIG</default>
+                </attribute>
+                <attribute>
+                        <id>PCIE_CONFIG_NUM</id>
+                        <default>0x01</default>
+                </attribute>
+                <attribute>
+                        <id>IO_CONFIG_NUM</id>
+                </attribute>
+                <attribute>
+                        <id>PCIE_LANE_SWAP_TABLE</id>
+                        <default></default>
+                </attribute>
+        </targetType>
+        <targetType>
+                <id>unit-pciconfig2-cumulus</id>
+                <parent>unit</parent>
+                <attribute>
+                        <id>MODEL</id>
+                        <default>CUMULUS</default>
+                </attribute>
+                <attribute>
+                        <id>MRW_TYPE</id>
+                        <default>PCI_CONFIG</default>
+                </attribute>
+                <attribute>
+                        <id>PCIE_CONFIG_NUM</id>
+                        <default>0x02</default>
+                </attribute>
+                <attribute>
+                        <id>IO_CONFIG_NUM</id>
+                </attribute>
+                <attribute>
+                        <id>PCIE_LANE_SWAP_TABLE</id>
+                        <default></default>
+                </attribute>
+        </targetType>
 	<targetType>
 		<id>unit-pciconfigs-venice</id>
 		<parent>unit</parent>
@@ -2750,6 +2033,36 @@
 			<id>IO_CONFIG_SELECT</id>
 		</attribute>
 	</targetType>
+        <targetType>
+                <id>unit-pciconfigs-cumulus</id>
+                <parent>unit</parent>
+                <attribute>
+                        <id>MODEL</id>
+                        <default>CUMULUS</default>
+                </attribute>
+                <attribute>
+                        <id>MRW_TYPE</id>
+                        <default>PCI_CONFIGS</default>
+                </attribute>
+                <attribute>
+                        <id>IO_CONFIG_SELECT</id>
+                </attribute>
+        </targetType>
+        <targetType>
+                <id>unit-pciconfigs-cumulus</id>
+                <parent>unit</parent>
+                <attribute>
+                        <id>MODEL</id>
+                        <default>VENICE</default>
+                </attribute>
+                <attribute>
+                        <id>MRW_TYPE</id>
+                        <default>PCI_CONFIGS</default>
+                </attribute>
+                <attribute>
+                        <id>IO_CONFIG_SELECT</id>
+                </attribute>
+        </targetType>
 	<targetType>
 		<id>unit-pciconfig0-naples</id>
 		<parent>unit</parent>
@@ -2820,10 +2133,14 @@
 			<default>BUS</default>
 		</attribute>
 		<attribute>
+			<id>I2C_SPEED</id>
+		</attribute>
+		<attribute>
 			<id>I2C_ADDRESS</id>
 		</attribute>
 		<attribute>
-			<id>I2C_SPEED</id>
+			<id>BUS_WIDTH</id>
+			<default>2</default>
 		</attribute>
 	</targetType>
 	<targetType>
@@ -2832,6 +2149,10 @@
 			<id>CLASS</id>
 			<default>BUS</default>
 		</attribute>
+		<attribute>
+			<id>BUS_WIDTH</id>
+			<default>2</default>
+		</attribute>		
 	</targetType>
 	<targetType>
 		<id>FSIM</id>
@@ -2839,13 +2160,17 @@
 			<id>CLASS</id>
 			<default>BUS</default>
 		</attribute>
+		<attribute>
+			<id>BUS_WIDTH</id>
+			<default>2</default>
+		</attribute>		
 	</targetType>
 	<targetType>
 		<id>ABUS</id>
 		<attribute>
 			<id>CLASS</id>
 			<default>BUS</default>
-		</attribute>
+		</attribute>		
 		<attribute>
 			<id>SOURCE_TX_MSBSWAP</id>
 			<default>0</default>
@@ -2870,6 +2195,13 @@
 		</attribute>
 	</targetType>
 	<targetType>
+		<id>CLK</id>
+		<attribute>
+			<id>CLASS</id>
+			<default>BUS</default>
+		</attribute>
+	</targetType>
+	<targetType>
 		<id>PCIE</id>
 		<attribute>
 			<id>CLASS</id>
@@ -2894,6 +2226,10 @@
 			<id>CLASS</id>
 			<default>BUS</default>
 		</attribute>
+		<attribute>
+			<id>BUS_WIDTH</id>
+			<default>1</default>
+		</attribute>
 	</targetType>
 	<targetType>
 		<id>DMI</id>
@@ -2929,14 +2265,57 @@
 		</attribute>
 	</targetType>
 	<targetType>
-		<id>DDR3</id>
+		<id>POWER</id>
 		<attribute>
 			<id>CLASS</id>
 			<default>BUS</default>
 		</attribute>
 	</targetType>
 	<targetType>
-		<id>POWER</id>
+		<id>PWM</id>
+		<attribute>
+			<id>CLASS</id>
+			<default>BUS</default>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>U750</id>
+		<attribute>
+			<id>CLASS</id>
+			<default>BUS</default>
+		</attribute>
+		<attribute>
+			<id>BUS_WIDTH</id>
+			<default>4</default>
+		</attribute>		
+	</targetType>
+	<targetType>
+		<id>SC</id>
+		<attribute>
+			<id>CLASS</id>
+			<default>BUS</default>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>TACH</id>
+		<attribute>
+			<id>CLASS</id>
+			<default>BUS</default>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>SPI</id>
+		<attribute>
+			<id>CLASS</id>
+			<default>BUS</default>
+		</attribute>
+		<attribute>
+			<id>BUS_WIDTH</id>
+			<default>2</default>
+		</attribute>		
+	</targetType>	
+	<targetType>
+		<id>PSI</id>
 		<attribute>
 			<id>CLASS</id>
 			<default>BUS</default>
@@ -2984,6 +2363,17 @@
 			<id>IO_CONFIG_SELECT</id>
 		</attribute>
 	</targetType>
+	<targetType>
+		<id>unit-iomux_group-cfams</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>MRW_TYPE</id>
+			<default>IOMUX_GROUP</default>
+		</attribute>
+		<attribute>
+			<id>IO_CONFIG_SELECT</id>
+		</attribute>
+	</targetType>
 
 	<targetType>
 		<id>unit-iomux_config-fsp2</id>
@@ -2995,30 +2385,185 @@
 		<attribute>
 			<id>IO_CONFIG_NUM</id>
 		</attribute>
-<attribute>
-		<id>SP_IO_NAME0</id>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME1</id>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME2</id>
-	</attribute>
-	<attribute>
-		<id>SP_IO_NAME3</id>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_GROUP</id>
-	</attribute>
-	<attribute>
-		<id>SP_MUX_SELECT</id>
-	</attribute>
-	<attribute>
-		<id>SP_DIO_NUM</id>
-	</attribute>
-	<attribute>
-		<id>SP_ENGINE_NUM</id>
-	</attribute>
+		<attribute>
+			<id>DIO_START</id>
+		</attribute>
+		<attribute>
+			<id>SP_IO_NAME[0]</id>
+		</attribute>
+		<attribute>
+			<id>SP_IO_NAME[1]</id>
+		</attribute>
+		<attribute>
+			<id>SP_IO_NAME[2]</id>
+		</attribute>
+		<attribute>
+			<id>SP_IO_NAME[3]</id>
+		</attribute>
+		<attribute>
+			<id>PIN_NAME[0]</id>
+		</attribute>
+		<attribute>
+			<id>PIN_NAME[1]</id>
+		</attribute>
+		<attribute>
+			<id>PIN_NAME[2]</id>
+		</attribute>
+		<attribute>
+			<id>PIN_NAME[3]</id>
+		</attribute>		
+		<attribute>
+			<id>PIN_NUM[0]</id>
+		</attribute>
+		<attribute>
+			<id>PIN_NUM[1]</id>
+		</attribute>
+		<attribute>
+			<id>PIN_NUM[2]</id>
+		</attribute>
+		<attribute>
+			<id>PIN_NUM[3]</id>
+		</attribute>		
+		<attribute>
+			<id>SP_DIRECTION[0]</id>
+		</attribute>
+		<attribute>
+			<id>SP_DIRECTION[1]</id>
+		</attribute>
+		<attribute>
+			<id>SP_DIRECTION[2]</id>
+		</attribute>
+		<attribute>
+			<id>SP_DIRECTION[3]</id>
+		</attribute>
+		<attribute>
+			<id>SP_DRIVER_TYPE[0]</id>
+		</attribute>
+		<attribute>
+			<id>SP_DRIVER_TYPE[1]</id>
+		</attribute>
+		<attribute>
+			<id>SP_DRIVER_TYPE[2]</id>
+		</attribute>
+		<attribute>
+			<id>SP_DRIVER_TYPE[3]</id>
+		</attribute>
+		<attribute>
+			<id>SP_MUX_GROUP</id>
+		</attribute>
+		<attribute>
+			<id>SP_MUX_SELECT</id>
+		</attribute>
+		<attribute>
+			<id>SP_DIO_NUM</id>
+		</attribute>
+		<attribute><id>SP_ENGINE_NUM[0]</id></attribute>
+		<attribute><id>SP_ENGINE_NUM[1]</id></attribute>
+		<attribute><id>SP_ENGINE_NUM[2]</id></attribute>
+		<attribute><id>SP_ENGINE_NUM[3]</id></attribute>
+		<attribute><id>SP_MODE_CONTROL[0]</id></attribute>
+		<attribute><id>SP_MODE_CONTROL[1]</id></attribute>
+		<attribute><id>SP_MODE_CONTROL[2]</id></attribute>
+		<attribute><id>SP_MODE_CONTROL[3]</id></attribute>
+	</targetType>
+	<targetType>
+		<id>unit-iomux_config-cfams</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>MRW_TYPE</id>
+			<default>IOMUX_GROUP</default>
+		</attribute>
+		<attribute>
+			<id>IO_CONFIG_NUM</id>
+		</attribute>
+		<attribute>
+			<id>DIO_START</id>
+		</attribute>
+		<attribute>
+			<id>SP_IO_NAME[0]</id>
+		</attribute>
+		<attribute>
+			<id>SP_IO_NAME[1]</id>
+		</attribute>
+		<attribute>
+			<id>SP_IO_NAME[2]</id>
+		</attribute>
+		<attribute>
+			<id>SP_IO_NAME[3]</id>
+		</attribute>
+		<attribute>
+			<id>PIN_NAME[0]</id>
+		</attribute>
+		<attribute>
+			<id>PIN_NAME[1]</id>
+		</attribute>
+		<attribute>
+			<id>PIN_NAME[2]</id>
+		</attribute>
+		<attribute>
+			<id>PIN_NAME[3]</id>
+		</attribute>		
+		<attribute>
+			<id>PIN_NUM[0]</id>
+		</attribute>
+		<attribute>
+			<id>PIN_NUM[1]</id>
+		</attribute>
+		<attribute>
+			<id>PIN_NUM[2]</id>
+		</attribute>
+		<attribute>
+			<id>PIN_NUM[3]</id>
+		</attribute>		
+		<attribute>
+			<id>SP_DIRECTION[0]</id>
+		</attribute>
+		<attribute>
+			<id>SP_DIRECTION[1]</id>
+		</attribute>
+		<attribute>
+			<id>SP_DIRECTION[2]</id>
+		</attribute>
+		<attribute>
+			<id>SP_DIRECTION[3]</id>
+		</attribute>
+		<attribute>
+			<id>SP_DRIVER_TYPE[0]</id>
+		</attribute>
+		<attribute>
+			<id>SP_DRIVER_TYPE[1]</id>
+		</attribute>
+		<attribute>
+			<id>SP_DRIVER_TYPE[2]</id>
+		</attribute>
+		<attribute>
+			<id>SP_DRIVER_TYPE[3]</id>
+		</attribute>
+		<attribute>
+			<id>SP_MUX_GROUP</id>
+		</attribute>
+		<attribute>
+			<id>SP_MUX_SELECT</id>
+		</attribute>
+		<attribute>
+			<id>SP_DIO_NUM</id>
+		</attribute>
+		<attribute><id>SP_ENGINE_NUM[0]</id></attribute>
+		<attribute><id>SP_ENGINE_NUM[1]</id></attribute>
+		<attribute><id>SP_ENGINE_NUM[2]</id></attribute>
+		<attribute><id>SP_ENGINE_NUM[3]</id></attribute>
+		<attribute><id>SP_MODE_CONTROL[0]</id></attribute>
+		<attribute><id>SP_MODE_CONTROL[1]</id></attribute>
+		<attribute><id>SP_MODE_CONTROL[2]</id></attribute>
+		<attribute><id>SP_MODE_CONTROL[3]</id></attribute>
+	</targetType>
+	<targetType>
+		<id>unit-noniomux_config-fsp2</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>MRW_TYPE</id>
+			<default>NONIOMUX_GROUP</default>
+		</attribute>
 	</targetType>
 	<targetType>
 		<id>unit-iomux_config0-fsp2</id>
@@ -3088,8 +2633,81 @@
 			<default>IOMUX</default>
 		</attribute>
 	</targetType>
+	
+	<targetType>
+		<id>unit-iomux_config0-cfams</id>
+		<parent>unit-iomux_config-cfams</parent>
+		<attribute>
+			<id>IO_CONFIG_NUM</id>
+			<default>1</default>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>unit-iomux_config1-cfams</id>
+		<parent>unit-iomux_config-cfams</parent>
+		<attribute>
+			<id>IO_CONFIG_NUM</id>
+			<default>2</default>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>unit-iomux_config2-cfams</id>
+		<parent>unit-iomux_config-cfams</parent>
+		<attribute>
+			<id>IO_CONFIG_NUM</id>
+			<default>3</default>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>unit-iomux_config3-cfams</id>
+		<parent>unit-iomux_config-cfams</parent>
+		<attribute>
+			<id>IO_CONFIG_NUM</id>
+			<default>4</default>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>unit-iomux_i2c-cfams</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>MRW_TYPE</id>
+			<default>IOMUX</default>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>unit-iomux_gpio-cfams</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>MRW_TYPE</id>
+			<default>IOMUX</default>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>unit-iomux_spcn-cfams</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>MRW_TYPE</id>
+			<default>IOMUX</default>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>unit-iomux_sc-cfams</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>MRW_TYPE</id>
+			<default>IOMUX</default>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>unit-iomux_uart-cfams</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>MRW_TYPE</id>
+			<default>IOMUX</default>
+		</attribute>
+	</targetType>
 	<targetType>
-		<id>chip-sp-fsp2</id>
+		<id>chip-sp-bmc</id>
 		<parent>chip</parent>
 		<parent_type>card-motherboard</parent_type>
 		<parent_type>card-daughtercard</parent_type>
@@ -3099,13 +2717,53 @@
 		</attribute>
 	</targetType>
 	<targetType>
-		<id>chip-sp-bmc</id>
+		<id>chip-sp-cfams</id>
 		<parent>chip</parent>
 		<parent_type>card-motherboard</parent_type>
 		<parent_type>card-daughtercard</parent_type>
 		<attribute>
 			<id>TYPE</id>
-			<default>FSP</default>
+			<default>NA</default>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>unit-psi-slave</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>TYPE</id>
+			<default>NA</default>
+		</attribute>
+		<attribute>
+			<id>BUS_TYPE</id>
+			<default>PSI</default>
+		</attribute>
+		<attribute>
+			<id>DIRECTION</id>
+			<default>IN</default>
+		</attribute>
+		<attribute>
+			<id>PSI_ENGINE</id>
+			<default></default>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>unit-psi-master</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>TYPE</id>
+			<default>NA</default>
+		</attribute>
+		<attribute>
+			<id>BUS_TYPE</id>
+			<default>PSI</default>
+		</attribute>
+		<attribute>
+			<id>DIRECTION</id>
+			<default>OUT</default>
+		</attribute>
+		<attribute>
+			<id>SP_ENGINE_NUM</id>
+			<default></default>
 		</attribute>
 	</targetType>
 	<targetType>
@@ -3154,9 +2812,37 @@
 			<default>LED</default>
 		</attribute>
 		<attribute>
+			<id>LED_TYPE</id>
+			<default>NA</default>
+		</attribute>
+		<attribute>
 			<id>LED_COLOR</id>
 			<default>GREEN</default>
 		</attribute>
+		<attribute>
+			<id>BLINK_ROLLUP</id>
+			<default></default>
+		</attribute>
+		<attribute>
+			<id>VIEW_REAR</id>
+			<default></default>
+		</attribute>
+		<attribute>
+			<id>VIEW_FRONT</id>
+			<default></default>
+		</attribute>
+		<attribute>
+			<id>VIEW_INTERNAL</id>
+			<default></default>
+		</attribute>
+		<attribute>
+			<id>FUNCTION</id>
+			<default></default>
+		</attribute>
+		<attribute>
+			<id>BLINK_RATE</id>
+			<default></default>
+		</attribute>
 	</targetType>
 	<targetType>
 		<id>unit-spcn-master</id>
@@ -3230,6 +2916,30 @@
 			<default>OUT</default>
 		</attribute>
 	</targetType>
+		<targetType>
+		<id>unit-sc-slave</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>CLASS</id>
+			<default>UNIT</default>
+		</attribute>
+		<attribute>
+			<id>TYPE</id>
+			<default>NA</default>
+		</attribute>
+		<attribute>
+			<id>MRW_TYPE</id>
+			<default>NA</default>
+		</attribute>
+		<attribute>
+			<id>BUS_TYPE</id>
+			<default>SC</default>
+		</attribute>
+		<attribute>
+			<id>DIRECTION</id>
+			<default>IN</default>
+		</attribute>
+	</targetType>
 	<targetType>
 		<id>unit-u750-master</id>
 		<parent>unit</parent>
@@ -3278,6 +2988,136 @@
 			<default>OUT</default>
 		</attribute>
 	</targetType>
+	
+	<targetType>
+		<id>unit-pwm-generic</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>CLASS</id>
+			<default>UNIT</default>
+		</attribute>
+		<attribute>
+			<id>TYPE</id>
+			<default>NA</default>
+		</attribute>
+		<attribute>
+			<id>BUS_TYPE</id>
+			<default>PWM</default>
+		</attribute>
+		<attribute>
+			<id>MRW_TYPE</id>
+			<default>NA</default>
+		</attribute>
+		<attribute>
+			<id>DIRECTION</id>
+			<default>OUT</default>
+		</attribute>
+		<attribute>
+			<id>PWM_CHANNEL_ID</id>
+			<default></default>
+		</attribute>
+		<attribute>
+			<id>FAN_PWM_ADDRESS</id>
+			<default></default>
+		</attribute>
+		<attribute>
+			<id>FAN_PWM_BITMASK</id>
+			<default></default>
+		</attribute>
+		<attribute>
+			<id>PWM_DUTY_CYCLE_ADDRESS</id>
+			<default></default>
+		</attribute>
+		<attribute>
+			<id>PWM_DUTY_CYCLE_BITMASK</id>
+			<default></default>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>unit-tach-generic</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>CLASS</id>
+			<default>UNIT</default>
+		</attribute>
+		<attribute>
+			<id>TYPE</id>
+			<default>NA</default>
+		</attribute>
+		<attribute>
+			<id>BUS_TYPE</id>
+			<default>TACH</default>
+		</attribute>
+		<attribute>
+			<id>MRW_TYPE</id>
+			<default>NA</default>
+		</attribute>
+		<attribute>
+			<id>DIRECTION</id>
+			<default>IN</default>
+		</attribute>
+		<attribute>
+			<id>TACH_CHANNEL_ID</id>
+			<default></default>
+		</attribute>
+		<attribute>
+			<id>FAN_DOMAIN_REG_ADDRESS</id>
+			<default></default>
+		</attribute>
+		<attribute>
+			<id>FAN_DOMAIN_REG_BITMASK</id>
+			<default></default>
+		</attribute>
+		<attribute>
+			<id>FAN_ERROR_MASK_ADDRESS</id>
+			<default></default>
+		</attribute>
+		<attribute>
+			<id>FAN_ERROR_MASK_BITMASK</id>
+			<default></default>
+		</attribute>
+		<attribute>
+			<id>FAN_ERROR_REG_ADDRESS</id>
+			<default></default>
+		</attribute>
+		<attribute>
+			<id>FAN_ERROR_REG_BITMASK</id>
+			<default></default>
+		</attribute>
+		<attribute>
+			<id>FAN_PARTNER_HS_REG_ADDRESS</id>
+			<default></default>
+		</attribute>
+		<attribute>
+			<id>FAN_PARTNER_HS_REG_BITMASK</id>
+			<default></default>
+		</attribute>
+		<attribute>
+			<id>FAN_SPD_REG_HIGH_ADDRESS</id>
+			<default></default>
+		</attribute>
+		<attribute>
+			<id>FAN_SPD_REG_HIGH_BITMASK</id>
+			<default></default>
+		</attribute>
+		<attribute>
+			<id>FAN_SPD_REG_LOW_ADDRESS</id>
+			<default></default>
+		</attribute>
+		<attribute>
+			<id>FAN_SPD_REG_LOW_BITMASK</id>
+			<default></default>
+		</attribute>	
+		<attribute>
+			<id>FAN_TYPE_SEL_ADDRESS</id>
+			<default></default>
+		</attribute>
+		<attribute>
+			<id>FAN_TYPE_SEL_BITMASK</id>
+			<default></default>
+		</attribute>							
+	</targetType>
+
 	<targetType>
 		<id>unit-ipmi-sensor</id>
 		<parent>unit</parent>
@@ -3347,15 +3187,2009 @@
 			<id>ADC_CHANNEL_OFFSET</id>
 			<default>0</default>
 		</attribute>
-
 	</targetType>
 	<targetType>
 		<id>chip-apss-psoc</id>
 		<parent_type>sys-sys-power8</parent_type>
+		<parent_type>sys-sys-power9</parent_type>
 		<parent>chip</parent>
 		<attribute>
 			<id>TYPE</id>
 			<default>APSS</default>
 		</attribute>
 	</targetType>
+	<targetType>
+		<id>chip-processor</id>
+		<parent>chip</parent>
+		<attribute>
+			<id>TYPE</id>
+			<default>PROC</default>
+		</attribute>
+	</targetType>	
+<targetType>
+    <id>chip-processor-nimbus</id>
+    <parent>chip-processor-power9</parent>
+    <attribute>
+        <id>MODEL</id>
+        <default>NIMBUS</default>
+    </attribute>
+    <attribute>
+        <id>PROC_PCIE_NUM_PHB</id>
+        <default>3</default>
+    </attribute>
+    <attribute>
+        <id>PROC_PCIE_NUM_IOP</id>
+        <default>2</default>
+    </attribute>
+    <attribute>
+        <id>PROC_PCIE_NUM_LANES</id>
+        <default>24</default>
+    </attribute>
+    <attribute>
+        <id>PROC_PCIE_REFCLOCK_ENABLE</id>
+        <default>0xE0</default>
+    </attribute>
+</targetType>
+
+<targetType>
+    <id>chip-processor-power9</id>
+    <parent>chip-processor</parent>
+    <attribute><id>DUMMY_RW</id></attribute>
+    <attribute><id>DUMMY_HEAP_ZERO_DEFAULT</id></attribute>
+    <attribute><id>MSS_MEM_MC_IN_GROUP</id></attribute>
+    <attribute><id>EEPROM_VPD_PRIMARY_INFO</id></attribute>
+    <attribute><id>EEPROM_VPD_BACKUP_INFO</id></attribute>
+    <attribute><id>EEPROM_SBE_PRIMARY_INFO</id></attribute>
+    <attribute><id>EEPROM_SBE_BACKUP_INFO</id></attribute>
+    <attribute>
+        <id>I2C_BUS_SPEED_ARRAY</id>
+        <default>1000,1000,0,0,0,0</default>
+    </attribute>
+
+    <!-- From PHYP Memory Map -->
+    <attribute><id>NPU_MMIO_BAR_ENABLE</id></attribute>
+    <attribute><id>NPU_MMIO_BAR_BASE_ADDR</id></attribute>
+    <attribute><id>NPU_MMIO_BAR_SIZE</id></attribute>
+    <attribute><id>FSP_BASE_ADDR</id></attribute>
+    <attribute><id>FSP_BAR_SIZE</id></attribute>
+    <attribute><id>FSP_MMIO_MASK_SIZE</id></attribute>
+    <attribute><id>PSI_BRIDGE_BASE_ADDR</id></attribute>
+    <attribute><id>INTP_BASE_ADDR</id></attribute>
+    <attribute><id>PHB_BASE_ADDRS</id></attribute>
+    <attribute><id>PCI_BASE_ADDRS_64</id></attribute>
+    <attribute><id>PCI_BASE_ADDRS_32</id></attribute>
+    <attribute><id>MEM_BASE</id></attribute>
+    <attribute><id>MIRROR_BASE</id></attribute>
+    <attribute><id>RNG_BAR_SIZE</id></attribute>
+    <attribute><id>IMT_BASE_ADDR</id></attribute>
+    <attribute><id>IMT_BAR_SIZE</id></attribute>
+    <attribute><id>PHB_MMIO_ADDRS_64</id></attribute>
+    <attribute><id>PHB_MMIO_ADDRS_32</id></attribute>
+    <attribute><id>PHB_XIVE_ESB_ADDRS</id></attribute>
+    <attribute><id>PHB_REG_ADDRS</id></attribute>
+    <attribute><id>XIVE_ROUTING_ESB_ADDR</id></attribute>
+    <attribute><id>XIVE_ROUTING_END_ADDR</id></attribute>
+    <attribute><id>XIVE_PRESENTATION_NVT_ADDR</id></attribute>
+    <attribute><id>VAS_HYPERVISOR_WINDOW_CONTEXT_ADDR</id></attribute>
+    <attribute><id>VAS_USER_WINDOW_CONTEXT_ADDR</id></attribute>
+    <attribute><id>LPC_BUS_ADDR</id></attribute>
+    <attribute><id>NVIDIA_NPU_PRIVILEGED_ADDR</id></attribute>
+    <attribute><id>NVIDIA_NPU_USER_REG_ADDR</id></attribute>
+    <attribute><id>NVIDIA_PHY0_REG_ADDR</id></attribute>
+    <attribute><id>NVIDIA_PHY1_REG_ADDR</id></attribute>
+    <attribute><id>XIVE_CONTROLLER_BAR_ADDR</id></attribute>
+    <attribute><id>XIVE_PRESENTATION_BAR_ADDR</id></attribute>
+    <attribute><id>PSI_HB_ESP_ADDR</id></attribute>
+    <attribute><id>NX_RNG_ADDR</id></attribute>
+    <!-- end Memory Map -->
+
+    <attribute><id>ECID</id></attribute>
+    <attribute><id>I2C_SLAVE_ADDRESS</id></attribute>
+    <attribute><id>PROC_PCIE_NUM_PHB</id></attribute>
+    <attribute><id>PROC_PCIE_NUM_IOP</id></attribute>
+    <attribute><id>PROC_PCIE_NUM_LANES</id></attribute>
+    <attribute><id>PROC_DCM_INSTALLED</id></attribute>
+    <attribute><id>PROC_PCIE_IOP_G2_PLL_CONTROL0</id></attribute>
+    <attribute><id>PROC_PCIE_IOP_G3_PLL_CONTROL0</id></attribute>
+    <attribute><id>PROC_PCIE_IOP_PCS_CONTROL0</id></attribute>
+    <attribute><id>PROC_PCIE_IOP_PCS_CONTROL1</id></attribute>
+    <attribute><id>PROC_PCIE_IOP_PLL_GLOBAL_CONTROL0</id></attribute>
+    <attribute><id>PROC_PCIE_IOP_PLL_GLOBAL_CONTROL1</id></attribute>
+    <attribute><id>PROC_PCIE_IOP_RX_PEAK</id></attribute>
+    <attribute><id>PROC_PCIE_IOP_RX_SDL</id></attribute>
+    <attribute><id>PROC_PCIE_IOP_RX_VGA_CONTROL2</id></attribute>
+    <attribute><id>PROC_PCIE_IOP_TX_BWLOSS1</id></attribute>
+    <attribute><id>PROC_PCIE_IOP_TX_FIFO_OFFSET</id></attribute>
+    <attribute><id>PROC_PCIE_IOP_TX_RCVRDETCNTL</id></attribute>
+    <attribute><id>PROC_PCIE_IOP_ZCAL_CONTROL</id></attribute>
+    <attribute><id>PROC_PCIE_IOP_TX_FFE_GEN1</id></attribute>
+    <attribute><id>PROC_PCIE_IOP_TX_FFE_GEN2</id></attribute>
+    <attribute><id>PROC_PCIE_IOP_CONFIG</id></attribute>
+    <attribute><id>PROC_PCIE_PHB_ACTIVE</id></attribute>
+    <attribute><id>PROC_HTM_BAR_SIZE</id></attribute>
+    <attribute><id>XSCOM_BASE_ADDRESS</id></attribute>
+</targetType>
+<!-- p9 sub-units -->
+
+<!-- EQ chiplet: Use same EQ target for Nimbus and Cumulus
+     6 EQs on Nimbus
+     Quad: 2 ex's and one ep -->
+<targetType>
+    <id>unit-eq-power9</id>
+    <parent>unit</parent>
+    <attribute>
+        <id>TYPE</id>
+        <default>EQ</default>
+    </attribute>
+    <attribute><id>DECONFIG_GARDABLE</id><default>1</default></attribute>
+</targetType>
+
+<!-- EX: Use same EX target for both Nimbus and Cumulus
+     2 EXs per EQ
+     EX (L2/L3, 2x Core) -->
+<targetType>
+    <id>unit-ex-power9</id>
+    <parent>unit</parent>
+    <attribute>
+        <id>TYPE</id>
+        <default>EX</default>
+    </attribute>
+    <attribute><id>DECONFIG_GARDABLE</id><default>0</default></attribute>
+</targetType>
+
+<!-- CORE: Use same CORE target for both Nimbus and Cumulus
+     A collection of 4 threads -->
+<targetType>
+    <id>unit-core-power9</id>
+    <parent>unit</parent>
+    <attribute>
+        <id>TYPE</id>
+        <default>CORE</default>
+    </attribute>
+    <attribute><id>DECONFIG_GARDABLE</id><default>0</default></attribute>
+</targetType>
+
+<!-- MCS
+     Nimbus : 4 MCS under each chip
+              (MCUnit left has two, MCUnit right has two)
+     Cumulus: None  -->
+<targetType>
+    <id>unit-mcs-power9</id>
+    <parent>unit</parent>
+    <attribute>
+        <id>TYPE</id>
+        <default>MCS</default>
+    </attribute>
+    <attribute><id>DECONFIG_GARDABLE</id><default>1</default></attribute>
+    <attribute><id>IBSCOM_MCS_BASE_ADDR</id></attribute>
+    <attribute><id>EI_BUS_TX_MSBSWAP</id></attribute>
+</targetType>
+
+<targetType>
+    <id>unit-mcs-nimbus</id>
+    <parent>unit-mcs-power9</parent>
+    <attribute>
+        <id>MODEL</id>
+        <default>NIMBUS</default>
+    </attribute>
+</targetType>
+
+<!-- MCA
+     Nimbus : 2 MCAs under each MCS (total of 8 per chip)
+     Cumulus: No MCA
+     Tied 1-1 to a DDR port -->
+<targetType>
+    <id>unit-mca-power9</id>
+    <parent>unit</parent>
+    <attribute>
+        <id>TYPE</id>
+        <default>MCA</default>
+    </attribute>
+    <attribute><id>DECONFIG_GARDABLE</id><default>1</default></attribute>
+    <attribute><id>EFF_DIMM_SIZE</id></attribute>
+</targetType>
+
+<targetType>
+    <id>unit-mca-nimbus</id>
+    <parent>unit-mca-power9</parent>
+    <attribute>
+        <id>MODEL</id>
+        <default>NIMBUS</default>
+    </attribute>
+</targetType>
+
+<!-- MCBIST
+     Nimbus : 1 per MCU (total of 2 per chip)
+     Cumulus: None  -->
+<targetType>
+    <id>unit-mcbist-power9</id>
+    <parent>unit</parent>
+    <attribute>
+        <id>TYPE</id>
+        <default>MCBIST</default>
+    </attribute>
+    <attribute><id>DECONFIG_GARDABLE</id><default>1</default></attribute>
+    <attribute><id>MSS_FREQ</id></attribute>
+</targetType>
+
+<targetType>
+    <id>unit-mcbist-nimbus</id>
+    <parent>unit-mcbist-power9</parent>
+    <attribute>
+        <id>MODEL</id>
+        <default>NIMBUS</default>
+    </attribute>
+</targetType>
+
+<!-- MI
+     Nimbus : None
+     Cumulus: total of 4 per chip -->
+<targetType>
+    <id>unit-mi-power9</id>
+    <parent>unit</parent>
+    <attribute>
+        <id>TYPE</id>
+        <default>MI</default>
+    </attribute>
+    <attribute><id>DECONFIG_GARDABLE</id><default>1</default></attribute>
+</targetType>
+
+<targetType>
+    <id>unit-mi-cumulus</id>
+    <parent>unit-mi-power9</parent>
+    <attribute>
+        <id>MODEL</id>
+        <default>CUMULUS</default>
+    </attribute>
+</targetType>
+
+<!-- DMI
+     Nimbus : None
+     Cumulus: 2 per MI (total of 8 per chip) -->
+<targetType>
+    <id>unit-dmi-power9</id>
+    <parent>unit</parent>
+    <attribute>
+        <id>TYPE</id>
+        <default>DMI</default>
+    </attribute>
+    <attribute><id>DECONFIG_GARDABLE</id><default>1</default></attribute>
+    <attribute>
+        <id>BUS_TYPE</id>
+        <default>DMI</default>
+    </attribute>    
+    <attribute>
+		<id>DIRECTION</id>
+		<default>OUT</default>
+	</attribute>
+</targetType>
+
+<targetType>
+    <id>unit-dmi-cumulus</id>
+    <parent>unit-dmi-power9</parent>
+    <attribute>
+        <id>MODEL</id>
+        <default>CUMULUS</default>
+    </attribute>
+</targetType>
+
+<!-- PEC corresponds to IOP. Use same PEC target for Nimbus and Cumulus
+     Nimbus : 3 per chip
+     Cumulus: 3 per chip  -->
+<targetType>
+    <id>unit-pec-power9</id>
+    <parent>unit</parent>
+    <attribute>
+        <id>TYPE</id>
+        <default>PEC</default>
+    </attribute>
+    <attribute>
+        <id>PROC_PCIE_REFCLOCK_ENABLE</id>
+        <default>0xE0</default>
+    </attribute>
+    <attribute><id>DECONFIG_GARDABLE</id><default>1</default></attribute>
+</targetType>
+
+<!-- PHB
+     Nimbus : 6 per PEC (total of 18 per chip)
+     Cumulus: 6 per PEC -->
+<targetType>
+    <id>unit-phb-power9</id>
+    <parent>unit</parent>
+    <attribute>
+        <id>TYPE</id>
+        <default>PHB</default>
+    </attribute>
+    <attribute>
+        <id>PROC_PCIE_NUM_LANES</id>
+        <default>32</default>
+    </attribute>
+    <attribute><id>DECONFIG_GARDABLE</id><default>1</default></attribute>
+</targetType>
+
+<targetType>
+    <id>unit-phb-nimbus</id>
+    <parent>unit-phb-power9</parent>
+    <attribute>
+        <id>MODEL</id>
+        <default>NIMBUS</default>
+    </attribute>
+</targetType>
+
+<targetType>
+    <id>unit-phb-cumulus</id>
+    <parent>unit-phb-power9</parent>
+    <attribute>
+        <id>MODEL</id>
+        <default>CUMULUS</default>
+    </attribute>
+</targetType>
+
+<!-- OBUS
+     Nimbus : 2 per chip (OB0 and OB3)
+     Cumulus: 4 per chip (OB0, OB1, OB2, and OB3)  -->
+<targetType>
+    <id>unit-obus-power9</id>
+    <parent>unit</parent>
+    <attribute>
+        <id>TYPE</id>
+        <default>OBUS</default>
+    </attribute>
+    <attribute><id>DECONFIG_GARDABLE</id><default>1</default></attribute>
+</targetType>
+
+<targetType>
+    <id>unit-obus-nimbus</id>
+    <parent>unit-obus-power9</parent>
+    <attribute>
+        <id>MODEL</id>
+        <default>NIMBUS</default>
+    </attribute>
+</targetType>
+
+<targetType>
+    <id>unit-obus-cumulus</id>
+    <parent>unit-obus-power9</parent>
+    <attribute>
+        <id>MODEL</id>
+        <default>CUMULUS</default>
+    </attribute>
+</targetType>
+
+<!-- NVBUS
+     Nimbus : 2 per chip
+     Cumulus: 2  -->
+<targetType>
+    <id>unit-nvbus-power9</id>
+    <parent>unit</parent>
+    <attribute>
+        <id>TYPE</id>
+        <default>NVBUS</default>
+    </attribute>
+    <attribute><id>DECONFIG_GARDABLE</id><default>1</default></attribute>
+</targetType>
+
+<targetType>
+    <id>unit-nvbus-nimbus</id>
+    <parent>unit-nvbus-power9</parent>
+    <attribute>
+        <id>MODEL</id>
+        <default>NIMBUS</default>
+    </attribute>
+</targetType>
+
+<targetType>
+    <id>unit-nvbus-cumulus</id>
+    <parent>unit-nvbus-power9</parent>
+    <attribute>
+        <id>MODEL</id>
+        <default>CUMULUS</default>
+    </attribute>
+</targetType>
+
+<!-- PPE
+     Nimbus : 21, including the SBE (1 SBE, 1 Powerbus/Fabric PPE,
+              4 GPEs, 12 CMEs, and 3 IO PPEs.
+     Cumulus: 23 (2 additional IO-PPE instances) -->
+<targetType>
+    <id>unit-ppe-power9</id>
+    <parent>unit</parent>
+    <attribute>
+        <id>TYPE</id>
+        <default>PPE</default>
+    </attribute>
+    <attribute><id>DECONFIG_GARDABLE</id><default>0</default></attribute>
+</targetType>
+
+<targetType>
+    <id>unit-ppe-nimbus</id>
+    <parent>unit-ppe-power9</parent>
+    <attribute>
+        <id>MODEL</id>
+        <default>NIMBUS</default>
+    </attribute>
+</targetType>
+
+<targetType>
+    <id>unit-ppe-cumulus</id>
+    <parent>unit-ppe-power9</parent>
+    <attribute>
+        <id>MODEL</id>
+        <default>CUMULUS</default>
+    </attribute>
+</targetType>
+
+<!-- PERV
+     Nimbus : 43 (1 per chiplet)
+     Cumulus: 1 per chiplet -->
+<targetType>
+    <id>unit-perv-power9</id>
+    <parent>unit</parent>
+    <attribute>
+        <id>TYPE</id>
+        <default>PERV</default>
+    </attribute>
+    <attribute><id>DECONFIG_GARDABLE</id><default>0</default></attribute>
+</targetType>
+
+<targetType>
+    <id>unit-perv-nimbus</id>
+    <parent>unit-perv-power9</parent>
+    <attribute>
+        <id>MODEL</id>
+        <default>NIMBUS</default>
+    </attribute>
+</targetType>
+
+<targetType>
+    <id>unit-perv-cumulus</id>
+    <parent>unit-perv-power9</parent>
+    <attribute>
+        <id>MODEL</id>
+        <default>CUMULUS</default>
+    </attribute>
+</targetType>
+
+<!-- XBUS
+     Nimbus : 1 per chip
+     Cumulus: 7  -->
+<targetType>
+    <id>unit-xbus-power9</id>
+    <parent>unit</parent>
+    <attribute>
+        <id>TYPE</id>
+        <default>XBUS</default>
+    </attribute>
+    <attribute>
+                        <id>BUS_TYPE</id>
+                        <default>XBUS</default>
+                </attribute>
+                <attribute>
+                        <id>DIRECTION</id>
+                        <default>INOUT</default>
+                </attribute>
+                <attribute>
+                        <id>CHIP_UNIT</id>
+                </attribute>
+    <attribute><id>DECONFIG_GARDABLE</id><default>1</default></attribute>
+    <attribute><id>HWAS_STATE_CHANGED_SUBSCRIPTION_MASK</id>
+        <default>0x00000001</default> <!--GARD -->
+    </attribute>
+    <attribute><id>CHIP_UNIT</id></attribute>
+    <attribute><id>PEER_TARGET</id></attribute>
+    <attribute><id>CDM_DOMAIN</id><default>FABRIC</default></attribute>
+</targetType>
+
+<targetType>
+    <id>unit-xbus-nimbus</id>
+    <parent>unit-xbus-power9</parent>
+    <attribute>
+        <id>MODEL</id>
+        <default>NIMBUS</default>
+    </attribute>
+</targetType>
+
+<targetType>
+    <id>unit-xbus-cumulus</id>
+    <parent>unit-xbus-power9</parent>
+    <attribute>
+        <id>MODEL</id>
+        <default>CUMULUS</default>
+    </attribute>
+</targetType>
+
+<!-- CAPP
+     Nimbus : 2 per chip
+     Cumulus: 2  -->
+<targetType>
+    <id>unit-capp-power9</id>
+    <parent>unit</parent>
+    <attribute>
+        <id>TYPE</id>
+        <default>CAPP</default>
+    </attribute>
+    <attribute><id>DECONFIG_GARDABLE</id><default>1</default></attribute>
+    <attribute>
+        <id>PRIMARY_CAPABILITIES</id>
+        <default>
+            <field><id>supportsFsiScom</id><value>0</value></field>
+            <field><id>supportsXscom</id><value>0</value></field>
+            <field><id>supportsInbandScom</id><value>0</value></field>
+            <field><id>reserved</id><value>0</value></field>
+        </default>
+    </attribute>
+</targetType>
+
+<targetType>
+    <id>unit-capp-nimbus</id>
+    <parent>unit-capp-power9</parent>
+    <attribute>
+        <id>MODEL</id>
+        <default>NIMBUS</default>
+    </attribute>
+</targetType>
+
+<targetType>
+    <id>unit-capp-cumulus</id>
+    <parent>unit-capp-power9</parent>
+    <attribute>
+        <id>MODEL</id>
+        <default>CUMULUS</default>
+    </attribute>
+</targetType>
+
+<!-- SBE
+     Nimbus : 1 per chip
+     Cumulus: 1 -->
+<targetType>
+    <id>unit-sbe-power9</id>
+    <parent>unit</parent>
+    <attribute>
+        <id>TYPE</id>
+        <default>SBE</default>
+    </attribute>
+    <attribute><id>DECONFIG_GARDABLE</id><default>0</default></attribute>
+</targetType>
+
+<targetType>
+    <id>unit-sbe-nimbus</id>
+    <parent>unit-sbe-power9</parent>
+    <attribute>
+        <id>MODEL</id>
+        <default>NIMBUS</default>
+    </attribute>
+</targetType>
+
+<targetType>
+    <id>unit-sbe-cumulus</id>
+    <parent>unit-sbe-power9</parent>
+    <attribute>
+        <id>MODEL</id>
+        <default>CUMULUS</default>
+    </attribute>
+</targetType>
+
+<!-- OCC
+     Nimbus : 1 per chip
+     Cumulus: 1  -->
+<targetType>
+    <id>unit-occ-power9</id>
+    <parent>unit</parent>
+    <attribute>
+        <id>TYPE</id>
+        <default>OCC</default>
+    </attribute>
+    <attribute>
+        <id>MODEL</id>
+        <default>POWER9</default>
+    </attribute>
+    <attribute>
+        <id>OCC_MASTER_CAPABLE</id>
+    </attribute>
+</targetType>
+
+<targetType>
+    <id>unit-occ-nimbus</id>
+    <parent>unit-occ-power9</parent>
+    <attribute>
+        <id>MODEL</id>
+        <default>NIMBUS</default>
+    </attribute>
+</targetType>
+
+<targetType>
+    <id>unit-occ-cumulus</id>
+    <parent>unit-occ-power9</parent>
+    <attribute>
+        <id>MODEL</id>
+        <default>CUMULUS</default>
+    </attribute>
+</targetType>
+
+<!-- L4 (Centaur) -->
+<targetType>
+    <id>unit-l4-power9</id>
+    <parent>unit</parent>
+    <attribute>
+        <id>TYPE</id>
+        <default>L4</default>
+    </attribute>
+    <attribute><id>DECONFIG_GARDABLE</id><default>1</default></attribute>
+</targetType>
+
+<targetType>
+    <id>unit-l4-centaur</id>
+    <parent>unit-l4-power9</parent>
+    <attribute>
+        <id>MODEL</id>
+        <default>CENTAUR</default>
+    </attribute>
+</targetType>
+
+<!-- End p9 sub-units -->
+<!-- DPSS sub-units -->
+	<targetType>
+		<id>dpss.unit-config-generic</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>CONFIG_ID</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>RESERV_REV_CODE</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>REV_CODE</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>dpss.unit-dio-generic</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>DIRECTION</id>
+		</attribute>
+		<attribute>
+			<id>PIN_NAME</id>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>dpss.unit-enable-generic</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>CHANNEL</id>
+		</attribute>
+		<attribute>
+			<id>DIRECTION</id>
+		</attribute>
+		<attribute>
+			<id>ENABLE_HOLD</id>
+			<default>
+				<field><id>Bit-mask</id><value></value></field>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>MAN_ENABLE</id>
+			<default>
+				<field><id>Bit-mask</id><value></value></field>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PIN_NAME</id>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>dpss.unit-error-generic</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>CHANNEL</id>
+		</attribute>
+		<attribute>
+			<id>DEFAULT_VALUE</id>
+		</attribute>
+		<attribute>
+			<id>DIRECTION</id>
+		</attribute>
+		<attribute>
+			<id>GPIO_IN</id>
+			<default>
+				<field><id>Bit-mask</id><value></value></field>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>LS_REG</id>
+			<default>
+				<field><id>Bit-mask</id><value></value></field>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PIN_NAME</id>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>dpss.unit-fan_global_setting-generic</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>FAN_DOMAIN_0</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>FAN_DOMAIN_1</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>FAN_DOMAIN_2</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>FAN_DOMAIN_3</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>FAN_ERRORS_0</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>FAN_ERRORS_1</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>FAN_ERRORS_2</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>FAN_ERRORS_3</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>FAN_ERROR_MASK_0</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>FAN_ERROR_MASK_1</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>FAN_FFS_CH_0</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>FAN_FFS_CH_1</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>FAN_HYST_HIGH0</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>FAN_HYST_HIGH1</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>FAN_HYST_LOW0</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>FAN_HYST_LOW1</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>FAN_MAN_MODE</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>FAN_MODE</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>FAN_PPR0</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>FAN_PPR1</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>FAN_PRESENCE_0</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>FAN_PRESENCE_1</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>FAN_TYPE_SEL0</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>FAN_TYPE_SEL1</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>FFS_MIN_TACH_HIGH0</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>FFS_MIN_TACH_HIGH1</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>FFS_MIN_TACH_LOW0</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>FFS_MIN_TACH_LOW1</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>I2C_FFS</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>MAX_FAN_PWM0</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>MAX_FAN_PWM1</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>MIN_FAN_PWM0</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>MIN_FAN_PWM1</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PWM_DELAY</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PWM_STEP</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>TACH_SET_H0</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>TACH_SET_H1</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>TACH_SET_H2</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>TACH_SET_H3</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>TACH_SET_L0</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>TACH_SET_L1</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>TACH_SET_L2</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>TACH_SET_L3</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>dpss.unit-fsi-slave</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>PIN_NAME</id>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>dpss.unit-gpio-generic</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>CHANNEL</id>
+		</attribute>
+		<attribute>
+			<id>DEFAULT_VALUE</id>
+		</attribute>
+		<attribute>
+			<id>DIRECTION</id>
+		</attribute>
+		<attribute>
+			<id>GPIO_IN</id>
+			<default>
+				<field><id>Bit-mask</id><value></value></field>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>LS_REG</id>
+			<default>
+				<field><id>Bit-mask</id><value></value></field>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PIN_NAME</id>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>dpss.unit-gpio_global_params-generic</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>PSC0</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PSC1</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PWM0</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PWM1</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>dpss.unit-i2c-slave</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>FIXED_ADDRESS</id>
+		</attribute>
+		<attribute>
+			<id>I2C_INT</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>I2C_INT_MASK</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PIN_NAME</id>
+		</attribute>
+		<attribute>
+			<id>DIRECTION</id>
+			<default>IN</default>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>dpss.unit-lpc-slave</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>PIN_NAME</id>
+		</attribute>
+		<attribute>
+			<id>DIRECTION</id>
+			<default>IN</default>
+		</attribute>		
+	</targetType>
+	<targetType>
+		<id>dpss.unit-pgood-generic</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>CHANNEL</id>
+		</attribute>
+		<attribute>
+			<id>CHECK_STAGE</id>
+		</attribute>
+		<attribute>
+			<id>DEGATE_CPU</id>
+			<default>
+				<field><id>Bit-mask</id><value></value></field>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>DEGATE_INT</id>
+			<default>
+				<field><id>Bit-mask</id><value></value></field>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>DEGATE_IO</id>
+			<default>
+				<field><id>Bit-mask</id><value></value></field>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>DIRECTION</id>
+		</attribute>
+		<attribute>
+			<id>EN_OD</id>
+			<default>
+				<field><id>Bit-mask</id><value></value></field>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>FAULT_ACTION</id>
+		</attribute>
+		<attribute>
+			<id>PGOOD_INVERT</id>
+			<default>
+				<field><id>Bit-mask</id><value></value></field>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PGOOD_LATCHED</id>
+			<default>
+				<field><id>Bit-mask</id><value></value></field>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PGOOD_MASK</id>
+			<default>
+				<field><id>Bit-mask</id><value></value></field>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PGOOD_PORT</id>
+			<default>
+				<field><id>Bit-mask</id><value></value></field>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PIN_NAME</id>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>dpss.unit-power-generic</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>CURRENT_MAX</id>
+		</attribute>
+		<attribute>
+			<id>CURRENT_NOM</id>
+		</attribute>
+		<attribute>
+			<id>PIN_NAME</id>
+		</attribute>
+		<attribute>
+			<id>VOLTAGE</id>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>dpss.unit-power_control_global-generic</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>DEGATE_CPU_0</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>DEGATE_CPU_1</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>DEGATE_CPU_2</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>DEGATE_CPU_3</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>DEGATE_INT_0</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>DEGATE_INT_1</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>DEGATE_INT_2</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>DEGATE_INT_3</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>DEGATE_IO_0</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>DEGATE_IO_1</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>DEGATE_IO_2</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>DEGATE_IO_3</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>DELAY_CPU</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>DELAY_IO</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>EN_OD_0</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>EN_OD_1</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>EN_OD_2</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>EN_OD_3</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>FAULT_DELAY</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>INVERT_RESETS</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>NUM_PS</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PGOOD INVERT_0</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PGOOD INVERT_1</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PGOOD INVERT_2</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PGOOD INVERT_3</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PGOOD_LATCHED_0</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PGOOD_LATCHED_1</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PGOOD_LATCHED_2</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PGOOD_LATCHED_3</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PGOOD_MASK_0</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PGOOD_MASK_1</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PGOOD_MASK_2</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PGOOD_MASK_3</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PGOOD_PORT_0</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PGOOD_PORT_1</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PGOOD_PORT_2</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PGOOD_PORT_3</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PRIMARY_DELAY</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PSEQ_CTRL</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PSEQ_OVERRIDE</id>
+		</attribute>
+		<attribute>
+			<id>PSEQ_SLOT_CNT</id>
+		</attribute>
+		<attribute>
+			<id>REBOOT</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>RESETS_OUT</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>SECONDARY_DELAY</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>SEC_SEQ</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>SEQUENCE_CNT</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>SLIDING_INDEX</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>SOFT_PGOOD</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>dpss.unit-presence-generic</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>CHANNEL</id>
+		</attribute>
+		<attribute>
+			<id>DIRECTION</id>
+		</attribute>
+		<attribute>
+			<id>PIN_NAME</id>
+		</attribute>
+		<attribute>
+			<id>PRSNT_REG</id>
+			<default>
+				<field><id>Bit-mask</id><value></value></field>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>dpss.unit-pseq_lookup-generic</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>PSEQ_SLOT0</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PSEQ_SLOT1</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PSEQ_SLOT10</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PSEQ_SLOT11</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PSEQ_SLOT12</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PSEQ_SLOT13</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PSEQ_SLOT14</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PSEQ_SLOT15</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PSEQ_SLOT16</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PSEQ_SLOT17</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PSEQ_SLOT18</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PSEQ_SLOT19</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PSEQ_SLOT2</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PSEQ_SLOT20</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PSEQ_SLOT21</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PSEQ_SLOT22</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PSEQ_SLOT23</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PSEQ_SLOT24</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PSEQ_SLOT25</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PSEQ_SLOT26</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PSEQ_SLOT27</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PSEQ_SLOT28</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PSEQ_SLOT29</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PSEQ_SLOT3</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PSEQ_SLOT30</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PSEQ_SLOT31</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PSEQ_SLOT4</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PSEQ_SLOT5</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PSEQ_SLOT6</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PSEQ_SLOT7</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PSEQ_SLOT8</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PSEQ_SLOT9</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>dpss.unit-pwm-master</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>CHANNEL</id>
+		</attribute>
+		<attribute>
+			<id>DIRECTION</id>
+		</attribute>
+		<attribute>
+			<id>FAN_PWM_MANUAL</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PIN_NAME</id>
+		</attribute>
+		<attribute>
+			<id>PWM_DUTY_CYCLE</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>dpss.unit-sec_pgood-generic</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>BITS</id>
+		</attribute>
+		<attribute>
+			<id>CHANNEL</id>
+		</attribute>
+		<attribute>
+			<id>INSTANCE_ID</id>
+		</attribute>
+		<attribute>
+			<id>PGOOD_SLOT</id>
+		</attribute>
+		<attribute>
+			<id>PIN_NAME</id>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>dpss.unit-sec_pgood_gpio-generic</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>CHANNEL</id>
+		</attribute>
+		<attribute>
+			<id>DEFAULT_VALUE</id>
+		</attribute>
+		<attribute>
+			<id>DIRECTION</id>
+		</attribute>
+		<attribute>
+			<id>GPIO_IN</id>
+			<default>
+				<field><id>Bit-mask</id><value></value></field>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>LS_REG</id>
+			<default>
+				<field><id>Bit-mask</id><value></value></field>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PIN_NAME</id>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>dpss.unit-spi-master</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>ENGINE</id>
+		</attribute>
+		<attribute>
+			<id>PIN_NAME</id>
+		</attribute>
+		<attribute>
+			<id>PORT</id>
+		</attribute>
+		<attribute>
+			<id>DIRECTION</id>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>dpss.unit-tach-slave</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>CHANNEL</id>
+		</attribute>
+		<attribute>
+			<id>DIRECTION</id>
+		</attribute>
+		<attribute>
+			<id>FAN_DOMAIN_REG</id>
+			<default>
+				<field><id>Bit-mask</id><value></value></field>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>FAN_ERROR_MASK</id>
+			<default>
+				<field><id>Bit-mask</id><value></value></field>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>FAN_ERROR_REG</id>
+			<default>
+				<field><id>Bit-mask</id><value></value></field>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>FAN_PARTNER_HS_REG</id>
+			<default>
+				<field><id>Bit-mask</id><value></value></field>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>FAN_SPD_REG_HIGH</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>FAN_SPD_REG_LOW</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>FAN_TYPE_SEL</id>
+			<default>
+				<field><id>Bit-mask</id><value></value></field>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>PIN_NAME</id>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>dpss.unit-wdt-generic</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>END_COUNT</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>FAN_WARNING_CNT</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+		<attribute>
+			<id>WDT_RESET</id>
+			<default>
+				<field><id>Register</id><value></value></field>
+			</default>
+		</attribute>
+	</targetType>
+
+<!-- End DPSS sub-units -->
+<!-- APSS units -->
+	<targetType>
+		<id>apss.unit-adc-generic</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>CHANNEL</id>
+		</attribute>
+		<attribute>
+			<id>FUNCTION_ID</id>
+		</attribute>
+		<attribute>
+			<id>FUNCTION_NAME</id>
+		</attribute>
+		<attribute>
+			<id>GAIN</id>
+		</attribute>
+		<attribute>
+			<id>GND</id>
+		</attribute>
+		<attribute>
+			<id>OFFSET</id>
+		</attribute>
+		<attribute>
+			<id>PIN-NAME</id>
+		</attribute>
+		<attribute>
+			<id>DIRECTION</id>
+			<default>IN</default>
+		</attribute>		
+	</targetType>
+	<targetType>
+		<id>apss.unit-adc_global-generic</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>ADC_MAX</id>
+		</attribute>
+		<attribute>
+			<id>ADC_VREF</id>
+		</attribute>
+		<attribute>
+			<id>DIRECTION</id>
+			<default>IN</default>
+		</attribute>		
+	</targetType>
+	<targetType>
+		<id>apss.unit-gpio-generic</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>FUNCTION_ID</id>
+		</attribute>
+		<attribute>
+			<id>FUNCTION_NAME</id>
+		</attribute>
+		<attribute>
+			<id>GPIO_P0_MODE</id>
+		</attribute>
+		<attribute>
+			<id>GPIO_P1_MODE</id>
+		</attribute>
+		<attribute>
+			<id>PIN-NAME</id>
+		</attribute>
+		<attribute>
+			<id>PORT</id>
+		</attribute>
+		<attribute>
+			<id>DIRECTION</id>
+			<default>IN</default>
+		</attribute>		
+	</targetType>
+	<targetType>
+		<id>apss.unit-i2c-slave</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>PIN-NAME</id>
+		</attribute>
+		<attribute>
+			<id>DIRECTION</id>
+			<default>IN</default>
+		</attribute>
+		<attribute>
+			<id>I2C_ADDRESS</id>
+			<default></default>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>apss.unit-power-generic</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>CURRENT_MAX</id>
+		</attribute>
+		<attribute>
+			<id>CURRENT_NOM</id>
+		</attribute>
+		<attribute>
+			<id>PIN-NAME</id>
+		</attribute>
+		<attribute>
+			<id>VOLTAGE</id>
+		</attribute>
+		<attribute>
+			<id>DIRECTION</id>
+			<default>IN</default>
+	</attribute>
+	</targetType>
+	<targetType>
+		<id>apss.unit-pwm-generic</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>CHANNEL</id>
+		</attribute>
+		<attribute>
+			<id>PIN-NAME</id>
+		</attribute>
+		<attribute>
+			<id>DIRECTION</id>
+			<default>IN</default>
+		</attribute>
+	</targetType>
+	<targetType>
+		<id>apss.unit-spi-slave</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>PIN-NAME</id>
+		</attribute>
+		<attribute>
+			<id>DIRECTION</id>
+			<default>IN</default>
+		</attribute>		
+	</targetType>
+	<targetType>
+		<id>apss.unit-uart-slave</id>
+		<parent>unit</parent>
+		<attribute>
+			<id>PIN-NAME</id>
+		</attribute>
+		<attribute>
+			<id>DIRECTION</id>
+			<default>IN</default>
+		</attribute>
+	</targetType>
+<!-- End APSS units -->
+
+		
 </targetTypes>
diff --git a/xml/target_types_override.xml b/xml/target_types_override.xml
new file mode 100644
index 0000000..c55c418
--- /dev/null
+++ b/xml/target_types_override.xml
@@ -0,0 +1,74 @@
+<targetTypes>

+	<targetType>

+		<id>targetoverride-group</id>

+		<parent>base</parent>

+		<parent_type>sys-sys-power8</parent_type>

+		<parent_type>sys-sys-power9</parent_type>

+		<attribute>

+			<id>TYPE</id>

+			<default>NA</default>

+		</attribute>

+		<attribute>

+			<id>MRW_TYPE</id>

+			<default>TARGET_OVERRIDE_GROUP</default>

+		</attribute>

+	</targetType>

+	<targetType>

+		<id>targetoverride</id>

+		<parent>base</parent>

+		<parent_type>sys-sys-power8</parent_type>

+		<parent_type>sys-sys-power9</parent_type>

+		<attribute>

+			<id>TYPE</id>

+			<default>NA</default>

+		</attribute>

+		<attribute>

+			<id>MRW_TYPE</id>

+			<default>TARGET_OVERRIDE</default>

+		</attribute>

+		<attribute>

+			<id>GROUP_KEY</id>

+			<default></default>

+		</attribute>

+	</targetType>

+	<targetType>

+		<id>override-ccin-cpu</id>

+		<parent>targetoverride</parent>

+		<parent_type>targetoverride</parent_type>

+		<attribute><id>TARGET_NAME</id></attribute>

+		<attribute><id>NOMINAL_FREQ_MHZ</id></attribute>

+		<attribute><id>CORES</id></attribute>

+		<attribute><id>CARD_USE</id></attribute>

+		<attribute><id>PART_NUMBER</id></attribute>

+	</targetType>

+	<targetType>

+		<id>override-ccin-card</id>

+		<parent>targetoverride</parent>

+		<parent_type>targetoverride</parent_type>

+		<attribute><id>TARGET_NAME</id></attribute>

+		<attribute><id>CCIN</id></attribute>

+		<attribute><id>RU_TYPE</id></attribute>

+		<attribute><id>CARD_USE</id></attribute>

+		<attribute><id>SUPPORTED_MTMS</id></attribute>

+		<attribute><id>PART_NUMBER</id></attribute>

+	</targetType>

+	<targetType>

+		<id>override-system-mtm</id>

+		<parent>targetoverride</parent>

+		<parent_type>targetoverride</parent_type>

+		<attribute><id>TARGET_NAME</id></attribute>

+		<attribute><id>MRW_ID</id></attribute>

+		<attribute><id>MTM_NAME</id></attribute>

+		<attribute><id>IM_ID</id></attribute>

+		<attribute><id>IM_VALUE</id></attribute>

+	</targetType>

+	<targetType>

+		<id>override-mode-manufacturing</id>

+		<parent>targetoverride</parent>

+		<parent_type>targetoverride</parent_type>

+		<attribute><id>TARGET_NAME</id></attribute>

+		<attribute><id>ALL_MCS_IN_INTERLEAVING_GROUP</id></attribute>

+		<attribute><id>DMI_EREPAIR_THRESHOLD_FIELD</id></attribute>

+		<attribute><id>CARD_USE</id></attribute>

+	</targetType>	

+</targetTypes>
\ No newline at end of file