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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@206289 138bc75d-0d04-0410-961f-82ee72b054a4
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* config/sparc/sparc.h (SPARC_LOW_FE_EXCEPT_VALUES): Define.
* config/sparc/sol2.h (SPARC_LOW_FE_EXCEPT_VALUES): Redefine.
* config/sparc/sparc.c (TARGET_INIT_BUILTINS): Move around.
(TARGET_BUILTIN_DECL): Define.
(TARGET_ATOMIC_ASSIGN_EXPAND_FENV): Likewise.
(sparc32_initialize_trampoline): Adjust call to gen_flush.
(enum sparc_builtins): New enumeral type.
(sparc_builtins): New static array.
(sparc_builtins_icode): Likewise.
(def_builtin): Accept a separate icode and save the result.
(def_builtin_const): Likewise.
(sparc_fpu_init_builtins): New function.
(sparc_vis_init_builtins): Pass the builtin code.
(sparc_init_builtins): Call it if TARGET_FPU.
(sparc_builtin_decl): New function.
(sparc_expand_builtin): Deal with SPARC_BUILTIN_{LD,ST}FSR.
(sparc_handle_vis_mul8x16): Use the builtin code.
(sparc_fold_builtin): Likewise. Deal with SPARC_BUILTIN_{LD,ST}FSR
and SPARC_BUILTIN_PDISTN.
(compound_expr): New helper function.
(sparc_atomic_assign_expand_fenv): New function.
* config/sparc/sparc.md (unspecv): Reorder values, add UNSPECV_LDFSR
and UNSPECV_STFSR.
(flush, flushdi): Merge into single pattern.
(ldfsr): New instruction.
(stfsr): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@205735 138bc75d-0d04-0410-961f-82ee72b054a4
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* c-c++-common/pr41779.c: Fix typos.
* gcc.c-torture/compile/20031125-2.c: Likewise.
* gcc.c-torture/compile/20040621-1.c: Likewise.
* gcc.c-torture/execute/20020418-1.c: Likewise.
* gcc.dg/20020108-1.c: Likewise.
* gcc.dg/atomic-generic-aux.c: Likewise.
* gcc.dg/builtin-complex-err-2.c: Likewise.
* gcc.dg/decl-1.c: Likewise.
* gcc.dg/di-sync-multithread.c: Likewise.
* gcc.dg/format/c90-printf-1.c: Likewise.
* gcc.dg/format/ms_c90-printf-1.c: Likewise.
* gcc.dg/long-long-compare-1.c: Likewise.
* gcc.dg/plugin/start_unit_plugin.c: Likewise.
* gcc.dg/pr17055-1.c: Likewise.
* gcc.dg/pr27095.c: Likewise.
* gcc.dg/torture/fp-int-convert.h: Likewise.
* gcc.dg/tree-prof/inliner-1.c: Likewise.
* gcc.dg/tree-ssa/20030731-1.c: Likewise.
* gcc.dg/tree-ssa/forwprop-6.c: Likewise.
* gcc.dg/tree-ssa/ipa-cp-1.c: Likewise.
* gcc.dg/tree-ssa/loop-19.c: Likewise.
* gcc.dg/tree-ssa/loop-1.c: Likewise.
* gcc.dg/tree-ssa/pr21001.c: Likewise.
* gcc.dg/tree-ssa/pr42585.c: Likewise.
* gcc.dg/tree-ssa/ssa-dse-5.c: Likewise.
* gcc.dg/vect/vect-cond-5.c: Likewise.
* gcc.dg/weak/typeof-2.c: Likewise.
* gcc.target/aarch64/aapcs64/abitest-common.h: Likewise.
* gcc.target/arm/naked-1.c: Likewise.
* gcc.target/i386/pr9771-1.c: Likewise.
* gcc.target/sparc/sparc-constant-1.c: Likewise.
* gcc.target/sparc/struct-ret-check.c: Likewise.
* gcc.target/x86_64/abi/test_struct_returning.c: Likewise.
* gfortran.dg/c_ptr_tests_8_funcs.c: Likewise.
* objc-obj-c++-shared/objc-test-suite-next-encode-assist-impl.h: Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@201098 138bc75d-0d04-0410-961f-82ee72b054a4
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destination register for bmasksi_vis.
(vector_init_bshuffle): Likewise.
* config/sparc/sparc.md (vec_perm_constv8qi): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@199370 138bc75d-0d04-0410-961f-82ee72b054a4
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One major suboptimal area of the sparc back end is cstore generation
on 64-bit.
Due to the way arguments and return values of functions must be
promoted, the ideal mode for cstore's result would be DImode.
But this hasn't been done because of a fundamental limitation
of the cstore patterns. They require a fixed mode be used for
the boolean result value.
I've decided to work around this by building a target hook which
specifies the type to use for conditional store results, and then I
use a special predicate for operans 0 in the cstore expanders so
that they still match even when we use DImode.
The default version of the target hook just does what it does now,
so no other target should be impacted by this at all.
Regstrapped on 32-bit sparc-linux-gnu and I've run the testsuite
with "-m64" to validate the 64-bit side.
gcc/
* target.def (cstore_mode): New hook.
* target.h: Include insn-codes.h
* targhooks.c: Likewise.
(default_cstore_mode): New function.
* targhooks.h: Declare it.
* doc/tm.texi.in: New hook slot for TARGET_CSTORE_MODE.
* doc/tm.texi: Rebuild.
* expmed.c (emit_cstore): Obtain cstore boolean result mode using
target hook, rather than inspecting the insn_data.
* config/sparc/sparc.c (sparc_cstore_mode): New function.
(TARGET_CSTORE_MODE): Redefine.
(emit_scc_insn): When TARGET_ARCH64, emit new 64-bit boolean
result patterns.
* config/sparc/predicates.md (cstore_result_operand): New special
predicate.
* config/sparc/sparc.md (cstoresi4, cstoredi4, cstore<F:mode>4):
Use it for operand 0.
(*seqsi_special): Rewrite using 'P' mode iterator on operand 0.
(*snesi_special): Likewise.
(*snesi_zero): Likewise.
(*seqsi_zero): Likewise.
(*sltu_insn): Likewise.
(*sgeu_insn): Likewise.
(*seqdi_special): Make operand 0 and comparison operation be of
DImode.
(*snedi_special): Likewise.
(*snedi_special_vis3): Likewise.
(*neg_snesi_zero): Rename to *neg_snesisi_zero.
(*neg_snesi_sign_extend): Rename to *neg_snesidi_zero.
(*snesi_zero_extend): Delete, covered by 'P' mode iterator.
(*neg_seqsi_zero): Rename to *neg_seqsisi_zero.
(*neg_seqsi_sign_extend): Rename to *neg_seqsidi_zero.
(*seqsi_zero_extend): Delete, covered by 'P' mode iterator.
(*sltu_extend_sp64): Likewise.
(*neg_sltu_insn): Rename to *neg_sltusi_insn.
(*neg_sltu_extend_sp64): Rename to *neg_sltudi_insn.
(*sgeu_extend_sp64): Delete, covered by 'P' mode iterator.
(*neg_sgeu_insn): Rename to *neg_sgeusi_insn.
(*neg_sgeu_extend_sp64): Rename to *neg_sgeudi_insn.
gcc/testsuite/
* gcc.target/sparc/setcc-4.c: New test.
* gcc.target/sparc/setcc-5.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@197679 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@195098 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@194903 138bc75d-0d04-0410-961f-82ee72b054a4
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gcc/
* config/sparc/sparc.md (UNSPEC_SHORT_LOAD): New unspec.
(zero-extend_v8qi_vis, zero_extend_v4hi_vis): New expanders.
(*zero_extend_v8qi_<P:mode>_insn,
*zero_extend_v4hi_<P:mode>_insn): New insns.
* config/sparc/sparc.c (vector_init_move_words,
vector_init_prepare_elts, sparc_expand_vector_init_vis2,
sparc_expand_vector_init_vis1): New functions.
(vector_init_bshuffle): Rewrite to handle more cases and make use
of locs[] array prepared by vector_init_prepare_elts.
(vector_init_fpmerge, vector_init_faligndata): Delete.
(sparc_expand_vector_init): Rewrite using new infrastructure.
gcc/testsuite/
* lib/test-supports.exp
(check_effective_target_ultrasparc_vis2_hw): New proc.
(check_effective_target_ultrasparc_vis3_hw): New proc.
* gcc.target/sparc/vec-init-1.inc: New vector init common code.
* gcc.target/sparc/vec-init-2.inc: Likewise.
* gcc.target/sparc/vec-init-3.inc: Likewise.
* gcc.target/sparc/vec-init-1-vis1.c: New test.
* gcc.target/sparc/vec-init-1-vis2.c: New test.
* gcc.target/sparc/vec-init-1-vis3.c: New test.
* gcc.target/sparc/vec-init-2-vis1.c: New test.
* gcc.target/sparc/vec-init-2-vis2.c: New test.
* gcc.target/sparc/vec-init-2-vis3.c: New test.
* gcc.target/sparc/vec-init-3-vis1.c: New test.
* gcc.target/sparc/vec-init-3-vis2.c: New test.
* gcc.target/sparc/vec-init-3-vis3.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@181024 138bc75d-0d04-0410-961f-82ee72b054a4
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* config/sparc/sparc.md (movsf_insn): Reindent constraints.
(movdf_insn_sp32): Likewise. Remove redundant G constraint.
(movdf_insn_sp64): Likewise.
(DFmode splitter): Do not test TARGET_FPU.
(movtf_insn_sp32): Reindent constraints.
(movtf_insn_sp32_no_fpu): Likewise.
(movtf_insn_sp64): Likewise.
(movtf_insn_sp64_hq): Likewise.
(movtf_insn_sp64_no_fpu): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@180791 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@180603 138bc75d-0d04-0410-961f-82ee72b054a4
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gcc/testsuite/
* gcc.target/sparc/fmaf-1.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@180551 138bc75d-0d04-0410-961f-82ee72b054a4
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gcc/
* config/sparc/sparc.c (emit_scc_insn): Do not try v9 sequences until
LEU/LTU/GEU/GTU is attempted.
* config/sparc/sparc.md (*neg_snesi_sign_extend): New 64-bit insn
and split.
(*neg_seqsi_sign_extend): Likewise.
(*sltu_extend_sp64, *neg_sltu_extend_sp64, *sgeu_extend_sp64,
*neg_sgeu_extend_sp64): New insns.
gcc/testsuite/
* gcc.target/sparc/setcc-1.c: New test.
* gcc.target/sparc/setcc-2.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@180550 138bc75d-0d04-0410-961f-82ee72b054a4
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gcc/testsuite/
* gcc.target/sparc/vis3move-1.c: New test.
* gcc.target/sparc/vis3move-2.c: New test.
* gcc.target/sparc/vis3move-3.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@180418 138bc75d-0d04-0410-961f-82ee72b054a4
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gcc/
* config/sparc/sparc-modes.def: Add single entry vector modes for
DImode and SImode.
* config/sparc/sparc/sparc.md (V32, V32I, V64, V64I, V64N8): Delete
mode iterators.
(mov<V32:mode>): Revert back to plain SFmode pattern.
(*movsf_insn): Likewise.
(mov<V64:mode>): Revert back to plain DFmode pattern.
(*movdf_insn_sp32): Likewise.
(*movdf_insn_sp32_v9): Likewise.
(*movdf_insn_sp64): Likewise.
(V64 mode splitters) Likewise.
(addsi3): Remove VIS alternatives.
(subsi3): Likewise.
(and<V64I:mode>3): Revert to DImode only pattern.
(and<V64I:mode>3_sp32): Likewise.
(*and<V64I:mode>3_sp64): Likewise.
(and<V32I:mode>3): Likewise.
(*and_not_<V64I:mode>_sp32): Likewise.
(*and_not_<V64I:mode>_sp64): Likewise.
(*and_not_<V32I:mode>): Likewise.
(ior<V64I:mode>3): Likewise.
(*ior<V64I:mode>3_sp32): Likewise.
(*ior<V64I:mode>3_sp64): Likewise.
(ior<V32I:mode>3): Likewise.
(*or_not_<V64I:mode>_sp32): Likewise.
(*or_not_<V64I:mode>_sp64): Likewise.
(*or_not_<V32I:mode>): Likewise.
(xor<V64I:mode>3): Likewise.
(*xor<V64I:mode>3_sp32): Likewise.
(*xor<V64I:mode>3_sp64): Likewise.
(xor<V32I:mode>3): Likewise.
(V64I mode splitters): Likewise.
(*xor_not_<V64I:mode>_sp32): Likewise.
(*xor_not_<V64I:mode>_sp64): Likewise.
(*xor_not_<V32I:mode>): Likewise.
(one_cmpl<V64I:mode>2): Likewise.
(*one_cmpl<V64I:mode>2_sp32): Likewise.
(*one_cmpl<V64I:mode>2_sp64): Likewise.
(one_cmpl<V32I:mode>2): Likewise.
(VM32, VM64, VMALL): New mode iterators.
(vbits, vconstr, vfptype): New mode attributes.
(mov<VMALL:mode>): New expander.
(*mov<VM32:mode>_insn): New insn.
(*mov<VM64:mode>_insn_sp64): New insn.
(*mov<VM64:mode>_insn_sp32): New insn, and associated splitter
specifically for the register to memory case.
(vec_init<mode>): New expander.
(VADDSUB): New mode iterator.
(<plusminus_insn>v2si3, <plusminus_insn>v2hi3): Remove and replace
with...
(<plusminus_insn><mode>3): New consolidated pattern.
(VL): New mode iterator for logical operations.
(vlsuf): New more attribute.
(vlop): New code iterator.
(vlinsn, vlninsn): New code attributes.
(<code><mode>3): New insn to non-negated vector logical ops.
(*not_<code><mode>3): Likewise for negated variants.
(*nand<mode>_vis): New insn.
(vlnotop): New code iterator.
(*<code>_not1<mode>_vis, *<code>_not2<mode>_vis): New insns.
(one_cmpl<mode>2): New insn.
(faligndata<V64I:mode>_vis): Rewrite to use VM64 iterator.
(bshuffle<VM64:mode>_vis): Likewise.
(v<vis3_shift_patname><mode>3): Use GCM mode iterator.
(fp<plusminus_insn>64_vis): Use V1DI mode.
(VASS mode iterator): Use V1SI not SI mode.
* config/sparc/sparc.c (sparc_vis_init_builtins): Account for
single-entry vector mode changes.
(sparc_expand_builtin): Likewise.
(sparc_expand_vector_init): New function.
* config/sparc/sparc-protos.h (sparc_expand_vector_init): Declare.
gcc/testsuite/
* gcc.target/sparc/fand.c: Remove __LP64__ ifdefs and expect
all operations to emit VIS instructions.
* gcc.target/sparc/fandnot.c: Likewise.
* gcc.target/sparc/fnot.c: Likewise.
* gcc.target/sparc/for.c: Likewise.
* gcc.target/sparc/fornot.c: Likewise.
* gcc.target/sparc/fxnor.c: Likewise.
* gcc.target/sparc/fxor.c: Likewise.
* gcc.target/sparc/combined-1.c: Revert change to use -O2, no longer
needed.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@180112 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@180040 138bc75d-0d04-0410-961f-82ee72b054a4
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gcc/
* config/sparc/sparc.h: Do not force TARGET_VIS3 and TARGET_FMAF
to zero when assembler lacks support for such instructions.
* config/sparc/sparc.c (sparc_option_override): Clear MASK_VIS3
and MASK_FMAF in defaults when assembler lacks necessary support.
gcc/testsuite/
* gcc.target/sparc/cmask.c: Remove 'vis3' target check and specify
'-mvis3' instead of 'mcpu=niagara3' in options.
* gcc.target/sparc/fhalve.c: Likewise.
* gcc.target/sparc/fnegop.c: Likewise.
* gcc.target/sparc/fpadds.c: Likewise.
* gcc.target/sparc/fshift.c: Likewise.
* gcc.target/sparc/fucmp.c: Likewise.
* gcc.target/sparc/lzd.c: Likewise.
* gcc.target/sparc/vis3misc.c: Likewise.
* gcc.target/sparc/xmul.c: Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@179875 138bc75d-0d04-0410-961f-82ee72b054a4
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gcc/
PR 50655
* configure.ac: Add .register directives to VIS3 test.
* configure: Regenerate.
gcc/testsuite/
PR 50655
* gcc.target/sparc/sparc.exp: Add vis3 target test.
* gcc.target/sparc/cmask.c: Use it.
* gcc.target/sparc/fhalve.c: Likewise.
* gcc.target/sparc/fnegop.c: Likewise.
* gcc.target/sparc/fpadds.c: Likewise.
* gcc.target/sparc/fshift.c: Likewise.
* gcc.target/sparc/fucmp.c: Likewise.
* gcc.target/sparc/lzd.c: Likewise.
* gcc.target/sparc/vis3misc.c: Likewise.
* gcc.target/sparc/xmul.c: Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@179667 138bc75d-0d04-0410-961f-82ee72b054a4
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gcc/
* config/sparc/sparc.opt (POPC): New option.
* doc/invoke.texi: Document it.
* config/sparc/sparc.c (sparc_option_override): Enable MASK_POPC by
default on Niagara-2 and later.
* config/sparc/sparc.h (CLZ_DEFINED_VALUE_AT_ZERO): Define.
* config/sparc/sparc.md (SIDI): New mode iterator.
(ffsdi2): Delete commented out pattern and comments.
(popcount<mode>2, clz<mode>2): New expanders.
(*popcount<mode>_sp64, popcountsi_v8plus, popcountdi_v8plus,
*clzdi_sp64, clzdi_v8plus, *clzsi_sp64, clzsi_v8plus): New insns.
gcc/testsuite/
* gcc.target/sparc/lzd.c: New test.
* gcc.target/sparc/popc.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@179591 138bc75d-0d04-0410-961f-82ee72b054a4
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gcc/
* config/sparc/sparc.md (UNSPEC_FHADD, UNSPEC_FHSUB,
UNSPEC_XMUL): New unspecs.
(muldi3_v8plus): Use output_v8plus_mult.
(*naddsf3, *nadddf3, *nmulsf3, *nmuldf3, *nmuldf3_extend):
New VIS 3.0 combiner patterns.
(fhaddsf_vis, fhadddf_vis, fhsubsf_vis, fhsubdf_vis,
fnhaddsf_vis, fnhaddf_vis, umulxhi_vis, *umulxhi_sp64,
umulxhi_v8plus, xmulx_vis, *xmulx_sp64, xmulx_v8plus,
xmulxhi_vis, *xmulxhi_sp64, xmulxhi_v8plus): New VIS 3.0
builtins patterns.
* config/sparc/sparc.c (sparc_vis_init_builtins): Emit new
builtins.
(output_v8plus_mult): New function.
* config/sparc/sparc-protos.h: Declare it.
* config/sparc/visintrin.h (__vis_fhadds, __vis_fhaddd,
__vis_fhsubs, __vis_fhsubd, __vis_fnhadds, __vis_fnhaddd,
__vis_umulxhi, __vis_xmulx, __vis_xmulxhi): New intrinsics.
* doc/extend.texi: Document new builtins.
gcc/testsuite/
* gcc.target/sparc/fhalve.c: New test.
* gcc.target/sparc/fnegop.c: New test.
* gcc.target/sparc/xmul.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@179535 138bc75d-0d04-0410-961f-82ee72b054a4
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gcc/
* config/sparc/sparc.opt (VIS3): New option.
* doc/invoke.texi: Document it.
* config/sparc/sparc.h: Force TARGET_VIS3 to zero if assembler is
not capable of such instructions.
* config/sparc/sparc-c.c (sparc_target_macros): Define __VIS__
to 0x300 when TARGET_VIS3.
* config/sparc/sparc-modes.def: Create 16-byte vector modes.
* config/sparc/sparc.md (UNSPEC_CMASK8, UNSPEC_CMASK16, UNSPEC_CMASK32,
UNSPEC_FCHKSM16, UNSPEC_PDISTN, UNSPC_FUCMP): New unspecs.
(V64N8, VASS): New mode iterators.
(vis3_shift, vis3_addsub_ss): New code iterators.
(vbits, vconstr): New mode attributes.
(vis3_shift_insn, vis3_addsub_ss_insn): New code attributes.
(cmask8<P:mode>_vis, cmask16<P:mode>_vis, cmask32<P:mode>_vis,
fchksm16_vis, <vis3_shift_insn><vbits>_vis, pdistn<mode>_vis,
fmean16_vis, fpadd64_vis, fpsub64_vis, <vis3_addsub_ss_insn><vbits>_vis,
fucmp<code>8<P:mode>_vis): New VIS 3.0 instruction patterns.
* config/sparc/sparc.c (sparc_option_override): Set MASK_VIS3 by
default when targetting capable cpus. TARGET_VIS3 implies
TARGET_VIS2 and TARGET_VIS, and clear them when TARGET_FPU is
disabled.
(sparc_vis_init_builtins): Emit new VIS 3.0 builtins.
(sparc_fold_builtin): Do not eliminate cmask{8,16,32} when result
is ignored.
* config/sparc/visintrin.h (__vis_cmask8, __vis_cmask16,
__vis_cmask32, __vis_fchksm16, __vis_fsll16, __vis_fslas16,
__vis_fsrl16, __vis_fsra16, __vis_fsll32, __vis_fslas32,
__vis_fsrl32, __vis_fsra32, __vis_pdistn, __vis_fmean16,
__vis_fpadd64, __vis_fpsub64, __vis_fpadds16, __vis_fpadds16s,
__vis_fpsubs16, __vis_fpsubs16s, __vis_fpadds32, __vis_fpadds32s,
__vis_fpsubs32, __vis_fpsubs32s, __vis_fucmple8, __vis_fucmpne8,
__vis_fucmpgt8, __vis_fucmpeq8): New VIS 3.0 interfaces.
* doc/extend.texi: Document new VIS 3.0 builtins.
gcc/testsuite/
* gcc.target/sparc/cmask.c: New test.
* gcc.target/sparc/fpadds.c: New test.
* gcc.target/sparc/fshift.c: New test.
* gcc.target/sparc/fucmp.c: New test.
* gcc.target/sparc/vis3misc.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@179421 138bc75d-0d04-0410-961f-82ee72b054a4
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gcc/
* config/sparc/sparc.opt (VIS2): New option.
* doc/invoke.texi: Document it.
* config/sparc/sparc.md (UNSPEC_EDGE8N, UNSPEC_EDGE8LN,
UNSPEC_EDGE16N, UNSPEC_EDGE16LN, UNSPEC_EDGE32N,
UNSPEC_EDGE32LN, UNSPEC_BSHUFFLE): New unspecs.
(define_attr type): New insn type 'edgen'.
(bmask<P:mode>_vis, bshuffle<V64I:mode>_vis, edge8n<P:mode>_vis,
edge8ln<P:mode>_vis, edge16n<P:mode>_vis, edge16ln<P:mode>_vis,
edge32n<P:mode>_vis, edge32ln<P:mode>_vis): New insn VIS 2.0
patterns.
* niagara.md: Handle edgen.
* niagara2.md: Likewise.
* ultra1_2.md: Likewise.
* ultra3.md: Likewise.
* config/sparc/sparc-c.c (sparc_target_macros): Define __VIS__
to 0x200 when TARGET_VIS2.
* config/sparc/sparc.c (sparc_option_override): Set MASK_VIS2 by
default when targetting capable cpus. TARGET_VIS2 implies
TARGET_VIS, clear and it when TARGET_FPU is disabled.
(sparc_vis_init_builtins): Emit new VIS 2.0 builtins.
(sparc_expand_builtin): Fix predicate indexing when builtin returns
void.
(sparc_fold_builtin): Do not eliminate bmask when result is ignored.
* config/sparc/visintrin.h (__vis_bmask, __vis_bshuffledi,
__vis_bshufflev2si, __vis_bshufflev4hi, __vis_bshufflev8qi,
__vis_edge8n, __vis_edge8ln, __vis_edge16n, __vis_edge16ln,
__vis_edge32n, __vis_edge32ln): New VIS 2.0 interfaces.
* doc/extend.texi: Document new VIS 2.0 builtins.
gcc/testsuite/
* gcc.target/sparc/bmaskbshuf.c: New test.
* gcc.target/sparc/edgen.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@179376 138bc75d-0d04-0410-961f-82ee72b054a4
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gcc/
* config/sparc/sparc.md (UNSPEC_ARRAY8, UNSPEC_ARRAY16,
UNSPEC_ARRAY32): New unspec.
(define_attr type): New type 'array'.
(array{8,16,32}<P:mode>_vis): New patterns.
* config/sparc/ultra1_2.md: Add reservations for 'array'.
* config/sparc/ultra3.md: Likewise.
* config/sparc/niagara.md: Likewise.
* config/sparc/niagara2.md: Likewise.
* config/sparc/sparc.c (sparc_vis_init_builtins): Build new
array builtins.
* config/sparc/visintrin.h (__vis_array8, __vis_array16,
__vis_array32): New.
* doc/extend.texi: Document new VIS builtins.
gcc/testsuite/
* gcc.target/sparc/array.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@179334 138bc75d-0d04-0410-961f-82ee72b054a4
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gcc/
* config/sparc/sparc.c (sparc_vis_init_builtins): Add explicit
builtins for VIS vector addition and subtraction.
* config/sparc/visintrin.h (__vis_fpadd16, __vis_fpadd16s,
__vis_fpadd32, __vis_fpadd32s, __vis_fpsub16, __vis_fpsub16s,
__vis_fpsub32, __vis_fpsub32s): New.
* doc/extend.texi: Document new VIS intrinsics.
gcc/testsuite/
* gcc.target/sparc/fpaddsubi.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@179235 138bc75d-0d04-0410-961f-82ee72b054a4
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sign and zero extensions on 64-bit and allow such instructions to be
placed in delay slots.
gcc/
* config/sparc/sparc.md (edge{8,16,32}{,l}): Return Pmode.
(fcmp{le,ne,gt,eq}{16,32}): Likewise.
* config/sparc/visintrin.h: Update edge and pixel-compare
intrinsics to return 'long' instead of 'int'.
* doc/extend.texi: Update documentation to match.
* config/sparc/sparc.c (eligible_for_return_delay): When leaf or
flat, allow any instruction. Otherwise, when V9 allow parallels
which consist only of sets to registers outside of %o0 to %o5.
(sparc_vis_init_builtins): Update VIS builtin types for edge
and pixel-compare.
gcc/testsuite/
* gcc.target/sparc/edge.c: Update for new return types.
* gcc.target/sparc/fcmp.c: Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@179227 138bc75d-0d04-0410-961f-82ee72b054a4
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gcc/testsuite/
* gcc.target/sparc/rdgsr.c: New test.
* gcc.target/sparc/edge.c: New test.
* gcc.target/sparc/fcmp.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@179215 138bc75d-0d04-0410-961f-82ee72b054a4
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gcc/
* config/sparc/sparc.c (sparc_conditional_register_usage): When VIS
is enabled, mark %gsr as global.
* config/sparc/sparc.md (UNSPEC_WRGSR): Delete.
(wrgsr_vis, *wrgsr_sp64, wrgsr_v8plus): Don't wrap in an unspec.
gcc/testsuite/
* gcc.target/sparc/wrgsr.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@179214 138bc75d-0d04-0410-961f-82ee72b054a4
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* config/sparc/sol2.h [TARGET_64BIT_DEFAULT] (TARGET_DEFAULT): Add
MASK_V8PLUS, remove commented out flag and reorder.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@176008 138bc75d-0d04-0410-961f-82ee72b054a4
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* doc/invoke.texi (SPARC options): Add -mflat.
* config/sparc/sparc.opt: Likewise.
* config/sparc/sparc-protos.h (sparc_expand_epilogue): Add parameter.
(sparc_flat_expand_prologue): Declare.
(sparc_flat_expand_epilogue): Likewise.
* config/sparc/sparc.h (CPP_CPU_SPEC): Do not handle -msoft-float.
(CPP_ENDIAN_SPEC): Replace with...
(CPP_OTHER_SPEC): ...this. Also handle -mflat and -msoft-float.
(CPP_SPEC): Adjust to above change.
(EXTRA_SPECS): Likewise.
(SPARC_INCOMING_INT_ARG_FIRST): Add TARGET_FLAT handling.
(INCOMING_REGNO): Likewise.
(OUTGOING_REGNO): Likewise.
(LOCAL_REGNO): Likewise.
(SETUP_FRAME_ADDRESSES): Likewise.
(FIXED_REGISTERS): Set 0 for %fp.
(CALL_USED_REGISTERS): Likewise.
(INITIAL_ELIMINATION_OFFSET): Pass current_function_is_leaf.
(EXIT_IGNORE_STACK): Define to 1 unconditionally.
(RETURN_ADDR_REGNUM): Define.
(RETURN_ADDR_RTX): Use it.
(INCOMING_RETURN_ADDR_REGNUM): Define.
(INCOMING_RETURN_ADDR_RTX): Use it.
(DWARF_FRAME_RETURN_COLUMN): Likewise.
(EH_RETURN_REGNUM): Define.
(EH_RETURN_STACKADJ_RTX): Use it.
(EH_RETURN_HANDLER_RTX): Delete.
(EPILOGUE_USES): Use them and add TARGET_FLAT handling.
* config/sparc/sparc.c (apparent_fsize, actual_fsize, num_gfregs):
Delete.
(struct machine_function): Add frame_size, apparent_frame_size,
frame_base_reg, frame_base_offset, n_global_fp_regs and
save_local_in_regs_p fields.
(sparc_frame_size, sparc_apparent_frame_size, sparc_frame_base_reg,
sparc_frame_base_offset, sparc_n_global_fp_regs,
sparc_save_local_in_regs_p): New macros.
(sparc_option_override): Error out if -fcall-saved-REG is specified
for Out registers.
(eligible_for_restore_insn): Fix formatting.
(eligible_for_return_delay): Likewise. Add TARGET_FLAT handling.
(eligible_for_sibcall_delay): Likewise.
(RTX_OK_FOR_OFFSET_P, RTX_OK_FOR_OLO10_P): Add MODE parameter.
(sparc_legitimate_address_p): Adjust to above change.
(save_global_or_fp_reg_p): New predicate.
(return_addr_reg_needed_p): Likewise.
(save_local_or_in_reg_p): Likewise.
(sparc_compute_frame_size): Use them. Add TARGET_FLAT handling.
(SORR_SAVE, SORR_RESTORE): Delete.
(sorr_pred_t): New typedef.
(sorr_act_t): New enum.
(save_or_restore_regs): Rename to...
(emit_save_or_restore_regs): ...this. Change type of LOW and HIGH
parameters, remove ACTION parameter, add LEAF_FUNCTION_P, SAVE_P,
ACTION_TRUE and ACTION_FALSE parameters. Implement more general
mechanism. Add CFI information for double-word saves in 32-bit mode.
(emit_adjust_base_to_offset): New function extracted from...
(emit_save_or_restore_regs): ...this. Rename the rest to...
(emit_save_or_restore_regs_global_fp_regs): ...this.
(emit_save_or_restore_regs_local_in_regs): New function.
(gen_create_flat_frame_[123]): New functions.
(sparc_expand_prologue): Use SIZE local variable. Adjust.
(sparc_flat_expand_prologue): New function.
(sparc_asm_function_prologue): Add TARGET_FLAT handling.
(sparc_expand_epilogue): Use SIZE local variable. Adjust.
(sparc_flat_expand_epilogue): New function.
(sparc_can_use_return_insn_p): Add TARGET_FLAT handling.
(output_return): Likewise.
(output_sibcall): Likewise.
(sparc_output_mi_thunk): Likewise.
(sparc_frame_pointer_required): Likewise.
(sparc_conditional_register_usage): If TARGET_FLAT, disable the leaf
function optimization.
* config/sparc/sparc.md (flat): New attribute.
(prologue): Add TARGET_FLAT handling.
(save_register_window): Disable if TARGET_FLAT.
(create_flat_frame_[123]): New patterns.
(epilogue): Add TARGET_FLAT handling.
(sibcall_epilogue): Likewise.
(eh_return): New expander.
(eh_return_internal): New insn and splitter.
(return_internal): Add TARGET_FLAT handling.
(untyped_return): Remove bogus test and use RETURN_ADDR_REGNUM.
(save_stack_nonlocal): Use RETURN_ADDR_REGNUM.
(nonlocal_goto): Add TARGET_FLAT handling.
* config/sparc/t-elf: Add -mflat multilib.
* config/sparc/t-leon: Likewise.
libgcc/
* config/sparc/linux-unwind.h (STACK_BIAS): Define.
(sparc64_fallback_frame_state): Use it.
(sparc64_frob_update_context): Further adjust context.
* config/sparc/sol2-unwind.h (sparc64_frob_update_context): Likewise.
* config/sparc/sol2-ci.S: Add TARGET_FLAT handling.
* config/sparc/sol2-cn.S: Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@174897 138bc75d-0d04-0410-961f-82ee72b054a4
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* gcc.target/sparc/ultrasp13.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@174566 138bc75d-0d04-0410-961f-82ee72b054a4
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PR rtl-optimization/48830
PR rtl-optimization/48808
PR rtl-optimization/48792
* reload.c (push_reload): Check contains_reg_of_mode.
* reload1.c (strip_paradoxical_subreg): New function.
(gen_reload_chain_without_interm_reg_p): Use it to handle
paradoxical subregs.
(emit_output_reload_insns, gen_reload): Likewise.
gcc/testsuite/
2011-06-01 Eric Botcazou <ebotcazou@adacore.com>
Hans-Peter Nilsson <hp@axis.com>
PR rtl-optimization/48830
* gcc.target/sparc/ultrasp12.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@174540 138bc75d-0d04-0410-961f-82ee72b054a4
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* config/sparc/sparc.h (ASM_OUTPUT_ALIGN_WITH_NOP): Move to...
* config/sparc/sol2.h (ASM_OUTPUT_ALIGN_WITH_NOP): ...here.
* config/sparc/sol2-gas.h (ASM_OUTPUT_ALIGN_WITH_NOP): Undefine.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@166986 138bc75d-0d04-0410-961f-82ee72b054a4
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* config/sparc/constraints.md ('e'): Return NO_REGS if !TARGET_FPU.
('f'): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@164512 138bc75d-0d04-0410-961f-82ee72b054a4
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an extra nop past a sibling call at the very end.
testsuite/
* gcc.target/sparc/sibcall-dslot.c: New testcase.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@163395 138bc75d-0d04-0410-961f-82ee72b054a4
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* gcc.target/sparc/fexpand-2.c: Likewise.
* gcc.target/sparc/fpmerge-2.c: Likewise.
* gcc.target/sparc/pdist-2.c: Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@147085 138bc75d-0d04-0410-961f-82ee72b054a4
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* gcc.c-torture/compile/pr36141.c: ... here.
* gcc.dg/arm-g2.c: Move to ...
* gcc.target/arm/g2.c: ... here.
* gcc.dg/arm-vfp1.c: Move to ...
* gcc.target/arm/vfp1.c: ... here.
* gcc.dg/20031108-1: Move to ...
* gcc.target/arm/20031108-1.c: ... here.
* gcc.dg/20030909-1: Move to ...
* gcc.target/arm/20030909-1.c: ... here.
* gcc.dg/arm-mmx-1.c: Move to ...
* gcc.target/arm/mmx-1.c: ... here.
* gcc.dg/arm-scd[123].c: Move to ...
* gcc.target/arm/scd[123].c: ... here.
* gcc.dg/arm-asm.c: Move to ...
* gcc.target/arm/asm.c: ... here.
* gcc.dg/20080410-1: Move to ...
* gcc.target/sh/20080410-1.c: ... here.
* gcc.dg/globalreg-1.c: Move to ...
* gcc.target/sparc/globalreg-1.c: ... here.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@140340 138bc75d-0d04-0410-961f-82ee72b054a4
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* gcc.target/i386/stackalign/return-3.c: Ditto.
* gcc.target/sparc/ultrasp3.c: Ditto.
* lib/target-supports-dg.exp (dg-require-effective-target): Error
if argument is not a single effective-target keyword.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@139039 138bc75d-0d04-0410-961f-82ee72b054a4
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3 of the GNU General Public License and to point readers at the COPYING3 file
and the FSF's license web page.
* gcc.c-torture/execute/ieee/ieee.exp, gcc.c-torture/unsorted/unsorted.exp,
gcc.c-torture/compile/compile.exp, gcc.c-torture/compile/structs.c,
gcc.target/powerpc/powerpc.exp, gcc.target/arm/neon/neon.exp, gcc.target/arm/arm.exp,
gcc.target/cris/torture/cris-torture.exp, gcc.target/cris/cris.exp, gcc.target/ia64/ia64.exp,
gcc.target/alpha/alpha.exp, gcc.target/m68k/m68k.exp, gcc.target/spu/spu.exp, gcc.target/mips/mips.exp,
gcc.target/sparc/sparc.exp, gcc.target/i386/i386.exp, gcc.target/x86_64/abi/abi-x86_64.exp, gnat.dg/specs/specs.exp,
gnat.dg/dg.exp, gnat.dg/style/style.exp, gcc.dg/special/mips-abi.exp, gcc.dg/special/special.exp,
gcc.dg/pch/pch.exp, gcc.dg/vxworks/vxworks.exp, gcc.dg/dg.exp, gcc.dg/charset/charset.exp, gcc.dg/weak/weak.exp,
gcc.dg/tree-ssa/tree-ssa.exp, gcc.dg/tls/tls.exp, gcc.dg/cpp/cpp.exp, gcc.dg/cpp/trad/trad.exp,
gcc.dg/matrix/matrix.exp, gcc.dg/vmx/vmx.exp, gcc.dg/compat/struct-layout-1.exp, gcc.dg/compat/compat.exp,
gcc.dg/compat/struct-layout-1_generate.c, gcc.dg/debug/debug.exp, gcc.dg/debug/dwarf2/dwarf2.exp, gcc.dg/tree-prof/tree-prof.exp,
gcc.dg/ipa/ipa.exp, gcc.dg/dfp/dfp.exp, gcc.dg/noncompile/noncompile.exp,
gcc.dg/vect/costmodel/ppc/ppc-costmodel-vect.exp, gcc.dg/vect/costmodel/spu/spu-costmodel-vect.exp,
gcc.dg/vect/costmodel/i386/i386-costmodel-vect.exp, gcc.dg/vect/costmodel/x86_64/x86_64-costmodel-vect.exp,
gcc.dg/vect/vect.exp, gcc.dg/format/format.exp, gcc.misc-tests/i386-prefetch.exp, gcc.misc-tests/sort2.exp,
gcc.misc-tests/matrix1.exp, gcc.misc-tests/dectest.exp, gcc.misc-tests/options.exp, gcc.misc-tests/gcov.exp,
gcc.misc-tests/mg-2.exp, gcc.misc-tests/mg.exp, gcc.misc-tests/bprob.exp, gcc.misc-tests/acker1.exp,
gcc.misc-tests/dhry.exp, gcc.misc-tests/linkage.exp, gcc.misc-tests/arm-isr.exp, gcc.misc-tests/sieve.exp,
g++.old-deja/g++.niklas/README, g++.old-deja/g++.gb/README, g++.old-deja/old-deja.exp,
gfortran.fortran-torture/execute/execute.exp, gfortran.fortran-torture/compile/compile.exp,
treelang/output/output-1.c, treelang/output/output-1.tree, treelang/execute/execute.exp, treelang/Makefile.in,
treelang/compile/compile.exp, g++.dg/dg.exp, g++.dg/debug/debug.exp, g++.dg/debug/dwarf2/dwarf2.exp,
g++.dg/charset/charset.exp, g++.dg/vect/vect.exp, g++.dg/tls/tls.exp, g++.dg/tree-prof/tree-prof.exp,
g++.dg/pch/pch.exp, g++.dg/special/ecos.exp, g++.dg/compat/struct-layout-1.exp,
g++.dg/compat/struct-layout-1_generate.c, g++.dg/compat/compat.exp, g++.dg/gcov/gcov.exp,
g++.dg/bprob/bprob.exp, config/default.exp, gcc.test-framework/test-framework.awk,
gcc.test-framework/gen_directive_tests, gcc.test-framework/test-framework.exp,
objc.dg/special/special.exp, objc.dg/gnu-encoding/gnu-encoding.exp,
objc.dg/gnu-encoding/struct-layout-encoding-1_generate.c, objc.dg/pch/pch.exp, objc.dg/dg.exp, lib/copy-file.exp,
lib/profopt.exp, lib/gcc.exp, lib/mike-g++.exp, lib/c-compat.exp, lib/scanrtl.exp, lib/gfortran-dg.exp, lib/g++.exp,
lib/obj-c++.exp, lib/wrapper.exp, lib/gnat-dg.exp, lib/compat.exp, lib/c-torture.exp, lib/gcc-dg.exp, lib/scanasm.exp, lib/gnat.exp,
lib/treelang-dg.exp, lib/prune.exp, lib/gcov.exp, lib/treelang.exp, lib/dg-pch.exp, lib/scantree.exp,
lib/g++-dg.exp, lib/objc-dg.exp, lib/file-format.exp, lib/target-libpath.exp, lib/obj-c++-dg.exp, lib/scandump.exp,
lib/target-supports-dg.exp, lib/gcc-defs.exp, lib/fortran-torture.exp, lib/objc.exp, lib/scanipa.exp,
lib/mike-gcc.exp, lib/objc-torture.exp, lib/gfortran.exp, lib/target-supports.exp, obj-c++.dg/dg.exp, gfortran.dg/dg.exp,
gfortran.dg/vect/vect.exp, objc/execute/execute.exp, objc/execute/exceptions/exceptions.exp,
objc/compile/compile.exp: Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@127127 138bc75d-0d04-0410-961f-82ee72b054a4
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* gcc.dg/20001101-1.c: Likewise.
* gcc.dg/20001102-1.c: Likewise.
* gcc.dg/20020116-2.c: Likewise.
* gcc.dg/20020416-1.c: Likewise.
* gcc.dg/sparc-constant-1.c: Likewise.
* gcc.dg/sparc-dwarf2.c: Likewise.
* gcc.dg/sparc-frame-1.c: Likewise.
* gcc.dg/sparc-getcontext-1.c: Likewise.
* gcc.dg/sparc-loop-1.c: Likewise.
* gcc.dg/sparc-reg-1.c: Likewise.
* gcc.dg/sparc-ret.c: Likewise.
* gcc.dg/sparc-trap-1.c: Likewise.
* gcc.dg/ultrasp10.c: Likewise.
* gcc.dg/ultrasp11.c: Likewise.
* gcc.dg/ultrasp1.c: Likewise.
* gcc.dg/ultrasp2.c: Likewise.
* gcc.dg/ultrasp3.c: Likewise.
* gcc.dg/ultrasp4.c: Likewise.
* gcc.dg/ultrasp5.c: Likewise.
* gcc.dg/ultrasp6.c: Likewise.
* gcc.dg/ultrasp7.c: Likewise.
* gcc.dg/ultrasp8.c: Likewise.
* gcc.dg/ultrasp9.c: Likewise.
* gcc.dg/splet-1.c: Delete.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@126641 138bc75d-0d04-0410-961f-82ee72b054a4
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New function.
(is-effective-target): Check $arg for ultrasparc_hw.
(is-effective-target-keyword): Likewise.
* gcc.dg/vect/vect.exp: Call check_effective_target_ultrasparc_hw
when determining what to do on sparc platforms.
* gcc.dg/20001013-1.c: Check for an ultrasparc_hw target.
* gcc.dg/20001101-1.c: Likewise.
* gcc.dg/20001101-2.c: Likewise.
* gcc.dg/ultrasp9.c: Likewise.
* gcc.dg/ultrasp10.c: Likewise.
* gcc.target/sparc/pdist-3.c: Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@126589 138bc75d-0d04-0410-961f-82ee72b054a4
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return mode from the builtin itself.
(sparc_fold_builtin): Fix cast of zero constant.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@125768 138bc75d-0d04-0410-961f-82ee72b054a4
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fpu mask correctly.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@125674 138bc75d-0d04-0410-961f-82ee72b054a4
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2006-04-04 Carlos O'Donell <carlos@codesourcery.com>
* doc/tm.texi (TARGET_STRUCT_VALUE_RTX): Document
new value 2 for incoming.
* function.c (expand_function_start): Call struct_value_rtx
with incoming as 2.
* config/sparc/sparc.md: Comment updated_return.
* config/sparc/sparc.opt: Add -mstd-struct-return option.
* config/sparc/sparc.c (sparc_struct_value_rtx): Use standard
struct return if sparc_std_struct_return and incoming is 2.
(print_operand): Do not adjust return if
sparc_std_struct_return.
gcc/testsuite/
2006-04-04 Carlos O'Donell <carlos@codesourcery.com>
* gcc.target/sparc/struct-ret-check.c: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@112672 138bc75d-0d04-0410-961f-82ee72b054a4
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* gcc.dg/20051201-1.c: Cleanup coverage files.
* gcc.target/sparc/fexpand-2.c, gcc.target/sparc/fpmerge-2.c,
gcc.target/sparc/fpmul-2.c, gcc.target/sparc/pdist-2.c: Cleanup
tree dump files.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@111667 138bc75d-0d04-0410-961f-82ee72b054a4
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git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@101316 138bc75d-0d04-0410-961f-82ee72b054a4
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PR target/20666
* config/sparc/sparc.c (sparc_fold_builtin): New function
(sparc_vis_mul8x16): New function.
(sparc_handle_vis_mul8x16): New function.
(TARGET_FOLD_BUILTIN): Define to sparc_fold_builtin.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@100762 138bc75d-0d04-0410-961f-82ee72b054a4
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* gcc.target/sparc/pdist.c: Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@91144 138bc75d-0d04-0410-961f-82ee72b054a4
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* config/sparc/sparc.c: Include insn-codes.h and langhooks.h.
(sparc_init_builtins): New function.
(sparc_init_vis_builtins): Create builtin functions for VIS
instructions.
(sparc_expand_builtin): Expand builtin functions for VIS instructions.
(TARGET_INIT_BUILTINS): Define to sparc_init_builtins.
(TARGET_EXPAND_BUILTIN): Define to sparc_expand_builtin.
(def_builtin): New macro for creating builtin functions.
(P): New mode macro for pointer types.
(UNSPEC_FPACK16, UNSPEC_FPACK32, UNSPEC_FPACKFIX, UNSPEC_FEXPAND,
UNSPEC_FPMERGE, UNSPEC_MUL16AL, UNSPEC_MUL8UL, UNSPEC_MULDUL,
UNSPEC_ALIGNDATA, UNSPEC_ALIGNADDR, UNSPEC_PDIST): New constants.
(fpack16_vis, fpackfix_vis, fpack32_vis, fexpand_vis, fpmerge_vis,
fmul8x16_vis, fmul8x16au_vis, fmul8x16al_vis, fmul8sux16_vis,
fmul8ulx16_vis, fmuld8sux16_vis, fmuld8ulx16_vis, pdist_vis,
faligndata<V64:mode>_vis, alignaddr<P:mode>_vis): New patterns.
testsuite:
* gcc.target/sparc/align.c, gcc.target/sparc/combined-2.c,
gcc.target/sparc/fpack16.c, gcc.target/sparc/fpack32.c,
gcc.target/sparc/fpackfix.c, gcc.target/fexpand.c,
gcc.target/sparc/fpmerge.c, gcc.target/sparc/fpmul.c,
gcc.target/sparc/pdist.c: New tests.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@91057 138bc75d-0d04-0410-961f-82ee72b054a4
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* config/sparc/sparc.c (sparc_rtx_costs): Handle the NAND vector
patterns.
* config/sparc/sparc.md (V64I): New macro for 64-bit modes.
(V32I): New macro for 32-bit modes.
(anddi3, anddi_sp32, anddi_sp64, and_not_di_sp32, and_not_di_sp64,
iordi3, iordi3_sp32, iordi_sp64, or_not_di_sp32, or_not_di_sp64,
xordi3, xordi3_sp32, xordi3_sp64, {AND, IOR, XOR} DI splitter,
xor_not_di_sp32, xordi_not_di_sp64, one_cmpldi2, one_cmpldi_sp32,
one_cmpldi_sp64): Use V64I instead of DI.
(andsi3, andsi_sp32, andsi_sp64, and_not_si, iorsi3, or_not_si,
xorsi3, xor_not_si, one_cmplsi2): Use V32I instead of SI.
(addv2si3, addv4hi3, addv2hi3): Remove % modifier.
(nandv64i_vis, nandv32i_vis): New patterns.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@90578 138bc75d-0d04-0410-961f-82ee72b054a4
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(addsi3, subsi3): Set "fptype" attribute.
(addv2si, addv4hi, addv2hi, subv2si, subv4hi, subv2hi): New
patterns.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@90391 138bc75d-0d04-0410-961f-82ee72b054a4
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