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* [AArch64] Restore recog state after finding pre-madd instructionktkachov2014-10-291-0/+14
| | | | | | | | | | * config/aarch64/aarch64.c (aarch64_madd_needs_nop): Restore recog state after aarch64_prev_real_insn call. * gcc.target/aarch64/madd_after_asm_1.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@216853 138bc75d-0d04-0410-961f-82ee72b054a4
* PR tree-optimization/63563jakub2014-10-211-0/+17
| | | | | | | | | | * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Bail out if either dra or drb stmts are not normal loads/stores. * gcc.target/i386/pr63563.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@216508 138bc75d-0d04-0410-961f-82ee72b054a4
* 2014-10-15 Vladimir Makarov <vmakarov@redhat.com>vmakarov2014-10-151-0/+120
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PR rtl-optimization/63448 * lra-int.h (LRA_MAX_CONSTRAINT_ITERATION_NUMBER): Remove. (LRA_MAX_ASSIGNMENT_ITERATION_NUMBER): New. (LRA_MAX_INHERITANCE_PASSES): Use it. (lra_constraint_iter_after_spill): Remove. (lra_assignment_iter): New. (lra_assignment_iter_after_spill): New. * lra-assigns.c (lra_assignment_iter): New. (lra_assignment_iter_after_spill): New. (former_reload_pseudo_spill_p): New. (spill_for): Set up former_reload_pseudo_spill_p. (setup_live_pseudos_and_spill_after_risky): Ditto. (assign_by_spills): Ditto. (lra_assign): Increment lra_assignment_iter. Print the iteration number. Reset former_reload_pseudo_spill_p. Check lra_assignment_iter_after_spill. * lra.c (lra): Remove lra_constraint_iter_after_spill. Initialize lra_assignment_iter and lra_assignment_iter_after_spill. * lra-constraints.c (lra_constraint_iter_after_spill): Remove. (lra_constraints): Remove code with lra_assignment_iter_after_spill. 2014-10-15 Vladimir Makarov <vmakarov@redhat.com> PR rtl-optimization/63448 * gcc.target/i386/pr63448.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@216271 138bc75d-0d04-0410-961f-82ee72b054a4
* [gcc]wschmidt2014-10-136-4/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2014-10-12 Bill Schmidt <wschmidt@linux.vnet.ibm.com> Backport from mainline r215880 2014-10-03 Bill Schmidt <wschmidt@linux.vnet.ibm.com> * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Issue a warning message when vec_lvsl or vec_lvsr is used with a little endian target. Backport from mainline r215882 2014-10-03 Bill Schmidt <wschmidt@linux.vnet.ibm.com> * altivec.md (altivec_lvsl): New define_expand. (altivec_lvsl_direct): Rename define_insn from altivec_lvsl. (altivec_lvsr): New define_expand. (altivec_lvsr_direct): Rename define_insn from altivec_lvsr. * rs6000.c (rs6000_expand_builtin): Change to use altivec_lvs[lr]_direct; remove commented-out code. [gcc/testsuite] 2014-10-12 Bill Schmidt <wschmidt@linux.vnet.ibm.com> Backport from mainline r215880 2014-10-03 Bill Schmidt <wschmidt@linux.vnet.ibm.com> * g++.dg/ext/altivec-2.C: Compile with -Wno-deprecated to avoid failing with the new warning message. * gcc.dg/vmx/3c-01a.c: Likewise. * gcc.dg/vmx/ops-long-1.c: Likewise. * gcc.dg/vmx/ops.c: Likewise. * gcc.target/powerpc/altivec-20.c: Likewise. * gcc.target/powerpc/altivec-6.c: Likewise. * gcc.target/powerpc/altivec-vec-merge.c: Likewise. * gcc.target/powerpc/vsx-builtin-8.c: Likewise. * gcc.target/powerpc/warn-lvsl-lvsr.c: New test. Backport from mainline r215882 2014-10-03 Bill Schmidt <wschmidt@linux.vnet.ibm.com> * gcc.target/powerpc/lvsl-lvsr.c: New test. Backport from mainline r216017 2014-10-08 Pat Haugen <pthaugen@us.ibm.com> * gcc.dg/vmx/3c-01a.c: Add default options from vmx.exp. * gcc.dg/vmx/ops.c: Likewise. * gcc.dg/vmx/ops-long-1.c: Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@216134 138bc75d-0d04-0410-961f-82ee72b054a4
* PR c/63495jakub2014-10-101-0/+6
| | | | | | | | | | | * c-common.c (min_align_of_type): Don't decrease alignment through BIGGEST_FIELD_ALIGNMENT or ADJUST_FIELD_ALIGN if TYPE_USER_ALIGN is set. * gcc.target/i386/pr63495.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@216102 138bc75d-0d04-0410-961f-82ee72b054a4
* Backported from mainlinejakub2014-10-011-0/+28
| | | | | | | | | | | | | 2014-09-18 Vladimir Makarov <vmakarov@redhat.com> PR debug/63285 * haifa-sched.c (schedule_block): Advance cycle at the end of BB if advance != 0. * gcc.target/i386/pr63285.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@215766 138bc75d-0d04-0410-961f-82ee72b054a4
* [gcc]wschmidt2014-09-251-0/+30
| | | | | | | | | | | | | | | | | | | 2014-09-25 Bill Schmidt <wschmidt@linux.vnet.ibm.com> PR target/63335 * config/rs6000/rs6000-c.c (altivec_build_resolved_builtin): Exclude VSX_BUILTIN_XVCMPGEDP_P from special handling. [gcc/testsuite] 2014-09-25 Bill Schmidt <wschmidt@linux.vnet.ibm.com> PR target/63335 * gcc.target/powerpc/pr63335.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@215603 138bc75d-0d04-0410-961f-82ee72b054a4
* Backport r214953 from mainlinealalaw012014-09-117-192/+192
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2014-09-05 Alan Lawrence <alan.lawrence@arm.com> gcc/: * config/aarch64/arm_neon.h (int32x1_t, int16x1_t, int8x1_t, uint32x1_t, uint16x1_t, uint8x1_t): Remove typedefs. (vqabsb_s8, vqabsh_s16, vqabss_s32, vqaddb_s8, vqaddh_s16, vqadds_s32, vqaddb_u8, vqaddh_u16, vqadds_u32, vqdmlalh_s16, vqdmlalh_lane_s16, vqdmlals_s32, vqdmlslh_s16, vqdmlslh_lane_s16, vqdmlsls_s32, vqdmulhh_s16, vqdmulhh_lane_s16, vqdmulhs_s32, vqdmulhs_lane_s32, vqdmullh_s16, vqdmullh_lane_s16, vqdmulls_s32, vqdmulls_lane_s32, vqmovnh_s16, vqmovns_s32, vqmovnd_s64, vqmovnh_u16, vqmovns_u32, vqmovnd_u64, vqmovunh_s16, vqmovuns_s32, vqmovund_s64, vqnegb_s8, vqnegh_s16, vqnegs_s32, vqrdmulhh_s16, vqrdmulhh_lane_s16, vqrdmulhs_s32, vqrdmulhs_lane_s32, vqrshlb_s8, vqrshlh_s16, vqrshls_s32, vqrshlb_u8, vqrshlh_u16, vqrshls_u32, vqrshrnh_n_s16, vqrshrns_n_s32, vqrshrnd_n_s64, vqrshrnh_n_u16, vqrshrns_n_u32, vqrshrnd_n_u64, vqrshrunh_n_s16, vqrshruns_n_s32, vqrshrund_n_s64, vqshlb_s8, vqshlh_s16, vqshls_s32, vqshlb_u8, vqshlh_u16, vqshls_u32, vqshlb_n_s8, vqshlh_n_s16, vqshls_n_s32, vqshlb_n_u8, vqshlh_n_u16, vqshls_n_u32, vqshlub_n_s8, vqshluh_n_s16, vqshlus_n_s32, vqshrnh_n_s16, vqshrns_n_s32, vqshrnd_n_s64, vqshrnh_n_u16, vqshrns_n_u32, vqshrnd_n_u64, vqshrunh_n_s16, vqshruns_n_s32, vqshrund_n_s64, vqsubb_s8, vqsubh_s16, vqsubs_s32, vqsubb_u8, vqsubh_u16, vqsubs_u32, vsqaddb_u8, vsqaddh_u16, vsqadds_u32, vuqaddb_s8, vuqaddh_s16, vuqadds_s32): Replace all int{32,16,8}x1_t with int{32,16,8}_t. gcc/testsuite/: * gcc.target/aarch64/scalar_intrinsics.c (*): Replace all int{32,16,8}x1_t with int{32,16,8}_t. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@215173 138bc75d-0d04-0410-961f-82ee72b054a4
* 2014-09-09 Bill Schmidt <wschmidt@us.ibm.com>wschmidt2014-09-091-7/+1
| | | | | | | | | | | | | | | | | | | | Backported from mainline 2014-09-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com> * config/rs6000/vsx.md (*vsx_extract_<mode>_load): Always match selection of 0th memory doubleword, regardless of endianness. 2014-09-09 Bill Schmidt <wschmidt@linux.vnet.ibm.com> Backported from mainline 2014-09-04 Bill Schmidt <wschmidt@linux.vnet.ibm.com> * gcc.target/powerpc/vsx-extract-1.c: Test 0th doubleword regardless of endianness. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@215096 138bc75d-0d04-0410-961f-82ee72b054a4
* PR target/62040carrot2014-09-041-0/+21
| | | | | | | | | | | | | * config/aarch64/iterators.md (VQ_NO2E, VQ_2E): New iterators. * config/aarch64/aarch64-simd.md (move_lo_quad_internal_<mode>): Split it into two patterns. (move_lo_quad_internal_be_<mode>): Likewise. * gcc.target/aarch64/pr62040.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@214913 138bc75d-0d04-0410-961f-82ee72b054a4
* PR target/62262carrot2014-08-271-0/+20
| | | | | | | | | | | * config/aarch64/aarch64.md (*andim_ashift<mode>_bfiz): Check the shift amount before using it. * gcc.target/aarch64/pr62262.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@214610 138bc75d-0d04-0410-961f-82ee72b054a4
* gcc/olegendo2014-08-241-0/+12
| | | | | | | | | | | | | | | | | | | | | | Backport from mainline 2014-08-24 Oleg Endo <olegendo@gcc.gnu.org> PR target/61996 * config/sh/sh.opt (musermode): Allow negative form. * config/sh/sh.c (sh_option_override): Disable TARGET_USERMODE for targets that don't support it. * doc/invoke.texi (SH Options): Rename sh-*-linux* to sh*-*-linux*. Document -mno-usermode option. gcc/testsuite Backport from mainline 2014-08-24 Oleg Endo <olegendo@gcc.gnu.org> PR target/61996 * gcc.target/sh/pr61996.c: New. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@214407 138bc75d-0d04-0410-961f-82ee72b054a4
* Fix if-conversion pass for dead type-unsafe codevries2014-08-151-0/+50
| | | | | | | | | | | | | | | | | | | | | | | 2014-08-15 Tom de Vries <tom@codesourcery.com> Backport from mainline: 2014-08-14 Tom de Vries <tom@codesourcery.com> PR rtl-optimization/62004 PR rtl-optimization/62030 * ifcvt.c (rtx_interchangeable_p): New function. (noce_try_move, noce_process_if_block): Use rtx_interchangeable_p. * gcc.dg/pr62004.c: New test. * gcc.dg/pr62030.c: Same. * gcc.target/mips/pr62030-octeon.c: Same. 2014-08-05 Richard Biener <rguenther@suse.de> * emit-rtl.h (mem_attrs_eq_p): Declare. * emit-rtl.c (mem_attrs_eq_p): Export. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@214044 138bc75d-0d04-0410-961f-82ee72b054a4
* Backport from mainlinejanis2014-08-123-0/+3
| | | | | | | | | | | | | | | | | | | 2014-08-12 Janis Johnson <janisjo@codesourcery.com> * lib/target/supports.exp (check_effective_target_arm_v8_neon_ok_nocache): Check for armv8 or later. * gcc.dg/pr59418.c: Don't add ARM options for a Thumb1 multilib. * gcc.target/arm/neon-vext-execute.c: Skip if the test won't run on Neon hardware. * gcc.target/arm/pr48784.c: Skip for thumb1 multilib. * gcc.target/arm/pr59985.c: Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@213867 138bc75d-0d04-0410-961f-82ee72b054a4
* Backport from mainline 64-bit multiplication handling without vpmacsdql ↵gganesh2014-08-121-1/+0
| | | | | | instruction git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@213850 138bc75d-0d04-0410-961f-82ee72b054a4
* Backport from mainlinejanis2014-08-115-0/+5
| | | | | | | | | | | | | | | | | 2014-08-11 Janis Johnson <janisjo@codesourcery.com> * lib/target-supports.exp (check_effective_target_arm_thumb1_ok, check_effective_target_arm_thumb2_ok): Test with code that passes an argument and returns a result. * gcc.target/arm/frame-pointer-1.c: Skip if Thumb is not supported. * gcc.target/arm/pr56184.C: Likewise. * gcc.target/arm/pr59896.c: Likewise. * gcc.target/arm/stack-red-zone.c: Likewise. * gcc.target/arm/thumb-find-work-register.c: Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@213820 138bc75d-0d04-0410-961f-82ee72b054a4
* gcc/testsuite/kyukhin2014-08-0712-20/+13
| | | | | | | | | | | | | | | | | | | | | * gcc.target/i386/avx512f-vfixupimmpd-2.c: Include float.h instead of values.h, change MAXDOUBLE for DBL_MAX. * gcc.target/i386/avx512f-vfixupimmsd-2.c: Ditto. * gcc.target/i386/avx512f-vfixupimmps-2.c: Include float.h instead of values.h, change MAXFLOAT for FLT_MAX. * gcc.target/i386/avx512f-vfixupimmss-2.c: Ditto. * gcc.target/i386/avx512f-vpermi2d-2.c: Do not include values.h. * gcc.target/i386/avx512f-vpermi2pd-2.c: Ditto. * gcc.target/i386/avx512f-vpermi2ps-2.c: Ditto. * gcc.target/i386/avx512f-vpermi2q-2.c: Ditto. * gcc.target/i386/avx512f-vpermt2d-2.c: Ditto. * gcc.target/i386/avx512f-vpermt2pd-2.c: Ditto. * gcc.target/i386/avx512f-vpermt2ps-2.c: Ditto. * gcc.target/i386/avx512f-vpermt2q-2.c: Ditto. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@213707 138bc75d-0d04-0410-961f-82ee72b054a4
* 2014-08-06 Vladimir Makarov <vmakarov@redhat.com>vmakarov2014-08-061-0/+36
| | | | | | | | | | | | | | | | PR debug/61923 * haifa-sched.c (advance_one_cycle): Fix dump. (schedule_block): Don't advance cycle if we are already at the beginning of the cycle. 2014-08-06 Vladimir Makarov <vmakarov@redhat.com> PR debug/61923 * gcc.target/i386/pr61923.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@213674 138bc75d-0d04-0410-961f-82ee72b054a4
* PR rtl-optimization/61801jakub2014-08-061-13/+12
| | | | | | | * gcc.target/i386/pr61801.c: Rewritten. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@213653 138bc75d-0d04-0410-961f-82ee72b054a4
* PR target/60102edmarwjr2014-08-041-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [libgcc] 2014-08-04 Rohit <rohitarulraj@freescale.com> * config/rs6000/linux-unwind.h (ppc_fallback_frame_state): Update based on change in SPE high register numbers and 3 HTM registers. [gcc] 2014-08-04 Rohit <rohitarulraj@freescale.com> * config/rs6000/rs6000.c (rs6000_reg_names) : Add SPE high register names. (alt_reg_names) : Likewise. (rs6000_dwarf_register_span) : For SPE high registers, replace dwarf register numbers with GCC hard register numbers. (rs6000_init_dwarf_reg_sizes_extra) : Likewise. (rs6000_dbx_register_number): For SPE high registers, return dwarf register number for the corresponding GCC hard register number. * config/rs6000/rs6000.h (FIRST_PSEUDO_REGISTER) : Update based on 32 newly added GCC hard register numbers for SPE high registers. (DWARF_FRAME_REGISTERS) : Likewise. (DWARF_REG_TO_UNWIND_COLUMN) : Likewise. (DWARF_FRAME_REGNUM) : Likewise. (FIXED_REGISTERS) : Likewise. (CALL_USED_REGISTERS) : Likewise. (CALL_REALLY_USED_REGISTERS) : Likewise. (REG_ALLOC_ORDER) : Likewise. (enum reg_class) : Likewise. (REG_CLASS_NAMES) : Likewise. (REG_CLASS_CONTENTS) : Likewise. (SPE_HIGH_REGNO_P) : New macro to identify SPE high registers. [gcc/testsuite] 2014-08-04 Rohit <rohitarulraj@freescale.com> * gcc.target/powerpc/pr60102.c: New testcase. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@213597 138bc75d-0d04-0410-961f-82ee72b054a4
* 2014-07-28 Richard Biener <rguenther@suse.de>rguenth2014-07-281-1/+1
| | | | | | | | PR rtl-optimization/61801 * gcc.target/i386/pr61801.c: Fix testcase. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@213119 138bc75d-0d04-0410-961f-82ee72b054a4
* 2014-07-28 Richard Biener <rguenther@suse.de>rguenth2014-07-281-0/+22
| | | | | | | | PR rtl-optimization/61801 * gcc.target/i386/pr61801.c: New testcase. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@213112 138bc75d-0d04-0410-961f-82ee72b054a4
* gcc/uweigand2014-07-241-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | * config/rs6000/rs6000-protos.h (rs6000_special_adjust_field_align_p): Add prototype. * config/rs6000/rs6000.c (rs6000_special_adjust_field_align_p): New function. Issue -Wpsabi warning if future GCC releases will use different field alignment rules for this type. * config/rs6000/sysv4.h (ADJUST_FIELD_ALIGN): Call it. * config/rs6000/linux64.h (ADJUST_FIELD_ALIGN): Likewise. * config/rs6000/freebsd64.h (ADJUST_FIELD_ALIGN): Likewise. gcc/testsuite/ * gcc.target/powerpc/ppc64-abi-warn-3.c: New test. * gcc.c-torture/execute/20050316-1.x: Add -Wno-psabi. * gcc.c-torture/execute/20050604-1.x: Add -Wno-psabi. * gcc.c-torture/execute/20050316-3.x: New file. Add -Wno-psabi. * gcc.c-torture/execute/pr23135.x: Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@213021 138bc75d-0d04-0410-961f-82ee72b054a4
* gcc/uweigand2014-07-241-0/+11
| | | | | | | | | | | | | | * config/rs6000/rs6000.c (rs6000_function_arg_boundary): Issue -Wpsabi note when encountering a type where future GCC releases will apply different alignment requirements. gcc/testsuite/ * gcc.target/powerpc/ppc64-abi-warn-2.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@213020 138bc75d-0d04-0410-961f-82ee72b054a4
* gcc/uweigand2014-07-241-0/+12
| | | | | | | | | | | | | | | * config/rs6000/rs6000.c (rs6000_function_arg): If a float argument does not fit fully into floating-point registers, and there is still space in the register parameter area, issue -Wpsabi note that the ABI will change in a future GCC release. gcc/testsuite/ * gcc.target/powerpc/ppc64-abi-warn-1.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@213019 138bc75d-0d04-0410-961f-82ee72b054a4
* Backport from mainlineuros2014-07-211-0/+10
| | | | | | | | | | | | | | | | | | | | 2014-07-21 Uros Bizjak <ubizjak@gmail.com> PR target/61855 * config/i386/avx512fintrin.h: Move constants for mantissa extraction out of #ifdef __OPTIMIZE__. testsuite/ChangeLog: Backport from mainline 2014-07-21 Uros Bizjak <ubizjak@gmail.com> PR target/61855 * gcc.target/i386/pr61855.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@212889 138bc75d-0d04-0410-961f-82ee72b054a4
* Backport from mainlineuros2014-07-181-0/+12
| | | | | | | | | | | | | | | | | | | | | 2014-07-18 Uros Bizjak <ubizjak@gmail.com> PR target/61794 * config/i386/sse.md (avx512f_vextract<shuffletype>32x4_1_maskm): Fix instruction constraint. (<mask_codefor>avx512f_vextract<shuffletype>32x4_1<mask_name>): Ditto. testsuite/ChangeLog: Backport from mainline 2014-07-18 Uros Bizjak <ubizjak@gmail.com> PR target/61794 * gcc.target/i386/pr61794.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@212825 138bc75d-0d04-0410-961f-82ee72b054a4
* Backport r211369 from trunk.alalaw012014-07-091-11/+2
| | | | | | | | | | | | | | | | | | | | | 2014-06-09 Alan Lawrence <alan.lawrence@arm.com> PR/61062 Fix arm_neon.h ZIP/UZP/TRN for bigendian. * config/arm/arm_neon.h (vtrn_s8, vtrn_s16, vtrn_u8, vtrn_u16, vtrn_p8, vtrn_p16, vtrn_s32, vtrn_f32, vtrn_u32, vtrnq_s8, vtrnq_s16, vtrnq_s32, vtrnq_f32, vtrnq_u8, vtrnq_u16, vtrnq_u32, vtrnq_p8, vtrnq_p16, vzip_s8, vzip_s16, vzip_u8, vzip_u16, vzip_p8, vzip_p16, vzip_s32, vzip_f32, vzip_u32, vzipq_s8, vzipq_s16, vzipq_s32, vzipq_f32, vzipq_u8, vzipq_u16, vzipq_u32, vzipq_p8, vzipq_p16, vuzp_s8, vuzp_s16, vuzp_s32, vuzp_f32, vuzp_u8, vuzp_u16, vuzp_u32, vuzp_p8, vuzp_p16, vuzpq_s8, vuzpq_s16, vuzpq_s32, vuzpq_f32, vuzpq_u8, vuzpq_u16, vuzpq_u32, vuzpq_p8, vuzpq_p16): Correct mask for bigendian. * gcc.target/arm/pr48252.c (main): Expect same result as endian-neutral. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@212391 138bc75d-0d04-0410-961f-82ee72b054a4
* 2014-06-30 Jakub Jelinek <jakub@redhat.com>jakub2014-06-306-0/+95
| | | | | | | | | | | | | | | | | | | | | | | | | | | Backported from mainline 2014-06-27 Jakub Jelinek <jakub@redhat.com> PR tree-optimization/57233 PR tree-optimization/61299 * tree-vect-generic.c (get_compute_type, count_type_subparts): New functions. (expand_vector_operations_1): Use them. If {L,R}ROTATE_EXPR would be lowered to scalar shifts, check if corresponding shifts and vector BIT_IOR_EXPR are supported and don't lower or lower just to narrower vector type in that case. * expmed.c (expand_shift_1): Fix up handling of vector shifts and rotates. * gcc.dg/pr57233.c: New test. * gcc.target/i386/pr57233.c: New test. * gcc.target/i386/sse2-pr57233.c: New test. * gcc.target/i386/avx-pr57233.c: New test. * gcc.target/i386/avx2-pr57233.c: New test. * gcc.target/i386/avx512f-pr57233.c: New test. * gcc.target/i386/xop-pr57233.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@212158 138bc75d-0d04-0410-961f-82ee72b054a4
* [AArch64] Fix some saturating math NEON intrinsics types.ktkachov2014-06-3043-20/+715
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [gcc/] * config/aarch64/iterators.md (VCOND): Handle SI and HI modes. Update comments. (VCONQ): Make comment more helpful. (VCON): Delete. * config/aarch64/aarch64-simd.md (aarch64_sqdmulh_lane<mode>): Use VCOND for operands 2. Update lane checking and flipping logic. (aarch64_sqrdmulh_lane<mode>): Likewise. (aarch64_sq<r>dmulh_lane<mode>_internal): Likewise. (aarch64_sqdmull2<mode>): Remove VCON, use VQ_HSI mode iterator. (aarch64_sqdml<SBINQOPS:as>l_lane<mode>_internal, VD_HSI): Change mode attribute of operand 3 to VCOND. (aarch64_sqdml<SBINQOPS:as>l_lane<mode>_internal, SD_HSI): Likewise. (aarch64_sqdml<SBINQOPS:as>l2_lane<mode>_internal): Likewise. (aarch64_sqdmull_lane<mode>_internal, VD_HSI): Likewise. (aarch64_sqdmull_lane<mode>_internal, SD_HSI): Likewise. (aarch64_sqdmull2_lane<mode>_internal): Likewise. (aarch64_sqdml<SBINQOPS:as>l_laneq<mode>_internal, VD_HSI: New define_insn. (aarch64_sqdml<SBINQOPS:as>l_laneq<mode>_internal, SD_HSI): Likewise. (aarch64_sqdml<SBINQOPS:as>l2_laneq<mode>_internal): Likewise. (aarch64_sqdmull_laneq<mode>_internal, VD_HSI): Likewise. (aarch64_sqdmull_laneq<mode>_internal, SD_HSI): Likewise. (aarch64_sqdmull2_laneq<mode>_internal): Likewise. (aarch64_sqdmlal_lane<mode>): Change mode attribute of penultimate operand to VCOND. Update lane flipping and bounds checking logic. (aarch64_sqdmlal2_lane<mode>): Likewise. (aarch64_sqdmlsl_lane<mode>): Likewise. (aarch64_sqdmull_lane<mode>): Likewise. (aarch64_sqdmull2_lane<mode>): Likewise. (aarch64_sqdmlal_laneq<mode>): Replace VCON usage with VCONQ. Emit aarch64_sqdmlal_laneq<mode>_internal insn. (aarch64_sqdmlal2_laneq<mode>): Emit aarch64_sqdmlal2_laneq<mode>_internal insn. Replace VCON with VCONQ. (aarch64_sqdmlsl2_lane<mode>): Replace VCON with VCONQ. (aarch64_sqdmlsl2_laneq<mode>): Likewise. (aarch64_sqdmull_laneq<mode>): Emit aarch64_sqdmull_laneq<mode>_internal insn. Replace VCON with VCONQ. (aarch64_sqdmull2_laneq<mode>): Emit aarch64_sqdmull2_laneq<mode>_internal insn. (aarch64_sqdmlsl_laneq<mode>): Replace VCON usage with VCONQ. * config/aarch64/arm_neon.h (vqdmlal_high_lane_s16): Change type of 3rd argument to int16x4_t. (vqdmlalh_lane_s16): Likewise. (vqdmlslh_lane_s16): Likewise. (vqdmull_high_lane_s16): Likewise. (vqdmullh_lane_s16): Change type of 2nd argument to int16x4_t. (vqdmlal_lane_s16): Don't create temporary int16x8_t value. (vqdmlsl_lane_s16): Likewise. (vqdmull_lane_s16): Don't create temporary int16x8_t value. (vqdmlal_high_lane_s32): Change type 3rd argument to int32x2_t. (vqdmlals_lane_s32): Likewise. (vqdmlsls_lane_s32): Likewise. (vqdmull_high_lane_s32): Change type 2nd argument to int32x2_t. (vqdmulls_lane_s32): Likewise. (vqdmlal_lane_s32): Don't create temporary int32x4_t value. (vqdmlsl_lane_s32): Likewise. (vqdmull_lane_s32): Don't create temporary int32x4_t value. (vqdmulhh_lane_s16): Change type of second argument to int16x4_t. (vqrdmulhh_lane_s16): Likewise. (vqdmlsl_high_lane_s16): Likewise. (vqdmulhs_lane_s32): Change type of second argument to int32x2_t. (vqdmlsl_high_lane_s32): Likewise. (vqrdmulhs_lane_s32): Likewise. [gcc/testsuite] * gcc.target/aarch64/vqdmulhh_lane_s16.c: New test. * gcc.target/aarch64/vqdmulhs_lane_s32.c: Likewise. * gcc.target/aarch64/vqrdmulhh_lane_s16.c: Likewise. * gcc.target/aarch64/vqrdmulhs_lane_s32.c: Likewise. * gcc.target/aarch64/vqdmlal_high_lane_s16.c: New test. * gcc.target/aarch64/vqdmlal_high_lane_s32.c: Likewise. * gcc.target/aarch64/vqdmlal_high_laneq_s16.c: Likewise. * gcc.target/aarch64/vqdmlal_high_laneq_s32.c: Likewise. * gcc.target/aarch64/vqdmlal_lane_s16.c: Likewise. * gcc.target/aarch64/vqdmlal_lane_s32.c: Likewise. * gcc.target/aarch64/vqdmlal_laneq_s16.c: Likewise. * gcc.target/aarch64/vqdmlal_laneq_s32.c: Likewise. * gcc.target/aarch64/vqdmlalh_lane_s16.c: Likewise. * gcc.target/aarch64/vqdmlals_lane_s32.c: Likewise. * gcc.target/aarch64/vqdmlsl_high_lane_s16.c: Likewise. * gcc.target/aarch64/vqdmlsl_high_lane_s32.c: Likewise. * gcc.target/aarch64/vqdmlsl_high_laneq_s16.c: Likewise. * gcc.target/aarch64/vqdmlsl_high_laneq_s32.c: Likewise. * gcc.target/aarch64/vqdmlsl_lane_s16.c: Likewise. * gcc.target/aarch64/vqdmlsl_lane_s32.c: Likewise. * gcc.target/aarch64/vqdmlsl_laneq_s32.c: Likewise. * gcc.target/aarch64/vqdmlslh_lane_s16.c: Likewise. * gcc.target/aarch64/vqdmlsls_lane_s32.c: Likewise. * gcc.target/aarch64/vqdmulh_laneq_s16.c: Likewise. * gcc.target/aarch64/vqdmulh_laneq_s32.c: Likewise. * gcc.target/aarch64/vqdmulhq_laneq_s16.c: Likewise. * gcc.target/aarch64/vqdmulhq_laneq_s32.c: Likewise. * gcc.target/aarch64/vqdmull_high_lane_s16.c: Likewise. * gcc.target/aarch64/vqdmull_high_lane_s32.c: Likewise. * gcc.target/aarch64/vqdmull_high_laneq_s16.c: Likewise. * gcc.target/aarch64/vqdmull_high_laneq_s32.c: Likewise. * gcc.target/aarch64/vqdmull_lane_s16.c: Likewise. * gcc.target/aarch64/vqdmull_lane_s32.c: Likewise. * gcc.target/aarch64/vqdmull_laneq_s16.c: Likewise. * gcc.target/aarch64/vqdmull_laneq_s32.c: Likewise. * gcc.target/aarch64/vqdmullh_lane_s16.c: Likewise. * gcc.target/aarch64/vqdmulls_lane_s32.c: Likewise. * gcc.target/aarch64/vqrdmulh_laneq_s16.c: Likewise. * gcc.target/aarch64/vqrdmulh_laneq_s32.c: Likewise. * gcc.target/aarch64/vqrdmulhq_laneq_s16.c: Likewise. * gcc.target/aarch64/vqrdmulhq_laneq_s32.c: Likewise. * gcc.target/aarch64/vector_intrinsics.c: Simplify arm_neon.h include. (test_vqdmlal_high_lane_s16): Fix parameter type. (test_vqdmlal_high_lane_s32): Likewise. (test_vqdmull_high_lane_s16): Likewise. (test_vqdmull_high_lane_s32): Likewise. (test_vqdmlsl_high_lane_s32): Likewise. (test_vqdmlsl_high_lane_s16): Likewise. * gcc.target/aarch64/scalar_intrinsics.c (test_vqdmlalh_lane_s16): Fix argument type. (test_vqdmlals_lane_s32): Likewise. (test_vqdmlslh_lane_s16): Likewise. (test_vqdmlsls_lane_s32): Likewise. (test_vqdmulhh_lane_s16): Likewise. (test_vqdmulhs_lane_s32): Likewise. (test_vqdmullh_lane_s16): Likewise. (test_vqdmulls_lane_s32): Likewise. (test_vqrdmulhh_lane_s16): Likewise. (test_vqrdmulhs_lane_s32): Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@212141 138bc75d-0d04-0410-961f-82ee72b054a4
* Backport from mainlineuros2014-06-271-0/+10
| | | | | | | | | | | | | | | | | | | 2014-06-26 Uros Bizjak <ubizjak@gmail.com> PR target/61586 * config/alpha/alpha.c (alpha_handle_trap_shadows): Handle BARRIER RTX. testsuite/ChangeLog: Backport from mainline 2014-06-26 Uros Bizjak <ubizjak@gmail.com> PR target/61586 * gcc.target/alpha/pr61586.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@212065 138bc75d-0d04-0410-961f-82ee72b054a4
* gcc/yufeng2014-06-174-0/+140
| | | | | | | | | | | | | | | | | | | PR target/61483 * config/aarch64/aarch64.c (aarch64_layout_arg): Add new local variable 'size'; calculate 'size' right in the front; use 'size' to compute 'nregs' (when 'allocate_ncrn != 0') and pcum->aapcs_stack_words. gcc/testsuite/ PR target/61483 * gcc.target/aarch64/aapcs64/type-def.h (struct hfa_fx2_t): New type. * gcc.target/aarch64/aapcs64/va_arg-13.c: New test. * gcc.target/aarch64/aapcs64/va_arg-14.c: Ditto. * gcc.target/aarch64/aapcs64/va_arg-15.c: Ditto. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@211739 138bc75d-0d04-0410-961f-82ee72b054a4
* Backport from mainlineuros2014-06-171-0/+38
| | | | | | | | | | | | | | | | | | | | | | | | 2014-06-06 Uros Bizjak <ubizjak@gmail.com> PR target/61423 * config/i386/i386.md (*floatunssi<mode>2_i387_with_xmm): New define_insn_and_split pattern, merged from *floatunssi<mode>2_1 and corresponding splitters. Zero extend general register or memory input operand to XMM temporary. Enable for TARGET_SSE2 and TARGET_INTER_UNIT_MOVES_TO_VEC only. (floatunssi<mode>2): Update expander predicate. testsuite/ChangeLog: Backport from mainline 2014-06-06 Uros Bizjak <ubizjak@gmail.com> PR target/61423 * gcc.target/i386/pr61423.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@211723 138bc75d-0d04-0410-961f-82ee72b054a4
* gcc/bergner2014-06-132-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Backport from mainline 2014-06-13 Peter Bergner <bergner@vnet.ibm.com> PR target/61415 * config/rs6000/rs6000-builtin.def (BU_MISC_1): Delete. (BU_MISC_2): Rename to ... (BU_LDBL128_2): ... this. * config/rs6000/rs6000.h (RS6000_BTM_LDBL128): New define. (RS6000_BTM_COMMON): Add RS6000_BTM_LDBL128. * config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Handle RS6000_BTM_LDBL128. (rs6000_invalid_builtin): Add long double 128-bit builtin support. (rs6000_builtin_mask_names): Add RS6000_BTM_LDBL128. * config/rs6000/rs6000.md (unpacktf_0): Remove define)expand. (unpacktf_1): Likewise. * doc/extend.texi (__builtin_longdouble_dw0): Remove documentation. (__builtin_longdouble_dw1): Likewise. * doc/sourcebuild.texi (longdouble128): Document. gcc/testsuite/ Backport from mainline 2014-06-13 Peter Bergner <bergner@vnet.ibm.com> PR target/61415 * lib/target-supports.exp (check_effective_target_longdouble128): New. * gcc.target/powerpc/pack02.c: Use it. * gcc.target/powerpc/tfmode_off.c: Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@211656 138bc75d-0d04-0410-961f-82ee72b054a4
* 2014-06-13 Jeff Law <law@redhat.com>law2014-06-131-0/+14
| | | | | | | | | | | | | | | PR rtl-optimization/61094 PR rtl-optimization/61446 * ree.c (combine_reaching_defs): Get the mode for the copy from the extension insn rather than the defining insn. 2014-06-13 Ilya Enkovich <ilya.enkovich@intel.com> PR rtl-optimization/61094 PR rtl-optimization/61446 * gcc.target/i386/pr61446.c : New. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@211652 138bc75d-0d04-0410-961f-82ee72b054a4
* gcc/gjl2014-06-121-0/+134
| | | | | | | | | | | | | | | | | | | | Backport from 2014-05-09 trunk r210272 * config/avr/avr-fixed.md (round<mode>3): Use -1U instead of -1 in unsigned int initializers for regno_in, regno_out. Backport from 2014-06-12 trunk r211491 PR target/61443 * config/avr/avr.md (push<mode>1): Avoid (subreg(mem)) when loading from address spaces. gcc/testsuite/ Backport from 2014-06-12 trunk r211491 PR target/61443 * gcc.target/avr/torture/pr61443.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@211492 138bc75d-0d04-0410-961f-82ee72b054a4
* Backport from mainlineabel2014-06-031-0/+17
| | | | | | | | | | | | | 2014-05-14 Andrey Belevantsev <abel@ispras.ru> PR rtl-optimization/60901 * config/i386/i386.c (ix86_dependencies_evaluation_hook): Check that bb predecessor belongs to the same scheduling region. Adjust comment. * gcc.target/i386/pr60901.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@211168 138bc75d-0d04-0410-961f-82ee72b054a4
* 2014-05-29 Vladimir Makarov <vmakarov@redhat.com>vmakarov2014-05-291-0/+19
| | | | | | | | | | | | | | | | PR rtl-optimization/61325 * lra-constraints.c (process_address): Rename to process_address_1. (process_address): New function. 2014-05-29 Vladimir Makarov <vmakarov@redhat.com> PR rtl-optimization/61325 * gcc.target/aarch64/pr61325.c: New. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@211060 138bc75d-0d04-0410-961f-82ee72b054a4
* Centralise clearing hardware capabilities with Sun ldro2014-05-285-67/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gcc: * configure.ac ($gcc_cv_ld_clearcap): New test. * configure: Regenerate. * config.in: Regenerate. * config/sol2.opt (mclear-hwcap): New option. * config/sol2.h (LINK_CLEARCAP_SPEC): Define. * config/sol2-clearcap.map: Moved here from testsuite/gcc.target/i386/clearcap.map. * config/sol2-clearcapv2.map: Move here from gcc.target/i386/clearcapv2.map. * config/t-sol2 (install): Depend on install-clearcap-map. (install-clearcap-map): New target. * doc/invoke.texi (Option Summary, Solaris 2 Options): Document -mclear-hwcap. gcc/testsuite: * lib/clearcap.exp: New file. * gcc.dg/vect/vect.exp: Load clearcap.exp. Remove clearcap_ldflags handling. Call clearcap-init, clearcap-finish. * gcc.target/i386/i386.exp: Likewise. * gcc.target/i386/clearcap.map: Move to ../config/sol2-clearcap.map. * gcc.target/i386/clearcapv2.map: Move to ../config/sol2-clearcapv2.map. * gcc.target/x86_64/abi/avx/abi-avx.exp: Likewise. * gcc.target/x86_64/abi/avx512f/abi-avx512f.exp: Likewise. libitm: * acinclude.m4 (LIBITM_CHECK_LINKER_HWCAP): Check for -mclear-hwcap instead. * configure: Regenerate. * clearcap.map: Remove. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@211015 138bc75d-0d04-0410-961f-82ee72b054a4
* gcc/bergner2014-05-221-0/+14
| | | | | | | | | | * config/rs6000/htm.md (ttest): Use correct shift value to get CR0. gcc/testsuite/ * gcc.target/powerpc/htm-ttest.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@210817 138bc75d-0d04-0410-961f-82ee72b054a4
* gcc/bergner2014-05-131-1/+1
| | | | | | | | | | | | | | | | | | | | * doc/sourcebuild.texi: (dfp_hw): Document. (p8vector_hw): Likewise. (powerpc_eabi_ok): Likewise. (powerpc_elfv2): Likewise. (powerpc_htm_ok): Likewise. (ppc_recip_hw): Likewise. (vsx_hw): Likewise. gcc/testsuite/ * lib/target-support.exp (check_dfp_hw_available): New function. (is-effective-target): Check $arg for dfp_hw. (is-effective-target-keyword): Likewise. * gcc.target/powerpc/pack03.c: (dg-require-effective-target): Change target to dfp_hw. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@210405 138bc75d-0d04-0410-961f-82ee72b054a4
* PR tree-optimization/60902law2014-05-131-0/+32
| | | | | | | | | | | | * tree-ssa-threadedge.c (record_temporary_equivalences_from_stmts_at_dest): Make sure to invalidate outputs from statements that do not produce useful outputs for threading. PR tree-optimization/60902 * gcc.target/i386/pr60902.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@210398 138bc75d-0d04-0410-961f-82ee72b054a4
* Backport from mainlinedenisc2014-05-121-0/+21
| | | | | | | | | | | | | | | | | | | 2014-05-12 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com> PR target/60991 * config/avr/avr.c (avr_out_store_psi): Use correct constant to restore Y. Backport from mainline 2014-05-12 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com> PR target/60991 * gcc.target/avr/pr60991.c: New testcase. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@210327 138bc75d-0d04-0410-961f-82ee72b054a4
* gcc/config/avrgjl2014-05-091-0/+88
| | | | | | | | | | | | | | | | | | | | | Backport from 2014-05-09 trunk r210267 PR target/61055 * config/avr/avr.md (cc): Add new attribute set_vzn. (addqi3, addqq3, adduqq3, subqi3, subqq3, subuqq3, negqi2) [cc]: Set cc insn attribute to set_vzn instead of set_zn for alternatives with INC, DEC or NEG. * config/avr/avr.c (avr_notice_update_cc): Handle SET_VZN. (avr_out_plus_1): ADIW sets cc0 to CC_SET_CZN. INC, DEC and ADD+ADC set cc0 to CC_CLOBBER. gcc/testsuite/ Backport from 2014-05-09 trunk r210267 PR target/61055 * gcc.target/avr/torture/pr61055.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@210268 138bc75d-0d04-0410-961f-82ee72b054a4
* gcc/bergner2014-05-052-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | * config/rs6000/rs6000.h (RS6000_BTM_HARD_FLOAT): New define. (RS6000_BTM_COMMON): Add RS6000_BTM_HARD_FLOAT. (TARGET_EXTRA_BUILTINS): Add TARGET_HARD_FLOAT. * config/rs6000/rs6000-builtin.def (BU_MISC_1): Use RS6000_BTM_HARD_FLOAT. (BU_MISC_2): Likewise. * config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Handle RS6000_BTM_HARD_FLOAT. (rs6000_option_override_internal): Enforce -mhard-float if -mhard-dfp is explicitly used. (rs6000_invalid_builtin): Add hard floating builtin support. (rs6000_expand_builtin): Relax the gcc_assert to allow the new hard float builtins. (rs6000_builtin_mask_names): Add RS6000_BTM_HARD_FLOAT. gcc/testsuite/ * gcc.target/powerpc/pack02.c (dg-options): Add -mhard-float. (dg-require-effective-target): Change target to powerpc_fprs. * gcc.target/powerpc/pack03.c (dg-options): Add -mhard-dfp. (dg-require-effective-target): Change target to dfprt. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@210055 138bc75d-0d04-0410-961f-82ee72b054a4
* [gcc]meissner2014-04-3010-0/+692
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2014-04-30 Michael Meissner <meissner@linux.vnet.ibm.com> Back port from mainline 2014-04-24 Michael Meissner <meissner@linux.vnet.ibm.com> * doc/extend.texi (PowerPC Built-in Functions): Document new powerpc extended divide, bcd, pack/unpack 128-bit, builtin functions. (PowerPC AltiVec/VSX Built-in Functions): Likewise. * config/rs6000/predicates.md (const_0_to_3_operand): New predicate to match 0..3 integer constants. * config/rs6000/rs6000-builtin.def (BU_DFP_MISC_1): Add new macros to support adding miscellaneous builtin functions. (BU_DFP_MISC_2): Likewise. (BU_P7_MISC_1): Likewise. (BU_P7_MISC_2): Likewise. (BU_P8V_MISC_3): Likewise. (BU_MISC_1): Likewise. (BU_MISC_2): Likewise. (DIVWE): Add extended divide builtin functions. (DIVWEO): Likewise. (DIVWEU): Likewise. (DIVWEUO): Likewise. (DIVDE): Likewise. (DIVDEO): Likewise. (DIVDEU): Likewise. (DIVDEUO): Likewise. (DXEX): Add decimal floating-point builtin functions. (DXEXQ): Likewise. (DDEDPD): Likewise. (DDEDPDQ): Likewise. (DENBCD): Likewise. (DENBCDQ): Likewise. (DIEX): Likewise. (DIEXQ): Likewise. (DSCLI): Likewise. (DSCLIQ): Likewise. (DSCRI): Likewise. (DSCRIQ): Likewise. (CDTBCD): Add new BCD builtin functions. (CBCDTD): Likewise. (ADDG6S): Likewise. (BCDADD): Likewise. (BCDADD_LT): Likewise. (BCDADD_EQ): Likewise. (BCDADD_GT): Likewise. (BCDADD_OV): Likewise. (BCDSUB): Likewise. (BCDSUB_LT): Likewise. (BCDSUB_EQ): Likewise. (BCDSUB_GT): Likewise. (BCDSUB_OV): Likewise. (PACK_TD): Add new pack/unpack 128-bit type builtin functions. (UNPACK_TD): Likewise. (PACK_TF): Likewise. (UNPACK_TF): Likewise. (UNPACK_TF_0): Likewise. (UNPACK_TF_1): Likewise. (PACK_V1TI): Likewise. (UNPACK_V1TI): Likewise. * config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Add support for decimal floating point builtin functions. (rs6000_expand_ternop_builtin): Add checks for the new builtin functions that take constant arguments. (rs6000_invalid_builtin): Add decimal floating point builtin support. (rs6000_init_builtins): Setup long double, _Decimal64, and _Decimal128 types for new builtin functions. (builtin_function_type): Set the unsigned flags appropriately for the new builtin functions. (rs6000_opt_masks): Add support for decimal floating point builtin functions. * config/rs6000/rs6000.h (RS6000_BTM_DFP): Add support for decimal floating point builtin functions. (RS6000_BTM_COMMON): Likewise. (RS6000_BTI_long_double): Likewise. (RS6000_BTI_dfloat64): Likewise. (RS6000_BTI_dfloat128): Likewise. (long_double_type_internal_node): Likewise. (dfloat64_type_internal_node): Likewise. (dfloat128_type_internal_node): Likewise. * config/rs6000/altivec.h (UNSPEC_BCDADD): Add support for ISA 2.07 bcd arithmetic instructions. (UNSPEC_BCDSUB): Likewise. (UNSPEC_BCD_OVERFLOW): Likewise. (UNSPEC_BCD_ADD_SUB): Likewise. (bcd_add_sub): Likewise. (BCD_TEST): Likewise. (bcd<bcd_add_sub>): Likewise. (bcd<bcd_add_sub>_test): Likewise. (bcd<bcd_add_sub>_test2): Likewise. (bcd<bcd_add_sub>_<code>): Likewise. (peephole2 for combined bcd ops): Likewise. * config/rs6000/dfp.md (UNSPEC_DDEDPD): Add support for new decimal floating point builtin functions. (UNSPEC_DENBCD): Likewise. (UNSPEC_DXEX): Likewise. (UNSPEC_DIEX): Likewise. (UNSPEC_DSCLI): Likewise. (UNSPEC_DSCRI): Likewise. (D64_D128): Likewise. (dfp_suffix): Likewise. (dfp_ddedpd_<mode>): Likewise. (dfp_denbcd_<mode>): Likewise. (dfp_dxex_<mode>): Likewise. (dfp_diex_<mode>): Likewise. (dfp_dscli_<mode>): Likewise. (dfp_dscri_<mode>): Likewise. * config/rs6000/rs6000.md (UNSPEC_ADDG6S): Add support for new BCD builtin functions. (UNSPEC_CDTBCD): Likewise. (UNSPEC_CBCDTD): Likewise. (UNSPEC_DIVE): Add support for new extended divide builtin functions. (UNSPEC_DIVEO): Likewise. (UNSPEC_DIVEU): Likewise. (UNSPEC_DIVEUO): Likewise. (UNSPEC_UNPACK_128BIT): Add support for new builtin functions to pack/unpack 128-bit types. (UNSPEC_PACK_128BIT): Likewise. (idiv_ldiv): New mode attribute to set the 32/64-bit divide type. (udiv<mode>3): Use idiv_ldiv mode attribute. (div<mode>3): Likewise. (addg6s): Add new BCD builtin functions. (cdtbcd): Likewise. (cbcdtd): Likewise. (UNSPEC_DIV_EXTEND): Add support for new extended divide instructions. (div_extend): Likewise. (div<div_extend>_<mode>"): Likewise. (FP128_64): Add support for new builtin functions to pack/unpack 128-bit types. (unpack<mode>): Likewise. (unpacktf_0): Likewise. (unpacktf_1): Likewise. (unpack<mode>_dm): Likewise. (unpack<mode>_nodm): Likewise. (pack<mode>): Likewise. (unpackv1ti): Likewise. (packv1ti): Likewise. [gcc/testsuite] 2014-04-30 Michael Meissner <meissner@linux.vnet.ibm.com> Back port from mainline 2014-04-24 Michael Meissner <meissner@linux.vnet.ibm.com> * gcc.target/powerpc/pack01.c: New test to test the new pack and unpack builtin functionss for 128-bit types. * gcc.target/powerpc/pack02.c: Likewise. * gcc.target/powerpc/pack03.c: Likewise. * gcc.target/powerpc/extend-divide-1.c: New test to test extended divide builtin functionss. * gcc.target/powerpc/extend-divide-2.c: Likewise. * gcc.target/powerpc/bcd-1.c: New test for the new BCD builtin functions. * gcc.target/powerpc/bcd-2.c: Likewise. * gcc.target/powerpc/bcd-3.c: Likewise. * gcc.target/powerpc/dfp-builtin-1.c: New test for the new DFP builtin functionss. * gcc.target/powerpc/dfp-builtin-2.c: Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@209954 138bc75d-0d04-0410-961f-82ee72b054a4
* * config/rs6000/rs6000.md (addti3, subti3): New.pthaugen2014-04-292-0/+93
| | | | | | | | | * gcc.target/powerpc/ti_math1.c: New. * gcc.target/powerpc/ti_math2.c: New. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@209912 138bc75d-0d04-0410-961f-82ee72b054a4
* Backport from mainlineuros2014-04-232-0/+22
| | | | | | | | | | | | | | | | | | | | | | | 2014-04-21 Uros Bizjak <ubizjak@gmail.com> PR target/60909 * config/i386/i386.c (ix86_expand_builtin) <case IX86_BUILTIN_RDRAND{16,32,64}_STEP>: Use temporary register for target RTX. <case IX86_BUILTIN_RDSEED{16,32,64}_STEP>: Ditto. testsuite/ChangeLog: Backport from mainline 2014-04-21 Uros Bizjak <ubizjak@gmail.com> PR target/60909 * gcc.target/i386/pr60909-1.c: New test. * gcc.target/i386/pr60909-2.c: Ditto. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@209709 138bc75d-0d04-0410-961f-82ee72b054a4
* [gcc]meissner2014-04-221-0/+11
| | | | | | | | | | | | | | | | | | | | | | 2014-04-21 Michael Meissner <meissner@linux.vnet.ibm.com> PR target/60735 * config/rs6000/rs6000.md (mov<mode>_softfloat32, FMOVE64 case): If mode is DDmode and TARGET_E500_DOUBLE allow move. * config/rs6000/rs6000.c (rs6000_debug_reg_global): Print some more debug information for E500 if -mdebug=reg. [gcc/testsuite] 2014-04-21 Michael Meissner <meissner@linux.vnet.ibm.com> PR target/60735 * gcc.target/powerpc/pr60735.c: New test. Insure _Decimal64 does not cause errors if -mspe. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@209664 138bc75d-0d04-0410-961f-82ee72b054a4
* Use counter_mode on count_exp to get modehjl2014-04-221-0/+10
| | | | | | | | | | | | | | | | | | gcc/ Backport from mainline PR target/60868 * config/i386/i386.c (ix86_expand_set_or_movmem): Call counter_mode on count_exp to get mode. gcc/testsuite/ Backport from mainline PR target/60868 * gcc.target/i386/pr60868.c: New testcase. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@209651 138bc75d-0d04-0410-961f-82ee72b054a4
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