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* Backport from mainlinejanis2014-08-123-0/+3
| | | | | | | | | | | | | | | | | | | 2014-08-12 Janis Johnson <janisjo@codesourcery.com> * lib/target/supports.exp (check_effective_target_arm_v8_neon_ok_nocache): Check for armv8 or later. * gcc.dg/pr59418.c: Don't add ARM options for a Thumb1 multilib. * gcc.target/arm/neon-vext-execute.c: Skip if the test won't run on Neon hardware. * gcc.target/arm/pr48784.c: Skip for thumb1 multilib. * gcc.target/arm/pr59985.c: Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@213867 138bc75d-0d04-0410-961f-82ee72b054a4
* Backport from mainlinejanis2014-08-115-0/+5
| | | | | | | | | | | | | | | | | 2014-08-11 Janis Johnson <janisjo@codesourcery.com> * lib/target-supports.exp (check_effective_target_arm_thumb1_ok, check_effective_target_arm_thumb2_ok): Test with code that passes an argument and returns a result. * gcc.target/arm/frame-pointer-1.c: Skip if Thumb is not supported. * gcc.target/arm/pr56184.C: Likewise. * gcc.target/arm/pr59896.c: Likewise. * gcc.target/arm/stack-red-zone.c: Likewise. * gcc.target/arm/thumb-find-work-register.c: Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@213820 138bc75d-0d04-0410-961f-82ee72b054a4
* Backport r211369 from trunk.alalaw012014-07-091-11/+2
| | | | | | | | | | | | | | | | | | | | | 2014-06-09 Alan Lawrence <alan.lawrence@arm.com> PR/61062 Fix arm_neon.h ZIP/UZP/TRN for bigendian. * config/arm/arm_neon.h (vtrn_s8, vtrn_s16, vtrn_u8, vtrn_u16, vtrn_p8, vtrn_p16, vtrn_s32, vtrn_f32, vtrn_u32, vtrnq_s8, vtrnq_s16, vtrnq_s32, vtrnq_f32, vtrnq_u8, vtrnq_u16, vtrnq_u32, vtrnq_p8, vtrnq_p16, vzip_s8, vzip_s16, vzip_u8, vzip_u16, vzip_p8, vzip_p16, vzip_s32, vzip_f32, vzip_u32, vzipq_s8, vzipq_s16, vzipq_s32, vzipq_f32, vzipq_u8, vzipq_u16, vzipq_u32, vzipq_p8, vzipq_p16, vuzp_s8, vuzp_s16, vuzp_s32, vuzp_f32, vuzp_u8, vuzp_u16, vuzp_u32, vuzp_p8, vuzp_p16, vuzpq_s8, vuzpq_s16, vuzpq_s32, vuzpq_f32, vuzpq_u8, vuzpq_u16, vuzpq_u32, vuzpq_p8, vuzpq_p16): Correct mask for bigendian. * gcc.target/arm/pr48252.c (main): Expect same result as endian-neutral. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_9-branch@212391 138bc75d-0d04-0410-961f-82ee72b054a4
* PR rtl-optimization/60663jakub2014-04-111-0/+11
| | | | | | | | | | * cse.c (cse_insn): Set src_volatile on ASM_OPERANDS in PARALLEL. * gcc.target/arm/pr60663.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@209293 138bc75d-0d04-0410-961f-82ee72b054a4
* Fix testcase for PR target/60657ramana2014-04-071-1/+1
| | | | git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@209185 138bc75d-0d04-0410-961f-82ee72b054a4
* PR target/60657law2014-04-041-0/+13
| | | | | | | | | | | | | | | | * config/arm/predicates.md (const_int_I_operand): New predicate. (const_int_M_operand): Similarly. * config/arm/arm.md (insv_zero): Use const_int_M_operand instead of const_int_operand. (insv_t2, extv_reg, extzv_t2): Likewise. (load_multiple_with_writeback): Similarly for const_int_I_operand. (pop_multiple_with_writeback_and_return): Likewise. (vfp_pop_multiple_with_writeback): Likewise PR target/60657 * gcc.target/arm/pr60657.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@209085 138bc75d-0d04-0410-961f-82ee72b054a4
* 2014-04-02 Vladimir Makarov <vmakarov@redhat.com>vmakarov2014-04-021-0/+37
| | | | | | | | | | | | | | | PR rtl-optimization/60650 * lra-constraints.c (process_alt_operands): Decrease reject for earlyclobber matching. 2014-04-02 Vladimir Makarov <vmakarov@redhat.com> PR rtl-optimization/60650 * gcc.target/arm/pr60650-2.c: New. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@209038 138bc75d-0d04-0410-961f-82ee72b054a4
* Adjust testcase for softfp cases.ramana2014-03-311-1/+3
| | | | | | | | | | | | | | | PR target/60650 2014-03-31 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> PR target/60650 * gcc.target/arm/pr60650.c: Adjust command line options. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@208961 138bc75d-0d04-0410-961f-82ee72b054a4
* 2014-03-27 Vladimir Makarov <vmakarov@redhat.com>vmakarov2014-03-271-0/+39
| | | | | | | | | | | | | | | | PR rtl-optimization/60650 * lra-asign.c (find_hard_regno_for, spill_for): Add parameter first_p. Use it. (find_spills_for): New. (assign_by_spills): Pass the new parameter to find_hard_regno_for. Spill all pseudos on the second iteration. 2014-03-27 Vladimir Makarov <vmakarov@redhat.com> PR rtl-optimization/60650 * gcc.target/arm/pr60650.c: New. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@208876 138bc75d-0d04-0410-961f-82ee72b054a4
* ChangeLog:zqchen2014-03-201-1/+1
| | | | | | | | | | | | | | | | 2014-03-20 Zhenqiang Chen <zhenqiang.chen@linaro.org> * config/arm/arm.c (arm_dwarf_register_span): Update the element number of parts. testsuite/ChangeLog: 2014-03-20 Zhenqiang Chen <zhenqiang.chen@linaro.org> * gcc.target/arm/neon-modes-3.c: Add "-g" option. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@208692 138bc75d-0d04-0410-961f-82ee72b054a4
* 2014-03-12 Christian Bruel <christian.bruel@st.com>chrbr2014-03-121-0/+12
| | | | | | | | | | | | PR target/60264 * config/arm/arm.c (arm_emit_vfp_multi_reg_pop): Emit a REG_CFA_DEF_CFA note. (arm_expand_epilogue_apcs_frame): call arm_add_cfa_adjust_cfa_note. (arm_unwind_emit): Allow REG_CFA_DEF_CFA. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@208511 138bc75d-0d04-0410-961f-82ee72b054a4
* 2014-02-28 Joey Ye <joey.ye@arm.com>jye22014-02-281-0/+108
| | | | | | | | | | | | PR target/PR60169 * config/arm/arm.c (thumb_far_jump_used_p): Don't change if reload in progress or completed. testsuite: * gcc.target/arm/thumb1-far-jump-3.c: New case. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@208217 138bc75d-0d04-0410-961f-82ee72b054a4
* Skip test if -mfloat-abi=hard specifiedibolton2014-02-141-1/+2
| | | | git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@207788 138bc75d-0d04-0410-961f-82ee72b054a4
* 2014-02-11 Renlin Li <Renlin.Li@arm.com>ktkachov2014-02-111-2/+3
| | | | | | | | | | | | | | gcc/ * doc/sourcebuild.texi: Document check_effective_target_arm_vfp3_ok and add_options_for_arm_vfp3. gcc/testsuite/ * gcc.target/arm/fixed_float_conversion.c: Add arm_vfp3 option. * lib/target-supports.exp (check_effective_target_arm_vfp3_ok): New. (add_options_for_arm_vfp3): New. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@207691 138bc75d-0d04-0410-961f-82ee72b054a4
* PR target/59575jakub2014-02-061-0/+15
| | | | | | | | | | | | | | | | * config/arm/arm.c (emit_multi_reg_push): Add dwarf_regs_mask argument, don't record in REG_FRAME_RELATED_EXPR registers not set in that bitmask. (arm_expand_prologue): Adjust all callers. (arm_unwind_emit_sequence): Allow saved, but not important for unwind info, registers also at the lowest numbered registers side. Use gcc_assert instead of abort, and SET_SRC/SET_DEST macros instead of XEXP. * gcc.target/arm/pr59575.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@207564 138bc75d-0d04-0410-961f-82ee72b054a4
* 2014-02-06 Yury Gribov <y.gribov@samsung.com>ygribov2014-02-061-0/+20
| | | | | | | | | | | | | | | Kugan Vivekanandarajah <kuganv@linaro.org> gcc/ * config/arm/arm.c (arm_vector_alignment_reachable): Check unaligned_access. * config/arm/arm.c (arm_builtin_support_vector_misalignment): Likewise. testsuite/ * gcc.target/arm/vect-noalign.c: New file. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@207533 138bc75d-0d04-0410-961f-82ee72b054a4
* * gcc.target/arm/ftest-armv7a-thumb.c: Change aramv7-a to armv7-a.ktkachov2014-02-041-1/+1
| | | | git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@207457 138bc75d-0d04-0410-961f-82ee72b054a4
* 2014-01-31 Vladimir Makarov <vmakarov@redhat.com>vmakarov2014-01-311-0/+68
| | | | | | | | | | | | | | | PR bootstrap/59985 * lra-constraints.c (process_alt_operands): Update reload_sum only on the first pass. 2014-01-31 Vladimir Makarov <vmakarov@redhat.com> PR bootstrap/59985 * gcc.target/arm/pr59985.C: New. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@207375 138bc75d-0d04-0410-961f-82ee72b054a4
* PR target/59923jakub2014-01-301-0/+24
| | | | | | | | | | * ifcvt.c (cond_exec_process_insns): Don't conditionalize frame related instructions. * gcc.target/arm/pr59923.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@207324 138bc75d-0d04-0410-961f-82ee72b054a4
* [ARM] Add -march=armv7vektkachov2014-01-292-0/+80
| | | | | | | | | | | | | | | | | | | | | | | | gcc/ 2014-01-29 Renlin Li <Renlin.Li@arm.com> * config/arm/arm-arches.def (ARM_ARCH): Add armv7ve arch. * config/arm/arm.c (FL_FOR_ARCH7VE): New. (arm_file_start): Generate correct asm header for armv7ve. * config/arm/bpabi.h: Add multilib support for armv7ve. * config/arm/driver-arm.c: Change the architectures of cortex-a7 and cortex-a15 to armv7ve. * config/arm/t-aprofile: Add multilib support for armv7ve. * doc/invoke.texi: Document -march=armv7ve. gcc/testsuite/ 2014-01-29 Renlin Li <Renlin.Li@arm.com> * gcc.target/arm/ftest-armv7ve-arm.c: New. * gcc.target/arm/ftest-armv7ve-thumb.c: New. * lib/target-supports.exp: New armfunc, armflag and armdef for armv7ve. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@207237 138bc75d-0d04-0410-961f-82ee72b054a4
* * gcc.target/arm/thumb-cbranchqi.c: Accept bls also.kazu2014-01-281-1/+1
| | | | git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@207199 138bc75d-0d04-0410-961f-82ee72b054a4
* 2014-01-21 Vladimir Makarov <vmakarov@redhat.com>vmakarov2014-01-211-0/+1374
| | | | | | | | | | | | | | | PR rtl-optimization/59896 * lra-constraints.c (process_alt_operands): Check unused note for matched operands of insn with no output reloads. 2014-01-21 Vladimir Makarov <vmakarov@redhat.com> PR rtl-optimization/59896 * gcc.target/arm/pr59896.c: New. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@206908 138bc75d-0d04-0410-961f-82ee72b054a4
* 2014-01-21 Vladimir Makarov <vmakarov@redhat.com>vmakarov2014-01-211-0/+162
| | | | | | | | | | | | | | | | PR rtl-optimization/59858 * lra-constraints.c (SMALL_REGISTER_CLASS_P): Use ira_class_hard_regs_num. (process_alt_operands): Increase reject for dying matched operand. 2014-01-21 Vladimir Makarov <vmakarov@redhat.com> PR rtl-optimization/59858 * gcc.target/arm/pr59858.c: New. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@206897 138bc75d-0d04-0410-961f-82ee72b054a4
* ChangeLog:zqchen2014-01-171-0/+20
| | | | | | | | | | | | | | | 2014-01-17 Zhenqiang Chen <zhenqiang.chen@arm.com> * config/arm/arm.c (arm_v7m_tune): Set max_insns_skipped to 2. (thumb2_final_prescan_insn): Set max to MAX_INSN_PER_IT_BLOCK. testsuite/ChangeLog: 2014-01-17 Zhenqiang Chen <zhenqiang.chen@arm.com> * gcc.target/arm/its.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@206698 138bc75d-0d04-0410-961f-82ee72b054a4
* * gcc.target/arm/neon-nested-apcs.c: Tweak dg directives.ebotcazou2014-01-101-1/+2
| | | | git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@206532 138bc75d-0d04-0410-961f-82ee72b054a4
* gcc/yufeng2014-01-071-0/+25
| | | | | | | | | | | | | * config/arm/arm.c (arm_expand_neon_args): Call expand_expr with EXPAND_MEMORY for NEON_ARG_MEMORY; check if the returned rtx is const0_rtx or not. gcc/testsuite/ * gcc.target/arm/neon/vst1Q_laneu64-1.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@206395 138bc75d-0d04-0410-961f-82ee72b054a4
* * config/arm/arm.c (arm_get_frame_offsets): Revamp long lines.ebotcazou2014-01-041-0/+47
| | | | | | | | | (arm_expand_epilogue_apcs_frame): Take into account the number of bytes used to save the static chain register in the computation of the offset from which the FP registers need to be restored. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@206337 138bc75d-0d04-0410-961f-82ee72b054a4
* Update copyright years in gcc/rsandifo2014-01-024-4/+4
| | | | git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@206289 138bc75d-0d04-0410-961f-82ee72b054a4
* gcc/yufeng2013-12-241-0/+19
| | | | | | | | | | | | | | | | | | | | | 2013-12-24 Renlin Li <Renlin.Li@arm.com> * config/arm/arm-protos.h (vfp_const_double_for_bits): Declare. * config/arm/constraints.md (Dp): Define new constraint. * config/arm/predicates.md (const_double_vcvt_power_of_two): Define new predicate. * config/arm/arm.c (arm_print_operand): Add print for new fucntion. (vfp3_const_double_for_bits): New function. * config/arm/vfp.md (combine_vcvtf2i): Define new instruction. gcc/testsuite/ 2013-12-24 Renlin Li <Renlin.Li@arm.com> * gcc.target/arm/fixed_float_conversion.c: New test case. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@206195 138bc75d-0d04-0410-961f-82ee72b054a4
* * config/arm/arm.c (arm_expand_prologue): In a nested APCS frame withebotcazou2013-12-201-0/+34
| | | | | | | | arguments to push onto the stack and no varargs, save ip into the last stack slot if r3 isn't available on entry. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@206154 138bc75d-0d04-0410-961f-82ee72b054a4
* [gcc/]ktkachov2013-12-202-0/+76
| | | | | | | | | | | | | | | | | | | 2013-12-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * config/arm/neon.ml (crypto_intrinsics): Add vceq_64 and vtst_p64. * config/arm/arm_neon.h: Regenerate. * config/arm/neon-docgen.ml: Add vceq_p64 and vtst_p64. * doc/arm-neon-intrinsics.texi: Regenerate. [gcc/testsuite/] 2013-12-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * gcc.target/arm/neon-vceq_p64.c: New test. * gcc.target/arm/neon-vtst_p64.c: Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@206151 138bc75d-0d04-0410-961f-82ee72b054a4
* [gcc/]ktkachov2013-12-19121-0/+2299
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2013-12-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * config/arm/neon-testgen.ml (effective_target): Handle "CRYPTO". [gcc/testsuite] 2013-12-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * lib/target-supports.exp (check_effective_target_arm_crypto_ok): New procedure. (add_options_for_arm_crypto): Likewise. * gcc.target/arm/crypto-vaesdq_u8.c: New test. * gcc.target/arm/crypto-vaeseq_u8.c: Likewise. * gcc.target/arm/crypto-vaesimcq_u8.c: Likewise. * gcc.target/arm/crypto-vaesmcq_u8.c: Likewise. * gcc.target/arm/crypto-vldrq_p128.c: Likewise. * gcc.target/arm/crypto-vmull_high_p64.c: Likewise. * gcc.target/arm/crypto-vmullp64.c: Likewise. * gcc.target/arm/crypto-vsha1cq_u32.c: Likewise. * gcc.target/arm/crypto-vsha1h_u32.c: Likewise. * gcc.target/arm/crypto-vsha1mq_u32.c: Likewise. * gcc.target/arm/crypto-vsha1pq_u32.c: Likewise. * gcc.target/arm/crypto-vsha1su0q_u32.c: Likewise. * gcc.target/arm/crypto-vsha1su1q_u32.c: Likewise. * gcc.target/arm/crypto-vsha256h2q_u32.c: Likewise. * gcc.target/arm/crypto-vsha256hq_u32.c: Likewise. * gcc.target/arm/crypto-vsha256su0q_u32.c: Likewise. * gcc.target/arm/crypto-vsha256su1q_u32.c: Likewise. * gcc.target/arm/crypto-vstrq_p128.c: Likewise. * gcc.target/arm/neon/vbslQp64: Generate. * gcc.target/arm/neon/vbslp64: Likewise. * gcc.target/arm/neon/vcombinep64: Likewise. * gcc.target/arm/neon/vcreatep64: Likewise. * gcc.target/arm/neon/vdupQ_lanep64: Likewise. * gcc.target/arm/neon/vdupQ_np64: Likewise. * gcc.target/arm/neon/vdup_lanep64: Likewise. * gcc.target/arm/neon/vdup_np64: Likewise. * gcc.target/arm/neon/vextQp64: Likewise. * gcc.target/arm/neon/vextp64: Likewise. * gcc.target/arm/neon/vget_highp64: Likewise. * gcc.target/arm/neon/vget_lowp64: Likewise. * gcc.target/arm/neon/vld1Q_dupp64: Likewise. * gcc.target/arm/neon/vld1Q_lanep64: Likewise. * gcc.target/arm/neon/vld1Qp64: Likewise. * gcc.target/arm/neon/vld1_dupp64: Likewise. * gcc.target/arm/neon/vld1_lanep64: Likewise. * gcc.target/arm/neon/vld1p64: Likewise. * gcc.target/arm/neon/vld2_dupp64: Likewise. * gcc.target/arm/neon/vld2p64: Likewise. * gcc.target/arm/neon/vld3_dupp64: Likewise. * gcc.target/arm/neon/vld3p64: Likewise. * gcc.target/arm/neon/vld4_dupp64: Likewise. * gcc.target/arm/neon/vld4p64: Likewise. * gcc.target/arm/neon/vreinterpretQf32_p128: Likewise. * gcc.target/arm/neon/vreinterpretQf32_p64: Likewise. * gcc.target/arm/neon/vreinterpretQp128_f32: Likewise. * gcc.target/arm/neon/vreinterpretQp128_p16: Likewise. * gcc.target/arm/neon/vreinterpretQp128_p64: Likewise. * gcc.target/arm/neon/vreinterpretQp128_p8: Likewise. * gcc.target/arm/neon/vreinterpretQp128_s16: Likewise. * gcc.target/arm/neon/vreinterpretQp128_s32: Likewise. * gcc.target/arm/neon/vreinterpretQp128_s64: Likewise. * gcc.target/arm/neon/vreinterpretQp128_s8: Likewise. * gcc.target/arm/neon/vreinterpretQp128_u16: Likewise. * gcc.target/arm/neon/vreinterpretQp128_u32: Likewise. * gcc.target/arm/neon/vreinterpretQp128_u64: Likewise. * gcc.target/arm/neon/vreinterpretQp128_u8: Likewise. * gcc.target/arm/neon/vreinterpretQp16_p128: Likewise. * gcc.target/arm/neon/vreinterpretQp16_p64: Likewise. * gcc.target/arm/neon/vreinterpretQp64_f32: Likewise. * gcc.target/arm/neon/vreinterpretQp64_p128: Likewise. * gcc.target/arm/neon/vreinterpretQp64_p16: Likewise. * gcc.target/arm/neon/vreinterpretQp64_p8: Likewise. * gcc.target/arm/neon/vreinterpretQp64_s16: Likewise. * gcc.target/arm/neon/vreinterpretQp64_s32: Likewise. * gcc.target/arm/neon/vreinterpretQp64_s64: Likewise. * gcc.target/arm/neon/vreinterpretQp64_s8: Likewise. * gcc.target/arm/neon/vreinterpretQp64_u16: Likewise. * gcc.target/arm/neon/vreinterpretQp64_u32: Likewise. * gcc.target/arm/neon/vreinterpretQp64_u64: Likewise. * gcc.target/arm/neon/vreinterpretQp64_u8: Likewise. * gcc.target/arm/neon/vreinterpretQp8_p128: Likewise. * gcc.target/arm/neon/vreinterpretQp8_p64: Likewise. * gcc.target/arm/neon/vreinterpretQs16_p128: Likewise. * gcc.target/arm/neon/vreinterpretQs16_p64: Likewise. * gcc.target/arm/neon/vreinterpretQs32_p128: Likewise. * gcc.target/arm/neon/vreinterpretQs32_p64: Likewise. * gcc.target/arm/neon/vreinterpretQs64_p128: Likewise. * gcc.target/arm/neon/vreinterpretQs64_p64: Likewise. * gcc.target/arm/neon/vreinterpretQs8_p128: Likewise. * gcc.target/arm/neon/vreinterpretQs8_p64: Likewise. * gcc.target/arm/neon/vreinterpretQu16_p128: Likewise. * gcc.target/arm/neon/vreinterpretQu16_p64: Likewise. * gcc.target/arm/neon/vreinterpretQu32_p128: Likewise. * gcc.target/arm/neon/vreinterpretQu32_p64: Likewise. * gcc.target/arm/neon/vreinterpretQu64_p128: Likewise. * gcc.target/arm/neon/vreinterpretQu64_p64: Likewise. * gcc.target/arm/neon/vreinterpretQu8_p128: Likewise. * gcc.target/arm/neon/vreinterpretQu8_p64: Likewise. * gcc.target/arm/neon/vreinterpretf32_p64: Likewise. * gcc.target/arm/neon/vreinterpretp16_p64: Likewise. * gcc.target/arm/neon/vreinterpretp64_f32: Likewise. * gcc.target/arm/neon/vreinterpretp64_p16: Likewise. * gcc.target/arm/neon/vreinterpretp64_p8: Likewise. * gcc.target/arm/neon/vreinterpretp64_s16: Likewise. * gcc.target/arm/neon/vreinterpretp64_s32: Likewise. * gcc.target/arm/neon/vreinterpretp64_s64: Likewise. * gcc.target/arm/neon/vreinterpretp64_s8: Likewise. * gcc.target/arm/neon/vreinterpretp64_u16: Likewise. * gcc.target/arm/neon/vreinterpretp64_u32: Likewise. * gcc.target/arm/neon/vreinterpretp64_u64: Likewise. * gcc.target/arm/neon/vreinterpretp64_u8: Likewise. * gcc.target/arm/neon/vreinterpretp8_p64: Likewise. * gcc.target/arm/neon/vreinterprets16_p64: Likewise. * gcc.target/arm/neon/vreinterprets32_p64: Likewise. * gcc.target/arm/neon/vreinterprets64_p64: Likewise. * gcc.target/arm/neon/vreinterprets8_p64: Likewise. * gcc.target/arm/neon/vreinterpretu16_p64: Likewise. * gcc.target/arm/neon/vreinterpretu32_p64: Likewise. * gcc.target/arm/neon/vreinterpretu64_p64: Likewise. * gcc.target/arm/neon/vreinterpretu8_p64: Likewise. * gcc.target/arm/neon/vsliQ_np64: Likewise. * gcc.target/arm/neon/vsli_np64: Likewise. * gcc.target/arm/neon/vsriQ_np64: Likewise. * gcc.target/arm/neon/vsri_np64: Likewise. * gcc.target/arm/neon/vst1Q_lanep64: Likewise. * gcc.target/arm/neon/vst1Qp64: Likewise. * gcc.target/arm/neon/vst1_lanep64: Likewise. * gcc.target/arm/neon/vst1p64: Likewise. * gcc.target/arm/neon/vst2p64: Likewise. * gcc.target/arm/neon/vst3p64: Likewise. * gcc.target/arm/neon/vst4p64: Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@206131 138bc75d-0d04-0410-961f-82ee72b054a4
* [gcc/]ktkachov2013-12-199-0/+195
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2013-12-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * Makefile.in (TEXI_GCC_FILES): Add arm-acle-intrinsics.texi. * config.gcc (extra_headers): Add arm_acle.h. * config/arm/arm.c (FL_CRC32): Define. (arm_have_crc): Likewise. (arm_option_override): Set arm_have_crc. (arm_builtins): Add CRC32 builtins. (bdesc_2arg): Likewise. (arm_init_crc32_builtins): New function. (arm_init_builtins): Initialise CRC32 builtins. (arm_file_start): Handle architecture extensions. * config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Define __ARM_FEATURE_CRC32. Define __ARM_32BIT_STATE. (TARGET_CRC32): Define. * config/arm/arm-arches.def: Add armv8-a+crc. * config/arm/arm-tables.opt: Regenerate. * config/arm/arm.md (type): Add crc. (<crc_variant>): New insn. * config/arm/arm_acle.h: New file. * config/arm/iterators.md (CRC): New int iterator. (crc_variant, crc_mode): New int attributes. * confg/arm/unspecs.md (UNSPEC_CRC32B, UNSPEC_CRC32H, UNSPEC_CRC32W, UNSPEC_CRC32CB, UNSPEC_CRC32CH, UNSPEC_CRC32CW): New unspecs. * doc/invoke.texi: Document -march=armv8-a+crc option. * doc/extend.texi: Document ACLE intrinsics. [gcc/testsuite/] 2013-12-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * lib/target-supports.exp (add_options_for_arm_crc): New procedure. (check_effective_target_arm_crc_ok_nocache): Likewise. (check_effective_target_arm_crc_ok): Likewise. * gcc.target/arm/acle/: New directory. * gcc.target/arm/acle/acle.exp: New. * gcc.target/arm/acle/crc32b.c: New test. * gcc.target/arm/acle/crc32h.c: Likewise. * gcc.target/arm/acle/crc32w.c: Likewise. * gcc.target/arm/acle/crc32d.c: Likewise. * gcc.target/arm/acle/crc32cb.c: Likewise. * gcc.target/arm/acle/crc32ch.c: Likewise. * gcc.target/arm/acle/crc32cw.c: Likewise. * gcc.target/arm/acle/crc32cd.c: Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@206128 138bc75d-0d04-0410-961f-82ee72b054a4
* PR rtl-optimization/54300rearnsha2013-12-091-0/+17
| | | | | | | | | | | | | | | | | gcc/ PR rtl-optimization/54300 * regcprop.c (copyprop_hardreg_forward_1): Ensure any unused outputs in a single-set are killed from the value chains. gcc/testsuite: PR rtl-optimization/54300 * gcc.target/arm/pr54300.C: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@205807 138bc75d-0d04-0410-961f-82ee72b054a4
* [ARM] Add __builtin_trap support for A32ibolton2013-12-062-0/+21
| | | | git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@205749 138bc75d-0d04-0410-961f-82ee72b054a4
* testsuite/ChangeLog:zqchen2013-11-291-1/+1
| | | | | | | | | 2013-11-29 Zhenqiang Chen <zhenqiang.chen@linaro.org> * gcc.target/arm/lp1243022.c: Skip target arm-neon. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@205509 138bc75d-0d04-0410-961f-82ee72b054a4
* [gcc/]ktkachov2013-11-281-0/+15
| | | | | | | | | | | | | | | | | 2013-11-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * config/arm/iterators.md (vrint_conds): New int attribute. * config/arm/vfp.md (<vrint_pattern><SDF:mode>2): Set conds attribute. (smax<mode>3): Likewise. (smin<mode>3): Likewise. [gcc/testsuite/] 2013-11-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * gcc.target/arm/vrinta-ce.c: New testcase. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@205492 138bc75d-0d04-0410-961f-82ee72b054a4
* gcc/yufeng2013-11-261-0/+14
| | | | | | | | | | | | * config/arm/arm.c (arm_legitimize_address): Check xop1 is not a constant immediate before force_reg. gcc/testsuite/ * gcc.target/arm/20131120.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@205397 138bc75d-0d04-0410-961f-82ee72b054a4
* [gcc/]ktkachov2013-11-261-2/+2
| | | | | | | | | | | | | | | | | | 2013-11-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com> PR target/59290 * config/arm/arm.md (*zextendsidi_negsi): New pattern. * config/arm/arm.c (arm_new_rtx_costs): Initialise cost correctly for zero_extend case. [gcc/testsuite/] 2013-11-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com> PR target/59290 * gcc.target/arm/negdi-2.c: Scan more general register names. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@205394 138bc75d-0d04-0410-961f-82ee72b054a4
* gcc/ChangeLogxguo2013-11-262-0/+22
| | | | | | | | | | | | | | | | | | 2013-11-26 Terry Guo <terry.guo@arm.com> * config/arm/arm.c (require_pic_register): Handle high pic base register for thumb-1. (arm_load_pic_register): Also initialize high pic base register. * doc/invoke.texi: Update documentation for option -mpic-register. gcc/testsuite/ChangeLog 2013-11-26 Terry Guo <terry.guo@arm.com> * gcc.target/arm/thumb1-pic-high-reg.c: New case. * gcc.target/arm/thumb1-pic-single-base.c: New case. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@205391 138bc75d-0d04-0410-961f-82ee72b054a4
* gcc/ChangeLogxguo2013-11-251-0/+74
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | 2013-11-25 Terry Guo <terry.guo@arm.com> * doc/invoke.texi (-mslow-flash-data): Document new option. * config/arm/arm.opt (mslow-flash-data): New option. * config/arm/arm-protos.h (arm_max_const_double_inline_cost): Declare it. * config/arm/arm.h (TARGET_USE_MOVT): Always true when literal pools are disabled. (arm_disable_literal_pool): Declare it. * config/arm/arm.c (arm_disable_literal_pool): New variable. (arm_option_override): Handle new option. (thumb2_legitimate_address_p): Don't allow symbol references when literal pools are disabled. (arm_max_const_double_inline_cost): New function. * config/arm/arm.md (types.md): Include it before ... (use_literal_pool): New attribute. (enabled): Use new attribute. (split pattern): Replace symbol+offset with MOVW/MOVT. gcc/testsuite/ChangeLog 2013-11-25 Terry Guo <terry.guo@arm.com> * gcc.target/arm/thumb2-slow-flash-data.c: New. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@205342 138bc75d-0d04-0410-961f-82ee72b054a4
* PR target/59216rearnsha2013-11-221-16/+0
| | | | | | | | | | | | gcc/ * arm.md (negdi_extendsidi): Fix invalid split. gcc/testsuite/ * gcc.target/arm/negdi-4.c: Delete invalid test. * gcc.dg/torture/pr59216.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@205271 138bc75d-0d04-0410-961f-82ee72b054a4
* PR rtl-optimization/54300rearnsha2013-11-201-0/+61
| | | | | | | | | | | | | | | | | gcc/ PR rtl-optimization/54300 * regcprop.c (copyprop_hardreg_forward_1): Ensure any unused outputs in a single-set are killed from the value chains. gcc/testsuite: PR rtl-optimization/54300 * gcc.target/arm/pr54300.C: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@205117 138bc75d-0d04-0410-961f-82ee72b054a4
* 2013-11-03 Kugan Vivekanandarajah <kuganv@linaro.org>clyon2013-11-033-3/+3
| | | | | | | | | | | | gcc/testsuite/ * gcc.target/arm/neon-vcond-gt.c: Scan for vbsl or vbit or vbif. * gcc.target/arm/neon-vcond-ltgt.c: Scan for vbsl or vbit or vbif. * gcc.target/arm/neon-vcond-unordered.c: Scan for vbsl or vbit or vbif. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@204336 138bc75d-0d04-0410-961f-82ee72b054a4
* gcc/ChangeLog:zqchen2013-10-311-0/+201
| | | | | | | | | | | | | | | 2013-10-31 Zhenqiang Chen <zhenqiang.chen@linaro.org> * lower-subreg.c (resolve_simple_move): Copy REG_INC note. gcc/testsuite/ChangeLog: 2013-10-31 Zhenqiang Chen <zhenqiang.chen@linaro.org> * gcc.target/arm/lp1243022.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@204247 138bc75d-0d04-0410-961f-82ee72b054a4
* 2013-10-30 Vladimir Makarov <vmakarov@redhat.com>vmakarov2013-10-301-0/+18
| | | | | | | | | | | | | | PR target/58784 * lra.c (check_rtl): Remove address check before LRA work. 2013-10-30 Vladimir Makarov <vmakarov@redhat.com> PR target/58784 * gcc.target/arm/pr58784.c: New. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@204215 138bc75d-0d04-0410-961f-82ee72b054a4
* Move require-pic-register-loc.c to correct directoryvries2013-10-281-0/+29
| | | | git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@204119 138bc75d-0d04-0410-961f-82ee72b054a4
* 2013-10-17 Charles Bayis <charles.baylis@linaro.org>clyon2013-10-171-1/+1
| | | | | | | | | | | | | | * gcc.dg/builtin-apply2.c: Skip test on arm hardfloat ABI targets. * gcc.dg/tls/pr42894.c: Remove dg-options for arm*-*-* targets. * gcc.target/arm/thumb-ltu.c: Remove dg-skip-if and require effective target arm_thumb1_ok. * lib/target-supports.exp (check_effective_target_arm_fp16_ok_nocache): Don't force -mfloat-abi=soft when building for hardfloat target. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203799 138bc75d-0d04-0410-961f-82ee72b054a4
* Add forgotten test case for r203059.clyon2013-10-021-0/+54
| | | | | | | | | | | | 2013-10-01 Kugan Vivekanandarajah <kuganv@linaro.org> gcc/testsuite PR target/58578 * gcc.target/arm/pr58578.c: New test. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203116 138bc75d-0d04-0410-961f-82ee72b054a4
* [gcc/testsuite/]ktkachov2013-09-241-0/+1
| | | | | | | | | | | 2013-09-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * lib/target-supports.exp (check_effective_target_arm_cond_exec): New procedure. * gcc.target/arm/minmax_minus.c: Check for cond_exec target. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@202872 138bc75d-0d04-0410-961f-82ee72b054a4
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