diff options
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/doc/install.texi | 2 | ||||
| -rw-r--r-- | gcc/doc/invoke.texi | 2 | ||||
| -rw-r--r-- | gcc/doc/tm.texi | 2 |
4 files changed, 9 insertions, 3 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f393bfa544c..4cf39f31324 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,11 @@ 2003-07-04 Kazu Hirata <kazu@cs.umass.edu> + * doc/install.texi: Fix typos. + * doc/invoke.texi: Likewise. + * doc/tm.texi: Likewise. + +2003-07-04 Kazu Hirata <kazu@cs.umass.edu> + * config/pa/fptr.c: Fix comment typos. * config/pa/pa-64.h: Likewise. * config/pa/pa.c: Likewise. diff --git a/gcc/doc/install.texi b/gcc/doc/install.texi index 8fe1b7129a1..620a19955e1 100644 --- a/gcc/doc/install.texi +++ b/gcc/doc/install.texi @@ -2111,7 +2111,7 @@ require GNU binutils 2.13 or newer. Such subtargets include: <hr /> @end html @heading @anchor{arm-*-coff}arm-*-coff -ARM-family processors. Note that there are two diffierent varieties +ARM-family processors. Note that there are two different varieties of PE format subtarget supported: @code{arm-wince-pe} and @code{arm-pe} as well as a standard COFF target @code{arm-*-coff}. diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index eb4b696ae0a..9518e0f54a5 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -3954,7 +3954,7 @@ sense when scheduling before register allocation, i.e.@: with @item -fsched2-use-superblocks @opindex fsched2-use-superblocks -When schedulilng after register allocation, do use superblock scheduling +When scheduling after register allocation, do use superblock scheduling algorithm. Superblock scheduling allows motion across basic block boundaries resulting on faster schedules. This option is experimental, as not all machine descriptions used by GCC model the CPU closely enough to avoid unreliable diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi index df61b0dfbdd..9fea987a04d 100644 --- a/gcc/doc/tm.texi +++ b/gcc/doc/tm.texi @@ -3256,7 +3256,7 @@ If this macro is not defined, it defaults to Define this macro if the target's representation for dwarf registers is different than the internal representation for unwind column. -Given a dwarf register, this macro should return the interal unwind +Given a dwarf register, this macro should return the internal unwind column number to use instead. See the PowerPC's SPE target for an example. |
