summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--gcc/ChangeLog5
-rw-r--r--gcc/config/arm/arm.c8
-rw-r--r--gcc/config/arm/arm.md12
3 files changed, 25 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 607cbb06b61..6443a1dbed5 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2007-01-10 Paul Brook <paul@codesourcery.com>
+
+ * config/arm/arm.c (arm_rtx_costs_1): Handle mutiply-subtract.
+ * config/arm/arm.md (mulsi3subsi): New insn.
+
2007-01-10 Zdenek Dvorak <dvorakz@suse.cz>
* tree-ssa-loop-manip.c (tree_unroll_loop): Make it a wrapper over ...
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 731dbe2af7d..20b8fd75f7b 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -4752,6 +4752,14 @@ arm_rtx_costs_1 (rtx x, enum rtx_code code, enum rtx_code outer)
? 0 : 4));
case MINUS:
+ if (GET_CODE (XEXP (x, 1)) == MULT && mode == SImode && arm_arch_thumb2)
+ {
+ extra_cost = rtx_cost (XEXP (x, 1), code);
+ if (!REG_OR_SUBREG_REG (XEXP (x, 0)))
+ extra_cost += 4 * ARM_NUM_REGS (mode);
+ return extra_cost;
+ }
+
if (mode == DImode)
return (4 + (REG_OR_SUBREG_REG (XEXP (x, 1)) ? 0 : 8)
+ ((REG_OR_SUBREG_REG (XEXP (x, 0))
diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 564c755a3a6..6d8f914c4cb 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -1294,6 +1294,18 @@
(set_attr "insn" "mlas")]
)
+(define_insn "*mulsi3subsi"
+ [(set (match_operand:SI 0 "s_register_operand" "=r")
+ (minus:SI
+ (match_operand:SI 3 "s_register_operand" "r")
+ (mult:SI (match_operand:SI 2 "s_register_operand" "r")
+ (match_operand:SI 1 "s_register_operand" "r"))))]
+ "TARGET_32BIT && arm_arch_thumb2"
+ "mls%?\\t%0, %2, %1, %3"
+ [(set_attr "insn" "mla")
+ (set_attr "predicable" "yes")]
+)
+
;; Unnamed template to match long long multiply-accumulate (smlal)
(define_insn "*mulsidi3adddi"
OpenPOWER on IntegriCloud