diff options
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/sparc/sparc.c | 3 | ||||
| -rw-r--r-- | gcc/config/sparc/sparc.h | 18 | ||||
| -rw-r--r-- | gcc/config/sparc/sparc.md | 6 |
4 files changed, 24 insertions, 10 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index d343813ef02..9510bdf2514 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2002-04-29 David S. Miller <davem@redhat.com> + + * config/sparc/sparc.h (BRANCH_COST, PREFETCH_BLOCK, + SIMULTANEOUS_PREFETCHES): Tune for UltraSPARC-III. + * config/sparc/sparc.md (call + jmp 32-bit peepholes): Likewise. + * config/sparc/sparc.c (sparc_initialize_trampoline): Likewise. + 2002-04-29 Franz Sirl <Franz.Sirl-kernel@lauterbach.com> * combine.c (find_split_point): Use gen_int_mode. diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c index 2f7633638bc..e564e4649bd 100644 --- a/gcc/config/sparc/sparc.c +++ b/gcc/config/sparc/sparc.c @@ -6439,7 +6439,8 @@ sparc_initialize_trampoline (tramp, fnaddr, cxt) /* On UltraSPARC a flush flushes an entire cache line. The trampoline is aligned on a 16 byte boundary so one flush clears it all. */ emit_insn (gen_flush (validize_mem (gen_rtx_MEM (SImode, tramp)))); - if (sparc_cpu != PROCESSOR_ULTRASPARC) + if (sparc_cpu != PROCESSOR_ULTRASPARC + && sparc_cpu != PROCESSOR_ULTRASPARC3) emit_insn (gen_flush (validize_mem (gen_rtx_MEM (SImode, plus_constant (tramp, 8))))); } diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h index 04dcbe3ab90..c86eb8ff21c 100644 --- a/gcc/config/sparc/sparc.h +++ b/gcc/config/sparc/sparc.h @@ -2642,14 +2642,14 @@ do { \ On v9 and later, which have branch prediction facilities, we set it to the depth of the pipeline as that is the cost of a - mispredicted branch. - - ??? Set to 9 when PROCESSOR_ULTRASPARC3 is added */ + mispredicted branch. */ #define BRANCH_COST \ ((sparc_cpu == PROCESSOR_V9 \ || sparc_cpu == PROCESSOR_ULTRASPARC) \ - ? 7 : 3) + ? 7 \ + : (sparc_cpu == PROCESSOR_ULTRASPARC3 \ + ? 9 : 3)) /* Provide the costs of a rtl expression. This is in the body of a switch on CODE. The purpose for the cost of MULT is to encourage @@ -2684,11 +2684,15 @@ do { \ return 19; #define PREFETCH_BLOCK \ - ((sparc_cpu == PROCESSOR_ULTRASPARC) ? 64 : 32) + ((sparc_cpu == PROCESSOR_ULTRASPARC \ + || sparc_cpu == PROCESSOR_ULTRASPARC3) \ + ? 64 : 32) -/* ??? UltraSPARC-III note: Can set this to 8 for ultra3. */ #define SIMULTANEOUS_PREFETCHES \ - ((sparc_cpu == PROCESSOR_ULTRASPARC) ? 2 : 3) + ((sparc_cpu == PROCESSOR_ULTRASPARC) \ + ? 2 \ + : (sparc_cpu == PROCESSOR_ULTRASPARC3 \ + ? 8 : 3)) /* Control the assembler format that we output. */ diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md index c6b280679d0..0932c84966a 100644 --- a/gcc/config/sparc/sparc.md +++ b/gcc/config/sparc/sparc.md @@ -9560,7 +9560,8 @@ (set (pc) (label_ref (match_operand 3 "" "")))] "short_branch (INSN_UID (insn), INSN_UID (operands[3])) && (USING_SJLJ_EXCEPTIONS || ! can_throw_internal (ins1)) - && sparc_cpu != PROCESSOR_ULTRASPARC" + && sparc_cpu != PROCESSOR_ULTRASPARC + && sparc_cpu != PROCESSOR_ULTRASPARC3" "call\\t%a1, %2\\n\\tadd\\t%%o7, (%l3-.-4), %%o7") (define_peephole @@ -9570,7 +9571,8 @@ (set (pc) (label_ref (match_operand 2 "" "")))] "short_branch (INSN_UID (insn), INSN_UID (operands[2])) && (USING_SJLJ_EXCEPTIONS || ! can_throw_internal (ins1)) - && sparc_cpu != PROCESSOR_ULTRASPARC" + && sparc_cpu != PROCESSOR_ULTRASPARC + && sparc_cpu != PROCESSOR_ULTRASPARC3" "call\\t%a0, %1\\n\\tadd\\t%%o7, (%l2-.-4), %%o7") ;; ??? UltraSPARC-III note: A memory operation loading into the floating point register |
