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| author | dorit <dorit@138bc75d-0d04-0410-961f-82ee72b054a4> | 2007-05-01 07:01:12 +0000 |
|---|---|---|
| committer | dorit <dorit@138bc75d-0d04-0410-961f-82ee72b054a4> | 2007-05-01 07:01:12 +0000 |
| commit | ffdcd206dba9bb9bf8f50ad1d4bad7ca17e075e8 (patch) | |
| tree | 36dee5c2df687a60df0938d130a1f5dd833c4fdf | |
| parent | c2c53ff9d0984b030bc1342c6dfc8db52ae8e4ac (diff) | |
| download | ppe42-gcc-ffdcd206dba9bb9bf8f50ad1d4bad7ca17e075e8.tar.gz ppe42-gcc-ffdcd206dba9bb9bf8f50ad1d4bad7ca17e075e8.zip | |
2007-05-01 Dorit Nuzman <dorit@il.ibm.com>
* gfortran.dg/vect/vect-5.f90: Fix dg-final test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@124316 138bc75d-0d04-0410-961f-82ee72b054a4
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gfortran.dg/vect/vect-5.f90 | 2 |
2 files changed, 6 insertions, 1 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 4d72cb536cd..617de905e50 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,5 +1,10 @@ 2007-05-01 Dorit Nuzman <dorit@il.ibm.com> + PR testsuite/31615 + * gfortran.dg/vect/vect-5.f90: Fix dg-final test. + +2007-05-01 Dorit Nuzman <dorit@il.ibm.com> + PR testsuite/31589 * gcc.dg/vect/vect-iv-9.c: Added vect_int_mult target keyword to dg-final test. diff --git a/gcc/testsuite/gfortran.dg/vect/vect-5.f90 b/gcc/testsuite/gfortran.dg/vect/vect-5.f90 index d657656ea1c..551172af8a7 100644 --- a/gcc/testsuite/gfortran.dg/vect/vect-5.f90 +++ b/gcc/testsuite/gfortran.dg/vect/vect-5.f90 @@ -38,7 +38,7 @@ ! { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" } } ! { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { xfail { vect_no_align } } } } ! { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail { vect_no_align } } } } -! { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 3 "vect" { target { ilp32 && vect_no_align } } } } +! { dg-final { scan-tree-dump-times "Alignment of access forced using versioning." 2 "vect" { target { ilp32 && vect_no_align } } } } ! We also expect to vectorize one loop for lp64 targets that support ! misaligned access: |
