* c4x.c (c4x_hard_regno_rename_ok): New.

	* c4x-protos.h (c4x_hard_regno_rename_ok): New.
	* c4x.h (HARD_REGNO_RENAME_OK): Define.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@39419 138bc75d-0d04-0410-961f-82ee72b054a4

4 files changed, 36 insertions, 0 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 4cfb125ba58..8a52bed3e8c 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2001-02-03  Herman A.J. ten Brugge <Haj.Ten.Brugge@net.HCC.nl>
+
+	* c4x.c (c4x_hard_regno_rename_ok): New.
+	* c4x-protos.h (c4x_hard_regno_rename_ok): New.
+	* c4x.h (HARD_REGNO_RENAME_OK): Define.
+
 Fri Feb  2 20:03:50 2001  Richard Kenner  <kenner@vlsi1.ultra.nyu.edu>
 
 	* diagnostic.h: Add missing "extern" in all declarations.
diff --git a/gcc/config/c4x/c4x-protos.h b/gcc/config/c4x/c4x-protos.h
index 9685f3915dc..6449aa72650 100644
--- a/gcc/config/c4x/c4x-protos.h
+++ b/gcc/config/c4x/c4x-protos.h
@@ -88,6 +88,8 @@ extern int c4x_check_legit_addr PARAMS ((enum machine_mode, rtx, int));
 
 extern int c4x_hard_regno_mode_ok PARAMS ((unsigned int, enum machine_mode));
 
+extern int c4x_hard_regno_rename_ok PARAMS ((unsigned int, unsigned int));
+
 extern struct rtx_def *c4x_legitimize_address PARAMS ((rtx,
 						       enum machine_mode));
 
diff --git a/gcc/config/c4x/c4x.c b/gcc/config/c4x/c4x.c
index 36c0bb61249..a52d3508611 100644
--- a/gcc/config/c4x/c4x.c
+++ b/gcc/config/c4x/c4x.c
@@ -429,6 +429,29 @@ c4x_hard_regno_mode_ok (regno, mode)
   return 0;
 }
 
+/* Return non-zero if REGNO1 can be renamed to REGNO2.  */
+int
+c4x_hard_regno_rename_ok (regno1, regno2)
+     unsigned int regno1;
+     unsigned int regno2;
+{
+  /* We can not copy call saved registers from mode QI into QF or from
+     mode QF into QI.  */
+  if ((regno1 == R6_REGNO || regno1 == R7_REGNO)
+      && (regno2 == R4_REGNO || regno2 == R5_REGNO || regno2 == R8_REGNO))
+    return 0;
+  if ((regno1 == R4_REGNO || regno1 == R5_REGNO || regno1 == R8_REGNO)
+      && (regno2 == R6_REGNO || regno2 == R7_REGNO))
+    return 0;
+  /* We cannot copy from an extended (40 bit) register to a standard
+     (32 bit) register because we only set the condition codes for
+     extended registers.  */
+  if (IS_EXT_REGNO (regno1) && ! IS_EXT_REGNO (regno2))
+    return 0;
+  if (IS_EXT_REGNO (regno2) && ! IS_EXT_REGNO (regno1))
+    return 0;
+  return 1;
+}
 
 /* The TI C3x C compiler register argument runtime model uses 6 registers,
    AR2, R2, R3, RC, RS, RE.
diff --git a/gcc/config/c4x/c4x.h b/gcc/config/c4x/c4x.h
index 99278216590..a64c0380cd8 100644
--- a/gcc/config/c4x/c4x.h
+++ b/gcc/config/c4x/c4x.h
@@ -614,6 +614,11 @@ extern const char *c4x_rpts_cycles_string, *c4x_cpu_version_string;
  IR0_REGNO, IR1_REGNO,					\
  SP_REGNO, DP_REGNO, ST_REGNO, IE_REGNO, IF_REGNO, IOF_REGNO}
 
+/* A C expression that is nonzero if hard register number REGNO2 can be
+   considered for use as a rename register for REGNO1 */
+
+#define HARD_REGNO_RENAME_OK(REGNO1,REGNO2) \
+  c4x_hard_regno_rename_ok((REGNO1), (REGNO2))
 
 /* Determine which register classes are very likely used by spill registers.
    local-alloc.c won't allocate pseudos that have these classes as their