diff options
| author | kazu <kazu@138bc75d-0d04-0410-961f-82ee72b054a4> | 2002-11-29 16:10:21 +0000 |
|---|---|---|
| committer | kazu <kazu@138bc75d-0d04-0410-961f-82ee72b054a4> | 2002-11-29 16:10:21 +0000 |
| commit | f508700217551ad76db1e19bebbef194b3e096fa (patch) | |
| tree | fe85f4416aef856faf789ba958f509e05ad28372 | |
| parent | e79d3dfa3ef7eb66e7793e16bde70551b137a8ef (diff) | |
| download | ppe42-gcc-f508700217551ad76db1e19bebbef194b3e096fa.tar.gz ppe42-gcc-f508700217551ad76db1e19bebbef194b3e096fa.zip | |
* config/h8300/h8300.md (an anonymous pattern): Give an
internal name *tst_extzv_bitqi_1_n.
Accept bit_operand instead of bit_memory_operand.
Do not accept bit tests with the MSB.
(*tst_extzv_memqi_1_n): New.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@59636 138bc75d-0d04-0410-961f-82ee72b054a4
| -rw-r--r-- | gcc/ChangeLog | 8 | ||||
| -rw-r--r-- | gcc/config/h8300/h8300.md | 24 |
2 files changed, 29 insertions, 3 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 935e4b3429f..8d4f86cb61d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2002-11-29 Kazu Hirata <kazu@cs.umass.edu> + + * config/h8300/h8300.md (an anonymous pattern): Give an + internal name *tst_extzv_bitqi_1_n. + Accept bit_operand instead of bit_memory_operand. + Do not accept bit tests with the MSB. + (*tst_extzv_memqi_1_n): New. + 2002-11-28 Kazu Hirata <kazu@cs.umass.edu> * config/h8300/h8300.c (h8300_eightbit_constant_address_p): diff --git a/gcc/config/h8300/h8300.md b/gcc/config/h8300/h8300.md index 182e9f1a1fa..5da3397fffa 100644 --- a/gcc/config/h8300/h8300.md +++ b/gcc/config/h8300/h8300.md @@ -580,15 +580,33 @@ [(set_attr "length" "2") (set_attr "cc" "set_zn")]) -(define_insn "" - [(set (cc0) (zero_extract:SI (match_operand:QI 0 "bit_memory_operand" "r,U") +(define_insn "*tst_extzv_bitqi_1_n" + [(set (cc0) (zero_extract:SI (match_operand:QI 0 "bit_operand" "r,U") (const_int 1) (match_operand 1 "const_int_operand" "n,n")))] - "TARGET_H8300H || TARGET_H8300S" + "(TARGET_H8300H || TARGET_H8300S) + && INTVAL (operands[1]) != 7" "btst %Z1,%Y0" [(set_attr "length" "2,8") (set_attr "cc" "set_zn,set_zn")]) +(define_insn_and_split "*tst_extzv_memqi_1_n" + [(set (cc0) (zero_extract:SI (match_operand:QI 0 "memory_operand" "m") + (const_int 1) + (match_operand 1 "const_int_operand" "n"))) + (clobber (match_scratch:QI 2 "=&r"))] + "(TARGET_H8300H || TARGET_H8300S) + && !EXTRA_CONSTRAINT (operands[0], 'U') + && INTVAL (operands[1]) != 7" + "#" + "&& reload_completed" + [(set (match_dup 2) + (match_dup 0)) + (set (cc0) (zero_extract:SI (match_dup 2) + (const_int 1) + (match_dup 1)))] + "") + (define_insn "" [(set (cc0) (zero_extract:SI (match_operand:SI 0 "register_operand" "r") (const_int 1) |
