diff options
| author | uros <uros@138bc75d-0d04-0410-961f-82ee72b054a4> | 2009-08-06 11:43:38 +0000 |
|---|---|---|
| committer | uros <uros@138bc75d-0d04-0410-961f-82ee72b054a4> | 2009-08-06 11:43:38 +0000 |
| commit | f03e80487ea04d6d14d0d8b14b35ee2ae2c067ec (patch) | |
| tree | 9ec6082561ff7437521b9f60801bfea9863bdaaf | |
| parent | 9fa672189b407b95f332b4701d6679f9babca98c (diff) | |
| download | ppe42-gcc-f03e80487ea04d6d14d0d8b14b35ee2ae2c067ec.tar.gz ppe42-gcc-f03e80487ea04d6d14d0d8b14b35ee2ae2c067ec.zip | |
PR target/40957
* config/i386/i386.c (standard_sse_mode_p): Remove.
(standard_sse_constant_p): Return 2 for integer mode
vector_all_ones_operand when SSE2 is enabled.
(standard_sse_constant_opcode)<case 2>: Always return [v]pcmpeqd.
(ix86_expand_vector_move): Do not check for negative values from
standard_sse_constant_p.
testsuite/ChangeLog:
PR target/40957
* gcc.target/i386/pr40957: New test.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@150520 138bc75d-0d04-0410-961f-82ee72b054a4
| -rw-r--r-- | gcc/ChangeLog | 11 | ||||
| -rw-r--r-- | gcc/config/i386/i386.c | 61 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/pr40957.c | 18 |
4 files changed, 53 insertions, 43 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 97626d63f72..09c03076221 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,14 @@ +2009-08-06 Uros Bizjak <ubizjak@gmail.com> + H.J. Lu <hongjiu.lu@intel.com> + + PR target/40957 + * config/i386/i386.c (standard_sse_mode_p): Remove. + (standard_sse_constant_p): Return 2 for integer mode + vector_all_ones_operand when SSE2 is enabled. + (standard_sse_constant_opcode)<case 2>: Always return [v]pcmpeqd. + (ix86_expand_vector_move): Do not check for negative values from + standard_sse_constant_p. + 2009-08-06 Richard Guenther <rguenther@suse.de> * tree-ssa.c (useless_type_conversion_p_1): Make function and diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index d0a8ba65f76..acb7753664b 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -7357,28 +7357,8 @@ standard_80387_constant_rtx (int idx) XFmode); } -/* Return 1 if mode is a valid mode for sse. */ -static int -standard_sse_mode_p (enum machine_mode mode) -{ - switch (mode) - { - case V16QImode: - case V8HImode: - case V4SImode: - case V2DImode: - case V4SFmode: - case V2DFmode: - return 1; - - default: - return 0; - } -} - -/* Return 1 if X is all 0s. For all 1s, return 2 if X is in 128bit - SSE modes and SSE2 is enabled, return 3 if X is in 256bit AVX - modes and AVX is enabled. */ +/* Return 1 if X is all 0s and 2 if x is all 1s + in supported SSE vector mode. */ int standard_sse_constant_p (rtx x) @@ -7388,12 +7368,17 @@ standard_sse_constant_p (rtx x) if (x == const0_rtx || x == CONST0_RTX (GET_MODE (x))) return 1; if (vector_all_ones_operand (x, mode)) - { - if (standard_sse_mode_p (mode)) - return TARGET_SSE2 ? 2 : -2; - else if (VALID_AVX256_REG_MODE (mode)) - return TARGET_AVX ? 3 : -3; - } + switch (mode) + { + case V16QImode: + case V8HImode: + case V4SImode: + case V2DImode: + if (TARGET_SSE2) + return 2; + default: + break; + } return 0; } @@ -7422,22 +7407,12 @@ standard_sse_constant_opcode (rtx insn, rtx x) case MODE_OI: return "vpxor\t%x0, %x0, %x0"; default: - gcc_unreachable (); + break; } case 2: - if (TARGET_AVX) - switch (get_attr_mode (insn)) - { - case MODE_V4SF: - case MODE_V2DF: - case MODE_TI: - return "vpcmpeqd\t%0, %0, %0"; - break; - default: - gcc_unreachable (); - } - else - return "pcmpeqd\t%0, %0"; + return TARGET_AVX ? "vpcmpeqd\t%0, %0, %0" : "pcmpeqd\t%0, %0"; + default: + break; } gcc_unreachable (); } @@ -12908,7 +12883,7 @@ ix86_expand_vector_move (enum machine_mode mode, rtx operands[]) && (CONSTANT_P (op1) || (GET_CODE (op1) == SUBREG && CONSTANT_P (SUBREG_REG (op1)))) - && standard_sse_constant_p (op1) <= 0) + && !standard_sse_constant_p (op1)) op1 = validize_mem (force_const_mem (mode, op1)); /* We need to check memory alignment for SSE mode since attribute diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index c935ca8800e..2232d5fad62 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2009-08-06 Uros Bizjak <ubizjak@gmail.com> + H.J. Lu <hongjiu.lu@intel.com> + + PR target/40957 + * gcc.target/i386/pr40957: New test. + 2009-08-06 Richard Guenther <rguenther@suse.de> PR tree-optimization/40964 diff --git a/gcc/testsuite/gcc.target/i386/pr40957.c b/gcc/testsuite/gcc.target/i386/pr40957.c new file mode 100644 index 00000000000..56762d7e810 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr40957.c @@ -0,0 +1,18 @@ +/* { dg-do compile } */ +/* { dg-require-effective-target avx } */ +/* { dg-options "-O2 -mavx" } */ + +typedef int __v8si __attribute__((__vector_size__(32))); +typedef long long __m256i __attribute__((__vector_size__(32), __may_alias__)); + +static __m256i +_mm256_set1_epi32 (int __A) +{ + return __extension__ (__m256i)(__v8si){ __A, __A, __A, __A, + __A, __A, __A, __A }; +} +__m256i +foo () +{ + return _mm256_set1_epi32 (-1); +} |

