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| author | uros <uros@138bc75d-0d04-0410-961f-82ee72b054a4> | 2007-03-14 07:47:32 +0000 |
|---|---|---|
| committer | uros <uros@138bc75d-0d04-0410-961f-82ee72b054a4> | 2007-03-14 07:47:32 +0000 |
| commit | e85fd4fbb082d5c61a2e0202c24d6bdfd006ce56 (patch) | |
| tree | 8a061b678873e93e0f03fdff633af18b802c90bb | |
| parent | fdf6266dd09ad6aefa7e36685d7f01fa4005744b (diff) | |
| download | ppe42-gcc-e85fd4fbb082d5c61a2e0202c24d6bdfd006ce56.tar.gz ppe42-gcc-e85fd4fbb082d5c61a2e0202c24d6bdfd006ce56.zip | |
* doc/invoke.texi (i386 and x86-64 Options): Clarify -msahf option.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@122910 138bc75d-0d04-0410-961f-82ee72b054a4
| -rw-r--r-- | gcc/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/doc/invoke.texi | 11 |
2 files changed, 10 insertions, 5 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 1e5a199e178..97d34f3c04e 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +2007-03-14 Uros Bizjak <ubizjak@gmail.com> + + * doc/invoke.texi (i386 and x86-64 Options): Clarify -msahf option. + 2007-03-13 Seongbae Park <seongbae.park@gmail.com> PR tree-optimization/30590 diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index d5a5da58104..60122e0a891 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -10091,11 +10091,12 @@ atomic built-in functions: see @ref{Atomic Builtins} for details. @item -msahf @opindex -msahf -This option will enable GCC to use SAHF instruction in generated code. Early -Intel CPUs with Intel 64 lacked LAHF and SAHF instructions supported by AMD64 -until introduction of Pentium 4 G1 step in December 2005. LAHF and SAHF are -load and store instructions, respectively, for certain status flags. These -instructions are used for virtualization and floating-point condition handling. +This option will enable GCC to use SAHF instruction in generated 64-bit code. +Early Intel CPUs with Intel 64 lacked LAHF and SAHF instructions supported +by AMD64 until introduction of Pentium 4 G1 step in December 2005. LAHF and +SAHF are load and store instructions, respectively, for certain status flags. +In 64-bit mode, SAHF instruction is used to optimize @code{fmod}, @code{drem} +or @code{remainder} built-in functions: see @ref{Other Builtins} for details. @item -mpush-args @itemx -mno-push-args |
