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authorrearnsha <rearnsha@138bc75d-0d04-0410-961f-82ee72b054a4>2005-06-12 08:32:50 +0000
committerrearnsha <rearnsha@138bc75d-0d04-0410-961f-82ee72b054a4>2005-06-12 08:32:50 +0000
commitdd13c7b218af7797d2f75dd953f5367109f7ae2b (patch)
tree59cac1b03c468d86a80df93fe69979fcf80fd4e8
parentd810c37d467da842d0510d0e5d9b3be7e0741a73 (diff)
downloadppe42-gcc-dd13c7b218af7797d2f75dd953f5367109f7ae2b.tar.gz
ppe42-gcc-dd13c7b218af7797d2f75dd953f5367109f7ae2b.zip
* arm/ieee754-df.s (aeabi_dcmpeq, aeabi_dcmplt, aeabi_dcmple)
(aeabi_dcmpge, aeabi_dcmpgt): Maintain 8-byte stack alignment. * arm/ieee754-sf.s (aeabi_l2f, aeabi_fcmpeq, aeabi_fcmplt) (aeabi_fcmple, aeabi_fcmpge, aeabi_fcmpgt): Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@100854 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r--gcc/ChangeLog7
-rw-r--r--gcc/config/arm/ieee754-df.S10
-rw-r--r--gcc/config/arm/ieee754-sf.S12
3 files changed, 18 insertions, 11 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 6582d719891..88a15fd7b65 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2005-06-12 Richard Earnshaw <richard.earnshaw@arm.com>
+
+ * arm/ieee754-df.s (aeabi_dcmpeq, aeabi_dcmplt, aeabi_dcmple)
+ (aeabi_dcmpge, aeabi_dcmpgt): Maintain 8-byte stack alignment.
+ * arm/ieee754-sf.s (aeabi_l2f, aeabi_fcmpeq, aeabi_fcmplt)
+ (aeabi_fcmple, aeabi_fcmpge, aeabi_fcmpgt): Likewise.
+
2005-06-12 James A. Morrison <phython@gcc.gnu.org>
PR tree-optimization/14796
diff --git a/gcc/config/arm/ieee754-df.S b/gcc/config/arm/ieee754-df.S
index 44dab20edc4..e0b6a73c076 100644
--- a/gcc/config/arm/ieee754-df.S
+++ b/gcc/config/arm/ieee754-df.S
@@ -1115,7 +1115,7 @@ ARM_FUNC_ALIAS aeabi_cdcmple aeabi_cdcmpeq
ARM_FUNC_START aeabi_dcmpeq
- str lr, [sp, #-4]!
+ str lr, [sp, #-8]!
ARM_CALL aeabi_cdcmple
moveq r0, #1 @ Equal to.
movne r0, #0 @ Less than, greater than, or unordered.
@@ -1125,7 +1125,7 @@ ARM_FUNC_START aeabi_dcmpeq
ARM_FUNC_START aeabi_dcmplt
- str lr, [sp, #-4]!
+ str lr, [sp, #-8]!
ARM_CALL aeabi_cdcmple
movcc r0, #1 @ Less than.
movcs r0, #0 @ Equal to, greater than, or unordered.
@@ -1135,7 +1135,7 @@ ARM_FUNC_START aeabi_dcmplt
ARM_FUNC_START aeabi_dcmple
- str lr, [sp, #-4]!
+ str lr, [sp, #-8]!
ARM_CALL aeabi_cdcmple
movls r0, #1 @ Less than or equal to.
movhi r0, #0 @ Greater than or unordered.
@@ -1145,7 +1145,7 @@ ARM_FUNC_START aeabi_dcmple
ARM_FUNC_START aeabi_dcmpge
- str lr, [sp, #-4]!
+ str lr, [sp, #-8]!
ARM_CALL aeabi_cdrcmple
movls r0, #1 @ Operand 2 is less than or equal to operand 1.
movhi r0, #0 @ Operand 2 greater than operand 1, or unordered.
@@ -1155,7 +1155,7 @@ ARM_FUNC_START aeabi_dcmpge
ARM_FUNC_START aeabi_dcmpgt
- str lr, [sp, #-4]!
+ str lr, [sp, #-8]!
ARM_CALL aeabi_cdrcmple
movcc r0, #1 @ Operand 2 is less than operand 1.
movcs r0, #0 @ Operand 2 is greater than or equal to operand 1,
diff --git a/gcc/config/arm/ieee754-sf.S b/gcc/config/arm/ieee754-sf.S
index 2d48ff67336..1f9be2950d0 100644
--- a/gcc/config/arm/ieee754-sf.S
+++ b/gcc/config/arm/ieee754-sf.S
@@ -327,7 +327,7 @@ ARM_FUNC_ALIAS aeabi_l2f floatdisf
@ For hard FPA code we want to return via the tail below so that
@ we can return the result in f0 as well as in r0 for backwards
@ compatibility.
- str lr, [sp, #-4]!
+ str lr, [sp, #-8]!
adr lr, LSYM(f0_ret)
#endif
@@ -821,7 +821,7 @@ ARM_FUNC_ALIAS aeabi_cfcmple aeabi_cfcmpeq
ARM_FUNC_START aeabi_fcmpeq
- str lr, [sp, #-4]!
+ str lr, [sp, #-8]!
ARM_CALL aeabi_cfcmple
moveq r0, #1 @ Equal to.
movne r0, #0 @ Less than, greater than, or unordered.
@@ -831,7 +831,7 @@ ARM_FUNC_START aeabi_fcmpeq
ARM_FUNC_START aeabi_fcmplt
- str lr, [sp, #-4]!
+ str lr, [sp, #-8]!
ARM_CALL aeabi_cfcmple
movcc r0, #1 @ Less than.
movcs r0, #0 @ Equal to, greater than, or unordered.
@@ -841,7 +841,7 @@ ARM_FUNC_START aeabi_fcmplt
ARM_FUNC_START aeabi_fcmple
- str lr, [sp, #-4]!
+ str lr, [sp, #-8]!
ARM_CALL aeabi_cfcmple
movls r0, #1 @ Less than or equal to.
movhi r0, #0 @ Greater than or unordered.
@@ -851,7 +851,7 @@ ARM_FUNC_START aeabi_fcmple
ARM_FUNC_START aeabi_fcmpge
- str lr, [sp, #-4]!
+ str lr, [sp, #-8]!
ARM_CALL aeabi_cfrcmple
movls r0, #1 @ Operand 2 is less than or equal to operand 1.
movhi r0, #0 @ Operand 2 greater than operand 1, or unordered.
@@ -861,7 +861,7 @@ ARM_FUNC_START aeabi_fcmpge
ARM_FUNC_START aeabi_fcmpgt
- str lr, [sp, #-4]!
+ str lr, [sp, #-8]!
ARM_CALL aeabi_cfrcmple
movcc r0, #1 @ Operand 2 is less than operand 1.
movcs r0, #0 @ Operand 2 is greater than or equal to operand 1,
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