PR target/30970

        * config/i386/sse.md (*mov<mode>_internal, *movv4sf_internal,
        *movv2df_internal): Enable pattern only for valid operand
        combinations.
        * config/i386/i386.c (ix86_modes_tieable_p): For SSE registers,
        tie only 128bit modes. For MMX registers, tie only 64bit modes.

testsuite/ChangeLog:

	PR target/30970
	* gcc.target/i386/gfortran.dg/pr30970.c: New test. 



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@122387 138bc75d-0d04-0410-961f-82ee72b054a4

5 files changed, 44 insertions, 7 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 31a40de2e78..dc5a8d14d62 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2007-02-27  Uros Bizjak  <ubizjak@gmail.com>
+
+	PR target/30970
+	* config/i386/sse.md (*mov<mode>_internal, *movv4sf_internal,
+	*movv2df_internal): Enable pattern only for valid operand
+	combinations.
+	* config/i386/i386.c (ix86_modes_tieable_p): For SSE registers,
+	tie only 128bit modes. For MMX registers, tie only 64bit modes.
+
 2007-02-27  Mike Stump  <mrs@apple.com>
 
 	* config/darwin-crt3.c: Avoid compilation when compiling for a
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 5a4e1d5e4c6..c0208301afd 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -18783,15 +18783,17 @@ ix86_modes_tieable_p (enum machine_mode mode1, enum machine_mode mode2)
 
   /* If MODE2 is only appropriate for an SSE register, then tie with
      any other mode acceptable to SSE registers.  */
-  if (GET_MODE_SIZE (mode2) >= 8
+  if (GET_MODE_SIZE (mode2) == 16
       && ix86_hard_regno_mode_ok (FIRST_SSE_REG, mode2))
-    return ix86_hard_regno_mode_ok (FIRST_SSE_REG, mode1);
+    return (GET_MODE_SIZE (mode1) == 16
+	    && ix86_hard_regno_mode_ok (FIRST_SSE_REG, mode1));
 
-  /* If MODE2 is appropriate for an MMX (or SSE) register, then tie
+  /* If MODE2 is appropriate for an MMX register, then tie
      with any other mode acceptable to MMX registers.  */
   if (GET_MODE_SIZE (mode2) == 8
       && ix86_hard_regno_mode_ok (FIRST_MMX_REG, mode2))
-    return ix86_hard_regno_mode_ok (FIRST_MMX_REG, mode1);
+    return (GET_MODE_SIZE (mode2) == 8
+	    && ix86_hard_regno_mode_ok (FIRST_MMX_REG, mode1));
 
   return false;
 }
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 512a8f9bfdf..cc123cc3510 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -60,7 +60,9 @@
 (define_insn "*mov<mode>_internal"
   [(set (match_operand:SSEMODEI 0 "nonimmediate_operand" "=x,x ,m")
 	(match_operand:SSEMODEI 1 "nonimmediate_or_sse_const_operand"  "C ,xm,x"))]
-  "TARGET_SSE && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
+  "TARGET_SSE
+   && (register_operand (operands[0], <MODE>mode)
+       || register_operand (operands[1], <MODE>mode))"
 {
   switch (which_alternative)
     {
@@ -140,7 +142,9 @@
 (define_insn "*movv4sf_internal"
   [(set (match_operand:V4SF 0 "nonimmediate_operand" "=x,x,m")
 	(match_operand:V4SF 1 "nonimmediate_or_sse_const_operand" "C,xm,x"))]
-  "TARGET_SSE"
+  "TARGET_SSE
+   && (register_operand (operands[0], V4SFmode)
+       || register_operand (operands[1], V4SFmode))"
 {
   switch (which_alternative)
     {
@@ -182,7 +186,9 @@
 (define_insn "*movv2df_internal"
   [(set (match_operand:V2DF 0 "nonimmediate_operand" "=x,x,m")
 	(match_operand:V2DF 1 "nonimmediate_or_sse_const_operand" "C,xm,x"))]
-  "TARGET_SSE && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
+  "TARGET_SSE
+   && (register_operand (operands[0], V2DFmode)
+       || register_operand (operands[1], V2DFmode))"
 {
   switch (which_alternative)
     {
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index cf07c57ad94..1b31b2feef8 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2007-02-27  Uros Bizjak  <ubizjak@gmail.com>
+
+	PR target/30970
+	* gcc.target/i386/gfortran.dg/pr30970.c: New test. 
+
 2007-02-27  Mark Mitchell  <mark@codesourcery.com>
 
 	* lib/target-supports.exp (check_effective_target_init_priority):
diff --git a/gcc/testsuite/gcc.target/i386/pr30970.c b/gcc/testsuite/gcc.target/i386/pr30970.c
new file mode 100644
index 00000000000..5ee7cb368d5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr30970.c
@@ -0,0 +1,15 @@
+/* { dg-do compile { target i?86-*-* x86_64-*-* } }
+/* { dg-options "-msse2 -O2 -ftree-vectorize" } */
+
+#define N 256
+int b[N];
+
+void test()
+{  
+  int i;
+
+  for (i = 0; i < N; i++)
+    b[i] = 0;
+}
+
+/* { dg-final { scan-assembler-times "pxor" 1 } } */