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| author | aldyh <aldyh@138bc75d-0d04-0410-961f-82ee72b054a4> | 2001-08-26 04:51:54 +0000 |
|---|---|---|
| committer | aldyh <aldyh@138bc75d-0d04-0410-961f-82ee72b054a4> | 2001-08-26 04:51:54 +0000 |
| commit | d1ca98f3b0dbf44df934e4c141db256043fde1bf (patch) | |
| tree | 08495893bf159949ca9c50b6ab47ac65cca86595 | |
| parent | f6ada591fc93dacb66c99f70c7317f3eb984c049 (diff) | |
| download | ppe42-gcc-d1ca98f3b0dbf44df934e4c141db256043fde1bf.tar.gz ppe42-gcc-d1ca98f3b0dbf44df934e4c141db256043fde1bf.zip | |
* config/mips/mips.c (mips_function_value): Handle complex return
values.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@45178 138bc75d-0d04-0410-961f-82ee72b054a4
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/mips/mips.c | 30 |
2 files changed, 33 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f85e3d22d04..278ca881f1b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2001-08-26 Aldy Hernandez <aldyh@redhat.com> + + * config/mips/mips.c (mips_function_value): Handle complex return + values. + 2001-08-25 Hans-Peter Nilsson <hp@bitrange.com> * reload1.c (reload): Make all entries in reg_equiv_memory_loc diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index 268c7f47a13..952b260ff5f 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -7782,8 +7782,7 @@ mips_function_value (valtype, func) just as PROMOTE_MODE does. */ mode = promote_mode (valtype, mode, &unsignedp, 1); - /* ??? How should we return complex float? */ - if (mclass == MODE_FLOAT || mclass == MODE_COMPLEX_FLOAT) + if (mclass == MODE_FLOAT) { if (TARGET_SINGLE_FLOAT && (mclass == MODE_FLOAT @@ -7793,6 +7792,33 @@ mips_function_value (valtype, func) reg = FP_RETURN; } + else if (mclass == MODE_COMPLEX_FLOAT) + { + if (TARGET_FLOAT64) + reg = FP_RETURN; + else if (mode == SCmode) + { + /* When FP registers are 32 bits, we can't directly reference + the odd numbered ones, so let's make a pair of evens. */ + + enum machine_mode cmode = TYPE_MODE (TREE_TYPE (valtype)); + + return gen_rtx_PARALLEL + (VOIDmode, + gen_rtvec (2, + gen_rtx_EXPR_LIST (VOIDmode, + gen_rtx_REG (cmode, + FP_RETURN), + GEN_INT (0)), + gen_rtx_EXPR_LIST (VOIDmode, + gen_rtx_REG (cmode, + FP_RETURN + 2), + GEN_INT (4)))); + } + else + reg = FP_RETURN; + } + else if (TREE_CODE (valtype) == RECORD_TYPE && mips_abi != ABI_32 && mips_abi != ABI_O64 |
