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authorrms <rms@138bc75d-0d04-0410-961f-82ee72b054a4>1993-05-21 03:17:44 +0000
committerrms <rms@138bc75d-0d04-0410-961f-82ee72b054a4>1993-05-21 03:17:44 +0000
commit99a8d31a1c14acb005827f917ee776a62b40b85e (patch)
treea05fa6206daf8380dc8a0f688a336cb82c4b7b11
parent47001a6dcf473c234d9acc1e4606c5b6c349528d (diff)
downloadppe42-gcc-99a8d31a1c14acb005827f917ee776a62b40b85e.tar.gz
ppe42-gcc-99a8d31a1c14acb005827f917ee776a62b40b85e.zip
(choose_reload_regs): Handle earlyclobbers
when inheriting from reg_last_reload_reg. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@4524 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r--gcc/reload1.c46
1 files changed, 34 insertions, 12 deletions
diff --git a/gcc/reload1.c b/gcc/reload1.c
index 844a9e071a9..d5288070ba8 100644
--- a/gcc/reload1.c
+++ b/gcc/reload1.c
@@ -4820,18 +4820,40 @@ choose_reload_regs (insn, avoid_return_reg)
if (k == nr)
{
- /* Mark the register as in use for this part of
- the insn. */
- mark_reload_reg_in_use (spill_regs[i],
- reload_opnum[r],
- reload_when_needed[r],
- reload_mode[r]);
- reload_reg_rtx[r] = reg_last_reload_reg[regno];
- reload_inherited[r] = 1;
- reload_inheritance_insn[r] = reg_reloaded_insn[i];
- reload_spill_index[r] = i;
- SET_HARD_REG_BIT (reload_reg_used_for_inherit,
- spill_regs[i]);
+ int i1;
+
+ /* We found a register that contains the
+ value we need. If this register is the
+ same as an `earlyclobber' operand of the
+ current insn, just mark it as a place to
+ reload from since we can't use it as the
+ reload register itself. */
+
+ for (i1 = 0; i1 < n_earlyclobbers; i1++)
+ if (reg_overlap_mentioned_for_reload_p
+ (reg_last_reload_reg[regno],
+ reload_earlyclobbers[i1]))
+ break;
+
+ if (i1 != n_earlyclobbers)
+ reload_override_in[r] = reg_last_reload_reg[regno];
+ else
+ {
+ /* We can use this as a reload reg. */
+ /* Mark the register as in use for this part of
+ the insn. */
+ mark_reload_reg_in_use (spill_regs[i],
+ reload_opnum[r],
+ reload_when_needed[r],
+ reload_mode[r]);
+ reload_reg_rtx[r] = reg_last_reload_reg[regno];
+ reload_inherited[r] = 1;
+ reload_inheritance_insn[r]
+ = reg_reloaded_insn[i];
+ reload_spill_index[r] = i;
+ SET_HARD_REG_BIT (reload_reg_used_for_inherit,
+ spill_regs[i]);
+ }
}
}
}
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