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authorsje <sje@138bc75d-0d04-0410-961f-82ee72b054a4>2004-09-03 17:52:08 +0000
committersje <sje@138bc75d-0d04-0410-961f-82ee72b054a4>2004-09-03 17:52:08 +0000
commit908e9a95bcdfaebb60ce9c18405294f4cbda33af (patch)
treea0b805a52b3c01789ea7708c46732e19775e6d43
parent6b5553e50fff7ad0835e807fc006c0bcfe1816f7 (diff)
downloadppe42-gcc-908e9a95bcdfaebb60ce9c18405294f4cbda33af.tar.gz
ppe42-gcc-908e9a95bcdfaebb60ce9c18405294f4cbda33af.zip
* config/ia64/ia64.c (ia64_function_arg): Use PARALLEL even if there
is only one reg. (ia64_function_value): Ditto. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@87038 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r--gcc/ChangeLog6
-rw-r--r--gcc/config/ia64/ia64.c18
2 files changed, 8 insertions, 16 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 71218fc1953..23735e6d0fc 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2004-09-03 Steve Ellcey <sje@cup.hp.com>
+
+ * config/ia64/ia64.c (ia64_function_arg): Use PARALLEL even if there
+ is only one reg.
+ (ia64_function_value): Ditto.
+
2004-09-03 Jan Beulich <jbeulich@novell.com>
PR c/7054
diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c
index 1b9ac8ee963..8921a8a7e92 100644
--- a/gcc/config/ia64/ia64.c
+++ b/gcc/config/ia64/ia64.c
@@ -3169,17 +3169,7 @@ ia64_function_arg (CUMULATIVE_ARGS *cum, enum machine_mode mode, tree type,
else if (gr_size > UNITS_PER_WORD)
int_regs += gr_size / UNITS_PER_WORD;
}
-
- /* If we ended up using just one location, just return that one loc, but
- change the mode back to the argument mode. However, we can't do this
- when hfa_mode is XFmode and mode is TImode. In that case, we would
- return a TImode reference to an FP reg, but FP regs can't hold TImode.
- We need the PARALLEL to make this work. This can happen for a union
- containing a single __float80 member. */
- if (i == 1 && ! (hfa_mode == XFmode && mode == TImode))
- return gen_rtx_REG (mode, REGNO (XEXP (loc[0], 0)));
- else
- return gen_rtx_PARALLEL (mode, gen_rtvec_v (i, loc));
+ return gen_rtx_PARALLEL (mode, gen_rtvec_v (i, loc));
}
/* Integral and aggregates go in general registers. If we have run out of
@@ -3477,11 +3467,7 @@ ia64_function_value (tree valtype, tree func ATTRIBUTE_UNUSED)
GEN_INT (offset));
offset += hfa_size;
}
-
- if (i == 1)
- return XEXP (loc[0], 0);
- else
- return gen_rtx_PARALLEL (mode, gen_rtvec_v (i, loc));
+ return gen_rtx_PARALLEL (mode, gen_rtvec_v (i, loc));
}
else if (FLOAT_TYPE_P (valtype) && mode != TFmode && mode != TCmode)
return gen_rtx_REG (mode, FR_ARG_FIRST);
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