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author | rth <rth@138bc75d-0d04-0410-961f-82ee72b054a4> | 2011-01-11 18:26:16 +0000 |
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committer | rth <rth@138bc75d-0d04-0410-961f-82ee72b054a4> | 2011-01-11 18:26:16 +0000 |
commit | 8af291b5dc3ef8cdfc1a805f5907f64f6f2bfef5 (patch) | |
tree | fbc32e2691ce42505226d2ccaa4712315ecc27f5 | |
parent | 361bb6ad291b40c890ac76454050e3ddcd54403e (diff) | |
download | ppe42-gcc-8af291b5dc3ef8cdfc1a805f5907f64f6f2bfef5.tar.gz ppe42-gcc-8af291b5dc3ef8cdfc1a805f5907f64f6f2bfef5.zip |
mn10300: Add attribute enabled.
This will allow merging am33 and mn103 patterns for which the
set of alternatives can't be merged via constraint letters.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@168674 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r-- | gcc/ChangeLog | 3 | ||||
-rw-r--r-- | gcc/config/mn10300/mn10300.md | 22 |
2 files changed, 25 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index ddcb3bc826f..8d5fb422d77 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,8 @@ 2011-01-11 Richard Henderson <rth@redhat.com> + * config/mn10300/mn10300.md (isa): New attribute. + (enabled): New attribute. + * config/mn10300/mn10300.md (absdf2, negdf2): Remove. (abssf2, negsf2): Define only for hardware fp. (sqrtsf2): Reformat. diff --git a/gcc/config/mn10300/mn10300.md b/gcc/config/mn10300/mn10300.md index 3a266960ffe..bfa453f17c0 100644 --- a/gcc/config/mn10300/mn10300.md +++ b/gcc/config/mn10300/mn10300.md @@ -46,6 +46,28 @@ (define_attr "cpu" "mn10300,am33,am33_2,am34" (const (symbol_ref "(enum attr_cpu) mn10300_tune_cpu"))) +;; Used to control the "enabled" attribute on a per-instruction basis. +(define_attr "isa" "base,am33,am33_2,am34" + (const_string "base")) + +(define_attr "enabled" "" + (cond [(eq_attr "isa" "base") + (const_int 1) + + (and (eq_attr "isa" "am33") + (ne (symbol_ref "TARGET_AM33") (const_int 0))) + (const_int 1) + + (and (eq_attr "isa" "am33_2") + (ne (symbol_ref "TARGET_AM33_2") (const_int 0))) + (const_int 1) + + (and (eq_attr "isa" "am34") + (ne (symbol_ref "TARGET_AM34") (const_int 0))) + (const_int 1) + ] + (const_int 0)) +) ;; Pipeline description. |