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authorkazu <kazu@138bc75d-0d04-0410-961f-82ee72b054a4>2003-10-05 13:34:45 +0000
committerkazu <kazu@138bc75d-0d04-0410-961f-82ee72b054a4>2003-10-05 13:34:45 +0000
commit751e10d1a18facbb49754acf0de26ccbb3181ab8 (patch)
treef344e155c2b5c7aac595a92de8716b906a1ef740
parente9efa03135334c079d640b06ff0e578f1c250cee (diff)
downloadppe42-gcc-751e10d1a18facbb49754acf0de26ccbb3181ab8.tar.gz
ppe42-gcc-751e10d1a18facbb49754acf0de26ccbb3181ab8.zip
* fold-const.c: Follow spelling conventions.
* function.c: Likewise. * config/c4x/c4x.h: Likewise. * config/c4x/c4x.md: Likewise. * config/frv/frv.md: Likewise. * config/rs6000/aix.h: Likewise. * config/rs6000/linux64.h: Likewise. * config/xtensa/xtensa.c: Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@72111 138bc75d-0d04-0410-961f-82ee72b054a4
-rw-r--r--gcc/ChangeLog11
-rw-r--r--gcc/config/c4x/c4x.h2
-rw-r--r--gcc/config/c4x/c4x.md2
-rw-r--r--gcc/config/frv/frv.md2
-rw-r--r--gcc/config/rs6000/aix.h2
-rw-r--r--gcc/config/rs6000/linux64.h2
-rw-r--r--gcc/config/xtensa/xtensa.c2
-rw-r--r--gcc/fold-const.c2
-rw-r--r--gcc/function.c2
9 files changed, 19 insertions, 8 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 3bdbbe50845..66d15f84637 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,16 @@
2003-10-05 Kazu Hirata <kazu@cs.umass.edu>
+ * fold-const.c: Follow spelling conventions.
+ * function.c: Likewise.
+ * config/c4x/c4x.h: Likewise.
+ * config/c4x/c4x.md: Likewise.
+ * config/frv/frv.md: Likewise.
+ * config/rs6000/aix.h: Likewise.
+ * config/rs6000/linux64.h: Likewise.
+ * config/xtensa/xtensa.c: Likewise.
+
+2003-10-05 Kazu Hirata <kazu@cs.umass.edu>
+
* c-pretty-print.c: Fix comment formatting.
* cfglayout.c: Likewise.
* cfgloopanal.c: Likewise.
diff --git a/gcc/config/c4x/c4x.h b/gcc/config/c4x/c4x.h
index 1988ce6442a..37d0c9b42dd 100644
--- a/gcc/config/c4x/c4x.h
+++ b/gcc/config/c4x/c4x.h
@@ -777,7 +777,7 @@ enum reg_class
the register arguments (R2,R3), respectively. I'm reluctant to define
this macro since it stomps on many potential optimizations. Ideally
it should have a register class argument so that not all the register
- classes gets penalised for the sake of a naughty few... For long
+ classes gets penalized for the sake of a naughty few... For long
double arithmetic we need two additional registers that we can use as
spill registers. */
diff --git a/gcc/config/c4x/c4x.md b/gcc/config/c4x/c4x.md
index 0957fe9ef70..5755177454a 100644
--- a/gcc/config/c4x/c4x.md
+++ b/gcc/config/c4x/c4x.md
@@ -476,7 +476,7 @@
;
; C4x FUNCTIONAL UNITS
;
-; Define functional units for instruction scheduling to minimise
+; Define functional units for instruction scheduling to minimize
; pipeline conflicts.
;
; With the C3x, an external memory write (with no wait states) takes
diff --git a/gcc/config/frv/frv.md b/gcc/config/frv/frv.md
index f934d8e2c9c..ce5ce8bac25 100644
--- a/gcc/config/frv/frv.md
+++ b/gcc/config/frv/frv.md
@@ -304,7 +304,7 @@
;; Instruction type
-;; The table below summarises the types of media instruction and their
+;; The table below summarizes the types of media instruction and their
;; scheduling classification. Headings are:
;; Type: the name of the define_attr type
diff --git a/gcc/config/rs6000/aix.h b/gcc/config/rs6000/aix.h
index 269a670b53d..97897b88ca7 100644
--- a/gcc/config/rs6000/aix.h
+++ b/gcc/config/rs6000/aix.h
@@ -155,7 +155,7 @@
layout treating the parameter area as any other block of memory,
then map the reg param area to registers, i.e., pad upward, which
is the way IBM Compilers for AIX behave.
- Setting both of the following defines results in this behaviour. */
+ Setting both of the following defines results in this behavior. */
#define AGGREGATE_PADDING_FIXED 1
#define AGGREGATES_PAD_UPWARD_ALWAYS 1
diff --git a/gcc/config/rs6000/linux64.h b/gcc/config/rs6000/linux64.h
index cbe18645066..4c1b878a011 100644
--- a/gcc/config/rs6000/linux64.h
+++ b/gcc/config/rs6000/linux64.h
@@ -241,7 +241,7 @@
reasonably assume that they follow the normal rules for structure
layout treating the parameter area as any other block of memory,
then map the reg param area to registers. ie. pad updard.
- Setting both of the following defines results in this behaviour.
+ Setting both of the following defines results in this behavior.
Setting just the first one will result in aggregates that fit in a
doubleword being padded downward, and others being padded upward.
Not a bad idea as this results in struct { int x; } being passed
diff --git a/gcc/config/xtensa/xtensa.c b/gcc/config/xtensa/xtensa.c
index 86735f3364c..68a2bd7663e 100644
--- a/gcc/config/xtensa/xtensa.c
+++ b/gcc/config/xtensa/xtensa.c
@@ -1724,7 +1724,7 @@ function_arg_advance (CUMULATIVE_ARGS *cum, enum machine_mode mode, tree type)
/* Return an RTL expression containing the register for the given mode,
- or 0 if the argument is to be passed on the stack. INCOMING_P is non-zero
+ or 0 if the argument is to be passed on the stack. INCOMING_P is nonzero
if this is an incoming argument to the current function. */
rtx
diff --git a/gcc/fold-const.c b/gcc/fold-const.c
index 1cf444d3f67..92b885cc0c4 100644
--- a/gcc/fold-const.c
+++ b/gcc/fold-const.c
@@ -3098,7 +3098,7 @@ make_range (tree exp, int *pin_p, tree *plow, tree *phigh)
in_p = n_in_p, low = n_low, high = n_high;
- /* If the high bound is missing, but we have a non-zero low
+ /* If the high bound is missing, but we have a nonzero low
bound, reverse the range so it goes from zero to the low bound
minus 1. */
if (high == 0 && low && ! integer_zerop (low))
diff --git a/gcc/function.c b/gcc/function.c
index baec4ab3048..bd76c5cd1e1 100644
--- a/gcc/function.c
+++ b/gcc/function.c
@@ -4530,7 +4530,7 @@ assign_parms (tree fndecl)
Internally, gcc assumes that the argument pointer is
aligned to STACK_BOUNDARY bits. This is used both for
- alignment optimisations (see init_emit) and to locate
+ alignment optimizations (see init_emit) and to locate
arguments that are aligned to more than PARM_BOUNDARY
bits. We must preserve this invariant by rounding
CURRENT_FUNCTION_PRETEND_ARGS_SIZE up to a stack
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