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| author | echristo <echristo@138bc75d-0d04-0410-961f-82ee72b054a4> | 2003-05-23 22:19:16 +0000 |
|---|---|---|
| committer | echristo <echristo@138bc75d-0d04-0410-961f-82ee72b054a4> | 2003-05-23 22:19:16 +0000 |
| commit | 7320291e722f35f27be0efec95a6f75801229b21 (patch) | |
| tree | 4577e7d52e05616750792cf35afeb65c51b7ff48 | |
| parent | 4e6a6999ccefa847c97640111c3319149e368995 (diff) | |
| download | ppe42-gcc-7320291e722f35f27be0efec95a6f75801229b21.tar.gz ppe42-gcc-7320291e722f35f27be0efec95a6f75801229b21.zip | |
2003-05-23 Eric Christopher <echristo@redhat.com>
* config/mips/mips.md (clzsi, clzdi): New patterns.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@67142 138bc75d-0d04-0410-961f-82ee72b054a4
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/mips/mips.md | 25 |
2 files changed, 30 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index d4334528b6b..f06c7672478 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +2003-05-23 Eric Christopher <echristo@redhat.com> + + * config/mips/mips.md (clzsi, clzdi): New patterns. + 2003-05-23 Geoffrey Keating <geoffk@apple.com> * gcc.c (default_compilers): Use -o to specify preprocessor's output @@ -7,7 +11,7 @@ 2003-05-23 Nathanael Nerode <neroden@gcc.gnu.org> * fixinc/Makefile.in: Correct description. - * fixinc/Makefile.in, fixinc/fixfixes.c, fixinc/fixincl.c, + * fixinc/Makefile.in, fixinc/fixfixes.c, fixinc/fixincl.c, fixinc/fixlib.c, fixinc/fixlib.h, fixinc/fixtests.c, fixinc/genfixes: Replace "GNU CC" with "GCC". diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index c91d27f14f4..7fff5a37aec 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -3594,6 +3594,31 @@ move\\t%0,%z4\\n\\ (set_attr "length" "24")]) + +;; +;; ................... +;; +;; Count leading zeroes. +;; +;; ................... +;; + +(define_insn "clzsi2" + [(set (match_operand:SI 0 "register_operand" "=d") + (clz:SI (match_operand:SI 1 "register_operand" "d")))] + "ISA_HAS_CLZ_CLO" + "clz\\t%0,%1" + [(set_attr "type" "arith") + (set_attr "mode" "SI")]) + +(define_insn "clzdi2" + [(set (match_operand:DI 0 "register_operand" "=d") + (clz:DI (match_operand:DI 1 "register_operand" "d")))] + "ISA_HAS_DCLZ_DCLO" + "dclz\\t%0,%1" + [(set_attr "type" "arith") + (set_attr "mode" "DI")]) + ;; ;; .................... ;; |
