diff options
| author | rth <rth@138bc75d-0d04-0410-961f-82ee72b054a4> | 1999-07-01 20:54:41 +0000 |
|---|---|---|
| committer | rth <rth@138bc75d-0d04-0410-961f-82ee72b054a4> | 1999-07-01 20:54:41 +0000 |
| commit | 71b63b96992fcd294ab0f4bb9dbb9d570324e546 (patch) | |
| tree | 3da1851d41a86f1a7d56ce1315d7ecb11dad9fe3 | |
| parent | 3bf20f72b182100961927b3afc6bb53d6a52a6b5 (diff) | |
| download | ppe42-gcc-71b63b96992fcd294ab0f4bb9dbb9d570324e546.tar.gz ppe42-gcc-71b63b96992fcd294ab0f4bb9dbb9d570324e546.zip | |
* alpha.md (extqh): Define as 64-((R&7)*8) instead of 56-(((R-1)&7)*8).
(extlh, extwh): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@27897 138bc75d-0d04-0410-961f-82ee72b054a4
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/alpha/alpha.md | 25 |
2 files changed, 15 insertions, 15 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 37b265bdb69..0220cbe0c41 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +Thu Jul 1 20:54:10 1999 Richard Henderson <rth@cygnus.com> + + * alpha.md (extqh): Define as 64-((R&7)*8) instead of 56-(((R-1)&7)*8). + (extlh, extwh): Likewise. + Thu Jul 1 11:05:25 1999 Gavin Romig-Koch <gavin@cygnus.com> * c-lex.c (yylex): Improve 'integer constant out of range' messages. diff --git a/gcc/config/alpha/alpha.md b/gcc/config/alpha/alpha.md index 6d075e99904..9740d6917b8 100644 --- a/gcc/config/alpha/alpha.md +++ b/gcc/config/alpha/alpha.md @@ -1522,10 +1522,9 @@ (const_int -8)))) (set (match_dup 4) (ashift:DI (match_dup 3) - (minus:DI (const_int 56) + (minus:DI (const_int 64) (ashift:DI - (and:DI (plus:DI (match_dup 2) (const_int -1)) - (const_int 7)) + (and:DI (match_dup 2) (const_int 7)) (const_int 3))))) (set (subreg:DI (match_operand:QI 0 "register_operand" "") 0) (ashiftrt:DI (match_dup 4) (const_int 56)))] @@ -1543,10 +1542,9 @@ (const_int -8)))) (set (match_dup 4) (ashift:DI (match_dup 3) - (minus:DI (const_int 56) + (minus:DI (const_int 64) (ashift:DI - (and:DI (plus:DI (match_dup 2) (const_int -1)) - (const_int 7)) + (and:DI (match_dup 2) (const_int 7)) (const_int 3))))) (set (subreg:DI (match_operand:QI 0 "register_operand" "") 0) (ashiftrt:DI (match_dup 4) (const_int 48)))] @@ -1603,11 +1601,10 @@ [(set (match_operand:DI 0 "register_operand" "=r") (ashift:DI (match_operand:DI 1 "reg_or_0_operand" "rJ") - (minus:DI (const_int 56) + (minus:DI (const_int 64) (ashift:DI (and:DI - (plus:DI (match_operand:DI 2 "reg_or_8bit_operand" "rI") - (const_int -1)) + (match_operand:DI 2 "reg_or_8bit_operand" "rI") (const_int 7)) (const_int 3)))))] "" @@ -1619,11 +1616,10 @@ (ashift:DI (and:DI (match_operand:DI 1 "reg_or_0_operand" "rJ") (const_int 2147483647)) - (minus:DI (const_int 56) + (minus:DI (const_int 64) (ashift:DI (and:DI - (plus:DI (match_operand:DI 2 "reg_or_8bit_operand" "rI") - (const_int -1)) + (match_operand:DI 2 "reg_or_8bit_operand" "rI") (const_int 7)) (const_int 3)))))] "" @@ -1635,11 +1631,10 @@ (ashift:DI (and:DI (match_operand:DI 1 "reg_or_0_operand" "rJ") (const_int 65535)) - (minus:DI (const_int 56) + (minus:DI (const_int 64) (ashift:DI (and:DI - (plus:DI (match_operand:DI 2 "reg_or_8bit_operand" "rI") - (const_int -1)) + (match_operand:DI 2 "reg_or_8bit_operand" "rI") (const_int 7)) (const_int 3)))))] "" |
