diff options
| author | jgreenhalgh <jgreenhalgh@138bc75d-0d04-0410-961f-82ee72b054a4> | 2013-03-01 14:01:58 +0000 |
|---|---|---|
| committer | jgreenhalgh <jgreenhalgh@138bc75d-0d04-0410-961f-82ee72b054a4> | 2013-03-01 14:01:58 +0000 |
| commit | 49be16dad083831b797be7b360557051529e06c9 (patch) | |
| tree | f8d5328cc688d3b761462d7a602ff22c252ae168 | |
| parent | 57625e55cd22425308cf0a7acc05d45efa5a359d (diff) | |
| download | ppe42-gcc-49be16dad083831b797be7b360557051529e06c9.tar.gz ppe42-gcc-49be16dad083831b797be7b360557051529e06c9.zip | |
[AArch64/AArch64-4.7][libgcc] Silence warnings in sync-cache.c
libgcc/
* config/aarch64/sync-cache.c
(__aarch64_sync_cache_range): Silence warnings.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@196380 138bc75d-0d04-0410-961f-82ee72b054a4
| -rw-r--r-- | libgcc/ChangeLog | 5 | ||||
| -rw-r--r-- | libgcc/config/aarch64/sync-cache.c | 6 |
2 files changed, 9 insertions, 2 deletions
diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog index c37162bdcb8..5f16e40bc60 100644 --- a/libgcc/ChangeLog +++ b/libgcc/ChangeLog @@ -1,3 +1,8 @@ +2013-03-01 James Greenhalgh <james.greenhalgh@arm.com> + + * config/aarch64/sync-cache.c + (__aarch64_sync_cache_range): Silence warnings. + 2013-02-25 Catherine Moore <clm@codesourcery.com> Revert: diff --git a/libgcc/config/aarch64/sync-cache.c b/libgcc/config/aarch64/sync-cache.c index 7091c489d32..3397e9d29b4 100644 --- a/libgcc/config/aarch64/sync-cache.c +++ b/libgcc/config/aarch64/sync-cache.c @@ -18,6 +18,8 @@ along with GCC; see the file COPYING3. If not see <http://www.gnu.org/licenses/>. */ +void __aarch64_sync_cache_range (const void *, const void *); + void __aarch64_sync_cache_range (const void *base, const void *end) { @@ -43,7 +45,7 @@ __aarch64_sync_cache_range (const void *base, const void *end) address = (const char*) ((__UINTPTR_TYPE__) base & ~ (__UINTPTR_TYPE__) (dcache_lsize - 1)); - for (address; address < (const char *) end; address += dcache_lsize) + for (; address < (const char *) end; address += dcache_lsize) asm volatile ("dc\tcvau, %0" : : "r" (address) @@ -55,7 +57,7 @@ __aarch64_sync_cache_range (const void *base, const void *end) address = (const char*) ((__UINTPTR_TYPE__) base & ~ (__UINTPTR_TYPE__) (icache_lsize - 1)); - for (address; address < (const char *) end; address += icache_lsize) + for (; address < (const char *) end; address += icache_lsize) asm volatile ("ic\tivau, %0" : : "r" (address) |
