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| author | rth <rth@138bc75d-0d04-0410-961f-82ee72b054a4> | 2005-06-19 16:36:46 +0000 |
|---|---|---|
| committer | rth <rth@138bc75d-0d04-0410-961f-82ee72b054a4> | 2005-06-19 16:36:46 +0000 |
| commit | 3bad8ff807fa44c06b3bfcca31e1e5a32f1d6c61 (patch) | |
| tree | 651f782f7de5fa4506653b63152ac492e7f654dd | |
| parent | 18c8ddaa371f5af3764b261b89dc4a4b5c162dfc (diff) | |
| download | ppe42-gcc-3bad8ff807fa44c06b3bfcca31e1e5a32f1d6c61.tar.gz ppe42-gcc-3bad8ff807fa44c06b3bfcca31e1e5a32f1d6c61.zip | |
* config/ia64/vect.md (vec_extractv2sf_1): Fix cut-and-paste error;
the shift is always required.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@101186 138bc75d-0d04-0410-961f-82ee72b054a4
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/ia64/vect.md | 16 |
2 files changed, 9 insertions, 12 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 460489b8645..678b0c52a5f 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,10 @@ 2005-06-19 Richard Henderson <rth@redhat.com> + * config/ia64/vect.md (vec_extractv2sf_1): Fix cut-and-paste error; + the shift is always required. + +2005-06-19 Richard Henderson <rth@redhat.com> + * config/ia64/ia64-modes.def (V4SF): Add. * config/ia64/ia64.c (ia64_legitimate_constant_p): Handle CONST_VECTOR. * config/ia64/ia64.h (CANNOT_CHANGE_MODE_CLASS): Allow vector to diff --git a/gcc/config/ia64/vect.md b/gcc/config/ia64/vect.md index c9dcf080e58..c2f8a1a7cac 100644 --- a/gcc/config/ia64/vect.md +++ b/gcc/config/ia64/vect.md @@ -1070,7 +1070,7 @@ }) (define_insn_and_split "*vec_extractv2sf_1" - [(set (match_operand:SF 0 "register_operand" "=rf") + [(set (match_operand:SF 0 "register_operand" "=r") (unspec:SF [(match_operand:V2SF 1 "register_operand" "r") (const_int 1)] UNSPEC_VECT_EXTR))] @@ -1079,17 +1079,9 @@ "reload_completed" [(const_int 0)] { - if (FR_REGNO_P (REGNO (operands[0]))) - { - operands[1] = gen_rtx_REG (SFmode, REGNO (operands[1])); - emit_move_insn (operands[0], operands[1]); - } - else - { - operands[0] = gen_rtx_REG (DImode, REGNO (operands[0])); - operands[1] = gen_rtx_REG (DImode, REGNO (operands[1])); - emit_insn (gen_lshrdi3 (operands[0], operands[1], GEN_INT (32))); - } + operands[0] = gen_rtx_REG (DImode, REGNO (operands[0])); + operands[1] = gen_rtx_REG (DImode, REGNO (operands[1])); + emit_insn (gen_lshrdi3 (operands[0], operands[1], GEN_INT (32))); DONE; }) |
