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| author | amylaar <amylaar@138bc75d-0d04-0410-961f-82ee72b054a4> | 2000-06-01 23:36:32 +0000 |
|---|---|---|
| committer | amylaar <amylaar@138bc75d-0d04-0410-961f-82ee72b054a4> | 2000-06-01 23:36:32 +0000 |
| commit | 37226c2ad1679f11f2d9003831a67b28afb59347 (patch) | |
| tree | a516bb82583cc6ba62d20699789b29d1f54218d0 | |
| parent | daca63bd7c43ba94c7b1d4242bc26d13dc710f75 (diff) | |
| download | ppe42-gcc-37226c2ad1679f11f2d9003831a67b28afb59347.tar.gz ppe42-gcc-37226c2ad1679f11f2d9003831a67b28afb59347.zip | |
* sh.h (CPP_SPEC): Add -D__NOMACSAVE__ for -mnomacsave.
(CONDITIONAL_REGISTER_USAGE): Mac registers are call used
for TARGET_NOMACSAVE.
(NOMACSAVE_BIT): Define.
(TARGET_NOMACSAVE): Define.
(TARGET_SWITCHES): Add "nomacsave".
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@34350 138bc75d-0d04-0410-961f-82ee72b054a4
| -rw-r--r-- | gcc/ChangeLog | 9 | ||||
| -rw-r--r-- | gcc/config/sh/sh.h | 8 |
2 files changed, 16 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 67cd6fa63f8..8636b7918ab 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +Fri Jun 2 00:22:52 2000 J"orn Rennecke <amylaar@cygnus.co.uk> + + * sh.h (CPP_SPEC): Add -D__NOMACSAVE__ for -mnomacsave. + (CONDITIONAL_REGISTER_USAGE): Mac registers are call used + for TARGET_NOMACSAVE. + (NOMACSAVE_BIT): Define. + (TARGET_NOMACSAVE): Define. + (TARGET_SWITCHES): Add "nomacsave". + 2000-06-02 Toshiyasu Morita <toshi.morita@sega.com> * sh.md (untyped_call): Remove excess parameters diff --git a/gcc/config/sh/sh.h b/gcc/config/sh/sh.h index 07c971fed03..6f14d3c5bed 100644 --- a/gcc/config/sh/sh.h +++ b/gcc/config/sh/sh.h @@ -48,6 +48,7 @@ extern int code_for_indirect_jump_scratch; %{m4-single:-D__SH4_SINGLE__} \ %{m4:-D__SH4__} \ %{!m1:%{!m2:%{!m3:%{!m3e:%{!m4:%{!m4-single:%{!m4-single-only:-D__sh1__}}}}}}} \ +%{mnomacsave:-D__NOMACSAVE__} \ %{mhitachi:-D__HITACHI__}" #define CPP_PREDEFINES "-D__sh__ -Acpu(sh) -Amachine(sh)" @@ -77,7 +78,7 @@ extern int code_for_indirect_jump_scratch; } \ } \ /* Hitachi saves and restores mac registers on call. */ \ - if (TARGET_HITACHI) \ + if (TARGET_HITACHI && ! TARGET_NOMACSAVE) \ { \ call_used_regs[MACH_REG] = 0; \ call_used_regs[MACL_REG] = 0; \ @@ -103,6 +104,7 @@ extern int target_flags; #define BIGTABLE_BIT (1<<14) #define RELAX_BIT (1<<15) #define HITACHI_BIT (1<<22) +#define NOMACSAVE_BIT (1<<23) #define PADSTRUCT_BIT (1<<28) #define LITTLE_ENDIAN_BIT (1<<29) #define IEEE_BIT (1<<30) @@ -162,6 +164,9 @@ extern int target_flags; /* Nonzero if using Hitachi's calling convention. */ #define TARGET_HITACHI (target_flags & HITACHI_BIT) +/* Nonzero if not saving macl/mach when using -mhitachi */ +#define TARGET_NOMACSAVE (target_flags & NOMACSAVE_BIT) + /* Nonzero if padding structures to a multiple of 4 bytes. This is incompatible with Hitachi's compiler, and gives unusual structure layouts which confuse programmers. @@ -185,6 +190,7 @@ extern int target_flags; {"dalign", DALIGN_BIT}, \ {"fmovd", FMOVD_BIT}, \ {"hitachi", HITACHI_BIT}, \ + {"nomacsave", NOMACSAVE_BIT}, \ {"ieee", IEEE_BIT}, \ {"isize", ISIZE_BIT}, \ {"l", LITTLE_ENDIAN_BIT}, \ |
