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| author | ciceron <ciceron@138bc75d-0d04-0410-961f-82ee72b054a4> | 2000-09-11 06:10:30 +0000 |
|---|---|---|
| committer | ciceron <ciceron@138bc75d-0d04-0410-961f-82ee72b054a4> | 2000-09-11 06:10:30 +0000 |
| commit | 2e7b894db1cf3d4f2234dceda6542fc2b55ad048 (patch) | |
| tree | 7115fc575e37c9933c3a086e9ff3157f879ae98e | |
| parent | 271421e8aac865ae06806cd4f747d75edad1d6a7 (diff) | |
| download | ppe42-gcc-2e7b894db1cf3d4f2234dceda6542fc2b55ad048.tar.gz ppe42-gcc-2e7b894db1cf3d4f2234dceda6542fc2b55ad048.zip | |
* gcc.1: Document 68hc11 specific options.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@36312 138bc75d-0d04-0410-961f-82ee72b054a4
| -rw-r--r-- | gcc/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/gcc.1 | 39 |
2 files changed, 42 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 43f8040ab68..c22dd3c2860 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +2000-09-10 Stephane Carrez <Stephane.Carrez@worldnet.fr> + + * gcc.1: Document 68hc11 specific options. + 2000-09-10 Geoff Keating <geoffk@cygnus.com> * config/rs6000/sysv4.h (MASK_LONG_DOUBLE_128): Define. diff --git a/gcc/gcc.1 b/gcc/gcc.1 index e1907510e39..2da279b23c1 100644 --- a/gcc/gcc.1 +++ b/gcc/gcc.1 @@ -20,7 +20,7 @@ .if n .sp .if t .sp 0.4 .. -.Id $Id: gcc.1,v 1.14 2000/04/11 06:01:52 loewis Exp $ +.Id $Id: gcc.1,v 1.15 2000/05/17 08:15:25 cagney Exp $ .TH GCC 1 "\*(Dt" "GNU Tools" "GNU Tools" .SH NAME gcc, g++ \- GNU project C and C++ Compiler (gcc-2.96) @@ -330,6 +330,14 @@ in the following sections. \-mshort \-msoft\-float .Sp +.I M68hc1x\ Options +.br +\-m68hc11 +\-m68hc12 +\-mshort +\-msoft\-reg\-count \fInum\fP +\-mauto-incdec +.Sp .I VAX Options .br \-mg @@ -2877,6 +2885,35 @@ processors, but not by the 68000. .PP These `\|\c .B \-m\c +\&\|' options are defined for the Motorola 68HC11 and 68HC12: +.TP +.B \-m68hc11 +Generate output for a 68HC11. This is the default when the compiler +is configured for a 68HC11-based target. +.TP +.B \-m68hc12 +Generate output for a 68HC12. This is the default when the compiler +is configured for a 68HC12-based target. +.TP +.B \-mshort +Consider type \c +.B int\c +\& to be 16 bits wide, like \c +.B short int\c +\&. +.TP +.B \-msoft-reg-count=\fInum\fP +Specify the number of pseudo-soft registers which are used for the +code generation. The maximum number is 32. Using more pseudo-soft +register may or may not result in better code depending on the program. +The default is 4 for 68HC11 and 2 for 68HC12. +.TP +.B \-mauto-incdec +Enable the use of 68HC12 pre and post auto-increment and auto-decrement +addressing modes. +.PP +These `\|\c +.B \-m\c \&\|' options are defined for the Vax: .TP .B \-munix |
