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| author | chaoyingfu <chaoyingfu@138bc75d-0d04-0410-961f-82ee72b054a4> | 2007-05-08 22:53:25 +0000 |
|---|---|---|
| committer | chaoyingfu <chaoyingfu@138bc75d-0d04-0410-961f-82ee72b054a4> | 2007-05-08 22:53:25 +0000 |
| commit | 21b84dd48cd2aca3fe482f501208e06bd11849ba (patch) | |
| tree | c805b3407396507fce4861fa56c8f9ea887624dc | |
| parent | 43fda2619f4b075d814e64a161fec03b09f95b9b (diff) | |
| download | ppe42-gcc-21b84dd48cd2aca3fe482f501208e06bd11849ba.tar.gz ppe42-gcc-21b84dd48cd2aca3fe482f501208e06bd11849ba.zip | |
* gcc.target/mips/msub-1.c, gcc.target/mips/msub-2.c,
* gcc.target/mips/msub-3.c, gcc.target/mips/msub-4.c,
* gcc.target/mips/msubu-1.c, gcc.target/mips/msubu-2.c,
* gcc.target/mips/msubu-3.c, gcc.target/mips/msubu-4.c: New tests.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@124559 138bc75d-0d04-0410-961f-82ee72b054a4
| -rw-r--r-- | gcc/testsuite/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/mips/msub-1.c | 19 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/mips/msub-2.c | 19 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/mips/msub-3.c | 19 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/mips/msub-4.c | 19 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/mips/msubu-1.c | 22 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/mips/msubu-2.c | 22 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/mips/msubu-3.c | 22 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/mips/msubu-4.c | 22 |
9 files changed, 171 insertions, 0 deletions
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index bbda63cf781..e2f0a356985 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,10 @@ +2007-05-08 Chao-ying Fu <fu@mips.com> + + * gcc.target/mips/msub-1.c, gcc.target/mips/msub-2.c, + * gcc.target/mips/msub-3.c, gcc.target/mips/msub-4.c, + * gcc.target/mips/msubu-1.c, gcc.target/mips/msubu-2.c, + * gcc.target/mips/msubu-3.c, gcc.target/mips/msubu-4.c: New tests. + 2007-05-08 Simon Martin <simartin@users.sourceforge.net> PR 31847 diff --git a/gcc/testsuite/gcc.target/mips/msub-1.c b/gcc/testsuite/gcc.target/mips/msub-1.c new file mode 100644 index 00000000000..d27e6479ef5 --- /dev/null +++ b/gcc/testsuite/gcc.target/mips/msub-1.c @@ -0,0 +1,19 @@ +/* { dg-do compile } */ +/* { dg-mips-options "-O2 -march=vr5400 -mgp32" } */ +/* { dg-final { scan-assembler-times "\tmsac\t\\\$0," 2 } } */ + +long long +f1 (int x, int y, long long z) +{ + return z - (long long) y * x; +} + +long long +f2 (int x, int y, long long z) +{ + long long t = (long long) x * y; + int temp = 5; + if (temp == 5) + z -= t; + return z; +} diff --git a/gcc/testsuite/gcc.target/mips/msub-2.c b/gcc/testsuite/gcc.target/mips/msub-2.c new file mode 100644 index 00000000000..acb7efb2b43 --- /dev/null +++ b/gcc/testsuite/gcc.target/mips/msub-2.c @@ -0,0 +1,19 @@ +/* { dg-do compile } */ +/* { dg-mips-options "-O2 -march=vr5500 -mgp32" } */ +/* { dg-final { scan-assembler-times "\tmsub\t" 2 } } */ + +long long +f1 (int x, int y, long long z) +{ + return z - (long long) y * x; +} + +long long +f2 (int x, int y, long long z) +{ + long long t = (long long) x * y; + int temp = 5; + if (temp == 5) + z -= t; + return z; +} diff --git a/gcc/testsuite/gcc.target/mips/msub-3.c b/gcc/testsuite/gcc.target/mips/msub-3.c new file mode 100644 index 00000000000..85cfed2febe --- /dev/null +++ b/gcc/testsuite/gcc.target/mips/msub-3.c @@ -0,0 +1,19 @@ +/* { dg-do compile } */ +/* { dg-mips-options "-O2 -mips32 -mgp32" } */ +/* { dg-final { scan-assembler-times "\tmsub\t" 2 } } */ + +long long +f1 (int x, int y, long long z) +{ + return z - (long long) y * x; +} + +long long +f2 (int x, int y, long long z) +{ + long long t = (long long) x * y; + int temp = 5; + if (temp == 5) + z -= t; + return z; +} diff --git a/gcc/testsuite/gcc.target/mips/msub-4.c b/gcc/testsuite/gcc.target/mips/msub-4.c new file mode 100644 index 00000000000..8a526f8f583 --- /dev/null +++ b/gcc/testsuite/gcc.target/mips/msub-4.c @@ -0,0 +1,19 @@ +/* { dg-do compile } */ +/* { dg-mips-options "-O2 -mips32r2 -mdspr2 -mgp32" } */ +/* { dg-final { scan-assembler-times "\tmsub\t\\\$ac" 2 } } */ + +long long +f1 (int x, int y, long long z) +{ + return z - (long long) y * x; +} + +long long +f2 (int x, int y, long long z) +{ + long long t = (long long) x * y; + int temp = 5; + if (temp == 5) + z -= t; + return z; +} diff --git a/gcc/testsuite/gcc.target/mips/msubu-1.c b/gcc/testsuite/gcc.target/mips/msubu-1.c new file mode 100644 index 00000000000..9390c473f53 --- /dev/null +++ b/gcc/testsuite/gcc.target/mips/msubu-1.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-mips-options "-O2 -march=vr5400 -mgp32" } */ +/* { dg-final { scan-assembler-times "\tmsacu\t\\\$0," 2 } } */ + +typedef unsigned int ui; +typedef unsigned long long ull; + +ull +f1 (ui x, ui y, ull z) +{ + return z - (ull) y * x; +} + +ull +f2 (ui x, ui y, ull z) +{ + ull t = (ull) x * y; + int temp = 5; + if (temp == 5) + z -= t; + return z; +} diff --git a/gcc/testsuite/gcc.target/mips/msubu-2.c b/gcc/testsuite/gcc.target/mips/msubu-2.c new file mode 100644 index 00000000000..75fb404eb97 --- /dev/null +++ b/gcc/testsuite/gcc.target/mips/msubu-2.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-mips-options "-O2 -march=vr5500 -mgp32" } */ +/* { dg-final { scan-assembler-times "\tmsubu\t" 2 } } */ + +typedef unsigned int ui; +typedef unsigned long long ull; + +ull +f1 (ui x, ui y, ull z) +{ + return z - (ull) y * x; +} + +ull +f2 (ui x, ui y, ull z) +{ + ull t = (ull) x * y; + int temp = 5; + if (temp == 5) + z -= t; + return z; +} diff --git a/gcc/testsuite/gcc.target/mips/msubu-3.c b/gcc/testsuite/gcc.target/mips/msubu-3.c new file mode 100644 index 00000000000..055ba589a95 --- /dev/null +++ b/gcc/testsuite/gcc.target/mips/msubu-3.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-mips-options "-O2 -mips32 -mgp32" } */ +/* { dg-final { scan-assembler-times "\tmsubu\t" 2 } } */ + +typedef unsigned int ui; +typedef unsigned long long ull; + +ull +f1 (ui x, ui y, ull z) +{ + return z - (ull) y * x; +} + +ull +f2 (ui x, ui y, ull z) +{ + ull t = (ull) x * y; + int temp = 5; + if (temp == 5) + z -= t; + return z; +} diff --git a/gcc/testsuite/gcc.target/mips/msubu-4.c b/gcc/testsuite/gcc.target/mips/msubu-4.c new file mode 100644 index 00000000000..ea4adb1b080 --- /dev/null +++ b/gcc/testsuite/gcc.target/mips/msubu-4.c @@ -0,0 +1,22 @@ +/* { dg-do compile } */ +/* { dg-mips-options "-O2 -mips32r2 -mdspr2 -mgp32" } */ +/* { dg-final { scan-assembler-times "\tmsubu\t\\\$ac" 2 } } */ + +typedef unsigned int ui; +typedef unsigned long long ull; + +ull +f1 (ui x, ui y, ull z) +{ + return z - (ull) y * x; +} + +ull +f2 (ui x, ui y, ull z) +{ + ull t = (ull) x * y; + int temp = 5; + if (temp == 5) + z -= t; + return z; +} |

