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| author | fjahanian <fjahanian@138bc75d-0d04-0410-961f-82ee72b054a4> | 2004-01-26 17:47:42 +0000 |
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| committer | fjahanian <fjahanian@138bc75d-0d04-0410-961f-82ee72b054a4> | 2004-01-26 17:47:42 +0000 |
| commit | 1f2ba3bd10a70ec2c7275d45a448bc2dcb1fa3cf (patch) | |
| tree | 434d03d66edabe292ed1b962b78ac566f6ee0038 | |
| parent | 568b64fdaac03c1c27aeb90aca632c81ff07c5e6 (diff) | |
| download | ppe42-gcc-1f2ba3bd10a70ec2c7275d45a448bc2dcb1fa3cf.tar.gz ppe42-gcc-1f2ba3bd10a70ec2c7275d45a448bc2dcb1fa3cf.zip | |
rs6000.c, rs6000.md, function.c, expr.c checked in. All related to -mcpu=G5
compilation mode.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@76651 138bc75d-0d04-0410-961f-82ee72b054a4
| -rw-r--r-- | gcc/ChangeLog | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f873023c6d4..65f5704f49f 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,26 @@ +2004-01-26 Fariborz Jahanian <fjahanian@apple.com> + + * config/rs6000/rs6000.c (rs6000_emit_move): split slow + unaligned load/store into smaller loads and stores. + +2004-01-26 Fariborz Jahanian <fjahanian@apple.com> + + * function.c (assign_parms): Do not assign + long long argument to memory in prologue if + is it loaded into register. + +2004-01-26 Fariborz Jahanian <fjahanian@apple.com> + + PR middle-end/13779 + * expr.c (emit_group_load): split constant + correctly into register components of PARALLEL insn. + +2004-01-26 Fariborz Jahanian <fjahanian@apple.com> + + * gcc/config/rs6000/rs6000.md (save_stack_nonlocal): + Use adjust_address_nv directly with appropriate mode. + (restore_stack_nonlocal): Ditto. + 2004-01-26 Kazu Hirata <kazu@cs.umass.edu> * config/xtensa/xtensa-protos.h: Remove the prototype for |
