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ppe42-binutils
binutils-2_24-ppe42
GNU Binutils for the PPE42
Raptor Computing Systems
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opcodes
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i386-gen.c
Commit message (
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)
Author
Age
Files
Lines
*
Remove CpuNop from CPU_K6_2_FLAGS
H.J. Lu
2013-11-08
1
-1
/
+1
*
Add Intel AVX-512 support
H.J. Lu
2013-07-26
1
-2
/
+33
*
Support Intel SHA
H.J. Lu
2013-07-25
1
-0
/
+3
*
Support Intel MPX
H.J. Lu
2013-07-24
1
-0
/
+7
*
gas/
Saravanan Ekanathan
2013-05-15
1
-1
/
+1
*
Implement Intel SMAP instructions
H.J. Lu
2013-02-19
1
-0
/
+3
*
Add OPERAND_TYPE_IMM32_64
H.J. Lu
2013-01-16
1
-0
/
+2
*
Update copyright year to 2013
H.J. Lu
2013-01-02
1
-2
/
+2
*
Add AMD bdver3 support.
Nagajyothi Eggone
2012-10-09
1
-0
/
+2
*
Add missing Cpu flags in bd and bt cores
H.J. Lu
2012-09-25
1
-4
/
+4
*
Replace CpuSSE3 with CpuCX16 for cmpxchg16b
H.J. Lu
2012-09-20
1
-8
/
+11
*
Add AMD btver1 and btver2 support
H.J. Lu
2012-08-17
1
-0
/
+4
*
Enable FMA instructions for bdver2
H.J. Lu
2012-08-10
1
-1
/
+1
*
Implement RDRSEED, ADX and PRFCHW instructions
H.J. Lu
2012-07-16
1
-0
/
+9
*
gas/
Roland McGrath
2012-06-22
1
-8
/
+9
*
Implement Intel Transactional Synchronization Extensions
H.J. Lu
2012-02-08
1
-0
/
+7
*
Add vmfunc
H.J. Lu
2012-01-13
1
-0
/
+3
*
Add initial Intel K1OM support.
H.J. Lu
2011-07-22
1
-1
/
+4
*
Support AVX Programming Reference (June, 2011).
H.J. Lu
2011-06-10
1
-2
/
+15
*
Add CpuF16C to CPU_BDVER2_FLAGS.
Quentin Neill
2011-06-03
1
-1
/
+1
*
2011-05-10 Quentin Neill <quentin.neill@amd.com>
Quentin Neill
2011-05-11
1
-0
/
+2
*
* i386-gen.c (cpu_flag_init): Remove 3dnow and 3dnowa bits
Quentin Neill
2011-04-19
1
-1
/
+1
*
Add support for TBM instructions.
Quentin Neill
2011-01-17
1
-0
/
+3
*
Implement BMI instructions.
H.J. Lu
2011-01-05
1
-0
/
+3
*
Update copyright in comments to 2011.
H.J. Lu
2011-01-01
1
-2
/
+2
*
Update copyright to 2011.
H.J. Lu
2011-01-01
1
-1
/
+1
*
Add CpuNop to CPU_GENERIC64_FLAGS.
H.J. Lu
2010-10-16
1
-1
/
+1
*
Add CheckRegSize to instructions which require register size check.
H.J. Lu
2010-10-14
1
-0
/
+1
*
Don't generate multi-byte NOPs for i686.
H.J. Lu
2010-08-06
1
-12
/
+17
*
Support AVX Programming Reference (June, 2010)
H.J. Lu
2010-07-01
1
-0
/
+12
*
Update copyright.
H.J. Lu
2010-02-11
1
-2
/
+2
*
2010-02-10 Quentin Neill <quentin.neill@amd.com>
Sebastian Pop
2010-02-11
1
-0
/
+3
*
2010-02-03 Quentin Neill <quentin.neill@amd.com>
Sebastian Pop
2010-02-03
1
-1
/
+1
*
2010-01-06 Quentin Neill <quentin.neill@amd.com>
Sebastian Pop
2010-01-06
1
-0
/
+2
*
Replace VexNDS, VexNDD and VexLWP with VexVVVV.
H.J. Lu
2009-12-19
1
-3
/
+1
*
Move Imm1 before Imm8.
H.J. Lu
2009-12-18
1
-1
/
+1
*
Remove ByteOkIntel.
H.J. Lu
2009-12-16
1
-1
/
+0
*
Replace Vex0F, Vex0F38, Vex0F3A, XOP08, XOP09 and XOP0A with VexOpcode.
H.J. Lu
2009-12-16
1
-6
/
+1
*
Replace Vex2Sources and Vex3Sources with VexSources.
H.J. Lu
2009-12-16
1
-2
/
+1
*
Remove VexW0 and VexW1. Add VexW.
H.J. Lu
2009-12-16
1
-2
/
+1
*
2009-11-18 Sebastian Pop <sebastian.pop@amd.com>
Sebastian Pop
2009-11-18
1
-4
/
+1
*
2009-11-17 Sebastian Pop <sebastian.pop@amd.com>
Sebastian Pop
2009-11-18
1
-0
/
+8
*
gas/
H.J. Lu
2009-11-12
1
-0
/
+1
*
2009-11-05 Sebastian Pop <sebastian.pop@amd.com>
Sebastian Pop
2009-11-05
1
-1
/
+7
*
gas/
H.J. Lu
2009-09-24
1
-1
/
+23
*
Updated sources to avoid using the identifier name "new", which is a
Nick Clifton
2009-08-29
1
-1
/
+1
*
bfd/
H.J. Lu
2009-07-25
1
-11
/
+45
*
gas/
Jan Beulich
2009-07-24
1
-16
/
+39
*
<gas changes>
Dwarakanath Rajagopal
2009-07-06
1
-0
/
+3
*
<gas changes>
Dwarakanath Rajagopal
2009-05-22
1
-6
/
+0
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