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author | Quentin Neill <quentin.neill@amd.com> | 2011-04-19 23:45:17 +0000 |
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committer | Quentin Neill <quentin.neill@amd.com> | 2011-04-19 23:45:17 +0000 |
commit | b13a3ca6832172b400d9dc68551672f1530b7d62 (patch) | |
tree | 2814cf7d53d33d4dce6d10ca727334f52141c8cc /opcodes/i386-gen.c | |
parent | 7a9dd1b270ed6fa1dbf81ef4aea857e7947e9d44 (diff) | |
download | ppe42-binutils-b13a3ca6832172b400d9dc68551672f1530b7d62.tar.gz ppe42-binutils-b13a3ca6832172b400d9dc68551672f1530b7d62.zip |
* i386-gen.c (cpu_flag_init): Remove 3dnow and 3dnowa bits
from bdver1 flags.
Diffstat (limited to 'opcodes/i386-gen.c')
-rw-r--r-- | opcodes/i386-gen.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index e791c61037..d4adcf8179 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -89,7 +89,7 @@ static initializer cpu_flag_init[] = { "CPU_AMDFAM10_FLAGS", "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|Cpu3dnow|Cpu3dnowA|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM" }, { "CPU_BDVER1_FLAGS", - "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|Cpu3dnow|Cpu3dnowA|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA4|CpuXOP|CpuLWP" }, + "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA4|CpuXOP|CpuLWP" }, { "CPU_8087_FLAGS", "Cpu8087" }, { "CPU_287_FLAGS", |