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| author | Yufeng Zhang <yufeng.zhang@arm.com> | 2013-11-18 11:57:19 +0000 |
|---|---|---|
| committer | Yufeng Zhang <yufeng.zhang@arm.com> | 2013-11-18 11:57:19 +0000 |
| commit | b31f4fea7757bad63c1061aabba19401a6b737e4 (patch) | |
| tree | eb2f8fd6bf83ef7ccf219f9a0b4bc634e5b755c2 /opcodes/ChangeLog | |
| parent | ac6cefb0a8168a4187161f0262b1e41c2d248a88 (diff) | |
| download | ppe42-binutils-b31f4fea7757bad63c1061aabba19401a6b737e4.tar.gz ppe42-binutils-b31f4fea7757bad63c1061aabba19401a6b737e4.zip | |
Revert "Add support for AArch64 trace unit registers."
This reverts commit 7568a4e05cc35bc96e7a422a7f3a453665479197.
Diffstat (limited to 'opcodes/ChangeLog')
| -rw-r--r-- | opcodes/ChangeLog | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 8920253c9c..75532119ab 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,15 @@ +2013-11-18 Yufeng Zhang <yufeng.zhang@arm.com> + + Revert + + 2013-11-15 Yufeng Zhang <yufeng.zhang@arm.com> + + * aarch64-opc.c (CPENT): New define. + (F_READONLY, F_WRITEONLY): Likewise. + (aarch64_sys_regs): Add trace unit registers. + (aarch64_sys_reg_readonly_p): New function. + (aarch64_sys_reg_writeonly_p): Ditto. + 2013-11-15 Yufeng Zhang <yufeng.zhang@arm.com> * aarch64-opc.c (CPENT): New define. |
