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path: root/arch/arm64/kernel/cpu_errata.c
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* arm64: cpufeature: Schedule enable() calls instead of calling them via IPIJames Morse2016-10-201-1/+2
* arm64: Work around systems with mismatched cache line sizesSuzuki K Poulose2016-09-091-0/+22
* arm64: Use consistent naming for errata handlingSuzuki K Poulose2016-09-091-2/+2
* Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/a...Linus Torvalds2016-07-271-0/+7
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| * arm64: trap userspace "dc cvau" cache operation on errata-affected coreAndre Przywara2016-07-011-0/+2
| * arm64: errata: Calling enable functions for CPU errata tooAndre Przywara2016-07-011-0/+5
* | arm64: Enable workaround for Cavium erratum 27456 on thunderx-81xxGanapatrao Kulkarni2016-07-071-0/+6
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* arm64: Verify CPU errata work arounds on hotplugged CPUSuzuki K Poulose2016-04-251-0/+20
* arm64: cpufeature: Add scope for capability checkSuzuki K Poulose2016-04-251-1/+3
* arm64: Add workaround for Cavium erratum 27456Andrew Pinski2016-02-261-0/+9
* arm64: prefetch: add alternative pattern for CPUs without a prefetcherWill Deacon2016-02-161-15/+3
* arm64: KVM: Add workaround for Cortex-A57 erratum 834220Marc Zyngier2015-11-241-0/+9
* Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/a...Linus Torvalds2015-11-041-1/+1
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| * arm64: Refactor check_cpu_capabilitiesSuzuki K. Poulose2015-10-211-1/+1
* | irqchip/gicv3: Workaround for Cavium ThunderX erratum 23154Robert Richter2015-09-291-0/+9
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* arm64: fix midr range for Cortex-A57 erratum 832075Bo Yan2015-04-011-1/+2
* arm64: errata: add workaround for cortex-a53 erratum #845719Will Deacon2015-04-011-0/+8
* arm64: Extract feature parsing code from cpu_errata.cMarc Zyngier2015-03-301-32/+4
* arm64: alternatives: fix pr_fmt string for consistencyWill Deacon2014-11-251-1/+1
* arm64: protect alternatives workarounds with Kconfig optionsAndre Przywara2014-11-251-0/+14
* arm64: add Cortex-A57 erratum 832075 workaroundAndre Przywara2014-11-251-0/+7
* arm64: add Cortex-A53 cache errata workaroundAndre Przywara2014-11-251-1/+32
* arm64: detect silicon revisions and set cap bits accordinglyAndre Przywara2014-11-251-0/+59
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