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author | Linus Torvalds <torvalds@linux-foundation.org> | 2015-02-17 09:17:33 -0800 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2015-02-17 09:17:33 -0800 |
commit | ea7531ac4a9d0b39edce43472147dc41cc2b7a34 (patch) | |
tree | c49d395de24f670bcf6cb5746af9e503b255e96b /arch/arm/mach-at91/include/mach | |
parent | 4025fa97ff39db054b47b9cdb9f3980480637668 (diff) | |
parent | 41e229a91207afc326f9a83ba33c098c8362d303 (diff) | |
download | blackbird-op-linux-ea7531ac4a9d0b39edce43472147dc41cc2b7a34.tar.gz blackbird-op-linux-ea7531ac4a9d0b39edce43472147dc41cc2b7a34.zip |
Merge tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC cleanups from Olof Johansson:
"This is a good healthy set of various code removals. Total net delta
is 8100 lines removed.
Among the larger cleanups are:
- Removal of old Samsung S3C DMA infrastructure by Arnd
- Removal of the non-DT version of the 'lager' board by Magnus Damm
- General stale code removal on OMAP and Davinci by Rickard Strandqvist
- Removal of non-DT support on am3517 platforms by Tony Lindgren
... plus several other cleanups of various platforms across the board"
* tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (47 commits)
ARM: sirf: drop redundant function and marco declaration
arm: omap: specify PMUs are for ARMv7 CPUs
arm: shmobile: specify PMUs are for ARMv7 CPUs
arm: iop: specify PMUs are for XScale CPUs
arm: pxa: specify PMUs are for XScale CPUs
arm: realview: specify PMU types
ARM: SAMSUNG: remove unused DMA infrastructure
ARM: OMAP3: Add back Kconfig option MACH_OMAP3517EVM for ASoC
ARM: davinci: Remove CDCE949 driver
ARM: at91: remove useless at91rm9200_set_type()
ARM: at91: remove useless at91rm9200_dt_initialize()
ARM: at91: move debug-macro.S into the common space
ARM: at91: remove useless at91_sysirq_mask_rtx
ARM: at91: remove useless config MACH_AT91SAM9_DT
ARM: at91: remove useless config MACH_AT91RM9200_DT
ARM: at91: remove unused mach/memory.h
ARM: at91: remove useless header file includes
ARM: at91: remove unneeded header file
rtc: at91/Kconfig: remove useless options
ARM: at91/Documentation: add a README for Atmel SoCs
...
Diffstat (limited to 'arch/arm/mach-at91/include/mach')
-rw-r--r-- | arch/arm/mach-at91/include/mach/at91_pio.h | 80 | ||||
-rw-r--r-- | arch/arm/mach-at91/include/mach/at91_rtt.h | 35 | ||||
-rw-r--r-- | arch/arm/mach-at91/include/mach/debug-macro.S | 46 | ||||
-rw-r--r-- | arch/arm/mach-at91/include/mach/memory.h | 26 |
4 files changed, 0 insertions, 187 deletions
diff --git a/arch/arm/mach-at91/include/mach/at91_pio.h b/arch/arm/mach-at91/include/mach/at91_pio.h deleted file mode 100644 index 7b7366253ceb..000000000000 --- a/arch/arm/mach-at91/include/mach/at91_pio.h +++ /dev/null @@ -1,80 +0,0 @@ -/* - * arch/arm/mach-at91/include/mach/at91_pio.h - * - * Copyright (C) 2005 Ivan Kokshaysky - * Copyright (C) SAN People - * - * Parallel I/O Controller (PIO) - System peripherals registers. - * Based on AT91RM9200 datasheet revision E. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_PIO_H -#define AT91_PIO_H - -#define PIO_PER 0x00 /* Enable Register */ -#define PIO_PDR 0x04 /* Disable Register */ -#define PIO_PSR 0x08 /* Status Register */ -#define PIO_OER 0x10 /* Output Enable Register */ -#define PIO_ODR 0x14 /* Output Disable Register */ -#define PIO_OSR 0x18 /* Output Status Register */ -#define PIO_IFER 0x20 /* Glitch Input Filter Enable */ -#define PIO_IFDR 0x24 /* Glitch Input Filter Disable */ -#define PIO_IFSR 0x28 /* Glitch Input Filter Status */ -#define PIO_SODR 0x30 /* Set Output Data Register */ -#define PIO_CODR 0x34 /* Clear Output Data Register */ -#define PIO_ODSR 0x38 /* Output Data Status Register */ -#define PIO_PDSR 0x3c /* Pin Data Status Register */ -#define PIO_IER 0x40 /* Interrupt Enable Register */ -#define PIO_IDR 0x44 /* Interrupt Disable Register */ -#define PIO_IMR 0x48 /* Interrupt Mask Register */ -#define PIO_ISR 0x4c /* Interrupt Status Register */ -#define PIO_MDER 0x50 /* Multi-driver Enable Register */ -#define PIO_MDDR 0x54 /* Multi-driver Disable Register */ -#define PIO_MDSR 0x58 /* Multi-driver Status Register */ -#define PIO_PUDR 0x60 /* Pull-up Disable Register */ -#define PIO_PUER 0x64 /* Pull-up Enable Register */ -#define PIO_PUSR 0x68 /* Pull-up Status Register */ -#define PIO_ASR 0x70 /* Peripheral A Select Register */ -#define PIO_ABCDSR1 0x70 /* Peripheral ABCD Select Register 1 [some sam9 only] */ -#define PIO_BSR 0x74 /* Peripheral B Select Register */ -#define PIO_ABCDSR2 0x74 /* Peripheral ABCD Select Register 2 [some sam9 only] */ -#define PIO_ABSR 0x78 /* AB Status Register */ -#define PIO_IFSCDR 0x80 /* Input Filter Slow Clock Disable Register */ -#define PIO_IFSCER 0x84 /* Input Filter Slow Clock Enable Register */ -#define PIO_IFSCSR 0x88 /* Input Filter Slow Clock Status Register */ -#define PIO_SCDR 0x8c /* Slow Clock Divider Debouncing Register */ -#define PIO_SCDR_DIV (0x3fff << 0) /* Slow Clock Divider Mask */ -#define PIO_PPDDR 0x90 /* Pad Pull-down Disable Register */ -#define PIO_PPDER 0x94 /* Pad Pull-down Enable Register */ -#define PIO_PPDSR 0x98 /* Pad Pull-down Status Register */ -#define PIO_OWER 0xa0 /* Output Write Enable Register */ -#define PIO_OWDR 0xa4 /* Output Write Disable Register */ -#define PIO_OWSR 0xa8 /* Output Write Status Register */ -#define PIO_AIMER 0xb0 /* Additional Interrupt Modes Enable Register */ -#define PIO_AIMDR 0xb4 /* Additional Interrupt Modes Disable Register */ -#define PIO_AIMMR 0xb8 /* Additional Interrupt Modes Mask Register */ -#define PIO_ESR 0xc0 /* Edge Select Register */ -#define PIO_LSR 0xc4 /* Level Select Register */ -#define PIO_ELSR 0xc8 /* Edge/Level Status Register */ -#define PIO_FELLSR 0xd0 /* Falling Edge/Low Level Select Register */ -#define PIO_REHLSR 0xd4 /* Rising Edge/ High Level Select Register */ -#define PIO_FRLHSR 0xd8 /* Fall/Rise - Low/High Status Register */ -#define PIO_SCHMITT 0x100 /* Schmitt Trigger Register */ - -#define ABCDSR_PERIPH_A 0x0 -#define ABCDSR_PERIPH_B 0x1 -#define ABCDSR_PERIPH_C 0x2 -#define ABCDSR_PERIPH_D 0x3 - -#define SAMA5D3_PIO_DRIVER1 0x118 /*PIO Driver 1 register offset*/ -#define SAMA5D3_PIO_DRIVER2 0x11C /*PIO Driver 2 register offset*/ - -#define AT91SAM9X5_PIO_DRIVER1 0x114 /*PIO Driver 1 register offset*/ -#define AT91SAM9X5_PIO_DRIVER2 0x118 /*PIO Driver 2 register offset*/ - -#endif diff --git a/arch/arm/mach-at91/include/mach/at91_rtt.h b/arch/arm/mach-at91/include/mach/at91_rtt.h deleted file mode 100644 index 7ec75de8bbb6..000000000000 --- a/arch/arm/mach-at91/include/mach/at91_rtt.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * arch/arm/mach-at91/include/mach/at91_rtt.h - * - * Copyright (C) 2007 Andrew Victor - * Copyright (C) 2007 Atmel Corporation. - * - * Real-time Timer (RTT) - System peripherals regsters. - * Based on AT91SAM9261 datasheet revision D. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_RTT_H -#define AT91_RTT_H - -#define AT91_RTT_MR 0x00 /* Real-time Mode Register */ -#define AT91_RTT_RTPRES (0xffff << 0) /* Real-time Timer Prescaler Value */ -#define AT91_RTT_ALMIEN (1 << 16) /* Alarm Interrupt Enable */ -#define AT91_RTT_RTTINCIEN (1 << 17) /* Real Time Timer Increment Interrupt Enable */ -#define AT91_RTT_RTTRST (1 << 18) /* Real Time Timer Restart */ - -#define AT91_RTT_AR 0x04 /* Real-time Alarm Register */ -#define AT91_RTT_ALMV (0xffffffff) /* Alarm Value */ - -#define AT91_RTT_VR 0x08 /* Real-time Value Register */ -#define AT91_RTT_CRTV (0xffffffff) /* Current Real-time Value */ - -#define AT91_RTT_SR 0x0c /* Real-time Status Register */ -#define AT91_RTT_ALMS (1 << 0) /* Real-time Alarm Status */ -#define AT91_RTT_RTTINC (1 << 1) /* Real-time Timer Increment */ - -#endif diff --git a/arch/arm/mach-at91/include/mach/debug-macro.S b/arch/arm/mach-at91/include/mach/debug-macro.S deleted file mode 100644 index 2103a90f2261..000000000000 --- a/arch/arm/mach-at91/include/mach/debug-macro.S +++ /dev/null @@ -1,46 +0,0 @@ -/* - * arch/arm/mach-at91/include/mach/debug-macro.S - * - * Copyright (C) 2003-2005 SAN People - * - * Debugging macro include header - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * -*/ - -#include <mach/hardware.h> -#include <mach/at91_dbgu.h> - -#if defined(CONFIG_AT91_DEBUG_LL_DBGU0) -#define AT91_DBGU AT91_BASE_DBGU0 -#elif defined(CONFIG_AT91_DEBUG_LL_DBGU1) -#define AT91_DBGU AT91_BASE_DBGU1 -#else -/* On sama5d4, use USART3 as low level serial console */ -#define AT91_DBGU SAMA5D4_BASE_USART3 -#endif - - .macro addruart, rp, rv, tmp - ldr \rp, =AT91_DBGU @ System peripherals (phys address) - ldr \rv, =AT91_IO_P2V(AT91_DBGU) @ System peripherals (virt address) - .endm - - .macro senduart,rd,rx - strb \rd, [\rx, #(AT91_DBGU_THR)] @ Write to Transmitter Holding Register - .endm - - .macro waituart,rd,rx -1001: ldr \rd, [\rx, #(AT91_DBGU_SR)] @ Read Status Register - tst \rd, #AT91_DBGU_TXRDY @ DBGU_TXRDY = 1 when ready to transmit - beq 1001b - .endm - - .macro busyuart,rd,rx -1001: ldr \rd, [\rx, #(AT91_DBGU_SR)] @ Read Status Register - tst \rd, #AT91_DBGU_TXEMPTY @ DBGU_TXEMPTY = 1 when transmission complete - beq 1001b - .endm - diff --git a/arch/arm/mach-at91/include/mach/memory.h b/arch/arm/mach-at91/include/mach/memory.h deleted file mode 100644 index 401c207f2f39..000000000000 --- a/arch/arm/mach-at91/include/mach/memory.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * arch/arm/mach-at91/include/mach/memory.h - * - * Copyright (C) 2004 SAN People - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -#include <mach/hardware.h> - -#endif |