diff options
114 files changed, 177 insertions, 8286 deletions
diff --git a/Documentation/arm/Atmel/README b/Documentation/arm/Atmel/README new file mode 100644 index 000000000000..c53a19b4aab2 --- /dev/null +++ b/Documentation/arm/Atmel/README @@ -0,0 +1,124 @@ +ARM Atmel SoCs (aka AT91) +========================= + + +Introduction +------------ +This document gives useful information about the ARM Atmel SoCs that are +currently supported in Linux Mainline (you know, the one on kernel.org). + +It is important to note that the Atmel | SMART ARM-based MPU product line is +historically named "AT91" or "at91" throughout the Linux kernel development +process even if this product prefix has completely disappeared from the +official Atmel product name. Anyway, files, directories, git trees, +git branches/tags and email subject always contain this "at91" sub-string. + + +AT91 SoCs +--------- +Documentation and detailled datasheet for each product are available on +the Atmel website: http://www.atmel.com. + + Flavors: + * ARM 920 based SoC + - at91rm9200 + + Datasheet + http://www.atmel.com/Images/doc1768.pdf + + * ARM 926 based SoCs + - at91sam9260 + + Datasheet + http://www.atmel.com/Images/doc6221.pdf + + - at91sam9xe + + Datasheet + http://www.atmel.com/Images/Atmel-6254-32-bit-ARM926EJ-S-Embedded-Microprocessor-SAM9XE_Datasheet.pdf + + - at91sam9261 + + Datasheet + http://www.atmel.com/Images/doc6062.pdf + + - at91sam9263 + + Datasheet + http://www.atmel.com/Images/Atmel_6249_32-bit-ARM926EJ-S-Microcontroller_SAM9263_Datasheet.pdf + + - at91sam9rl + + Datasheet + http://www.atmel.com/Images/doc6289.pdf + + - at91sam9g20 + + Datasheet + http://www.atmel.com/Images/doc6384.pdf + + - at91sam9g45 family + - at91sam9g45 + - at91sam9g46 + - at91sam9m10 + - at91sam9m11 (device superset) + + Datasheet + http://www.atmel.com/Images/Atmel-6437-32-bit-ARM926-Embedded-Microprocessor-SAM9M11_Datasheet.pdf + + - at91sam9x5 family (aka "The 5 series") + - at91sam9g15 + - at91sam9g25 + - at91sam9g35 + - at91sam9x25 + - at91sam9x35 + + Datasheet (can be considered as covering the whole family) + http://www.atmel.com/Images/Atmel_11055_32-bit-ARM926EJ-S-Microcontroller_SAM9X35_Datasheet.pdf + + - at91sam9n12 + + Datasheet + http://www.atmel.com/Images/Atmel_11063_32-bit-ARM926EJ-S-Microcontroller_SAM9N12CN11CN12_Datasheet.pdf + + * ARM Cortex-A5 based SoCs + - sama5d3 family + - sama5d31 + - sama5d33 + - sama5d34 + - sama5d35 + - sama5d36 (device superset) + + Datasheet + http://www.atmel.com/Images/Atmel-11121-32-bit-Cortex-A5-Microcontroller-SAMA5D3_Datasheet.pdf + + * ARM Cortex-A5 + NEON based SoCs + - sama5d4 family + - sama5d41 + - sama5d42 + - sama5d43 + - sama5d44 (device superset) + + Datasheet + http://www.atmel.com/Images/Atmel-11238-32-bit-Cortex-A5-Microcontroller-SAMA5D4_Datasheet.pdf + + +Linux kernel information +------------------------ +Linux kernel mach directory: arch/arm/mach-at91 +MAINTAINERS entry is: "ARM/ATMEL AT91RM9200 AND AT91SAM ARM ARCHITECTURES" + + +Device Tree for AT91 SoCs and boards +------------------------------------ +All AT91 SoCs are converted to Device Tree. Since Linux 3.19, these products +must use this method to boot the Linux kernel. + +Work In Progress statement: +Device Tree files and Device Tree bindings that apply to AT91 SoCs and boards are +considered as "Unstable". To be completely clear, any at91 binding can change at +any time. So, be sure to use a Device Tree Binary and a Kernel Image generated from +the same source tree. +Please refer to the Documentation/devicetree/bindings/ABI.txt file for a +definition of a "Stable" binding/ABI. +This statement will be removed by AT91 MAINTAINERS when appropriate. + +Naming conventions and best practice: +- SoCs Device Tree Source Include files are named after the official name of + the product (at91sam9g20.dtsi or sama5d33.dtsi for instance). +- Device Tree Source Include files (.dtsi) are used to collect common nodes that can be + shared across SoCs or boards (sama5d3.dtsi or at91sam9x5cm.dtsi for instance). + When collecting nodes for a particular peripheral or topic, the identifier have to + be placed at the end of the file name, separated with a "_" (at91sam9x5_can.dtsi + or sama5d3_gmac.dtsi for example). +- board Device Tree Source files (.dts) are prefixed by the string "at91-" so + that they can be identified easily. Note that some files are historical exceptions + to this rule (sama5d3[13456]ek.dts, usb_a9g20.dts or animeo_ip.dts for example). diff --git a/Documentation/arm/Samsung-S3C24XX/DMA.txt b/Documentation/arm/Samsung-S3C24XX/DMA.txt deleted file mode 100644 index 3ed82383efea..000000000000 --- a/Documentation/arm/Samsung-S3C24XX/DMA.txt +++ /dev/null @@ -1,46 +0,0 @@ - S3C2410 DMA - =========== - -Introduction ------------- - - The kernel provides an interface to manage DMA transfers - using the DMA channels in the CPU, so that the central - duty of managing channel mappings, and programming the - channel generators is in one place. - - -DMA Channel Ordering --------------------- - - Many of the range do not have connections for the DMA - channels to all sources, which means that some devices - have a restricted number of channels that can be used. - - To allow flexibility for each CPU type and board, the - DMA code can be given a DMA ordering structure which - allows the order of channel search to be specified, as - well as allowing the prohibition of certain claims. - - struct s3c24xx_dma_order has a list of channels, and - each channel within has a slot for a list of DMA - channel numbers. The slots are searched in order for - the presence of a DMA channel number with DMA_CH_VALID - or-ed in. - - If the order has the flag DMA_CH_NEVER set, then after - checking the channel list, the system will return no - found channel, thus denying the request. - - A board support file can call s3c24xx_dma_order_set() - to register a complete ordering set. The routine will - copy the data, so the original can be discarded with - __initdata. - - -Authour -------- - -Ben Dooks, -Copyright (c) 2007 Ben Dooks, Simtec Electronics -Licensed under the GPL v2 diff --git a/MAINTAINERS b/MAINTAINERS index b27178c87444..bfe852899647 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -895,6 +895,7 @@ F: arch/arm/boot/dts/at91*.dts F: arch/arm/boot/dts/at91*.dtsi F: arch/arm/boot/dts/sama*.dts F: arch/arm/boot/dts/sama*.dtsi +F: arch/arm/include/debug/at91.S ARM/ATMEL AT91 Clock Support M: Boris Brezillon <boris.brezillon@free-electrons.com> @@ -1414,7 +1415,6 @@ F: arch/arm/configs/ape6evm_defconfig F: arch/arm/configs/armadillo800eva_defconfig F: arch/arm/configs/bockw_defconfig F: arch/arm/configs/kzm9g_defconfig -F: arch/arm/configs/lager_defconfig F: arch/arm/configs/mackerel_defconfig F: arch/arm/configs/marzen_defconfig F: arch/arm/configs/shmobile_defconfig diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index a324ecdfeb21..8fecefe881cd 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -115,15 +115,18 @@ choice 0x80024000 | 0xf0024000 | UART9 config AT91_DEBUG_LL_DBGU0 - bool "Kernel low-level debugging on rm9200, 9260/9g20, 9261/9g10 and 9rl" + bool "Kernel low-level debugging on rm9200, 9260/9g20, 9261/9g10, 9rl, 9x5, 9n12" + select DEBUG_AT91_UART depends on HAVE_AT91_DBGU0 config AT91_DEBUG_LL_DBGU1 - bool "Kernel low-level debugging on 9263 and 9g45" + bool "Kernel low-level debugging on 9263, 9g45 and sama5d3" + select DEBUG_AT91_UART depends on HAVE_AT91_DBGU1 config AT91_DEBUG_LL_DBGU2 bool "Kernel low-level debugging on sama5d4" + select DEBUG_AT91_UART depends on HAVE_AT91_DBGU2 config DEBUG_BCM2835 @@ -1218,6 +1221,8 @@ config DEBUG_LL_INCLUDE string default "debug/sa1100.S" if DEBUG_SA1100 default "debug/8250.S" if DEBUG_LL_UART_8250 || DEBUG_UART_8250 + default "debug/at91.S" if AT91_DEBUG_LL_DBGU0 || AT91_DEBUG_LL_DBGU1 || \ + AT91_DEBUG_LL_DBGU2 default "debug/asm9260.S" if DEBUG_ASM9260_UART default "debug/clps711x.S" if DEBUG_CLPS711X_UART1 || DEBUG_CLPS711X_UART2 default "debug/meson.S" if DEBUG_MESON_UARTAO diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 91bd5bd62857..19cb6fcecf89 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -410,7 +410,6 @@ dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += \ r8a7778-bockw.dtb \ r8a7778-bockw-reference.dtb \ r8a7779-marzen.dtb \ - r8a7790-lager.dtb \ sh7372-mackerel.dtb \ sh73a0-kzm9g.dtb \ sh73a0-kzm9g-reference.dtb diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts index 636d53bb87a2..4118030f366d 100644 --- a/arch/arm/boot/dts/r8a7790-lager.dts +++ b/arch/arm/boot/dts/r8a7790-lager.dts @@ -47,12 +47,12 @@ compatible = "renesas,lager", "renesas,r8a7790"; aliases { - serial6 = &scifa0; - serial7 = &scifa1; + serial0 = &scifa0; + serial1 = &scifa1; }; chosen { - bootargs = "console=ttySC6,115200 ignore_loglevel rw root=/dev/nfs ip=dhcp"; + bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp"; stdout-path = &scifa0; }; diff --git a/arch/arm/boot/dts/r8a7791-koelsch.dts b/arch/arm/boot/dts/r8a7791-koelsch.dts index 990af167c551..bf58c79a6554 100644 --- a/arch/arm/boot/dts/r8a7791-koelsch.dts +++ b/arch/arm/boot/dts/r8a7791-koelsch.dts @@ -48,8 +48,8 @@ compatible = "renesas,koelsch", "renesas,r8a7791"; aliases { - serial6 = &scif0; - serial7 = &scif1; + serial0 = &scif0; + serial1 = &scif1; }; chosen { diff --git a/arch/arm/configs/lager_defconfig b/arch/arm/configs/lager_defconfig deleted file mode 100644 index a82afc916a89..000000000000 --- a/arch/arm/configs/lager_defconfig +++ /dev/null @@ -1,150 +0,0 @@ -CONFIG_SYSVIPC=y -CONFIG_NO_HZ=y -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=16 -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_SYSCTL_SYSCALL=y -CONFIG_EMBEDDED=y -CONFIG_PERF_EVENTS=y -CONFIG_SLAB=y -# CONFIG_LBDAF is not set -# CONFIG_BLK_DEV_BSG is not set -# CONFIG_IOSCHED_DEADLINE is not set -# CONFIG_IOSCHED_CFQ is not set -CONFIG_ARCH_SHMOBILE_LEGACY=y -CONFIG_ARCH_R8A7790=y -CONFIG_MACH_LAGER=y -# CONFIG_SH_TIMER_TMU is not set -# CONFIG_EM_TIMER_STI is not set -CONFIG_ARM_ERRATA_430973=y -CONFIG_ARM_ERRATA_458693=y -CONFIG_ARM_ERRATA_460075=y -CONFIG_ARM_ERRATA_743622=y -CONFIG_ARM_ERRATA_754322=y -CONFIG_PCI=y -CONFIG_PCI_RCAR_GEN2=y -CONFIG_PCI_RCAR_GEN2_PCIE=y -CONFIG_HAVE_ARM_ARCH_TIMER=y -CONFIG_AEABI=y -# CONFIG_OABI_COMPAT is not set -CONFIG_FORCE_MAX_ZONEORDER=13 -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_ARM_APPENDED_DTB=y -CONFIG_KEXEC=y -CONFIG_AUTO_ZRELADDR=y -CONFIG_VFP=y -CONFIG_NEON=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_PM=y -CONFIG_NET=y -CONFIG_PACKET=y -CONFIG_UNIX=y -CONFIG_INET=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -# CONFIG_INET_XFRM_MODE_TRANSPORT is not set -# CONFIG_INET_XFRM_MODE_TUNNEL is not set -# CONFIG_INET_XFRM_MODE_BEET is not set -# CONFIG_INET_LRO is not set -# CONFIG_INET_DIAG is not set -# CONFIG_IPV6 is not set -# CONFIG_WIRELESS is not set -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -CONFIG_DEVTMPFS=y -CONFIG_DEVTMPFS_MOUNT=y -CONFIG_MTD=y -CONFIG_MTD_M25P80=y -CONFIG_MTD_SPI_NOR=y -CONFIG_BLK_DEV_SD=y -CONFIG_ATA=y -CONFIG_SATA_RCAR=y -CONFIG_NETDEVICES=y -# CONFIG_NET_CORE is not set -# CONFIG_NET_VENDOR_ARC is not set -# CONFIG_NET_CADENCE is not set -# CONFIG_NET_VENDOR_BROADCOM is not set -# CONFIG_NET_VENDOR_CIRRUS is not set -# CONFIG_NET_VENDOR_FARADAY is not set -# CONFIG_NET_VENDOR_INTEL is not set -# CONFIG_NET_VENDOR_MARVELL is not set -# CONFIG_NET_VENDOR_MICREL is not set -# CONFIG_NET_VENDOR_NATSEMI is not set -CONFIG_SH_ETH=y -# CONFIG_NET_VENDOR_SEEQ is not set -# CONFIG_NET_VENDOR_SMSC is not set -# CONFIG_NET_VENDOR_STMICRO is not set -# CONFIG_NET_VENDOR_VIA is not set -# CONFIG_NET_VENDOR_WIZNET is not set -# CONFIG_WLAN is not set -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_KEYBOARD_ATKBD is not set -CONFIG_KEYBOARD_GPIO=y -# CONFIG_INPUT_MOUSE is not set -# CONFIG_SERIO is not set -# CONFIG_LEGACY_PTYS is not set -CONFIG_SERIAL_SH_SCI=y -CONFIG_SERIAL_SH_SCI_NR_UARTS=10 -CONFIG_SERIAL_SH_SCI_CONSOLE=y -# CONFIG_HW_RANDOM is not set -CONFIG_I2C_GPIO=y -CONFIG_I2C_SH_MOBILE=y -CONFIG_I2C_RCAR=y -CONFIG_SPI=y -CONFIG_SPI_RSPI=y -CONFIG_SPI_SH_MSIOF=y -CONFIG_GPIO_SH_PFC=y -CONFIG_GPIOLIB=y -CONFIG_GPIO_RCAR=y -# CONFIG_HWMON is not set -CONFIG_THERMAL=y -CONFIG_RCAR_THERMAL=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_FIXED_VOLTAGE=y -CONFIG_REGULATOR_DA9210=y -CONFIG_REGULATOR_GPIO=y -CONFIG_MEDIA_SUPPORT=y -CONFIG_MEDIA_CAMERA_SUPPORT=y -CONFIG_V4L_PLATFORM_DRIVERS=y -CONFIG_SOC_CAMERA=y -CONFIG_SOC_CAMERA_PLATFORM=y -CONFIG_VIDEO_RCAR_VIN=y -# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set -CONFIG_VIDEO_ADV7180=y -CONFIG_DRM=y -CONFIG_DRM_RCAR_DU=y -CONFIG_SOUND=y -CONFIG_SND=y -CONFIG_SND_SOC=y -CONFIG_SND_SOC_RCAR=y -# CONFIG_USB_SUPPORT is not set -CONFIG_MMC=y -CONFIG_MMC_SDHI=y -CONFIG_MMC_SH_MMCIF=y -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y -CONFIG_LEDS_GPIO=y -CONFIG_RTC_CLASS=y -CONFIG_DMADEVICES=y -CONFIG_SH_DMAE=y -# CONFIG_IOMMU_SUPPORT is not set -# CONFIG_DNOTIFY is not set -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y -CONFIG_TMPFS=y -CONFIG_CONFIGFS_FS=y -# CONFIG_MISC_FILESYSTEMS is not set -CONFIG_NFS_FS=y -CONFIG_NFS_V3_ACL=y -CONFIG_NFS_V4=y -CONFIG_NFS_V4_1=y -CONFIG_ROOT_NFS=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ISO8859_1=y -# CONFIG_ENABLE_WARN_DEPRECATED is not set -# CONFIG_ENABLE_MUST_CHECK is not set -# CONFIG_ARM_UNWIND is not set -# CONFIG_CRYPTO_ANSI_CPRNG is not set -# CONFIG_CRYPTO_HW is not set diff --git a/arch/arm/configs/shmobile_defconfig b/arch/arm/configs/shmobile_defconfig index 3df6ca0c1d1f..e4a6c5e9174d 100644 --- a/arch/arm/configs/shmobile_defconfig +++ b/arch/arm/configs/shmobile_defconfig @@ -17,7 +17,6 @@ CONFIG_ARCH_R8A7779=y CONFIG_ARCH_R8A7790=y CONFIG_ARCH_R8A7791=y CONFIG_ARCH_R8A7794=y -CONFIG_MACH_LAGER=y CONFIG_MACH_MARZEN=y # CONFIG_SWP_EMULATE is not set CONFIG_CPU_BPREDICT_DISABLE=y diff --git a/arch/arm/mach-at91/include/mach/debug-macro.S b/arch/arm/include/debug/at91.S index 2103a90f2261..80a6501b4d50 100644 --- a/arch/arm/mach-at91/include/mach/debug-macro.S +++ b/arch/arm/include/debug/at91.S @@ -1,6 +1,4 @@ /* - * arch/arm/mach-at91/include/mach/debug-macro.S - * * Copyright (C) 2003-2005 SAN People * * Debugging macro include header @@ -11,18 +9,23 @@ * */ -#include <mach/hardware.h> -#include <mach/at91_dbgu.h> - #if defined(CONFIG_AT91_DEBUG_LL_DBGU0) -#define AT91_DBGU AT91_BASE_DBGU0 +#define AT91_DBGU 0xfffff200 /* AT91_BASE_DBGU0 */ #elif defined(CONFIG_AT91_DEBUG_LL_DBGU1) -#define AT91_DBGU AT91_BASE_DBGU1 +#define AT91_DBGU 0xffffee00 /* AT91_BASE_DBGU1 */ #else /* On sama5d4, use USART3 as low level serial console */ -#define AT91_DBGU SAMA5D4_BASE_USART3 +#define AT91_DBGU 0xfc00c000 /* SAMA5D4_BASE_USART3 */ #endif +/* Keep in sync with mach-at91/include/mach/hardware.h */ +#define AT91_IO_P2V(x) ((x) - 0x01000000) + +#define AT91_DBGU_SR (0x14) /* Status Register */ +#define AT91_DBGU_THR (0x1c) /* Transmitter Holding Register */ +#define AT91_DBGU_TXRDY (1 << 1) /* Transmitter Ready */ +#define AT91_DBGU_TXEMPTY (1 << 9) /* Transmitter Empty */ + .macro addruart, rp, rv, tmp ldr \rp, =AT91_DBGU @ System peripherals (phys address) ldr \rv, =AT91_IO_P2V(AT91_DBGU) @ System peripherals (virt address) diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 2395c68b3e32..cec0fb5d621a 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -174,14 +174,6 @@ config SOC_AT91SAM9N12 # ---------------------------------------------------------- endif # SOC_SAM_V4_V5 -config MACH_AT91RM9200_DT - def_bool SOC_AT91RM9200 - -config MACH_AT91SAM9_DT - def_bool SOC_AT91SAM9 - -# ---------------------------------------------------------- - comment "AT91 Feature Selections" config AT91_SLOW_CLOCK diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index 7b6424d40764..8ef7d9a2e855 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile @@ -2,7 +2,7 @@ # Makefile for the linux kernel. # -obj-y := setup.o sysirq_mask.o +obj-y := setup.o obj-$(CONFIG_SOC_AT91SAM9) += sam9_smc.o @@ -19,8 +19,8 @@ obj-$(CONFIG_SOC_SAMA5D3) += sama5d3.o obj-$(CONFIG_SOC_SAMA5D4) += sama5d4.o # AT91SAM board with device-tree -obj-$(CONFIG_MACH_AT91RM9200_DT) += board-dt-rm9200.o -obj-$(CONFIG_MACH_AT91SAM9_DT) += board-dt-sam9.o +obj-$(CONFIG_SOC_AT91RM9200) += board-dt-rm9200.o +obj-$(CONFIG_SOC_AT91SAM9) += board-dt-sam9.o # SAMA5 board with device-tree obj-$(CONFIG_SOC_SAMA5) += board-dt-sama5.o diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c index 78137c24d90b..34e2abe82ae4 100644 --- a/arch/arm/mach-at91/at91sam9260.c +++ b/arch/arm/mach-at91/at91sam9260.c @@ -51,8 +51,6 @@ static void __init at91sam9260_map_io(void) static void __init at91sam9260_initialize(void) { arm_pm_idle = at91sam9_idle; - - at91_sysirq_mask_rtt(AT91SAM9260_BASE_RTT); } AT91_SOC_START(at91sam9260) diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c index d29953ecb0c4..47878b849975 100644 --- a/arch/arm/mach-at91/at91sam9261.c +++ b/arch/arm/mach-at91/at91sam9261.c @@ -32,8 +32,6 @@ static void __init at91sam9261_map_io(void) static void __init at91sam9261_initialize(void) { arm_pm_idle = at91sam9_idle; - - at91_sysirq_mask_rtt(AT91SAM9261_BASE_RTT); } AT91_SOC_START(at91sam9261) diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c index e7ad14864083..aabcb66145d0 100644 --- a/arch/arm/mach-at91/at91sam9263.c +++ b/arch/arm/mach-at91/at91sam9263.c @@ -29,9 +29,6 @@ static void __init at91sam9263_map_io(void) static void __init at91sam9263_initialize(void) { arm_pm_idle = at91sam9_idle; - - at91_sysirq_mask_rtt(AT91SAM9263_BASE_RTT0); - at91_sysirq_mask_rtt(AT91SAM9263_BASE_RTT1); } AT91_SOC_START(at91sam9263) diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c index b6117bea9a6f..000166777a8d 100644 --- a/arch/arm/mach-at91/at91sam9g45.c +++ b/arch/arm/mach-at91/at91sam9g45.c @@ -11,7 +11,6 @@ */ #include <asm/system_misc.h> -#include <asm/irq.h> #include <mach/hardware.h> #include "soc.h" @@ -29,9 +28,6 @@ static void __init at91sam9g45_map_io(void) static void __init at91sam9g45_initialize(void) { arm_pm_idle = at91sam9_idle; - - at91_sysirq_mask_rtc(AT91SAM9G45_BASE_RTC); - at91_sysirq_mask_rtt(AT91SAM9G45_BASE_RTT); } AT91_SOC_START(at91sam9g45) diff --git a/arch/arm/mach-at91/at91sam9n12.c b/arch/arm/mach-at91/at91sam9n12.c index dee569b1987e..0135f868ea4f 100644 --- a/arch/arm/mach-at91/at91sam9n12.c +++ b/arch/arm/mach-at91/at91sam9n12.c @@ -21,12 +21,6 @@ static void __init at91sam9n12_map_io(void) at91_init_sram(0, AT91SAM9N12_SRAM_BASE, AT91SAM9N12_SRAM_SIZE); } -static void __init at91sam9n12_initialize(void) -{ - at91_sysirq_mask_rtc(AT91SAM9N12_BASE_RTC); -} - AT91_SOC_START(at91sam9n12) .map_io = at91sam9n12_map_io, - .init = at91sam9n12_initialize, AT91_SOC_END diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c index f25b9aec9c50..1babfb27694a 100644 --- a/arch/arm/mach-at91/at91sam9rl.c +++ b/arch/arm/mach-at91/at91sam9rl.c @@ -10,7 +10,6 @@ */ #include <asm/system_misc.h> -#include <asm/irq.h> #include <mach/cpu.h> #include <mach/at91_dbgu.h> #include <mach/hardware.h> @@ -42,9 +41,6 @@ static void __init at91sam9rl_map_io(void) static void __init at91sam9rl_initialize(void) { arm_pm_idle = at91sam9_idle; - - at91_sysirq_mask_rtc(AT91SAM9RL_BASE_RTC); - at91_sysirq_mask_rtt(AT91SAM9RL_BASE_RTT); } AT91_SOC_START(at91sam9rl) diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c index f0d5a69a7237..aa17520ccb0a 100644 --- a/arch/arm/mach-at91/at91sam9x5.c +++ b/arch/arm/mach-at91/at91sam9x5.c @@ -21,16 +21,6 @@ static void __init at91sam9x5_map_io(void) at91_init_sram(0, AT91SAM9X5_SRAM_BASE, AT91SAM9X5_SRAM_SIZE); } -static void __init at91sam9x5_initialize(void) -{ - at91_sysirq_mask_rtc(AT91SAM9X5_BASE_RTC); -} - -/* -------------------------------------------------------------------- - * Interrupt initialization - * -------------------------------------------------------------------- */ - AT91_SOC_START(at91sam9x5) .map_io = at91sam9x5_map_io, - .init = at91sam9x5_initialize, AT91_SOC_END diff --git a/arch/arm/mach-at91/board-dt-rm9200.c b/arch/arm/mach-at91/board-dt-rm9200.c index 76dfe8f9af50..a15ab6f8de00 100644 --- a/arch/arm/mach-at91/board-dt-rm9200.c +++ b/arch/arm/mach-at91/board-dt-rm9200.c @@ -38,6 +38,6 @@ static const char *at91rm9200_dt_board_compat[] __initdata = { DT_MACHINE_START(at91rm9200_dt, "Atmel AT91RM9200 (Device Tree)") .init_time = at91rm9200_dt_timer_init, .map_io = at91_map_io, - .init_early = at91rm9200_dt_initialize, + .init_early = at91_dt_initialize, .dt_compat = at91rm9200_dt_board_compat, MACHINE_END diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h index d53324210adf..54f3837a0a4d 100644 --- a/arch/arm/mach-at91/generic.h +++ b/arch/arm/mach-at91/generic.h @@ -21,14 +21,8 @@ extern void __init at91_init_sram(int bank, unsigned long base, unsigned int length); /* Processors */ -extern void __init at91rm9200_set_type(int type); -extern void __init at91rm9200_dt_initialize(void); extern void __init at91_dt_initialize(void); - /* Interrupts */ -extern void __init at91_sysirq_mask_rtc(u32 rtc_base); -extern void __init at91_sysirq_mask_rtt(u32 rtt_base); - /* Timer */ extern void at91rm9200_timer_init(void); diff --git a/arch/arm/mach-at91/include/mach/at91_pio.h b/arch/arm/mach-at91/include/mach/at91_pio.h deleted file mode 100644 index 7b7366253ceb..000000000000 --- a/arch/arm/mach-at91/include/mach/at91_pio.h +++ /dev/null @@ -1,80 +0,0 @@ -/* - * arch/arm/mach-at91/include/mach/at91_pio.h - * - * Copyright (C) 2005 Ivan Kokshaysky - * Copyright (C) SAN People - * - * Parallel I/O Controller (PIO) - System peripherals registers. - * Based on AT91RM9200 datasheet revision E. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_PIO_H -#define AT91_PIO_H - -#define PIO_PER 0x00 /* Enable Register */ -#define PIO_PDR 0x04 /* Disable Register */ -#define PIO_PSR 0x08 /* Status Register */ -#define PIO_OER 0x10 /* Output Enable Register */ -#define PIO_ODR 0x14 /* Output Disable Register */ -#define PIO_OSR 0x18 /* Output Status Register */ -#define PIO_IFER 0x20 /* Glitch Input Filter Enable */ -#define PIO_IFDR 0x24 /* Glitch Input Filter Disable */ -#define PIO_IFSR 0x28 /* Glitch Input Filter Status */ -#define PIO_SODR 0x30 /* Set Output Data Register */ -#define PIO_CODR 0x34 /* Clear Output Data Register */ -#define PIO_ODSR 0x38 /* Output Data Status Register */ -#define PIO_PDSR 0x3c /* Pin Data Status Register */ -#define PIO_IER 0x40 /* Interrupt Enable Register */ -#define PIO_IDR 0x44 /* Interrupt Disable Register */ -#define PIO_IMR 0x48 /* Interrupt Mask Register */ -#define PIO_ISR 0x4c /* Interrupt Status Register */ -#define PIO_MDER 0x50 /* Multi-driver Enable Register */ -#define PIO_MDDR 0x54 /* Multi-driver Disable Register */ -#define PIO_MDSR 0x58 /* Multi-driver Status Register */ -#define PIO_PUDR 0x60 /* Pull-up Disable Register */ -#define PIO_PUER 0x64 /* Pull-up Enable Register */ -#define PIO_PUSR 0x68 /* Pull-up Status Register */ -#define PIO_ASR 0x70 /* Peripheral A Select Register */ -#define PIO_ABCDSR1 0x70 /* Peripheral ABCD Select Register 1 [some sam9 only] */ -#define PIO_BSR 0x74 /* Peripheral B Select Register */ -#define PIO_ABCDSR2 0x74 /* Peripheral ABCD Select Register 2 [some sam9 only] */ -#define PIO_ABSR 0x78 /* AB Status Register */ -#define PIO_IFSCDR 0x80 /* Input Filter Slow Clock Disable Register */ -#define PIO_IFSCER 0x84 /* Input Filter Slow Clock Enable Register */ -#define PIO_IFSCSR 0x88 /* Input Filter Slow Clock Status Register */ -#define PIO_SCDR 0x8c /* Slow Clock Divider Debouncing Register */ -#define PIO_SCDR_DIV (0x3fff << 0) /* Slow Clock Divider Mask */ -#define PIO_PPDDR 0x90 /* Pad Pull-down Disable Register */ -#define PIO_PPDER 0x94 /* Pad Pull-down Enable Register */ -#define PIO_PPDSR 0x98 /* Pad Pull-down Status Register */ -#define PIO_OWER 0xa0 /* Output Write Enable Register */ -#define PIO_OWDR 0xa4 /* Output Write Disable Register */ -#define PIO_OWSR 0xa8 /* Output Write Status Register */ -#define PIO_AIMER 0xb0 /* Additional Interrupt Modes Enable Register */ -#define PIO_AIMDR 0xb4 /* Additional Interrupt Modes Disable Register */ -#define PIO_AIMMR 0xb8 /* Additional Interrupt Modes Mask Register */ -#define PIO_ESR 0xc0 /* Edge Select Register */ -#define PIO_LSR 0xc4 /* Level Select Register */ -#define PIO_ELSR 0xc8 /* Edge/Level Status Register */ -#define PIO_FELLSR 0xd0 /* Falling Edge/Low Level Select Register */ -#define PIO_REHLSR 0xd4 /* Rising Edge/ High Level Select Register */ -#define PIO_FRLHSR 0xd8 /* Fall/Rise - Low/High Status Register */ -#define PIO_SCHMITT 0x100 /* Schmitt Trigger Register */ - -#define ABCDSR_PERIPH_A 0x0 -#define ABCDSR_PERIPH_B 0x1 -#define ABCDSR_PERIPH_C 0x2 -#define ABCDSR_PERIPH_D 0x3 - -#define SAMA5D3_PIO_DRIVER1 0x118 /*PIO Driver 1 register offset*/ -#define SAMA5D3_PIO_DRIVER2 0x11C /*PIO Driver 2 register offset*/ - -#define AT91SAM9X5_PIO_DRIVER1 0x114 /*PIO Driver 1 register offset*/ -#define AT91SAM9X5_PIO_DRIVER2 0x118 /*PIO Driver 2 register offset*/ - -#endif diff --git a/arch/arm/mach-at91/include/mach/at91_rtt.h b/arch/arm/mach-at91/include/mach/at91_rtt.h deleted file mode 100644 index 7ec75de8bbb6..000000000000 --- a/arch/arm/mach-at91/include/mach/at91_rtt.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * arch/arm/mach-at91/include/mach/at91_rtt.h - * - * Copyright (C) 2007 Andrew Victor - * Copyright (C) 2007 Atmel Corporation. - * - * Real-time Timer (RTT) - System peripherals regsters. - * Based on AT91SAM9261 datasheet revision D. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_RTT_H -#define AT91_RTT_H - -#define AT91_RTT_MR 0x00 /* Real-time Mode Register */ -#define AT91_RTT_RTPRES (0xffff << 0) /* Real-time Timer Prescaler Value */ -#define AT91_RTT_ALMIEN (1 << 16) /* Alarm Interrupt Enable */ -#define AT91_RTT_RTTINCIEN (1 << 17) /* Real Time Timer Increment Interrupt Enable */ -#define AT91_RTT_RTTRST (1 << 18) /* Real Time Timer Restart */ - -#define AT91_RTT_AR 0x04 /* Real-time Alarm Register */ -#define AT91_RTT_ALMV (0xffffffff) /* Alarm Value */ - -#define AT91_RTT_VR 0x08 /* Real-time Value Register */ -#define AT91_RTT_CRTV (0xffffffff) /* Current Real-time Value */ - -#define AT91_RTT_SR 0x0c /* Real-time Status Register */ -#define AT91_RTT_ALMS (1 << 0) /* Real-time Alarm Status */ -#define AT91_RTT_RTTINC (1 << 1) /* Real-time Timer Increment */ - -#endif diff --git a/arch/arm/mach-at91/include/mach/memory.h b/arch/arm/mach-at91/include/mach/memory.h deleted file mode 100644 index 401c207f2f39..000000000000 --- a/arch/arm/mach-at91/include/mach/memory.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * arch/arm/mach-at91/include/mach/memory.h - * - * Copyright (C) 2004 SAN People - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -#include <mach/hardware.h> - -#endif diff --git a/arch/arm/mach-at91/sama5d3.c b/arch/arm/mach-at91/sama5d3.c index 3d775d08de08..ae58feada72b 100644 --- a/arch/arm/mach-at91/sama5d3.c +++ b/arch/arm/mach-at91/sama5d3.c @@ -30,12 +30,6 @@ static void __init sama5d3_map_io(void) at91_init_sram(0, SAMA5D3_SRAM_BASE, SAMA5D3_SRAM_SIZE); } -static void __init sama5d3_initialize(void) -{ - at91_sysirq_mask_rtc(SAMA5D3_BASE_RTC); -} - AT91_SOC_START(sama5d3) .map_io = sama5d3_map_io, - .init = sama5d3_initialize, AT91_SOC_END diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c index ce25e85720fb..e3c21b458bb8 100644 --- a/arch/arm/mach-at91/setup.c +++ b/arch/arm/mach-at91/setup.c @@ -31,17 +31,6 @@ struct at91_init_soc __initdata at91_boot_soc; struct at91_socinfo at91_soc_initdata; EXPORT_SYMBOL(at91_soc_initdata); -void __init at91rm9200_set_type(int type) -{ - if (type == ARCH_REVISON_9200_PQFP) - at91_soc_initdata.subtype = AT91_SOC_RM9200_PQFP; - else - at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA; - - pr_info("filled in soc subtype: %s\n", - at91_get_soc_subtype(&at91_soc_initdata)); -} - void __iomem *at91_ramc_base[2]; EXPORT_SYMBOL_GPL(at91_ramc_base); @@ -429,13 +418,6 @@ static void at91_dt_ramc(void) at91_pm_set_standby(standby); } -void __init at91rm9200_dt_initialize(void) -{ - at91_dt_ramc(); - - at91_boot_soc.init(); -} - void __init at91_dt_initialize(void) { at91_dt_ramc(); diff --git a/arch/arm/mach-at91/sysirq_mask.c b/arch/arm/mach-at91/sysirq_mask.c deleted file mode 100644 index f8bc3511a8c8..000000000000 --- a/arch/arm/mach-at91/sysirq_mask.c +++ /dev/null @@ -1,75 +0,0 @@ -/* - * sysirq_mask.c - System-interrupt masking - * - * Copyright (C) 2013 Johan Hovold <jhovold@gmail.com> - * - * Functions to disable system interrupts from backup-powered peripherals. - * - * The RTC and RTT-peripherals are generally powered by backup power (VDDBU) - * and are not reset on wake-up, user, watchdog or software reset. This means - * that their interrupts may be enabled during early boot (e.g. after a user - * reset). - * - * As the RTC and RTT share the system-interrupt line with the PIT, an - * interrupt occurring before a handler has been installed would lead to the - * system interrupt being disabled and prevent the system from booting. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#include <linux/io.h> -#include <mach/at91_rtt.h> - -#include "generic.h" - -#define AT91_RTC_IDR 0x24 /* Interrupt Disable Register */ -#define AT91_RTC_IMR 0x28 /* Interrupt Mask Register */ -#define AT91_RTC_IRQ_MASK 0x1f /* Available IRQs mask */ - -void __init at91_sysirq_mask_rtc(u32 rtc_base) -{ - void __iomem *base; - - base = ioremap(rtc_base, 64); - if (!base) - return; - - /* - * sam9x5 SoCs have the following errata: - * "RTC: Interrupt Mask Register cannot be used - * Interrupt Mask Register read always returns 0." - * - * Hence we're not relying on IMR values to disable - * interrupts. - */ - writel_relaxed(AT91_RTC_IRQ_MASK, base + AT91_RTC_IDR); - (void)readl_relaxed(base + AT91_RTC_IMR); /* flush */ - - iounmap(base); -} - -void __init at91_sysirq_mask_rtt(u32 rtt_base) -{ - void __iomem *base; - void __iomem *reg; - u32 mode; - - base = ioremap(rtt_base, 16); - if (!base) - return; - - reg = base + AT91_RTT_MR; - - mode = readl_relaxed(reg); - if (mode & (AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN)) { - pr_info("AT91: Disabling rtt irq\n"); - mode &= ~(AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN); - writel_relaxed(mode, reg); - (void)readl_relaxed(reg); /* flush */ - } - - iounmap(base); -} diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile index 2204239ed243..2e3464b8bab4 100644 --- a/arch/arm/mach-davinci/Makefile +++ b/arch/arm/mach-davinci/Makefile @@ -27,7 +27,7 @@ obj-$(CONFIG_MACH_SFFSDR) += board-sffsdr.o obj-$(CONFIG_MACH_NEUROS_OSD2) += board-neuros-osd2.o obj-$(CONFIG_MACH_DAVINCI_DM355_EVM) += board-dm355-evm.o obj-$(CONFIG_MACH_DM355_LEOPARD) += board-dm355-leopard.o -obj-$(CONFIG_MACH_DAVINCI_DM6467_EVM) += board-dm646x-evm.o cdce949.o +obj-$(CONFIG_MACH_DAVINCI_DM6467_EVM) += board-dm646x-evm.o obj-$(CONFIG_MACH_DAVINCI_DM365_EVM) += board-dm365-evm.o obj-$(CONFIG_MACH_DAVINCI_DA830_EVM) += board-da830-evm.o obj-$(CONFIG_MACH_DAVINCI_DA850_EVM) += board-da850-evm.o diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c index ae129bc49273..846a84ddc28e 100644 --- a/arch/arm/mach-davinci/board-dm646x-evm.c +++ b/arch/arm/mach-davinci/board-dm646x-evm.c @@ -45,7 +45,6 @@ #include <mach/irqs.h> #include <mach/serial.h> #include <mach/clock.h> -#include <mach/cdce949.h> #include "davinci.h" #include "clock.h" @@ -399,9 +398,6 @@ static struct i2c_board_info __initdata i2c_info[] = { { I2C_BOARD_INFO("cpld_video", 0x3b), }, - { - I2C_BOARD_INFO("cdce949", 0x6c), - }, }; static struct davinci_i2c_platform_data i2c_pdata = { @@ -715,31 +711,6 @@ static void __init evm_init_i2c(void) evm_init_video(); } -#define CDCE949_XIN_RATE 27000000 - -/* CDCE949 support - "lpsc" field is overridden to work as clock number */ -static struct clk cdce_clk_in = { - .name = "cdce_xin", - .rate = CDCE949_XIN_RATE, -}; - -static struct clk_lookup cdce_clks[] = { - CLK(NULL, "xin", &cdce_clk_in), - CLK(NULL, NULL, NULL), -}; - -static void __init cdce_clk_init(void) -{ - struct clk_lookup *c; - struct clk *clk; - - for (c = cdce_clks; c->clk; c++) { - clk = c->clk; - clkdev_add(c); - clk_register(clk); - } -} - #define DM6467T_EVM_REF_FREQ 33000000 static void __init davinci_map_io(void) @@ -748,8 +719,6 @@ static void __init davinci_map_io(void) if (machine_is_davinci_dm6467tevm()) davinci_set_refclk_rate(DM6467T_EVM_REF_FREQ); - - cdce_clk_init(); } #define DM646X_EVM_PHY_ID "davinci_mdio-0:01" diff --git a/arch/arm/mach-davinci/cdce949.c b/arch/arm/mach-davinci/cdce949.c deleted file mode 100644 index abafb92031c0..000000000000 --- a/arch/arm/mach-davinci/cdce949.c +++ /dev/null @@ -1,295 +0,0 @@ -/* - * TI CDCE949 clock synthesizer driver - * - * Note: This implementation assumes an input of 27MHz to the CDCE. - * This is by no means constrained by CDCE hardware although the datasheet - * does use this as an example for all illustrations and more importantly: - * that is the crystal input on boards it is currently used on. - * - * Copyright (C) 2009 Texas Instruments Incorporated. http://www.ti.com/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ -#include <linux/kernel.h> -#include <linux/clk.h> -#include <linux/platform_device.h> -#include <linux/i2c.h> -#include <linux/module.h> - -#include <mach/clock.h> -#include <mach/cdce949.h> - -#include "clock.h" - -static struct i2c_client *cdce_i2c_client; -static DEFINE_MUTEX(cdce_mutex); - -/* CDCE register descriptor */ -struct cdce_reg { - u8 addr; - u8 val; -}; - -/* Per-Output (Y1, Y2 etc.) frequency descriptor */ -struct cdce_freq { - /* Frequency in KHz */ - unsigned long frequency; - /* - * List of registers to program to obtain a particular frequency. - * 0x0 in register address and value is the end of list marker. - */ - struct cdce_reg *reglist; -}; - -#define CDCE_FREQ_TABLE_ENTRY(line, out) \ -{ \ - .reglist = cdce_y ##line## _ ##out, \ - .frequency = out, \ -} - -/* List of CDCE outputs */ -struct cdce_output { - /* List of frequencies on this output */ - struct cdce_freq *freq_table; - /* Number of possible frequencies */ - int size; -}; - -/* - * Finding out the values to program into CDCE949 registers for a particular - * frequency output is not a simple calculation. Have a look at the datasheet - * for the details. There is desktop software available to help users with - * the calculations. Here, we just depend on the output of that software - * (or hand calculations) instead trying to runtime calculate the register - * values and inflicting misery on ourselves. - */ -static struct cdce_reg cdce_y1_148500[] = { - { 0x13, 0x00 }, - /* program PLL1_0 multiplier */ - { 0x18, 0xaf }, - { 0x19, 0x50 }, - { 0x1a, 0x02 }, - { 0x1b, 0xc9 }, - /* program PLL1_11 multiplier */ - { 0x1c, 0x00 }, - { 0x1d, 0x40 }, - { 0x1e, 0x02 }, - { 0x1f, 0xc9 }, - /* output state selection */ - { 0x15, 0x00 }, - { 0x14, 0xef }, - /* switch MUX to PLL1 output */ - { 0x14, 0x6f }, - { 0x16, 0x06 }, - /* set P2DIV divider, P3DIV and input crystal */ - { 0x17, 0x06 }, - { 0x01, 0x00 }, - { 0x05, 0x48 }, - { 0x02, 0x80 }, - /* enable and disable PLL */ - { 0x02, 0xbc }, - { 0x03, 0x01 }, - { }, -}; - -static struct cdce_reg cdce_y1_74250[] = { - { 0x13, 0x00 }, - { 0x18, 0xaf }, - { 0x19, 0x50 }, - { 0x1a, 0x02 }, - { 0x1b, 0xc9 }, - { 0x1c, 0x00 }, - { 0x1d, 0x40 }, - { 0x1e, 0x02 }, - { 0x1f, 0xc9 }, - /* output state selection */ - { 0x15, 0x00 }, - { 0x14, 0xef }, - /* switch MUX to PLL1 output */ - { 0x14, 0x6f }, - { 0x16, 0x06 }, - /* set P2DIV divider, P3DIV and input crystal */ - { 0x17, 0x06 }, - { 0x01, 0x00 }, - { 0x05, 0x48 }, - { 0x02, 0x80 }, - /* enable and disable PLL */ - { 0x02, 0xbc }, - { 0x03, 0x02 }, - { }, -}; - -static struct cdce_reg cdce_y1_27000[] = { - { 0x13, 0x00 }, - { 0x18, 0x00 }, - { 0x19, 0x40 }, - { 0x1a, 0x02 }, - { 0x1b, 0x08 }, - { 0x1c, 0x00 }, - { 0x1d, 0x40 }, - { 0x1e, 0x02 }, - { 0x1f, 0x08 }, - { 0x15, 0x02 }, - { 0x14, 0xed }, - { 0x16, 0x01 }, - { 0x17, 0x01 }, - { 0x01, 0x00 }, - { 0x05, 0x50 }, - { 0x02, 0xb4 }, - { 0x03, 0x01 }, - { }, -}; - -static struct cdce_freq cdce_y1_freqs[] = { - CDCE_FREQ_TABLE_ENTRY(1, 148500), - CDCE_FREQ_TABLE_ENTRY(1, 74250), - CDCE_FREQ_TABLE_ENTRY(1, 27000), -}; - -static struct cdce_reg cdce_y5_13500[] = { - { 0x27, 0x08 }, - { 0x28, 0x00 }, - { 0x29, 0x40 }, - { 0x2a, 0x02 }, - { 0x2b, 0x08 }, - { 0x24, 0x6f }, - { }, -}; - -static struct cdce_reg cdce_y5_16875[] = { - { 0x27, 0x08 }, - { 0x28, 0x9f }, - { 0x29, 0xb0 }, - { 0x2a, 0x02 }, - { 0x2b, 0x89 }, - { 0x24, 0x6f }, - { }, -}; - -static struct cdce_reg cdce_y5_27000[] = { - { 0x27, 0x04 }, - { 0x28, 0x00 }, - { 0x29, 0x40 }, - { 0x2a, 0x02 }, - { 0x2b, 0x08 }, - { 0x24, 0x6f }, - { }, -}; -static struct cdce_reg cdce_y5_54000[] = { - { 0x27, 0x04 }, - { 0x28, 0xff }, - { 0x29, 0x80 }, - { 0x2a, 0x02 }, - { 0x2b, 0x07 }, - { 0x24, 0x6f }, - { }, -}; - -static struct cdce_reg cdce_y5_81000[] = { - { 0x27, 0x02 }, - { 0x28, 0xbf }, - { 0x29, 0xa0 }, - { 0x2a, 0x03 }, - { 0x2b, 0x0a }, - { 0x24, 0x6f }, - { }, -}; - -static struct cdce_freq cdce_y5_freqs[] = { - CDCE_FREQ_TABLE_ENTRY(5, 13500), - CDCE_FREQ_TABLE_ENTRY(5, 16875), - CDCE_FREQ_TABLE_ENTRY(5, 27000), - CDCE_FREQ_TABLE_ENTRY(5, 54000), - CDCE_FREQ_TABLE_ENTRY(5, 81000), -}; - - -static struct cdce_output output_list[] = { - [1] = { cdce_y1_freqs, ARRAY_SIZE(cdce_y1_freqs) }, - [5] = { cdce_y5_freqs, ARRAY_SIZE(cdce_y5_freqs) }, -}; - -int cdce_set_rate(struct clk *clk, unsigned long rate) -{ - int i, ret = 0; - struct cdce_freq *freq_table = output_list[clk->lpsc].freq_table; - struct cdce_reg *regs = NULL; - - if (!cdce_i2c_client) - return -ENODEV; - - if (!freq_table) - return -EINVAL; - - for (i = 0; i < output_list[clk->lpsc].size; i++) { - if (freq_table[i].frequency == rate / 1000) { - regs = freq_table[i].reglist; - break; - } - } - - if (!regs) - return -EINVAL; - - mutex_lock(&cdce_mutex); - for (i = 0; regs[i].addr; i++) { - ret = i2c_smbus_write_byte_data(cdce_i2c_client, - regs[i].addr | 0x80, regs[i].val); - if (ret) - break; - } - mutex_unlock(&cdce_mutex); - - if (!ret) - clk->rate = rate; - - return ret; -} - -static int cdce_probe(struct i2c_client *client, - const struct i2c_device_id *id) -{ - cdce_i2c_client = client; - return 0; -} - -static int cdce_remove(struct i2c_client *client) -{ - cdce_i2c_client = NULL; - return 0; -} - -static const struct i2c_device_id cdce_id[] = { - {"cdce949", 0}, - {}, -}; -MODULE_DEVICE_TABLE(i2c, cdce_id); - -static struct i2c_driver cdce_driver = { - .driver = { - .owner = THIS_MODULE, - .name = "cdce949", - }, - .probe = cdce_probe, - .remove = cdce_remove, - .id_table = cdce_id, -}; - -static int __init cdce_init(void) -{ - return i2c_add_driver(&cdce_driver); -} -subsys_initcall(cdce_init); - -static void __exit cdce_exit(void) -{ - i2c_del_driver(&cdce_driver); -} -module_exit(cdce_exit); - -MODULE_AUTHOR("Texas Instruments"); -MODULE_DESCRIPTION("CDCE949 clock synthesizer driver"); -MODULE_LICENSE("GPL v2"); diff --git a/arch/arm/mach-davinci/include/mach/cdce949.h b/arch/arm/mach-davinci/include/mach/cdce949.h deleted file mode 100644 index c73331fae341..000000000000 --- a/arch/arm/mach-davinci/include/mach/cdce949.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * TI CDCE949 off-chip clock synthesizer support - * - * 2009 (C) Texas Instruments, Inc. http://www.ti.com/ - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ -#ifndef _MACH_DAVINCI_CDCE949_H -#define _MACH_DAVINCI_CDCE949_H - -#include <linux/clk.h> - -#include <mach/clock.h> - -int cdce_set_rate(struct clk *clk, unsigned long rate); - -#endif diff --git a/arch/arm/mach-davinci/serial.c b/arch/arm/mach-davinci/serial.c index 5e93a734c858..951b620bfa73 100644 --- a/arch/arm/mach-davinci/serial.c +++ b/arch/arm/mach-davinci/serial.c @@ -31,16 +31,6 @@ #include <mach/serial.h> #include <mach/cputype.h> -static inline unsigned int serial_read_reg(struct plat_serial8250_port *up, - int offset) -{ - offset <<= up->regshift; - - WARN_ONCE(!up->membase, "unmapped read: uart[%d]\n", offset); - - return (unsigned int)__raw_readl(up->membase + offset); -} - static inline void serial_write_reg(struct plat_serial8250_port *p, int offset, int value) { diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c index c13d0837fa8c..2c844393cc4b 100644 --- a/arch/arm/mach-exynos/exynos.c +++ b/arch/arm/mach-exynos/exynos.c @@ -27,20 +27,16 @@ #include <asm/mach/map.h> #include <asm/memory.h> +#include <mach/map.h> + #include "common.h" #include "mfc.h" #include "regs-pmu.h" -#include "regs-sys.h" void __iomem *pmu_base_addr; static struct map_desc exynos4_iodesc[] __initdata = { { - .virtual = (unsigned long)S3C_VA_SYS, - .pfn = __phys_to_pfn(EXYNOS4_PA_SYSCON), - .length = SZ_64K, - .type = MT_DEVICE, - }, { .virtual = (unsigned long)S5P_VA_SROMC, .pfn = __phys_to_pfn(EXYNOS4_PA_SROMC), .length = SZ_4K, @@ -70,11 +66,6 @@ static struct map_desc exynos4_iodesc[] __initdata = { static struct map_desc exynos5_iodesc[] __initdata = { { - .virtual = (unsigned long)S3C_VA_SYS, - .pfn = __phys_to_pfn(EXYNOS5_PA_SYSCON), - .length = SZ_64K, - .type = MT_DEVICE, - }, { .virtual = (unsigned long)S5P_VA_SROMC, .pfn = __phys_to_pfn(EXYNOS5_PA_SROMC), .length = SZ_4K, @@ -213,32 +204,6 @@ static void __init exynos_init_irq(void) static void __init exynos_dt_machine_init(void) { - struct device_node *i2c_np; - const char *i2c_compat = "samsung,s3c2440-i2c"; - unsigned int tmp; - int id; - - /* - * Exynos5's legacy i2c controller and new high speed i2c - * controller have muxed interrupt sources. By default the - * interrupts for 4-channel HS-I2C controller are enabled. - * If node for first four channels of legacy i2c controller - * are available then re-configure the interrupts via the - * system register. - */ - if (soc_is_exynos5()) { - for_each_compatible_node(i2c_np, NULL, i2c_compat) { - if (of_device_is_available(i2c_np)) { - id = of_alias_get_id(i2c_np, "i2c"); - if (id < 4) { - tmp = readl(EXYNOS5_SYS_I2C_CFG); - writel(tmp & ~(0x1 << id), - EXYNOS5_SYS_I2C_CFG); - } - } - } - } - /* * This is called from smp_prepare_cpus if we've built for SMP, but * we still need to set it up for PM and firmware ops if not. diff --git a/arch/arm/mach-exynos/include/mach/dma.h b/arch/arm/mach-exynos/include/mach/dma.h deleted file mode 100644 index 201842a3769e..000000000000 --- a/arch/arm/mach-exynos/include/mach/dma.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * Copyright (C) 2010 Samsung Electronics Co. Ltd. - * Jaswinder Singh <jassi.brar@samsung.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -#ifndef __MACH_DMA_H -#define __MACH_DMA_H - -/* This platform uses the common DMA API driver for PL330 */ -#include <plat/dma-pl330.h> - -#endif /* __MACH_DMA_H */ diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h index 1ad3f496ef56..de3ae59e1cfb 100644 --- a/arch/arm/mach-exynos/include/mach/map.h +++ b/arch/arm/mach-exynos/include/mach/map.h @@ -24,9 +24,6 @@ #define EXYNOS_PA_CHIPID 0x10000000 -#define EXYNOS4_PA_SYSCON 0x10010000 -#define EXYNOS5_PA_SYSCON 0x10050100 - #define EXYNOS4_PA_CMU 0x10030000 #define EXYNOS5_PA_CMU 0x10010000 diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c index 86f3ecd88f78..dfc8594e5b1f 100644 --- a/arch/arm/mach-exynos/pm.c +++ b/arch/arm/mach-exynos/pm.c @@ -23,12 +23,13 @@ #include <asm/smp_scu.h> #include <asm/suspend.h> +#include <mach/map.h> + #include <plat/pm-common.h> #include "common.h" #include "exynos-pmu.h" #include "regs-pmu.h" -#include "regs-sys.h" static inline void __iomem *exynos_boot_vector_addr(void) { diff --git a/arch/arm/mach-exynos/regs-sys.h b/arch/arm/mach-exynos/regs-sys.h deleted file mode 100644 index 84332b0dd7a6..000000000000 --- a/arch/arm/mach-exynos/regs-sys.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * Copyright (c) 2014 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * EXYNOS - system register definition - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_REGS_SYS_H -#define __ASM_ARCH_REGS_SYS_H __FILE__ - -#include <mach/map.h> - -#define S5P_SYSREG(x) (S3C_VA_SYS + (x)) - -/* For EXYNOS5 */ -#define EXYNOS5_SYS_I2C_CFG S5P_SYSREG(0x0234) - -#endif /* __ASM_ARCH_REGS_SYS_H */ diff --git a/arch/arm/mach-exynos/suspend.c b/arch/arm/mach-exynos/suspend.c index f8e7dcd17055..342797b9bf3b 100644 --- a/arch/arm/mach-exynos/suspend.c +++ b/arch/arm/mach-exynos/suspend.c @@ -34,7 +34,6 @@ #include "common.h" #include "regs-pmu.h" -#include "regs-sys.h" #include "exynos-pmu.h" #define S5P_CHECK_SLEEP 0x00000BAD @@ -53,10 +52,6 @@ struct exynos_wkup_irq { u32 mask; }; -static struct sleep_save exynos5_sys_save[] = { - SAVE_ITEM(EXYNOS5_SYS_I2C_CFG), -}; - static struct sleep_save exynos_core_save[] = { /* SROM side */ SAVE_ITEM(S5P_SROM_BW), @@ -497,8 +492,6 @@ static const struct exynos_pm_data exynos5250_pm_data = { .wkup_irq = exynos5250_wkup_irq, .wake_disable_mask = ((0xFF << 8) | (0x1F << 1)), .release_ret_regs = exynos_release_ret_regs, - .extra_save = exynos5_sys_save, - .num_extra_save = ARRAY_SIZE(exynos5_sys_save), .pm_suspend = exynos_pm_suspend, .pm_resume = exynos_pm_resume, .pm_prepare = exynos_pm_prepare, diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c index 122ef67939a2..a8a533df24e1 100644 --- a/arch/arm/mach-omap1/irq.c +++ b/arch/arm/mach-omap1/irq.c @@ -64,11 +64,6 @@ u32 omap_irq_flags; static unsigned int irq_bank_count; static struct omap_irq_bank *irq_banks; -static inline unsigned int irq_bank_readl(int bank, int offset) -{ - return omap_readl(irq_banks[bank].base_reg + offset); -} - static inline void irq_bank_writel(unsigned long value, int bank, int offset) { omap_writel(value, irq_banks[bank].base_reg + offset); diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c index 107e7ab3edba..36bf174b3fac 100644 --- a/arch/arm/mach-omap1/timer32k.c +++ b/arch/arm/mach-omap1/timer32k.c @@ -91,11 +91,6 @@ static inline void omap_32k_timer_write(int val, int reg) omap_writew(val, OMAP1_32K_TIMER_BASE + reg); } -static inline unsigned long omap_32k_timer_read(int reg) -{ - return omap_readl(OMAP1_32K_TIMER_BASE + reg) & 0xffffff; -} - static inline void omap_32k_timer_start(unsigned long load_val) { if (!load_val) diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 6ab656cc4f16..2b8e47788062 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig @@ -217,12 +217,6 @@ config MACH_OMAP3517EVM bool "OMAP3517/ AM3517 EVM board" depends on ARCH_OMAP3 default y - select OMAP_PACKAGE_CBB - -config MACH_CRANEBOARD - bool "AM3517/05 CRANE board" - depends on ARCH_OMAP3 - select OMAP_PACKAGE_CBB config MACH_OMAP3_PANDORA bool "OMAP3 Pandora" @@ -263,12 +257,6 @@ config MACH_CM_T35 select MACH_CM_T3730 select OMAP_PACKAGE_CUS -config MACH_CM_T3517 - bool "CompuLab CM-T3517 module" - depends on ARCH_OMAP3 - default y - select OMAP_PACKAGE_CBB - config MACH_CM_T3730 bool diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 3a6463f88ea2..fb78744f546b 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -182,7 +182,6 @@ obj-$(CONFIG_SOC_DRA7XX) += clockdomains7xx_data.o obj-$(CONFIG_ARCH_OMAP2) += $(clock-common) clock2xxx.o obj-$(CONFIG_ARCH_OMAP2) += clkt2xxx_dpllcore.o obj-$(CONFIG_ARCH_OMAP2) += clkt2xxx_virt_prcm_set.o -obj-$(CONFIG_ARCH_OMAP2) += clkt2xxx_apll.o obj-$(CONFIG_ARCH_OMAP2) += clkt2xxx_dpll.o clkt_iclk.o obj-$(CONFIG_SOC_OMAP2430) += clock2430.o obj-$(CONFIG_ARCH_OMAP3) += $(clock-common) clock3xxx.o @@ -251,13 +250,8 @@ obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51.o sdram-nokia.o obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51-peripherals.o obj-$(CONFIG_MACH_NOKIA_RX51) += board-rx51-video.o obj-$(CONFIG_MACH_CM_T35) += board-cm-t35.o -obj-$(CONFIG_MACH_CM_T3517) += board-cm-t3517.o obj-$(CONFIG_MACH_TOUCHBOOK) += board-omap3touchbook.o -obj-$(CONFIG_MACH_OMAP3517EVM) += board-am3517evm.o - -obj-$(CONFIG_MACH_CRANEBOARD) += board-am3517crane.o - obj-$(CONFIG_MACH_SBC3530) += board-omap3stalker.o # Platform specific device init code @@ -287,7 +281,4 @@ ifneq ($(CONFIG_HWSPINLOCK_OMAP),) obj-y += hwspinlock.o endif -emac-$(CONFIG_TI_DAVINCI_EMAC) := am35xx-emac.o -obj-y += $(emac-m) $(emac-y) - obj-y += common-board-devices.o twl-common.o dss-common.o diff --git a/arch/arm/mach-omap2/am35xx-emac.c b/arch/arm/mach-omap2/am35xx-emac.c deleted file mode 100644 index 6a6935caac1e..000000000000 --- a/arch/arm/mach-omap2/am35xx-emac.c +++ /dev/null @@ -1,114 +0,0 @@ -/* - * Copyright (C) 2011 Ilya Yanok, Emcraft Systems - * - * Based on mach-omap2/board-am3517evm.c - * Copyright (C) 2009 Texas Instruments Incorporated - * Author: Ranjith Lohithakshan <ranjithl@ti.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 - * published by the Free Software Foundation. - * - * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind, - * whether express or implied; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - */ - -#include <linux/err.h> -#include <linux/davinci_emac.h> -#include "omap_device.h" -#include "am35xx.h" -#include "control.h" -#include "am35xx-emac.h" - -static void am35xx_enable_emac_int(void) -{ - u32 v; - - v = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); - v |= (AM35XX_CPGMAC_C0_RX_PULSE_CLR | AM35XX_CPGMAC_C0_TX_PULSE_CLR | - AM35XX_CPGMAC_C0_MISC_PULSE_CLR | AM35XX_CPGMAC_C0_RX_THRESH_CLR); - omap_ctrl_writel(v, AM35XX_CONTROL_LVL_INTR_CLEAR); - omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); /* OCP barrier */ -} - -static void am35xx_disable_emac_int(void) -{ - u32 v; - - v = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); - v |= (AM35XX_CPGMAC_C0_RX_PULSE_CLR | AM35XX_CPGMAC_C0_TX_PULSE_CLR); - omap_ctrl_writel(v, AM35XX_CONTROL_LVL_INTR_CLEAR); - omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); /* OCP barrier */ -} - -static struct emac_platform_data am35xx_emac_pdata = { - .ctrl_reg_offset = AM35XX_EMAC_CNTRL_OFFSET, - .ctrl_mod_reg_offset = AM35XX_EMAC_CNTRL_MOD_OFFSET, - .ctrl_ram_offset = AM35XX_EMAC_CNTRL_RAM_OFFSET, - .ctrl_ram_size = AM35XX_EMAC_CNTRL_RAM_SIZE, - .hw_ram_addr = AM35XX_EMAC_HW_RAM_ADDR, - .version = EMAC_VERSION_2, - .interrupt_enable = am35xx_enable_emac_int, - .interrupt_disable = am35xx_disable_emac_int, -}; - -static struct mdio_platform_data am35xx_mdio_pdata; - -static int __init omap_davinci_emac_dev_init(struct omap_hwmod *oh, - void *pdata, int pdata_len) -{ - struct platform_device *pdev; - - pdev = omap_device_build(oh->class->name, 0, oh, pdata, pdata_len); - if (IS_ERR(pdev)) { - WARN(1, "Can't build omap_device for %s:%s.\n", - oh->class->name, oh->name); - return PTR_ERR(pdev); - } - - return 0; -} - -void __init am35xx_emac_init(unsigned long mdio_bus_freq, u8 rmii_en) -{ - struct omap_hwmod *oh; - u32 v; - int ret; - - oh = omap_hwmod_lookup("davinci_mdio"); - if (!oh) { - pr_err("Could not find davinci_mdio hwmod\n"); - return; - } - - am35xx_mdio_pdata.bus_freq = mdio_bus_freq; - - ret = omap_davinci_emac_dev_init(oh, &am35xx_mdio_pdata, - sizeof(am35xx_mdio_pdata)); - if (ret) { - pr_err("Could not build davinci_mdio hwmod device\n"); - return; - } - - oh = omap_hwmod_lookup("davinci_emac"); - if (!oh) { - pr_err("Could not find davinci_emac hwmod\n"); - return; - } - - am35xx_emac_pdata.rmii_en = rmii_en; - - ret = omap_davinci_emac_dev_init(oh, &am35xx_emac_pdata, - sizeof(am35xx_emac_pdata)); - if (ret) { - pr_err("Could not build davinci_emac hwmod device\n"); - return; - } - - v = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); - v &= ~AM35XX_CPGMACSS_SW_RST; - omap_ctrl_writel(v, AM35XX_CONTROL_IP_SW_RESET); - omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); /* OCP barrier */ -} diff --git a/arch/arm/mach-omap2/am35xx-emac.h b/arch/arm/mach-omap2/am35xx-emac.h deleted file mode 100644 index 15c6f9ce59a2..000000000000 --- a/arch/arm/mach-omap2/am35xx-emac.h +++ /dev/null @@ -1,15 +0,0 @@ -/* - * Copyright (C) 2011 Ilya Yanok, Emcraft Systems - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#define AM35XX_DEFAULT_MDIO_FREQUENCY 1000000 - -#if defined(CONFIG_TI_DAVINCI_EMAC) || defined(CONFIG_TI_DAVINCI_EMAC_MODULE) -void am35xx_emac_init(unsigned long mdio_bus_freq, u8 rmii_en); -#else -static inline void am35xx_emac_init(unsigned long mdio_bus_freq, u8 rmii_en) {} -#endif diff --git a/arch/arm/mach-omap2/am35xx.h b/arch/arm/mach-omap2/am35xx.h deleted file mode 100644 index 95594495fcf6..000000000000 --- a/arch/arm/mach-omap2/am35xx.h +++ /dev/null @@ -1,46 +0,0 @@ -/*: - * Address mappings and base address for AM35XX specific interconnects - * and peripherals. - * - * Copyright (C) 2009 Texas Instruments - * - * Author: Sriramakrishnan <srk@ti.com> - * Vaibhav Hiremath <hvaibhav@ti.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef __ASM_ARCH_AM35XX_H -#define __ASM_ARCH_AM35XX_H - -/* - * Base addresses - * Note: OMAP3430 IVA2 memory space is being used for AM35xx IPSS modules - */ -#define AM35XX_IPSS_EMAC_BASE 0x5C000000 -#define AM35XX_IPSS_USBOTGSS_BASE 0x5C040000 -#define AM35XX_IPSS_HECC_BASE 0x5C050000 -#define AM35XX_IPSS_VPFE_BASE 0x5C060000 - - -/* HECC module specifc offset definitions */ -#define AM35XX_HECC_SCC_HECC_OFFSET (0x0) -#define AM35XX_HECC_SCC_RAM_OFFSET (0x3000) -#define AM35XX_HECC_RAM_OFFSET (0x3000) -#define AM35XX_HECC_MBOX_OFFSET (0x2000) -#define AM35XX_HECC_INT_LINE (0x0) -#define AM35XX_HECC_VERSION (0x1) - -#define AM35XX_EMAC_CNTRL_OFFSET (0x10000) -#define AM35XX_EMAC_CNTRL_MOD_OFFSET (0x0) -#define AM35XX_EMAC_CNTRL_RAM_OFFSET (0x20000) -#define AM35XX_EMAC_MDIO_OFFSET (0x30000) -#define AM35XX_IPSS_MDIO_BASE (AM35XX_IPSS_EMAC_BASE + \ - AM35XX_EMAC_MDIO_OFFSET) -#define AM35XX_EMAC_CNTRL_RAM_SIZE (0x2000) -#define AM35XX_EMAC_RAM_ADDR (AM3517_EMAC_BASE + \ - AM3517_EMAC_CNTRL_RAM_OFFSET) -#define AM35XX_EMAC_HW_RAM_ADDR (0x01E20000) - -#endif /* __ASM_ARCH_AM35XX_H */ diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c deleted file mode 100644 index 8168ddabaeda..000000000000 --- a/arch/arm/mach-omap2/board-am3517crane.c +++ /dev/null @@ -1,150 +0,0 @@ -/* - * Support for AM3517/05 Craneboard - * http://www.mistralsolutions.com/products/craneboard.php - * - * Copyright (C) 2010 Mistral Solutions Pvt Ltd. <www.mistralsolutions.com> - * Author: R.Srinath <srinath@mistralsolutions.com> - * - * Based on mach-omap2/board-am3517evm.c - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation version 2. - * - * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind, - * whether express or implied; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/gpio.h> -#include <linux/mfd/tps65910.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/nand.h> -#include <linux/mtd/partitions.h> -#include <linux/omap-gpmc.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> - -#include "common.h" -#include "common-board-devices.h" -#include "board-flash.h" - -#include "am35xx-emac.h" -#include "mux.h" -#include "control.h" - -#define GPIO_USB_POWER 35 -#define GPIO_USB_NRESET 38 - -#ifdef CONFIG_OMAP_MUX -static struct omap_board_mux board_mux[] __initdata = { - OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP), - { .reg_offset = OMAP_MUX_TERMINATOR }, -}; -#endif - -static struct usbhs_phy_data phy_data[] __initdata = { - { - .port = 1, - .reset_gpio = GPIO_USB_NRESET, - .vcc_gpio = GPIO_USB_POWER, - .vcc_polarity = 1, - }, -}; - -static struct usbhs_omap_platform_data usbhs_bdata __initdata = { - .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, -}; - -static struct mtd_partition crane_nand_partitions[] = { - { - .name = "X-Loader", - .offset = 0, - .size = 4 * NAND_BLOCK_SIZE, - .mask_flags = MTD_WRITEABLE, - }, - { - .name = "U-Boot", - .offset = MTDPART_OFS_APPEND, - .size = 14 * NAND_BLOCK_SIZE, - .mask_flags = MTD_WRITEABLE, - }, - { - .name = "U-Boot Env", - .offset = MTDPART_OFS_APPEND, - .size = 2 * NAND_BLOCK_SIZE, - }, - { - .name = "Kernel", - .offset = MTDPART_OFS_APPEND, - .size = 40 * NAND_BLOCK_SIZE, - }, - { - .name = "File System", - .offset = MTDPART_OFS_APPEND, - .size = MTDPART_SIZ_FULL, - }, -}; - -static struct tps65910_board tps65910_pdata = { - .irq = 7 + OMAP_INTC_START, - .en_ck32k_xtal = true, -}; - -static struct i2c_board_info __initdata tps65910_board_info[] = { - { - I2C_BOARD_INFO("tps65910", 0x2d), - .platform_data = &tps65910_pdata, - }, -}; - -static void __init am3517_crane_i2c_init(void) -{ - omap_register_i2c_bus(1, 2600, tps65910_board_info, - ARRAY_SIZE(tps65910_board_info)); -} - -static void __init am3517_crane_init(void) -{ - omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); - omap_serial_init(); - omap_sdrc_init(NULL, NULL); - board_nand_init(crane_nand_partitions, - ARRAY_SIZE(crane_nand_partitions), 0, - NAND_BUSWIDTH_16, NULL); - am3517_crane_i2c_init(); - - /* Configure GPIO for EHCI port */ - if (omap_mux_init_gpio(GPIO_USB_NRESET, OMAP_PIN_OUTPUT)) { - pr_err("Can not configure mux for GPIO_USB_NRESET %d\n", - GPIO_USB_NRESET); - return; - } - - if (omap_mux_init_gpio(GPIO_USB_POWER, OMAP_PIN_OUTPUT)) { - pr_err("Can not configure mux for GPIO_USB_POWER %d\n", - GPIO_USB_POWER); - return; - } - - usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data)); - usbhs_init(&usbhs_bdata); - am35xx_emac_init(AM35XX_DEFAULT_MDIO_FREQUENCY, 1); -} - -MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD") - .atag_offset = 0x100, - .reserve = omap_reserve, - .map_io = omap3_map_io, - .init_early = am35xx_init_early, - .init_irq = omap3_init_irq, - .init_machine = am3517_crane_init, - .init_late = am35xx_init_late, - .init_time = omap3_sync32k_timer_init, - .restart = omap3xxx_restart, -MACHINE_END diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c deleted file mode 100644 index 1c091b3fa312..000000000000 --- a/arch/arm/mach-omap2/board-am3517evm.c +++ /dev/null @@ -1,373 +0,0 @@ -/* - * linux/arch/arm/mach-omap2/board-am3517evm.c - * - * Copyright (C) 2009 Texas Instruments Incorporated - * Author: Ranjith Lohithakshan <ranjithl@ti.com> - * - * Based on mach-omap2/board-omap3evm.c - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the - * Free Software Foundation version 2. - * - * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind, - * whether express or implied; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/clk.h> -#include <linux/platform_device.h> -#include <linux/gpio.h> -#include <linux/platform_data/pca953x.h> -#include <linux/can/platform/ti_hecc.h> -#include <linux/davinci_emac.h> -#include <linux/mmc/host.h> -#include <linux/usb/musb.h> -#include <linux/platform_data/gpio-omap.h> - -#include "am35xx.h" -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> - -#include "common.h" -#include <video/omapdss.h> -#include <video/omap-panel-data.h> - -#include "am35xx-emac.h" -#include "mux.h" -#include "control.h" -#include "hsmmc.h" - -#define LCD_PANEL_PWR 176 -#define LCD_PANEL_BKLIGHT_PWR 182 -#define LCD_PANEL_PWM 181 - -static struct i2c_board_info __initdata am3517evm_i2c1_boardinfo[] = { - { - I2C_BOARD_INFO("s35390a", 0x30), - }, -}; - -/* - * RTC - S35390A - */ -#define GPIO_RTCS35390A_IRQ 55 - -static void __init am3517_evm_rtc_init(void) -{ - int r; - - omap_mux_init_gpio(GPIO_RTCS35390A_IRQ, OMAP_PIN_INPUT_PULLUP); - - r = gpio_request_one(GPIO_RTCS35390A_IRQ, GPIOF_IN, "rtcs35390a-irq"); - if (r < 0) { - printk(KERN_WARNING "failed to request GPIO#%d\n", - GPIO_RTCS35390A_IRQ); - return; - } - - am3517evm_i2c1_boardinfo[0].irq = gpio_to_irq(GPIO_RTCS35390A_IRQ); -} - -/* - * I2C GPIO Expander - TCA6416 - */ - -/* Mounted on Base-Board */ -static struct pca953x_platform_data am3517evm_gpio_expander_info_0 = { - .gpio_base = OMAP_MAX_GPIO_LINES, -}; -static struct i2c_board_info __initdata am3517evm_i2c2_boardinfo[] = { - { - I2C_BOARD_INFO("tlv320aic23", 0x1A), - }, - { - I2C_BOARD_INFO("tca6416", 0x21), - .platform_data = &am3517evm_gpio_expander_info_0, - }, -}; - -/* Mounted on UI Card */ -static struct pca953x_platform_data am3517evm_ui_gpio_expander_info_1 = { - .gpio_base = OMAP_MAX_GPIO_LINES + 16, -}; -static struct pca953x_platform_data am3517evm_ui_gpio_expander_info_2 = { - .gpio_base = OMAP_MAX_GPIO_LINES + 32, -}; -static struct i2c_board_info __initdata am3517evm_i2c3_boardinfo[] = { - { - I2C_BOARD_INFO("tca6416", 0x20), - .platform_data = &am3517evm_ui_gpio_expander_info_1, - }, - { - I2C_BOARD_INFO("tca6416", 0x21), - .platform_data = &am3517evm_ui_gpio_expander_info_2, - }, -}; - -static int __init am3517_evm_i2c_init(void) -{ - omap_register_i2c_bus(1, 400, NULL, 0); - omap_register_i2c_bus(2, 400, am3517evm_i2c2_boardinfo, - ARRAY_SIZE(am3517evm_i2c2_boardinfo)); - omap_register_i2c_bus(3, 400, am3517evm_i2c3_boardinfo, - ARRAY_SIZE(am3517evm_i2c3_boardinfo)); - - return 0; -} - -static const struct display_timing am3517_evm_lcd_videomode = { - .pixelclock = { 0, 9000000, 0 }, - - .hactive = { 0, 480, 0 }, - .hfront_porch = { 0, 3, 0 }, - .hback_porch = { 0, 2, 0 }, - .hsync_len = { 0, 42, 0 }, - - .vactive = { 0, 272, 0 }, - .vfront_porch = { 0, 3, 0 }, - .vback_porch = { 0, 2, 0 }, - .vsync_len = { 0, 11, 0 }, - - .flags = DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW | - DISPLAY_FLAGS_DE_LOW | DISPLAY_FLAGS_PIXDATA_POSEDGE, -}; - -static struct panel_dpi_platform_data am3517_evm_lcd_pdata = { - .name = "lcd", - .source = "dpi.0", - - .data_lines = 16, - - .display_timing = &am3517_evm_lcd_videomode, - - .enable_gpio = LCD_PANEL_PWR, - .backlight_gpio = LCD_PANEL_BKLIGHT_PWR, -}; - -static struct platform_device am3517_evm_lcd_device = { - .name = "panel-dpi", - .id = 0, - .dev.platform_data = &am3517_evm_lcd_pdata, -}; - -static struct connector_dvi_platform_data am3517_evm_dvi_connector_pdata = { - .name = "dvi", - .source = "tfp410.0", - .i2c_bus_num = -1, -}; - -static struct platform_device am3517_evm_dvi_connector_device = { - .name = "connector-dvi", - .id = 0, - .dev.platform_data = &am3517_evm_dvi_connector_pdata, -}; - -static struct encoder_tfp410_platform_data am3517_evm_tfp410_pdata = { - .name = "tfp410.0", - .source = "dpi.0", - .data_lines = 24, - .power_down_gpio = -1, -}; - -static struct platform_device am3517_evm_tfp410_device = { - .name = "tfp410", - .id = 0, - .dev.platform_data = &am3517_evm_tfp410_pdata, -}; - -static struct connector_atv_platform_data am3517_evm_tv_pdata = { - .name = "tv", - .source = "venc.0", - .connector_type = OMAP_DSS_VENC_TYPE_SVIDEO, - .invert_polarity = false, -}; - -static struct platform_device am3517_evm_tv_connector_device = { - .name = "connector-analog-tv", - .id = 0, - .dev.platform_data = &am3517_evm_tv_pdata, -}; - -static struct omap_dss_board_info am3517_evm_dss_data = { - .default_display_name = "lcd", -}; - -static void __init am3517_evm_display_init(void) -{ - gpio_request_one(LCD_PANEL_PWM, GPIOF_OUT_INIT_HIGH, "lcd panel pwm"); - - omap_display_init(&am3517_evm_dss_data); - - platform_device_register(&am3517_evm_tfp410_device); - platform_device_register(&am3517_evm_dvi_connector_device); - platform_device_register(&am3517_evm_lcd_device); - platform_device_register(&am3517_evm_tv_connector_device); -} - -/* - * Board initialization - */ - -static struct omap_musb_board_data musb_board_data = { - .interface_type = MUSB_INTERFACE_ULPI, - .mode = MUSB_OTG, - .power = 500, - .set_phy_power = am35x_musb_phy_power, - .clear_irq = am35x_musb_clear_irq, - .set_mode = am35x_set_mode, - .reset = am35x_musb_reset, -}; - -static __init void am3517_evm_musb_init(void) -{ - u32 devconf2; - - /* - * Set up USB clock/mode in the DEVCONF2 register. - */ - devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2); - - /* USB2.0 PHY reference clock is 13 MHz */ - devconf2 &= ~(CONF2_REFFREQ | CONF2_OTGMODE | CONF2_PHY_GPIOMODE); - devconf2 |= CONF2_REFFREQ_13MHZ | CONF2_SESENDEN | CONF2_VBDTCTEN - | CONF2_DATPOL; - - omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2); - - usb_musb_init(&musb_board_data); -} - -static __init void am3517_evm_mcbsp1_init(void) -{ - u32 devconf0; - - /* McBSP1 CLKR/FSR signal to be connected to CLKX/FSX pin */ - devconf0 = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); - devconf0 |= OMAP2_MCBSP1_CLKR_MASK | OMAP2_MCBSP1_FSR_MASK; - omap_ctrl_writel(devconf0, OMAP2_CONTROL_DEVCONF0); -} - -static struct usbhs_phy_data phy_data[] __initdata = { - { - .port = 1, - .reset_gpio = 57, - .vcc_gpio = -EINVAL, - }, -}; - -static struct usbhs_omap_platform_data usbhs_bdata __initdata = { - .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, - .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, -}; - -#ifdef CONFIG_OMAP_MUX -static struct omap_board_mux board_mux[] __initdata = { - /* USB OTG DRVVBUS offset = 0x212 */ - OMAP3_MUX(SAD2D_MCAD23, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN), - { .reg_offset = OMAP_MUX_TERMINATOR }, -}; -#endif - - -static struct resource am3517_hecc_resources[] = { - { - .start = AM35XX_IPSS_HECC_BASE, - .end = AM35XX_IPSS_HECC_BASE + 0x3FFF, - .flags = IORESOURCE_MEM, - }, - { - .start = 24 + OMAP_INTC_START, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device am3517_hecc_device = { - .name = "ti_hecc", - .id = -1, - .num_resources = ARRAY_SIZE(am3517_hecc_resources), - .resource = am3517_hecc_resources, -}; - -static struct ti_hecc_platform_data am3517_evm_hecc_pdata = { - .scc_hecc_offset = AM35XX_HECC_SCC_HECC_OFFSET, - .scc_ram_offset = AM35XX_HECC_SCC_RAM_OFFSET, - .hecc_ram_offset = AM35XX_HECC_RAM_OFFSET, - .mbx_offset = AM35XX_HECC_MBOX_OFFSET, - .int_line = AM35XX_HECC_INT_LINE, - .version = AM35XX_HECC_VERSION, -}; - -static void am3517_evm_hecc_init(struct ti_hecc_platform_data *pdata) -{ - am3517_hecc_device.dev.platform_data = pdata; - platform_device_register(&am3517_hecc_device); -} - -static struct omap2_hsmmc_info mmc[] = { - { - .mmc = 1, - .caps = MMC_CAP_4_BIT_DATA, - .gpio_cd = 127, - .gpio_wp = 126, - }, - { - .mmc = 2, - .caps = MMC_CAP_4_BIT_DATA, - .gpio_cd = 128, - .gpio_wp = 129, - }, - {} /* Terminator */ -}; - -static void __init am3517_evm_init(void) -{ - omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); - - am3517_evm_i2c_init(); - - am3517_evm_display_init(); - - omap_serial_init(); - omap_sdrc_init(NULL, NULL); - - /* Configure GPIO for EHCI port */ - omap_mux_init_gpio(57, OMAP_PIN_OUTPUT); - - usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data)); - usbhs_init(&usbhs_bdata); - am3517_evm_hecc_init(&am3517_evm_hecc_pdata); - - /* RTC - S35390A */ - am3517_evm_rtc_init(); - - i2c_register_board_info(1, am3517evm_i2c1_boardinfo, - ARRAY_SIZE(am3517evm_i2c1_boardinfo)); - /*Ethernet*/ - am35xx_emac_init(AM35XX_DEFAULT_MDIO_FREQUENCY, 1); - - /* MUSB */ - am3517_evm_musb_init(); - - /* McBSP1 */ - am3517_evm_mcbsp1_init(); - - /* MMC init function */ - omap_hsmmc_init(mmc); -} - -MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM") - .atag_offset = 0x100, - .reserve = omap_reserve, - .map_io = omap3_map_io, - .init_early = am35xx_init_early, - .init_irq = omap3_init_irq, - .init_machine = am3517_evm_init, - .init_late = am35xx_init_late, - .init_time = omap3_sync32k_timer_init, - .restart = omap3xxx_restart, -MACHINE_END diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c deleted file mode 100644 index 794756df8529..000000000000 --- a/arch/arm/mach-omap2/board-cm-t3517.c +++ /dev/null @@ -1,335 +0,0 @@ -/* - * linux/arch/arm/mach-omap2/board-cm-t3517.c - * - * Support for the CompuLab CM-T3517 modules - * - * Copyright (C) 2010 CompuLab, Ltd. - * Author: Igor Grinberg <grinberg@compulab.co.il> - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA - * 02110-1301 USA - * - */ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/platform_device.h> -#include <linux/delay.h> -#include <linux/gpio.h> -#include <linux/leds.h> -#include <linux/omap-gpmc.h> -#include <linux/rtc-v3020.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/nand.h> -#include <linux/mtd/partitions.h> -#include <linux/mmc/host.h> -#include <linux/can/platform/ti_hecc.h> - -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> - -#include "common.h" -#include <linux/platform_data/mtd-nand-omap2.h> - -#include "am35xx.h" - -#include "mux.h" -#include "control.h" -#include "hsmmc.h" -#include "common-board-devices.h" -#include "am35xx-emac.h" - -#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) -static struct gpio_led cm_t3517_leds[] = { - [0] = { - .gpio = 186, - .name = "cm-t3517:green", - .default_trigger = "heartbeat", - .active_low = 0, - }, -}; - -static struct gpio_led_platform_data cm_t3517_led_pdata = { - .num_leds = ARRAY_SIZE(cm_t3517_leds), - .leds = cm_t3517_leds, -}; - -static struct platform_device cm_t3517_led_device = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &cm_t3517_led_pdata, - }, -}; - -static void __init cm_t3517_init_leds(void) -{ - platform_device_register(&cm_t3517_led_device); -} -#else -static inline void cm_t3517_init_leds(void) {} -#endif - -#if defined(CONFIG_CAN_TI_HECC) || defined(CONFIG_CAN_TI_HECC_MODULE) -static struct resource cm_t3517_hecc_resources[] = { - { - .start = AM35XX_IPSS_HECC_BASE, - .end = AM35XX_IPSS_HECC_BASE + SZ_16K - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = 24 + OMAP_INTC_START, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct ti_hecc_platform_data cm_t3517_hecc_pdata = { - .scc_hecc_offset = AM35XX_HECC_SCC_HECC_OFFSET, - .scc_ram_offset = AM35XX_HECC_SCC_RAM_OFFSET, - .hecc_ram_offset = AM35XX_HECC_RAM_OFFSET, - .mbx_offset = AM35XX_HECC_MBOX_OFFSET, - .int_line = AM35XX_HECC_INT_LINE, - .version = AM35XX_HECC_VERSION, -}; - -static struct platform_device cm_t3517_hecc_device = { - .name = "ti_hecc", - .id = 1, - .num_resources = ARRAY_SIZE(cm_t3517_hecc_resources), - .resource = cm_t3517_hecc_resources, - .dev = { - .platform_data = &cm_t3517_hecc_pdata, - }, -}; - -static void cm_t3517_init_hecc(void) -{ - platform_device_register(&cm_t3517_hecc_device); -} -#else -static inline void cm_t3517_init_hecc(void) {} -#endif - -#if defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE) -static struct omap2_hsmmc_info cm_t3517_mmc[] = { - { - .mmc = 1, - .caps = MMC_CAP_4_BIT_DATA, - .gpio_cd = 144, - .gpio_wp = 59, - }, - { - .mmc = 2, - .caps = MMC_CAP_4_BIT_DATA, - .gpio_cd = -EINVAL, - .gpio_wp = -EINVAL, - }, - {} /* Terminator */ -}; -#else -#define cm_t3517_mmc NULL -#endif - -#if defined(CONFIG_RTC_DRV_V3020) || defined(CONFIG_RTC_DRV_V3020_MODULE) -#define RTC_IO_GPIO (153) -#define RTC_WR_GPIO (154) -#define RTC_RD_GPIO (53) -#define RTC_CS_GPIO (163) -#define RTC_CS_EN_GPIO (160) - -struct v3020_platform_data cm_t3517_v3020_pdata = { - .use_gpio = 1, - .gpio_cs = RTC_CS_GPIO, - .gpio_wr = RTC_WR_GPIO, - .gpio_rd = RTC_RD_GPIO, - .gpio_io = RTC_IO_GPIO, -}; - -static struct platform_device cm_t3517_rtc_device = { - .name = "v3020", - .id = -1, - .dev = { - .platform_data = &cm_t3517_v3020_pdata, - } -}; - -static void __init cm_t3517_init_rtc(void) -{ - int err; - - err = gpio_request_one(RTC_CS_EN_GPIO, GPIOF_OUT_INIT_HIGH, - "rtc cs en"); - if (err) { - pr_err("CM-T3517: rtc cs en gpio request failed: %d\n", err); - return; - } - - platform_device_register(&cm_t3517_rtc_device); -} -#else -static inline void cm_t3517_init_rtc(void) {} -#endif - -#if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_EHCI_HCD_MODULE) -#define HSUSB1_RESET_GPIO (146) -#define HSUSB2_RESET_GPIO (147) -#define USB_HUB_RESET_GPIO (152) - -static struct usbhs_phy_data phy_data[] __initdata = { - { - .port = 1, - .reset_gpio = HSUSB1_RESET_GPIO, - .vcc_gpio = -EINVAL, - }, - { - .port = 2, - .reset_gpio = HSUSB2_RESET_GPIO, - .vcc_gpio = -EINVAL, - }, -}; - -static struct usbhs_omap_platform_data cm_t3517_ehci_pdata __initdata = { - .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY, - .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY, -}; - -static int __init cm_t3517_init_usbh(void) -{ - int err; - - err = gpio_request_one(USB_HUB_RESET_GPIO, GPIOF_OUT_INIT_LOW, - "usb hub rst"); - if (err) { - pr_err("CM-T3517: usb hub rst gpio request failed: %d\n", err); - } else { - udelay(10); - gpio_set_value(USB_HUB_RESET_GPIO, 1); - msleep(1); - } - - usbhs_init_phys(phy_data, ARRAY_SIZE(phy_data)); - usbhs_init(&cm_t3517_ehci_pdata); - - return 0; -} -#else -static inline int cm_t3517_init_usbh(void) -{ - return 0; -} -#endif - -#if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE) -static struct mtd_partition cm_t3517_nand_partitions[] = { - { - .name = "xloader", - .offset = 0, /* Offset = 0x00000 */ - .size = 4 * NAND_BLOCK_SIZE, - .mask_flags = MTD_WRITEABLE - }, - { - .name = "uboot", - .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */ - .size = 15 * NAND_BLOCK_SIZE, - }, - { - .name = "uboot environment", - .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */ - .size = 2 * NAND_BLOCK_SIZE, - }, - { - .name = "linux", - .offset = MTDPART_OFS_APPEND, /* Offset = 0x2A0000 */ - .size = 32 * NAND_BLOCK_SIZE, - }, - { - .name = "rootfs", - .offset = MTDPART_OFS_APPEND, /* Offset = 0x6A0000 */ - .size = MTDPART_SIZ_FULL, - }, -}; - -static struct omap_nand_platform_data cm_t3517_nand_data = { - .parts = cm_t3517_nand_partitions, - .nr_parts = ARRAY_SIZE(cm_t3517_nand_partitions), - .cs = 0, -}; - -static void __init cm_t3517_init_nand(void) -{ - if (gpmc_nand_init(&cm_t3517_nand_data, NULL) < 0) - pr_err("CM-T3517: NAND initialization failed\n"); -} -#else -static inline void cm_t3517_init_nand(void) {} -#endif - -#ifdef CONFIG_OMAP_MUX -static struct omap_board_mux board_mux[] __initdata = { - /* GPIO186 - Green LED */ - OMAP3_MUX(SYS_CLKOUT2, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), - - /* RTC GPIOs: */ - /* IO - GPIO153 */ - OMAP3_MUX(MCBSP4_DR, OMAP_MUX_MODE4 | OMAP_PIN_INPUT), - /* WR# - GPIO154 */ - OMAP3_MUX(MCBSP4_DX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT), - /* RD# - GPIO53 */ - OMAP3_MUX(GPMC_NCS2, OMAP_MUX_MODE4 | OMAP_PIN_INPUT), - /* CS# - GPIO163 */ - OMAP3_MUX(UART3_CTS_RCTX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT), - /* CS EN - GPIO160 */ - OMAP3_MUX(MCBSP_CLKS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT), - - /* HSUSB1 RESET */ - OMAP3_MUX(UART2_TX, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), - /* HSUSB2 RESET */ - OMAP3_MUX(UART2_RX, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), - /* CM-T3517 USB HUB nRESET */ - OMAP3_MUX(MCBSP4_CLKX, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT), - - /* CD - GPIO144 and WP - GPIO59 for MMC1 - SB-T35 */ - OMAP3_MUX(UART2_CTS, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP), - OMAP3_MUX(GPMC_CLK, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP), - - { .reg_offset = OMAP_MUX_TERMINATOR }, -}; -#endif - -static void __init cm_t3517_init(void) -{ - omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); - omap_serial_init(); - omap_sdrc_init(NULL, NULL); - cm_t3517_init_leds(); - cm_t3517_init_nand(); - cm_t3517_init_rtc(); - cm_t3517_init_usbh(); - cm_t3517_init_hecc(); - am35xx_emac_init(AM35XX_DEFAULT_MDIO_FREQUENCY, 1); - omap_hsmmc_init(cm_t3517_mmc); -} - -MACHINE_START(CM_T3517, "Compulab CM-T3517") - .atag_offset = 0x100, - .reserve = omap_reserve, - .map_io = omap3_map_io, - .init_early = am35xx_init_early, - .init_irq = omap3_init_irq, - .init_machine = cm_t3517_init, - .init_late = am35xx_init_late, - .init_time = omap3_gptimer_timer_init, - .restart = omap3xxx_restart, -MACHINE_END diff --git a/arch/arm/mach-omap2/cclock3xxx_data.c b/arch/arm/mach-omap2/cclock3xxx_data.c index 644ff3231bb8..e79c80bbc755 100644 --- a/arch/arm/mach-omap2/cclock3xxx_data.c +++ b/arch/arm/mach-omap2/cclock3xxx_data.c @@ -3634,10 +3634,6 @@ int __init omap3xxx_clk_init(void) omap_clocks_register(omap36xx_am35xx_omap3430es2plus_clks, ARRAY_SIZE(omap36xx_am35xx_omap3430es2plus_clks)); omap_clocks_register(omap3xxx_clks, ARRAY_SIZE(omap3xxx_clks)); - } else if (soc_is_am33xx()) { - cpu_mask = RATE_IN_AM33XX; - } else if (cpu_is_ti814x()) { - cpu_mask = RATE_IN_TI814X; } else if (cpu_is_omap34xx()) { if (omap_rev() == OMAP3430_REV_ES1_0) { cpu_mask = RATE_IN_3430ES1; @@ -3681,7 +3677,7 @@ int __init omap3xxx_clk_init(void) * Lock DPLL5 -- here only until other device init code can * handle this */ - if (!cpu_is_ti81xx() && (omap_rev() >= OMAP3430_REV_ES2_0)) + if (omap_rev() >= OMAP3430_REV_ES2_0) omap3_clk_lock_dpll5(); /* Avoid sleeping during omap3_core_dpll_m2_set_rate() */ diff --git a/arch/arm/mach-omap2/clkt2xxx_apll.c b/arch/arm/mach-omap2/clkt2xxx_apll.c deleted file mode 100644 index c78e893eba7d..000000000000 --- a/arch/arm/mach-omap2/clkt2xxx_apll.c +++ /dev/null @@ -1,142 +0,0 @@ -/* - * OMAP2xxx APLL clock control functions - * - * Copyright (C) 2005-2008 Texas Instruments, Inc. - * Copyright (C) 2004-2010 Nokia Corporation - * - * Contacts: - * Richard Woodruff <r-woodruff2@ti.com> - * Paul Walmsley - * - * Based on earlier work by Tuukka Tikkanen, Tony Lindgren, - * Gordon McNutt and RidgeRun, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#undef DEBUG - -#include <linux/kernel.h> -#include <linux/clk.h> -#include <linux/io.h> - - -#include "clock.h" -#include "clock2xxx.h" -#include "cm2xxx.h" -#include "cm-regbits-24xx.h" - -/* CM_CLKEN_PLL.EN_{54,96}M_PLL options (24XX) */ -#define EN_APLL_STOPPED 0 -#define EN_APLL_LOCKED 3 - -/* CM_CLKSEL1_PLL.APLLS_CLKIN options (24XX) */ -#define APLLS_CLKIN_19_2MHZ 0 -#define APLLS_CLKIN_13MHZ 2 -#define APLLS_CLKIN_12MHZ 3 - -/* Private functions */ - -/** - * omap2xxx_clk_apll_locked - is the APLL locked? - * @hw: struct clk_hw * of the APLL to check - * - * If the APLL IP block referred to by @hw indicates that it's locked, - * return true; otherwise, return false. - */ -static bool omap2xxx_clk_apll_locked(struct clk_hw *hw) -{ - struct clk_hw_omap *clk = to_clk_hw_omap(hw); - u32 r, apll_mask; - - apll_mask = EN_APLL_LOCKED << clk->enable_bit; - - r = omap2xxx_cm_get_pll_status(); - - return ((r & apll_mask) == apll_mask) ? true : false; -} - -int omap2_clk_apll96_enable(struct clk_hw *hw) -{ - return omap2xxx_cm_apll96_enable(); -} - -int omap2_clk_apll54_enable(struct clk_hw *hw) -{ - return omap2xxx_cm_apll54_enable(); -} - -static void _apll96_allow_idle(struct clk_hw_omap *clk) -{ - omap2xxx_cm_set_apll96_auto_low_power_stop(); -} - -static void _apll96_deny_idle(struct clk_hw_omap *clk) -{ - omap2xxx_cm_set_apll96_disable_autoidle(); -} - -static void _apll54_allow_idle(struct clk_hw_omap *clk) -{ - omap2xxx_cm_set_apll54_auto_low_power_stop(); -} - -static void _apll54_deny_idle(struct clk_hw_omap *clk) -{ - omap2xxx_cm_set_apll54_disable_autoidle(); -} - -void omap2_clk_apll96_disable(struct clk_hw *hw) -{ - omap2xxx_cm_apll96_disable(); -} - -void omap2_clk_apll54_disable(struct clk_hw *hw) -{ - omap2xxx_cm_apll54_disable(); -} - -unsigned long omap2_clk_apll54_recalc(struct clk_hw *hw, - unsigned long parent_rate) -{ - return (omap2xxx_clk_apll_locked(hw)) ? 54000000 : 0; -} - -unsigned long omap2_clk_apll96_recalc(struct clk_hw *hw, - unsigned long parent_rate) -{ - return (omap2xxx_clk_apll_locked(hw)) ? 96000000 : 0; -} - -/* Public data */ -const struct clk_hw_omap_ops clkhwops_apll54 = { - .allow_idle = _apll54_allow_idle, - .deny_idle = _apll54_deny_idle, -}; - -const struct clk_hw_omap_ops clkhwops_apll96 = { - .allow_idle = _apll96_allow_idle, - .deny_idle = _apll96_deny_idle, -}; - -/* Public functions */ - -u32 omap2xxx_get_apll_clkin(void) -{ - u32 aplls, srate = 0; - - aplls = omap2xxx_cm_get_pll_config(); - aplls &= OMAP24XX_APLLS_CLKIN_MASK; - aplls >>= OMAP24XX_APLLS_CLKIN_SHIFT; - - if (aplls == APLLS_CLKIN_19_2MHZ) - srate = 19200000; - else if (aplls == APLLS_CLKIN_13MHZ) - srate = 13000000; - else if (aplls == APLLS_CLKIN_12MHZ) - srate = 12000000; - - return srate; -} - diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h index a4282e79143e..1cf9dd85248a 100644 --- a/arch/arm/mach-omap2/clock.h +++ b/arch/arm/mach-omap2/clock.h @@ -177,7 +177,6 @@ struct clksel { u32 omap3_dpll_autoidle_read(struct clk_hw_omap *clk); void omap3_dpll_allow_idle(struct clk_hw_omap *clk); void omap3_dpll_deny_idle(struct clk_hw_omap *clk); -int omap4_dpllmx_gatectrl_read(struct clk_hw_omap *clk); void omap4_dpllmx_allow_gatectrl(struct clk_hw_omap *clk); void omap4_dpllmx_deny_gatectrl(struct clk_hw_omap *clk); diff --git a/arch/arm/mach-omap2/clock2xxx.h b/arch/arm/mach-omap2/clock2xxx.h index a090225ceeba..125c37614848 100644 --- a/arch/arm/mach-omap2/clock2xxx.h +++ b/arch/arm/mach-omap2/clock2xxx.h @@ -22,12 +22,7 @@ unsigned long omap2xxx_sys_clk_recalc(struct clk_hw *clk, unsigned long omap2_osc_clk_recalc(struct clk_hw *clk, unsigned long parent_rate); void omap2xxx_clkt_dpllcore_init(struct clk_hw *hw); -unsigned long omap2_clk_apll54_recalc(struct clk_hw *hw, - unsigned long parent_rate); -unsigned long omap2_clk_apll96_recalc(struct clk_hw *hw, - unsigned long parent_rate); unsigned long omap2xxx_clk_get_core_rate(void); -u32 omap2xxx_get_apll_clkin(void); u32 omap2xxx_get_sysclkdiv(void); void omap2xxx_clk_prepare_for_reboot(void); void omap2xxx_clkt_vps_check_bootloader_rates(void); @@ -46,11 +41,5 @@ int omap2430_clk_init(void); #endif extern struct clk_hw *dclk_hw; -int omap2_enable_osc_ck(struct clk_hw *hw); -void omap2_disable_osc_ck(struct clk_hw *hw); -int omap2_clk_apll96_enable(struct clk_hw *hw); -int omap2_clk_apll54_enable(struct clk_hw *hw); -void omap2_clk_apll96_disable(struct clk_hw *hw); -void omap2_clk_apll54_disable(struct clk_hw *hw); #endif diff --git a/arch/arm/mach-omap2/cm2xxx.c b/arch/arm/mach-omap2/cm2xxx.c index a96d901b1d5d..ef62ac9dcd05 100644 --- a/arch/arm/mach-omap2/cm2xxx.c +++ b/arch/arm/mach-omap2/cm2xxx.c @@ -370,16 +370,6 @@ u32 omap2xxx_cm_get_core_pll_config(void) return omap2_cm_read_mod_reg(PLL_MOD, CM_CLKSEL2); } -u32 omap2xxx_cm_get_pll_config(void) -{ - return omap2_cm_read_mod_reg(PLL_MOD, CM_CLKSEL1); -} - -u32 omap2xxx_cm_get_pll_status(void) -{ - return omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN); -} - void omap2xxx_cm_set_mod_dividers(u32 mpu, u32 dsp, u32 gfx, u32 core, u32 mdm) { u32 tmp; diff --git a/arch/arm/mach-omap2/cm2xxx.h b/arch/arm/mach-omap2/cm2xxx.h index c89502b168ae..83b6c597b0e1 100644 --- a/arch/arm/mach-omap2/cm2xxx.h +++ b/arch/arm/mach-omap2/cm2xxx.h @@ -60,8 +60,6 @@ extern int omap2xxx_cm_fclks_active(void); extern int omap2xxx_cm_mpu_retention_allowed(void); extern u32 omap2xxx_cm_get_core_clk_src(void); extern u32 omap2xxx_cm_get_core_pll_config(void); -extern u32 omap2xxx_cm_get_pll_config(void); -extern u32 omap2xxx_cm_get_pll_status(void); extern void omap2xxx_cm_set_mod_dividers(u32 mpu, u32 dsp, u32 gfx, u32 core, u32 mdm); diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c index b9ad463a368a..cc5aac784278 100644 --- a/arch/arm/mach-omap2/cm33xx.c +++ b/arch/arm/mach-omap2/cm33xx.c @@ -72,27 +72,6 @@ static inline u32 am33xx_cm_rmw_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx) return v; } -static inline u32 am33xx_cm_set_reg_bits(u32 bits, s16 inst, s16 idx) -{ - return am33xx_cm_rmw_reg_bits(bits, bits, inst, idx); -} - -static inline u32 am33xx_cm_clear_reg_bits(u32 bits, s16 inst, s16 idx) -{ - return am33xx_cm_rmw_reg_bits(bits, 0x0, inst, idx); -} - -static inline u32 am33xx_cm_read_reg_bits(u16 inst, s16 idx, u32 mask) -{ - u32 v; - - v = am33xx_cm_read_reg(inst, idx); - v &= mask; - v >>= __ffs(mask); - - return v; -} - /** * _clkctrl_idlest - read a CM_*_CLKCTRL register; mask & shift IDLEST bitfield * @inst: CM instance register offset (*_INST macro) diff --git a/arch/arm/mach-omap2/dpll44xx.c b/arch/arm/mach-omap2/dpll44xx.c index 0e58e5a85d53..fc712240e5fd 100644 --- a/arch/arm/mach-omap2/dpll44xx.c +++ b/arch/arm/mach-omap2/dpll44xx.c @@ -36,26 +36,6 @@ /* Static rate multiplier for OMAP4 REGM4XEN clocks */ #define OMAP4430_REGM4XEN_MULT 4 -/* Supported only on OMAP4 */ -int omap4_dpllmx_gatectrl_read(struct clk_hw_omap *clk) -{ - u32 v; - u32 mask; - - if (!clk || !clk->clksel_reg) - return -EINVAL; - - mask = clk->flags & CLOCK_CLKOUTX2 ? - OMAP4430_DPLL_CLKOUTX2_GATE_CTRL_MASK : - OMAP4430_DPLL_CLKOUT_GATE_CTRL_MASK; - - v = omap2_clk_readl(clk, clk->clksel_reg); - v &= mask; - v >>= __ffs(mask); - - return v; -} - void omap4_dpllmx_allow_gatectrl(struct clk_hw_omap *clk) { u32 v; diff --git a/arch/arm/mach-omap2/omap-pm-noop.c b/arch/arm/mach-omap2/omap-pm-noop.c index 6a3be2bebddb..a1ee8066958e 100644 --- a/arch/arm/mach-omap2/omap-pm-noop.c +++ b/arch/arm/mach-omap2/omap-pm-noop.c @@ -86,200 +86,10 @@ int omap_pm_set_min_bus_tput(struct device *dev, u8 agent_id, unsigned long r) return 0; } -int omap_pm_set_max_dev_wakeup_lat(struct device *req_dev, struct device *dev, - long t) -{ - if (!req_dev || !dev || t < -1) { - WARN(1, "OMAP PM: %s: invalid parameter(s)", __func__); - return -EINVAL; - } - - if (t == -1) - pr_debug("OMAP PM: remove max device latency constraint: dev %s\n", - dev_name(dev)); - else - pr_debug("OMAP PM: add max device latency constraint: dev %s, t = %ld usec\n", - dev_name(dev), t); - - /* - * For current Linux, this needs to map the device to a - * powerdomain, then go through the list of current max lat - * constraints on that powerdomain and find the smallest. If - * the latency constraint has changed, the code should - * recompute the state to enter for the next powerdomain - * state. Conceivably, this code should also determine - * whether to actually disable the device clocks or not, - * depending on how long it takes to re-enable the clocks. - * - * TI CDP code can call constraint_set here. - */ - - return 0; -} - -int omap_pm_set_max_sdma_lat(struct device *dev, long t) -{ - if (!dev || t < -1) { - WARN(1, "OMAP PM: %s: invalid parameter(s)", __func__); - return -EINVAL; - } - - if (t == -1) - pr_debug("OMAP PM: remove max DMA latency constraint: dev %s\n", - dev_name(dev)); - else - pr_debug("OMAP PM: add max DMA latency constraint: dev %s, t = %ld usec\n", - dev_name(dev), t); - - /* - * For current Linux PM QOS params, this code should scan the - * list of maximum CPU and DMA latencies and select the - * smallest, then set cpu_dma_latency pm_qos_param - * accordingly. - * - * For future Linux PM QOS params, with separate CPU and DMA - * latency params, this code should just set the dma_latency param. - * - * TI CDP code can call constraint_set here. - */ - - return 0; -} - -int omap_pm_set_min_clk_rate(struct device *dev, struct clk *c, long r) -{ - if (!dev || !c || r < 0) { - WARN(1, "OMAP PM: %s: invalid parameter(s)", __func__); - return -EINVAL; - } - - if (r == 0) - pr_debug("OMAP PM: remove min clk rate constraint: dev %s\n", - dev_name(dev)); - else - pr_debug("OMAP PM: add min clk rate constraint: dev %s, rate = %ld Hz\n", - dev_name(dev), r); - - /* - * Code in a real implementation should keep track of these - * constraints on the clock, and determine the highest minimum - * clock rate. It should iterate over each OPP and determine - * whether the OPP will result in a clock rate that would - * satisfy this constraint (and any other PM constraint in effect - * at that time). Once it finds the lowest-voltage OPP that - * meets those conditions, it should switch to it, or return - * an error if the code is not capable of doing so. - */ - - return 0; -} - /* * DSP Bridge-specific constraints */ -const struct omap_opp *omap_pm_dsp_get_opp_table(void) -{ - pr_debug("OMAP PM: DSP request for OPP table\n"); - - /* - * Return DSP frequency table here: The final item in the - * array should have .rate = .opp_id = 0. - */ - - return NULL; -} - -void omap_pm_dsp_set_min_opp(u8 opp_id) -{ - if (opp_id == 0) { - WARN_ON(1); - return; - } - - pr_debug("OMAP PM: DSP requests minimum VDD1 OPP to be %d\n", opp_id); - - /* - * - * For l-o dev tree, our VDD1 clk is keyed on OPP ID, so we - * can just test to see which is higher, the CPU's desired OPP - * ID or the DSP's desired OPP ID, and use whichever is - * highest. - * - * In CDP12.14+, the VDD1 OPP custom clock that controls the DSP - * rate is keyed on MPU speed, not the OPP ID. So we need to - * map the OPP ID to the MPU speed for use with clk_set_rate() - * if it is higher than the current OPP clock rate. - * - */ -} - - -u8 omap_pm_dsp_get_opp(void) -{ - pr_debug("OMAP PM: DSP requests current DSP OPP ID\n"); - - /* - * For l-o dev tree, call clk_get_rate() on VDD1 OPP clock - * - * CDP12.14+: - * Call clk_get_rate() on the OPP custom clock, map that to an - * OPP ID using the tables defined in board-*.c/chip-*.c files. - */ - - return 0; -} - -/* - * CPUFreq-originated constraint - * - * In the future, this should be handled by custom OPP clocktype - * functions. - */ - -struct cpufreq_frequency_table **omap_pm_cpu_get_freq_table(void) -{ - pr_debug("OMAP PM: CPUFreq request for frequency table\n"); - - /* - * Return CPUFreq frequency table here: loop over - * all VDD1 clkrates, pull out the mpu_ck frequencies, build - * table - */ - - return NULL; -} - -void omap_pm_cpu_set_freq(unsigned long f) -{ - if (f == 0) { - WARN_ON(1); - return; - } - - pr_debug("OMAP PM: CPUFreq requests CPU frequency to be set to %lu\n", - f); - - /* - * For l-o dev tree, determine whether MPU freq or DSP OPP id - * freq is higher. Find the OPP ID corresponding to the - * higher frequency. Call clk_round_rate() and clk_set_rate() - * on the OPP custom clock. - * - * CDP should just be able to set the VDD1 OPP clock rate here. - */ -} - -unsigned long omap_pm_cpu_get_freq(void) -{ - pr_debug("OMAP PM: CPUFreq requests current CPU frequency\n"); - - /* - * Call clk_get_rate() on the mpu_ck. - */ - - return 0; -} /** * omap_pm_enable_off_mode - notify OMAP PM that off-mode is enabled @@ -363,9 +173,3 @@ int __init omap_pm_if_init(void) { return 0; } - -void omap_pm_if_exit(void) -{ - /* Deallocate CPUFreq frequency table here */ -} - diff --git a/arch/arm/mach-omap2/omap-pm.h b/arch/arm/mach-omap2/omap-pm.h index 1d777e63e05c..109bef5538eb 100644 --- a/arch/arm/mach-omap2/omap-pm.h +++ b/arch/arm/mach-omap2/omap-pm.h @@ -50,14 +50,6 @@ int __init omap_pm_if_early_init(void); */ int __init omap_pm_if_init(void); -/** - * omap_pm_if_exit - OMAP PM exit code - * - * Exit code; currently unused. The "_if_" is to avoid name - * collisions with the PM idle-loop code. - */ -void omap_pm_if_exit(void); - /* * Device-driver-originated constraints (via board-*.c files, platform_data) */ @@ -132,163 +124,6 @@ int omap_pm_set_max_mpu_wakeup_lat(struct device *dev, long t); int omap_pm_set_min_bus_tput(struct device *dev, u8 agent_id, unsigned long r); -/** - * omap_pm_set_max_dev_wakeup_lat - set the maximum device enable latency - * @req_dev: struct device * requesting the constraint, or NULL if none - * @dev: struct device * to set the constraint one - * @t: maximum device wakeup latency in microseconds - * - * Request that the maximum amount of time necessary for a device @dev - * to become accessible after its clocks are enabled should be no - * greater than @t microseconds. Specifically, this represents the - * time from when a device driver enables device clocks with - * clk_enable(), to when the register reads and writes on the device - * will succeed. This function should be called before clk_disable() - * is called, since the power state transition decision may be made - * during clk_disable(). - * - * It is intended that underlying PM code will use this information to - * determine what power state to put the powerdomain enclosing this - * device into. - * - * Multiple calls to omap_pm_set_max_dev_wakeup_lat() will replace the - * previous wakeup latency values for this device. To remove the - * wakeup latency restriction for this device, call with t = -1. - * - * Returns -EINVAL for an invalid argument, -ERANGE if the constraint - * is not satisfiable, or 0 upon success. - */ -int omap_pm_set_max_dev_wakeup_lat(struct device *req_dev, struct device *dev, - long t); - - -/** - * omap_pm_set_max_sdma_lat - set the maximum system DMA transfer start latency - * @dev: struct device * - * @t: maximum DMA transfer start latency in microseconds - * - * Request that the maximum system DMA transfer start latency for this - * device 'dev' should be no greater than 't' microseconds. "DMA - * transfer start latency" here is defined as the elapsed time from - * when a device (e.g., McBSP) requests that a system DMA transfer - * start or continue, to the time at which data starts to flow into - * that device from the system DMA controller. - * - * It is intended that underlying PM code will use this information to - * determine what power state to put the CORE powerdomain into. - * - * Since system DMA transfers may not involve the MPU, this function - * will not affect MPU wakeup latency. Use set_max_cpu_lat() to do - * so. Similarly, this function will not affect device wakeup latency - * -- use set_max_dev_wakeup_lat() to affect that. - * - * Multiple calls to set_max_sdma_lat() will replace the previous t - * value for this device. To remove the maximum DMA latency for this - * device, call with t = -1. - * - * Returns -EINVAL for an invalid argument, -ERANGE if the constraint - * is not satisfiable, or 0 upon success. - */ -int omap_pm_set_max_sdma_lat(struct device *dev, long t); - - -/** - * omap_pm_set_min_clk_rate - set minimum clock rate requested by @dev - * @dev: struct device * requesting the constraint - * @clk: struct clk * to set the minimum rate constraint on - * @r: minimum rate in Hz - * - * Request that the minimum clock rate on the device @dev's clk @clk - * be no less than @r Hz. - * - * It is expected that the OMAP PM code will use this information to - * find an OPP or clock setting that will satisfy this clock rate - * constraint, along with any other applicable system constraints on - * the clock rate or corresponding voltage, etc. - * - * omap_pm_set_min_clk_rate() differs from the clock code's - * clk_set_rate() in that it considers other constraints before taking - * any hardware action, and may change a system OPP rather than just a - * clock rate. clk_set_rate() is intended to be a low-level - * interface. - * - * omap_pm_set_min_clk_rate() is easily open to abuse. A better API - * would be something like "omap_pm_set_min_dev_performance()"; - * however, there is no easily-generalizable concept of performance - * that applies to all devices. Only a device (and possibly the - * device subsystem) has both the subsystem-specific knowledge, and - * the hardware IP block-specific knowledge, to translate a constraint - * on "touchscreen sampling accuracy" or "number of pixels or polygons - * rendered per second" to a clock rate. This translation can be - * dependent on the hardware IP block's revision, or firmware version, - * and the driver is the only code on the system that has this - * information and can know how to translate that into a clock rate. - * - * The intended use-case for this function is for userspace or other - * kernel code to communicate a particular performance requirement to - * a subsystem; then for the subsystem to communicate that requirement - * to something that is meaningful to the device driver; then for the - * device driver to convert that requirement to a clock rate, and to - * then call omap_pm_set_min_clk_rate(). - * - * Users of this function (such as device drivers) should not simply - * call this function with some high clock rate to ensure "high - * performance." Rather, the device driver should take a performance - * constraint from its subsystem, such as "render at least X polygons - * per second," and use some formula or table to convert that into a - * clock rate constraint given the hardware type and hardware - * revision. Device drivers or subsystems should not assume that they - * know how to make a power/performance tradeoff - some device use - * cases may tolerate a lower-fidelity device function for lower power - * consumption; others may demand a higher-fidelity device function, - * no matter what the power consumption. - * - * Multiple calls to omap_pm_set_min_clk_rate() will replace the - * previous rate value for the device @dev. To remove the minimum clock - * rate constraint for the device, call with r = 0. - * - * Returns -EINVAL for an invalid argument, -ERANGE if the constraint - * is not satisfiable, or 0 upon success. - */ -int omap_pm_set_min_clk_rate(struct device *dev, struct clk *c, long r); - -/* - * DSP Bridge-specific constraints - */ - -/** - * omap_pm_dsp_get_opp_table - get OPP->DSP clock frequency table - * - * Intended for use by DSPBridge. Returns an array of OPP->DSP clock - * frequency entries. The final item in the array should have .rate = - * .opp_id = 0. - */ -const struct omap_opp *omap_pm_dsp_get_opp_table(void); - -/** - * omap_pm_dsp_set_min_opp - receive desired OPP target ID from DSP Bridge - * @opp_id: target DSP OPP ID - * - * Set a minimum OPP ID for the DSP. This is intended to be called - * only from the DSP Bridge MPU-side driver. Unfortunately, the only - * information that code receives from the DSP/BIOS load estimator is the - * target OPP ID; hence, this interface. No return value. - */ -void omap_pm_dsp_set_min_opp(u8 opp_id); - -/** - * omap_pm_dsp_get_opp - report the current DSP OPP ID - * - * Report the current OPP for the DSP. Since on OMAP3, the DSP and - * MPU share a single voltage domain, the OPP ID returned back may - * represent a higher DSP speed than the OPP requested via - * omap_pm_dsp_set_min_opp(). - * - * Returns the current VDD1 OPP ID, or 0 upon error. - */ -u8 omap_pm_dsp_get_opp(void); - - /* * CPUFreq-originated constraint * @@ -296,33 +131,6 @@ u8 omap_pm_dsp_get_opp(void); * functions. */ -/** - * omap_pm_cpu_get_freq_table - return a cpufreq_frequency_table array ptr - * - * Provide a frequency table usable by CPUFreq for the current chip/board. - * Returns a pointer to a struct cpufreq_frequency_table array or NULL - * upon error. - */ -struct cpufreq_frequency_table **omap_pm_cpu_get_freq_table(void); - -/** - * omap_pm_cpu_set_freq - set the current minimum MPU frequency - * @f: MPU frequency in Hz - * - * Set the current minimum CPU frequency. The actual CPU frequency - * used could end up higher if the DSP requested a higher OPP. - * Intended to be called by plat-omap/cpu_omap.c:omap_target(). No - * return value. - */ -void omap_pm_cpu_set_freq(unsigned long f); - -/** - * omap_pm_cpu_get_freq - report the current CPU frequency - * - * Returns the current MPU frequency, or 0 upon error. - */ -unsigned long omap_pm_cpu_get_freq(void); - /* * Device context loss tracking diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 2af58570cb65..bb41dc2b580e 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -3384,91 +3384,6 @@ int omap_hwmod_shutdown(struct omap_hwmod *oh) return 0; } -/** - * omap_hwmod_enable_clocks - enable main_clk, all interface clocks - * @oh: struct omap_hwmod *oh - * - * Intended to be called by the omap_device code. - */ -int omap_hwmod_enable_clocks(struct omap_hwmod *oh) -{ - unsigned long flags; - - spin_lock_irqsave(&oh->_lock, flags); - _enable_clocks(oh); - spin_unlock_irqrestore(&oh->_lock, flags); - - return 0; -} - -/** - * omap_hwmod_disable_clocks - disable main_clk, all interface clocks - * @oh: struct omap_hwmod *oh - * - * Intended to be called by the omap_device code. - */ -int omap_hwmod_disable_clocks(struct omap_hwmod *oh) -{ - unsigned long flags; - - spin_lock_irqsave(&oh->_lock, flags); - _disable_clocks(oh); - spin_unlock_irqrestore(&oh->_lock, flags); - - return 0; -} - -/** - * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete - * @oh: struct omap_hwmod *oh - * - * Intended to be called by drivers and core code when all posted - * writes to a device must complete before continuing further - * execution (for example, after clearing some device IRQSTATUS - * register bits) - * - * XXX what about targets with multiple OCP threads? - */ -void omap_hwmod_ocp_barrier(struct omap_hwmod *oh) -{ - BUG_ON(!oh); - - if (!oh->class->sysc || !oh->class->sysc->sysc_flags) { - WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n", - oh->name); - return; - } - - /* - * Forces posted writes to complete on the OCP thread handling - * register writes - */ - omap_hwmod_read(oh, oh->class->sysc->sysc_offs); -} - -/** - * omap_hwmod_reset - reset the hwmod - * @oh: struct omap_hwmod * - * - * Under some conditions, a driver may wish to reset the entire device. - * Called from omap_device code. Returns -EINVAL on error or passes along - * the return value from _reset(). - */ -int omap_hwmod_reset(struct omap_hwmod *oh) -{ - int r; - unsigned long flags; - - if (!oh) - return -EINVAL; - - spin_lock_irqsave(&oh->_lock, flags); - r = _reset(oh); - spin_unlock_irqrestore(&oh->_lock, flags); - - return r; -} - /* * IP block data retrieval functions */ @@ -3729,52 +3644,12 @@ void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh) return oh->_mpu_rt_va; } -/** - * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh - * @oh: struct omap_hwmod * - * @init_oh: struct omap_hwmod * (initiator) - * - * Add a sleep dependency between the initiator @init_oh and @oh. - * Intended to be called by DSP/Bridge code via platform_data for the - * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge - * code needs to add/del initiator dependencies dynamically - * before/after accessing a device. Returns the return value from - * _add_initiator_dep(). - * - * XXX Keep a usecount in the clockdomain code - */ -int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh, - struct omap_hwmod *init_oh) -{ - return _add_initiator_dep(oh, init_oh); -} - /* * XXX what about functions for drivers to save/restore ocp_sysconfig * for context save/restore operations? */ /** - * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh - * @oh: struct omap_hwmod * - * @init_oh: struct omap_hwmod * (initiator) - * - * Remove a sleep dependency between the initiator @init_oh and @oh. - * Intended to be called by DSP/Bridge code via platform_data for the - * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge - * code needs to add/del initiator dependencies dynamically - * before/after accessing a device. Returns the return value from - * _del_initiator_dep(). - * - * XXX Keep a usecount in the clockdomain code - */ -int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh, - struct omap_hwmod *init_oh) -{ - return _del_initiator_dep(oh, init_oh); -} - -/** * omap_hwmod_enable_wakeup - allow device to wake up the system * @oh: struct omap_hwmod * * @@ -3895,33 +3770,6 @@ int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name) } /** - * omap_hwmod_read_hardreset - read the HW reset line state of submodules - * contained in the hwmod module - * @oh: struct omap_hwmod * - * @name: name of the reset line to look up and read - * - * Return the current state of the hwmod @oh's reset line named @name: - * returns -EINVAL upon parameter error or if this operation - * is unsupported on the current OMAP; otherwise, passes along the return - * value from _read_hardreset(). - */ -int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name) -{ - int ret; - unsigned long flags; - - if (!oh) - return -EINVAL; - - spin_lock_irqsave(&oh->_lock, flags); - ret = _read_hardreset(oh, name); - spin_unlock_irqrestore(&oh->_lock, flags); - - return ret; -} - - -/** * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname * @classname: struct omap_hwmod_class name to search for * @fn: callback function pointer to call for each hwmod in class @classname @@ -4031,86 +3879,6 @@ int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh) } /** - * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup - * @oh: struct omap_hwmod * - * - * Prevent the hwmod @oh from being reset during the setup process. - * Intended for use by board-*.c files on boards with devices that - * cannot tolerate being reset. Must be called before the hwmod has - * been set up. Returns 0 upon success or negative error code upon - * failure. - */ -int omap_hwmod_no_setup_reset(struct omap_hwmod *oh) -{ - if (!oh) - return -EINVAL; - - if (oh->_state != _HWMOD_STATE_REGISTERED) { - pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n", - oh->name); - return -EINVAL; - } - - oh->flags |= HWMOD_INIT_NO_RESET; - - return 0; -} - -/** - * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ - * @oh: struct omap_hwmod * containing hwmod mux entries - * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup - * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup - * - * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux - * entry number @pad_idx for the hwmod @oh, trigger the interrupt - * service routine for the hwmod's mpu_irqs array index @irq_idx. If - * this function is not called for a given pad_idx, then the ISR - * associated with @oh's first MPU IRQ will be triggered when an I/O - * pad wakeup occurs on that pad. Note that @pad_idx is the index of - * the _dynamic or wakeup_ entry: if there are other entries not - * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these - * entries are NOT COUNTED in the dynamic pad index. This function - * must be called separately for each pad that requires its interrupt - * to be re-routed this way. Returns -EINVAL if there is an argument - * problem or if @oh does not have hwmod mux entries or MPU IRQs; - * returns -ENOMEM if memory cannot be allocated; or 0 upon success. - * - * XXX This function interface is fragile. Rather than using array - * indexes, which are subject to unpredictable change, it should be - * using hwmod IRQ names, and some other stable key for the hwmod mux - * pad records. - */ -int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx) -{ - int nr_irqs; - - might_sleep(); - - if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 || - pad_idx >= oh->mux->nr_pads_dynamic) - return -EINVAL; - - /* Check the number of available mpu_irqs */ - for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++) - ; - - if (irq_idx >= nr_irqs) - return -EINVAL; - - if (!oh->mux->irqs) { - /* XXX What frees this? */ - oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic, - GFP_KERNEL); - if (!oh->mux->irqs) - return -ENOMEM; - } - oh->mux->irqs[pad_idx] = irq_idx; - - return 0; -} - -/** * omap_hwmod_init - initialize the hwmod code * * Sets up some function pointers needed by the hwmod code to operate on the diff --git a/arch/arm/mach-omap2/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h index 5b42fafcaf55..fcfdd85aad62 100644 --- a/arch/arm/mach-omap2/omap_hwmod.h +++ b/arch/arm/mach-omap2/omap_hwmod.h @@ -703,13 +703,6 @@ int omap_hwmod_shutdown(struct omap_hwmod *oh); int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name); int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name); -int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name); - -int omap_hwmod_enable_clocks(struct omap_hwmod *oh); -int omap_hwmod_disable_clocks(struct omap_hwmod *oh); - -int omap_hwmod_reset(struct omap_hwmod *oh); -void omap_hwmod_ocp_barrier(struct omap_hwmod *oh); void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs); u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs); @@ -724,11 +717,6 @@ int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type, struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh); void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh); -int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh, - struct omap_hwmod *init_oh); -int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh, - struct omap_hwmod *init_oh); - int omap_hwmod_enable_wakeup(struct omap_hwmod *oh); int omap_hwmod_disable_wakeup(struct omap_hwmod *oh); @@ -740,10 +728,6 @@ int omap_hwmod_for_each_by_class(const char *classname, int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state); int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh); -int omap_hwmod_no_setup_reset(struct omap_hwmod *oh); - -int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx); - extern void __init omap_hwmod_init(void); const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh); diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 11468eea3871..4e8e93c398db 100644 --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -29,8 +29,6 @@ #include <linux/platform_data/mailbox-omap.h> #include <plat/dmtimer.h> -#include "am35xx.h" - #include "soc.h" #include "omap_hwmod.h" #include "omap_hwmod_common_data.h" @@ -50,6 +48,8 @@ * elsewhere. */ +#define AM35XX_IPSS_USBOTGSS_BASE 0x5C040000 + /* * IP blocks */ @@ -3459,15 +3459,6 @@ static struct omap_hwmod_ocp_if am35xx_mdio__l3 = { .user = OCP_USER_MPU, }; -static struct omap_hwmod_addr_space am35xx_mdio_addrs[] = { - { - .pa_start = AM35XX_IPSS_MDIO_BASE, - .pa_end = AM35XX_IPSS_MDIO_BASE + SZ_4K - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; - /* l4_core -> davinci mdio */ /* * XXX Should be connected to an IPSS hwmod, not the L4_CORE directly; @@ -3478,25 +3469,15 @@ static struct omap_hwmod_ocp_if am35xx_l4_core__mdio = { .master = &omap3xxx_l4_core_hwmod, .slave = &am35xx_mdio_hwmod, .clk = "emac_fck", - .addr = am35xx_mdio_addrs, .user = OCP_USER_MPU, }; -static struct omap_hwmod_irq_info am35xx_emac_mpu_irqs[] = { - { .name = "rxthresh", .irq = 67 + OMAP_INTC_START, }, - { .name = "rx_pulse", .irq = 68 + OMAP_INTC_START, }, - { .name = "tx_pulse", .irq = 69 + OMAP_INTC_START }, - { .name = "misc_pulse", .irq = 70 + OMAP_INTC_START }, - { .irq = -1 }, -}; - static struct omap_hwmod_class am35xx_emac_class = { .name = "davinci_emac", }; static struct omap_hwmod am35xx_emac_hwmod = { .name = "davinci_emac", - .mpu_irqs = am35xx_emac_mpu_irqs, .class = &am35xx_emac_class, /* * According to Mark Greer, the MPU will not return from WFI @@ -3519,15 +3500,6 @@ static struct omap_hwmod_ocp_if am35xx_emac__l3 = { .user = OCP_USER_MPU, }; -static struct omap_hwmod_addr_space am35xx_emac_addrs[] = { - { - .pa_start = AM35XX_IPSS_EMAC_BASE, - .pa_end = AM35XX_IPSS_EMAC_BASE + 0x30000 - 1, - .flags = ADDR_TYPE_RT, - }, - { } -}; - /* l4_core -> davinci emac */ /* * XXX Should be connected to an IPSS hwmod, not the L4_CORE directly; @@ -3538,7 +3510,6 @@ static struct omap_hwmod_ocp_if am35xx_l4_core__emac = { .master = &omap3xxx_l4_core_hwmod, .slave = &am35xx_emac_hwmod, .clk = "emac_ick", - .addr = am35xx_emac_addrs, .user = OCP_USER_MPU, }; diff --git a/arch/arm/mach-omap2/omap_phy_internal.c b/arch/arm/mach-omap2/omap_phy_internal.c index 1a19fa096bab..8e903564ede2 100644 --- a/arch/arm/mach-omap2/omap_phy_internal.c +++ b/arch/arm/mach-omap2/omap_phy_internal.c @@ -152,38 +152,3 @@ void am35x_set_mode(u8 musb_mode) omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2); } - -void ti81xx_musb_phy_power(u8 on) -{ - void __iomem *scm_base = NULL; - u32 usbphycfg; - - scm_base = ioremap(TI81XX_SCM_BASE, SZ_2K); - if (!scm_base) { - pr_err("system control module ioremap failed\n"); - return; - } - - usbphycfg = readl_relaxed(scm_base + USBCTRL0); - - if (on) { - if (cpu_is_ti816x()) { - usbphycfg |= TI816X_USBPHY0_NORMAL_MODE; - usbphycfg &= ~TI816X_USBPHY_REFCLK_OSC; - } else if (cpu_is_ti814x()) { - usbphycfg &= ~(USBPHY_CM_PWRDN | USBPHY_OTG_PWRDN - | USBPHY_DPINPUT | USBPHY_DMINPUT); - usbphycfg |= (USBPHY_OTGVDET_EN | USBPHY_OTGSESSEND_EN - | USBPHY_DPOPBUFCTL | USBPHY_DMOPBUFCTL); - } - } else { - if (cpu_is_ti816x()) - usbphycfg &= ~TI816X_USBPHY0_NORMAL_MODE; - else if (cpu_is_ti814x()) - usbphycfg |= USBPHY_CM_PWRDN | USBPHY_OTG_PWRDN; - - } - writel_relaxed(usbphycfg, scm_base + USBCTRL0); - - iounmap(scm_base); -} diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c index 3d7eee1d3cfa..190fa43e7479 100644 --- a/arch/arm/mach-omap2/pdata-quirks.c +++ b/arch/arm/mach-omap2/pdata-quirks.c @@ -19,7 +19,6 @@ #include <linux/platform_data/pinctrl-single.h> #include <linux/platform_data/iommu-omap.h> -#include "am35xx.h" #include "common.h" #include "common-board-devices.h" #include "dss-common.h" diff --git a/arch/arm/mach-omap2/pmu.c b/arch/arm/mach-omap2/pmu.c index 33c8846b4193..a69e9a33cb6d 100644 --- a/arch/arm/mach-omap2/pmu.c +++ b/arch/arm/mach-omap2/pmu.c @@ -13,7 +13,7 @@ */ #include <linux/of.h> -#include <asm/pmu.h> +#include <asm/system_info.h> #include "soc.h" #include "omap_hwmod.h" @@ -37,7 +37,8 @@ static int __init omap2_init_pmu(unsigned oh_num, char *oh_names[]) { int i; struct omap_hwmod *oh[3]; - char *dev_name = "arm-pmu"; + char *dev_name = cpu_architecture() == CPU_ARCH_ARMv6 ? + "armv6-pmu" : "armv7-pmu"; if ((!oh_num) || (oh_num > 3)) return -EINVAL; diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c index 7fb033eca0a5..78af6d8cf2e2 100644 --- a/arch/arm/mach-omap2/powerdomain.c +++ b/arch/arm/mach-omap2/powerdomain.c @@ -115,7 +115,6 @@ static int _pwrdm_register(struct powerdomain *pwrdm) } pwrdm->voltdm.ptr = voltdm; INIT_LIST_HEAD(&pwrdm->voltdm_node); - voltdm_add_pwrdm(voltdm, pwrdm); skip_voltdm: spin_lock_init(&pwrdm->_lock); @@ -484,87 +483,6 @@ pac_exit: } /** - * pwrdm_del_clkdm - remove a clockdomain from a powerdomain - * @pwrdm: struct powerdomain * to add the clockdomain to - * @clkdm: struct clockdomain * to associate with a powerdomain - * - * Dissociate the clockdomain @clkdm from the powerdomain - * @pwrdm. Returns -EINVAL if presented with invalid pointers; -ENOENT - * if @clkdm was not associated with the powerdomain, or 0 upon - * success. - */ -int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm) -{ - int ret = -EINVAL; - int i; - - if (!pwrdm || !clkdm) - return -EINVAL; - - pr_debug("powerdomain: %s: dissociating clockdomain %s\n", - pwrdm->name, clkdm->name); - - for (i = 0; i < PWRDM_MAX_CLKDMS; i++) - if (pwrdm->pwrdm_clkdms[i] == clkdm) - break; - - if (i == PWRDM_MAX_CLKDMS) { - pr_debug("powerdomain: %s: clkdm %s not associated?!\n", - pwrdm->name, clkdm->name); - ret = -ENOENT; - goto pdc_exit; - } - - pwrdm->pwrdm_clkdms[i] = NULL; - - ret = 0; - -pdc_exit: - return ret; -} - -/** - * pwrdm_for_each_clkdm - call function on each clkdm in a pwrdm - * @pwrdm: struct powerdomain * to iterate over - * @fn: callback function * - * - * Call the supplied function @fn for each clockdomain in the powerdomain - * @pwrdm. The callback function can return anything but 0 to bail - * out early from the iterator. Returns -EINVAL if presented with - * invalid pointers; or passes along the last return value of the - * callback function, which should be 0 for success or anything else - * to indicate failure. - */ -int pwrdm_for_each_clkdm(struct powerdomain *pwrdm, - int (*fn)(struct powerdomain *pwrdm, - struct clockdomain *clkdm)) -{ - int ret = 0; - int i; - - if (!fn) - return -EINVAL; - - for (i = 0; i < PWRDM_MAX_CLKDMS && !ret; i++) - if (pwrdm->pwrdm_clkdms[i]) - ret = (*fn)(pwrdm, pwrdm->pwrdm_clkdms[i]); - - return ret; -} - -/** - * pwrdm_get_voltdm - return a ptr to the voltdm that this pwrdm resides in - * @pwrdm: struct powerdomain * - * - * Return a pointer to the struct voltageomain that the specified powerdomain - * @pwrdm exists in. - */ -struct voltagedomain *pwrdm_get_voltdm(struct powerdomain *pwrdm) -{ - return pwrdm->voltdm.ptr; -} - -/** * pwrdm_get_mem_bank_count - get number of memory banks in this powerdomain * @pwrdm: struct powerdomain * * diff --git a/arch/arm/mach-omap2/powerdomain.h b/arch/arm/mach-omap2/powerdomain.h index 11bd4dd7d8d6..28a796ce07d7 100644 --- a/arch/arm/mach-omap2/powerdomain.h +++ b/arch/arm/mach-omap2/powerdomain.h @@ -212,11 +212,6 @@ int pwrdm_for_each_nolock(int (*fn)(struct powerdomain *pwrdm, void *user), void *user); int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm); -int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm); -int pwrdm_for_each_clkdm(struct powerdomain *pwrdm, - int (*fn)(struct powerdomain *pwrdm, - struct clockdomain *clkdm)); -struct voltagedomain *pwrdm_get_voltdm(struct powerdomain *pwrdm); int pwrdm_get_mem_bank_count(struct powerdomain *pwrdm); diff --git a/arch/arm/mach-omap2/prm3xxx.h b/arch/arm/mach-omap2/prm3xxx.h index cfde3f4a03cc..ed8a3d8b739a 100644 --- a/arch/arm/mach-omap2/prm3xxx.h +++ b/arch/arm/mach-omap2/prm3xxx.h @@ -145,7 +145,6 @@ extern void omap3_prm_vcvp_write(u32 val, u8 offset); extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset); extern int __init omap3xxx_prm_init(void); -extern u32 omap3xxx_prm_get_reset_sources(void); int omap3xxx_prm_clear_mod_irqs(s16 module, u8 regs, u32 ignore_bits); void omap3xxx_prm_iva_idle(void); void omap3_prm_reset_modem(void); diff --git a/arch/arm/mach-omap2/prm44xx_54xx.h b/arch/arm/mach-omap2/prm44xx_54xx.h index f7512515fde5..714329565b90 100644 --- a/arch/arm/mach-omap2/prm44xx_54xx.h +++ b/arch/arm/mach-omap2/prm44xx_54xx.h @@ -39,7 +39,6 @@ extern void omap4_prm_vcvp_write(u32 val, u8 offset); extern u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset); extern int __init omap44xx_prm_init(void); -extern u32 omap44xx_prm_get_reset_sources(void); #endif diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c index bc897231bd10..e4562b2b973b 100644 --- a/arch/arm/mach-omap2/usb-musb.c +++ b/arch/arm/mach-omap2/usb-musb.c @@ -82,16 +82,8 @@ void __init usb_musb_init(struct omap_musb_board_data *musb_board_data) musb_plat.mode = board_data->mode; musb_plat.extvbus = board_data->extvbus; - if (soc_is_am35xx()) { - oh_name = "am35x_otg_hs"; - name = "musb-am35x"; - } else if (cpu_is_ti81xx()) { - oh_name = "usb_otg_hs"; - name = "musb-ti81xx"; - } else { - oh_name = "usb_otg_hs"; - name = "musb-omap2430"; - } + oh_name = "usb_otg_hs"; + name = "musb-omap2430"; oh = omap_hwmod_lookup(oh_name); if (WARN(!oh, "%s: could not find omap_hwmod for %s\n", diff --git a/arch/arm/mach-omap2/usb.h b/arch/arm/mach-omap2/usb.h index 4ba2ae759895..3395365ef1db 100644 --- a/arch/arm/mach-omap2/usb.h +++ b/arch/arm/mach-omap2/usb.h @@ -68,5 +68,3 @@ extern void am35x_musb_reset(void); extern void am35x_musb_phy_power(u8 on); extern void am35x_musb_clear_irq(void); extern void am35x_set_mode(u8 musb_mode); -extern void ti81xx_musb_phy_power(u8 on); - diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c index 3783b8625f0f..cba8cada8c81 100644 --- a/arch/arm/mach-omap2/voltage.c +++ b/arch/arm/mach-omap2/voltage.c @@ -224,37 +224,6 @@ int omap_voltage_register_pmic(struct voltagedomain *voltdm, } /** - * omap_change_voltscale_method() - API to change the voltage scaling method. - * @voltdm: pointer to the VDD whose voltage scaling method - * has to be changed. - * @voltscale_method: the method to be used for voltage scaling. - * - * This API can be used by the board files to change the method of voltage - * scaling between vpforceupdate and vcbypass. The parameter values are - * defined in voltage.h - */ -void omap_change_voltscale_method(struct voltagedomain *voltdm, - int voltscale_method) -{ - if (!voltdm || IS_ERR(voltdm)) { - pr_warn("%s: VDD specified does not exist!\n", __func__); - return; - } - - switch (voltscale_method) { - case VOLTSCALE_VPFORCEUPDATE: - voltdm->scale = omap_vp_forceupdate_scale; - return; - case VOLTSCALE_VCBYPASS: - voltdm->scale = omap_vc_bypass_scale; - return; - default: - pr_warn("%s: Trying to change the method of voltage scaling to an unsupported one!\n", - __func__); - } -} - -/** * omap_voltage_late_init() - Init the various voltage parameters * * This API is to be called in the later stages of the @@ -316,90 +285,11 @@ static struct voltagedomain *_voltdm_lookup(const char *name) return voltdm; } -/** - * voltdm_add_pwrdm - add a powerdomain to a voltagedomain - * @voltdm: struct voltagedomain * to add the powerdomain to - * @pwrdm: struct powerdomain * to associate with a voltagedomain - * - * Associate the powerdomain @pwrdm with a voltagedomain @voltdm. This - * enables the use of voltdm_for_each_pwrdm(). Returns -EINVAL if - * presented with invalid pointers; -ENOMEM if memory could not be allocated; - * or 0 upon success. - */ -int voltdm_add_pwrdm(struct voltagedomain *voltdm, struct powerdomain *pwrdm) -{ - if (!voltdm || !pwrdm) - return -EINVAL; - - pr_debug("voltagedomain: %s: associating powerdomain %s\n", - voltdm->name, pwrdm->name); - - list_add(&pwrdm->voltdm_node, &voltdm->pwrdm_list); - - return 0; -} - -/** - * voltdm_for_each_pwrdm - call function for each pwrdm in a voltdm - * @voltdm: struct voltagedomain * to iterate over - * @fn: callback function * - * - * Call the supplied function @fn for each powerdomain in the - * voltagedomain @voltdm. Returns -EINVAL if presented with invalid - * pointers; or passes along the last return value of the callback - * function, which should be 0 for success or anything else to - * indicate failure. - */ -int voltdm_for_each_pwrdm(struct voltagedomain *voltdm, - int (*fn)(struct voltagedomain *voltdm, - struct powerdomain *pwrdm)) -{ - struct powerdomain *pwrdm; - int ret = 0; - - if (!fn) - return -EINVAL; - - list_for_each_entry(pwrdm, &voltdm->pwrdm_list, voltdm_node) - ret = (*fn)(voltdm, pwrdm); - - return ret; -} - -/** - * voltdm_for_each - call function on each registered voltagedomain - * @fn: callback function * - * - * Call the supplied function @fn for each registered voltagedomain. - * The callback function @fn can return anything but 0 to bail out - * early from the iterator. Returns the last return value of the - * callback function, which should be 0 for success or anything else - * to indicate failure; or -EINVAL if the function pointer is null. - */ -int voltdm_for_each(int (*fn)(struct voltagedomain *voltdm, void *user), - void *user) -{ - struct voltagedomain *temp_voltdm; - int ret = 0; - - if (!fn) - return -EINVAL; - - list_for_each_entry(temp_voltdm, &voltdm_list, node) { - ret = (*fn)(temp_voltdm, user); - if (ret) - break; - } - - return ret; -} - static int _voltdm_register(struct voltagedomain *voltdm) { if (!voltdm || !voltdm->name) return -EINVAL; - INIT_LIST_HEAD(&voltdm->pwrdm_list); list_add(&voltdm->node, &voltdm_list); pr_debug("voltagedomain: registered %s\n", voltdm->name); diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h index f7f2879b31b0..e64550321510 100644 --- a/arch/arm/mach-omap2/voltage.h +++ b/arch/arm/mach-omap2/voltage.h @@ -23,10 +23,6 @@ struct powerdomain; -/* XXX document */ -#define VOLTSCALE_VPFORCEUPDATE 1 -#define VOLTSCALE_VCBYPASS 2 - /* * OMAP3 GENERIC setup times. Revisit to see if these needs to be * passed from board or PMIC file @@ -55,7 +51,6 @@ struct omap_vfsm_instance { * @name: Name of the voltage domain which can be used as a unique identifier. * @scalable: Whether or not this voltage domain is scalable * @node: list_head linking all voltage domains - * @pwrdm_list: list_head linking all powerdomains in this voltagedomain * @vc: pointer to VC channel associated with this voltagedomain * @vp: pointer to VP associated with this voltagedomain * @read: read a VC/VP register @@ -71,7 +66,6 @@ struct voltagedomain { char *name; bool scalable; struct list_head node; - struct list_head pwrdm_list; struct omap_vc_channel *vc; const struct omap_vfsm_instance *vfsm; struct omap_vp_instance *vp; @@ -163,8 +157,6 @@ struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, unsigned long volt); int omap_voltage_register_pmic(struct voltagedomain *voltdm, struct omap_voltdm_pmic *pmic); -void omap_change_voltscale_method(struct voltagedomain *voltdm, - int voltscale_method); int omap_voltage_late_init(void); extern void omap2xxx_voltagedomains_init(void); @@ -175,11 +167,6 @@ extern void omap54xx_voltagedomains_init(void); struct voltagedomain *voltdm_lookup(const char *name); void voltdm_init(struct voltagedomain **voltdm_list); int voltdm_add_pwrdm(struct voltagedomain *voltdm, struct powerdomain *pwrdm); -int voltdm_for_each(int (*fn)(struct voltagedomain *voltdm, void *user), - void *user); -int voltdm_for_each_pwrdm(struct voltagedomain *voltdm, - int (*fn)(struct voltagedomain *voltdm, - struct powerdomain *pwrdm)); int voltdm_scale(struct voltagedomain *voltdm, unsigned long target_volt); void voltdm_reset(struct voltagedomain *voltdm); unsigned long voltdm_get_voltage(struct voltagedomain *voltdm); diff --git a/arch/arm/mach-prima2/common.h b/arch/arm/mach-prima2/common.h index 07d3e5ed9264..3916a6665100 100644 --- a/arch/arm/mach-prima2/common.h +++ b/arch/arm/mach-prima2/common.h @@ -15,9 +15,6 @@ #include <asm/mach/time.h> #include <asm/exception.h> -#define SIRFSOC_VA_BASE _AC(0xFEC00000, UL) -#define SIRFSOC_VA(x) (SIRFSOC_VA_BASE + ((x) & 0x00FFF000)) - extern struct smp_operations sirfsoc_smp_ops; extern void sirfsoc_secondary_startup(void); extern void sirfsoc_cpu_die(unsigned int cpu); @@ -25,18 +22,6 @@ extern void sirfsoc_cpu_die(unsigned int cpu); extern void __init sirfsoc_of_irq_init(void); extern asmlinkage void __exception_irq_entry sirfsoc_handle_irq(struct pt_regs *regs); -#ifndef CONFIG_DEBUG_LL -static inline void sirfsoc_map_lluart(void) {} -#else -extern void __init sirfsoc_map_lluart(void); -#endif - -#ifndef CONFIG_SMP -static inline void sirfsoc_map_scu(void) {} -#else -extern void sirfsoc_map_scu(void); -#endif - #ifdef CONFIG_SUSPEND extern int sirfsoc_pm_init(void); #else diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c index ac7b3eabbd85..35434662dc7c 100644 --- a/arch/arm/mach-pxa/devices.c +++ b/arch/arm/mach-pxa/devices.c @@ -40,7 +40,7 @@ static struct resource pxa_resource_pmu = { }; struct platform_device pxa_device_pmu = { - .name = "arm-pmu", + .name = "xscale-pmu", .id = -1, .resource = &pxa_resource_pmu, .num_resources = 1, diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c index 739d4f113097..64c88d657f9e 100644 --- a/arch/arm/mach-realview/realview_eb.c +++ b/arch/arm/mach-realview/realview_eb.c @@ -37,6 +37,7 @@ #include <asm/pgtable.h> #include <asm/hardware/cache-l2x0.h> #include <asm/smp_twd.h> +#include <asm/system_info.h> #include <asm/mach/arch.h> #include <asm/mach/map.h> @@ -296,7 +297,6 @@ static struct resource pmu_resources[] = { }; static struct platform_device pmu_device = { - .name = "arm-pmu", .id = -1, .num_resources = ARRAY_SIZE(pmu_resources), .resource = pmu_resources, @@ -451,6 +451,7 @@ static void __init realview_eb_init(void) */ l2x0_init(__io_address(REALVIEW_EB11MP_L220_BASE), 0x00790000, 0xfe000fff); #endif + pmu_device.name = core_tile_a9mp() ? "armv7-pmu" : "armv6-pmu"; platform_device_register(&pmu_device); } diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c index b0e0dcaed944..ce92c1823494 100644 --- a/arch/arm/mach-realview/realview_pb1176.c +++ b/arch/arm/mach-realview/realview_pb1176.c @@ -280,7 +280,7 @@ static struct resource pmu_resource = { }; static struct platform_device pmu_device = { - .name = "arm-pmu", + .name = "armv6-pmu", .id = -1, .num_resources = 1, .resource = &pmu_resource, diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c index 47bf55fdbf27..15c45e25095f 100644 --- a/arch/arm/mach-realview/realview_pb11mp.c +++ b/arch/arm/mach-realview/realview_pb11mp.c @@ -262,7 +262,7 @@ static struct resource pmu_resources[] = { }; static struct platform_device pmu_device = { - .name = "arm-pmu", + .name = "armv6-pmu", .id = -1, .num_resources = ARRAY_SIZE(pmu_resources), .resource = pmu_resources, diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c index 4e57a8599265..4c64662f5437 100644 --- a/arch/arm/mach-realview/realview_pba8.c +++ b/arch/arm/mach-realview/realview_pba8.c @@ -240,7 +240,7 @@ static struct resource pmu_resource = { }; static struct platform_device pmu_device = { - .name = "arm-pmu", + .name = "armv7-pmu", .id = -1, .num_resources = 1, .resource = &pmu_resource, diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c index d89eb4023467..9a22b864219f 100644 --- a/arch/arm/mach-realview/realview_pbx.c +++ b/arch/arm/mach-realview/realview_pbx.c @@ -280,7 +280,7 @@ static struct resource pmu_resources[] = { }; static struct platform_device pmu_device = { - .name = "arm-pmu", + .name = "armv7-pmu", .id = -1, .num_resources = ARRAY_SIZE(pmu_resources), .resource = pmu_resources, diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig index 9eb22297cbe1..79c49ff77f6e 100644 --- a/arch/arm/mach-s3c24xx/Kconfig +++ b/arch/arm/mach-s3c24xx/Kconfig @@ -29,7 +29,6 @@ config CPU_S3C2410 default y select CPU_ARM920T select S3C2410_COMMON_CLK - select S3C2410_DMA if S3C24XX_DMA select ARM_S3C2410_CPUFREQ if ARM_S3C24XX_CPUFREQ select S3C2410_PM if PM help @@ -40,7 +39,6 @@ config CPU_S3C2412 bool "SAMSUNG S3C2412" select CPU_ARM926T select S3C2412_COMMON_CLK - select S3C2412_DMA if S3C24XX_DMA select S3C2412_PM if PM help Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line @@ -50,7 +48,6 @@ config CPU_S3C2416 select CPU_ARM926T select S3C2416_PM if PM select S3C2443_COMMON_CLK - select S3C2443_DMA if S3C24XX_DMA help Support for the S3C2416 SoC from the S3C24XX line @@ -59,7 +56,6 @@ config CPU_S3C2440 select CPU_ARM920T select S3C2410_COMMON_CLK select S3C2410_PM if PM - select S3C2440_DMA if S3C24XX_DMA help Support for S3C2440 Samsung Mobile CPU based systems. @@ -67,7 +63,6 @@ config CPU_S3C2442 bool "SAMSUNG S3C2442" select CPU_ARM920T select S3C2410_COMMON_CLK - select S3C2410_DMA if S3C24XX_DMA select S3C2410_PM if PM help Support for S3C2442 Samsung Mobile CPU based systems. @@ -80,7 +75,6 @@ config CPU_S3C2443 bool "SAMSUNG S3C2443" select CPU_ARM920T select S3C2443_COMMON_CLK - select S3C2443_DMA if S3C24XX_DMA help Support for the S3C2443 SoC from the S3C24XX line @@ -114,27 +108,6 @@ config S3C24XX_SETUP_TS help Compile in platform device definition for Samsung TouchScreen. -config S3C24XX_DMA - bool "S3C2410 DMA support (deprecated)" - select S3C_DMA - help - S3C2410 DMA support. This is needed for drivers like sound which - use the S3C2410's DMA system to move data to and from the - peripheral blocks. - -config S3C2410_DMA_DEBUG - bool "S3C2410 DMA support debug" - depends on S3C2410_DMA - help - Enable debugging output for the DMA code. This option sends info - to the kernel log, at priority KERN_DEBUG. - -config S3C2410_DMA - bool - depends on S3C24XX_DMA && (CPU_S3C2410 || CPU_S3C2442) - help - DMA device selection for S3C2410 and compatible CPUs - config S3C2410_PM bool help @@ -325,11 +298,6 @@ config CPU_S3C2412_ONLY !CPU_S3C2442 && !CPU_S3C2443 default y -config S3C2412_DMA - bool - help - Internal config node for S3C2412 DMA support - config S3C2412_PM bool select S3C2412_PM_SLEEP @@ -438,11 +406,6 @@ endif # CPU_S3C2416 if CPU_S3C2440 -config S3C2440_DMA - bool - help - Support for S3C2440 specific DMA code5A - config S3C2440_XTAL_12000000 bool help @@ -601,11 +564,6 @@ endif # CPU_S3C2442 if CPU_S3C2443 || CPU_S3C2416 -config S3C2443_DMA - bool - help - Internal config node for S3C2443 DMA support - config S3C2443_SETUP_SPI bool help diff --git a/arch/arm/mach-s3c24xx/Makefile b/arch/arm/mach-s3c24xx/Makefile index b92071638733..b40a22fe082a 100644 --- a/arch/arm/mach-s3c24xx/Makefile +++ b/arch/arm/mach-s3c24xx/Makefile @@ -12,12 +12,10 @@ obj-y += common.o obj-$(CONFIG_CPU_S3C2410) += s3c2410.o -obj-$(CONFIG_S3C2410_DMA) += dma-s3c2410.o obj-$(CONFIG_S3C2410_PLL) += pll-s3c2410.o obj-$(CONFIG_S3C2410_PM) += pm-s3c2410.o sleep-s3c2410.o obj-$(CONFIG_CPU_S3C2412) += s3c2412.o -obj-$(CONFIG_S3C2412_DMA) += dma-s3c2412.o obj-$(CONFIG_S3C2412_PM) += pm-s3c2412.o obj-$(CONFIG_S3C2412_PM_SLEEP) += sleep-s3c2412.o @@ -27,7 +25,6 @@ obj-$(CONFIG_S3C2416_PM) += pm-s3c2416.o obj-$(CONFIG_CPU_S3C2440) += s3c2440.o obj-$(CONFIG_CPU_S3C2442) += s3c2442.o obj-$(CONFIG_CPU_S3C244X) += s3c244x.o -obj-$(CONFIG_S3C2440_DMA) += dma-s3c2440.o obj-$(CONFIG_S3C2440_PLL_12000000) += pll-s3c2440-12000000.o obj-$(CONFIG_S3C2440_PLL_16934400) += pll-s3c2440-16934400.o @@ -39,15 +36,11 @@ obj-$(CONFIG_PM) += pm.o irq-pm.o sleep.o # common code -obj-$(CONFIG_S3C24XX_DMA) += dma.o - obj-$(CONFIG_S3C2410_CPUFREQ_UTILS) += cpufreq-utils.o obj-$(CONFIG_S3C2410_IOTIMING) += iotiming-s3c2410.o obj-$(CONFIG_S3C2412_IOTIMING) += iotiming-s3c2412.o -obj-$(CONFIG_S3C2443_DMA) += dma-s3c2443.o - # # machine support # following is ordered alphabetically by option text. diff --git a/arch/arm/mach-s3c24xx/dma-s3c2410.c b/arch/arm/mach-s3c24xx/dma-s3c2410.c deleted file mode 100644 index 09aa12da1789..000000000000 --- a/arch/arm/mach-s3c24xx/dma-s3c2410.c +++ /dev/null @@ -1,182 +0,0 @@ -/* linux/arch/arm/mach-s3c2410/dma.c - * - * Copyright (c) 2006 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * - * S3C2410 DMA selection - * - * http://armlinux.simtec.co.uk/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/device.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> - -#include <mach/map.h> -#include <mach/dma.h> - -#include <plat/cpu.h> -#include <plat/dma-s3c24xx.h> - -#include <mach/regs-gpio.h> -#include <plat/regs-dma.h> -#include <mach/regs-lcd.h> -#include <plat/regs-spi.h> - -static struct s3c24xx_dma_map __initdata s3c2410_dma_mappings[] = { - [DMACH_XD0] = { - .name = "xdreq0", - .channels[0] = S3C2410_DCON_CH0_XDREQ0 | DMA_CH_VALID, - }, - [DMACH_XD1] = { - .name = "xdreq1", - .channels[1] = S3C2410_DCON_CH1_XDREQ1 | DMA_CH_VALID, - }, - [DMACH_SDI] = { - .name = "sdi", - .channels[0] = S3C2410_DCON_CH0_SDI | DMA_CH_VALID, - .channels[2] = S3C2410_DCON_CH2_SDI | DMA_CH_VALID, - .channels[3] = S3C2410_DCON_CH3_SDI | DMA_CH_VALID, - }, - [DMACH_SPI0] = { - .name = "spi0", - .channels[1] = S3C2410_DCON_CH1_SPI | DMA_CH_VALID, - }, - [DMACH_SPI1] = { - .name = "spi1", - .channels[3] = S3C2410_DCON_CH3_SPI | DMA_CH_VALID, - }, - [DMACH_UART0] = { - .name = "uart0", - .channels[0] = S3C2410_DCON_CH0_UART0 | DMA_CH_VALID, - }, - [DMACH_UART1] = { - .name = "uart1", - .channels[1] = S3C2410_DCON_CH1_UART1 | DMA_CH_VALID, - }, - [DMACH_UART2] = { - .name = "uart2", - .channels[3] = S3C2410_DCON_CH3_UART2 | DMA_CH_VALID, - }, - [DMACH_TIMER] = { - .name = "timer", - .channels[0] = S3C2410_DCON_CH0_TIMER | DMA_CH_VALID, - .channels[2] = S3C2410_DCON_CH2_TIMER | DMA_CH_VALID, - .channels[3] = S3C2410_DCON_CH3_TIMER | DMA_CH_VALID, - }, - [DMACH_I2S_IN] = { - .name = "i2s-sdi", - .channels[1] = S3C2410_DCON_CH1_I2SSDI | DMA_CH_VALID, - .channels[2] = S3C2410_DCON_CH2_I2SSDI | DMA_CH_VALID, - }, - [DMACH_I2S_OUT] = { - .name = "i2s-sdo", - .channels[2] = S3C2410_DCON_CH2_I2SSDO | DMA_CH_VALID, - }, - [DMACH_USB_EP1] = { - .name = "usb-ep1", - .channels[0] = S3C2410_DCON_CH0_USBEP1 | DMA_CH_VALID, - }, - [DMACH_USB_EP2] = { - .name = "usb-ep2", - .channels[1] = S3C2410_DCON_CH1_USBEP2 | DMA_CH_VALID, - }, - [DMACH_USB_EP3] = { - .name = "usb-ep3", - .channels[2] = S3C2410_DCON_CH2_USBEP3 | DMA_CH_VALID, - }, - [DMACH_USB_EP4] = { - .name = "usb-ep4", - .channels[3] =S3C2410_DCON_CH3_USBEP4 | DMA_CH_VALID, - }, -}; - -static void s3c2410_dma_select(struct s3c2410_dma_chan *chan, - struct s3c24xx_dma_map *map) -{ - chan->dcon = map->channels[chan->number] & ~DMA_CH_VALID; -} - -static struct s3c24xx_dma_selection __initdata s3c2410_dma_sel = { - .select = s3c2410_dma_select, - .dcon_mask = 7 << 24, - .map = s3c2410_dma_mappings, - .map_size = ARRAY_SIZE(s3c2410_dma_mappings), -}; - -static struct s3c24xx_dma_order __initdata s3c2410_dma_order = { - .channels = { - [DMACH_SDI] = { - .list = { - [0] = 3 | DMA_CH_VALID, - [1] = 2 | DMA_CH_VALID, - [2] = 0 | DMA_CH_VALID, - }, - }, - [DMACH_I2S_IN] = { - .list = { - [0] = 1 | DMA_CH_VALID, - [1] = 2 | DMA_CH_VALID, - }, - }, - }, -}; - -static int __init s3c2410_dma_add(struct device *dev, - struct subsys_interface *sif) -{ - s3c2410_dma_init(); - s3c24xx_dma_order_set(&s3c2410_dma_order); - return s3c24xx_dma_init_map(&s3c2410_dma_sel); -} - -#if defined(CONFIG_CPU_S3C2410) -static struct subsys_interface s3c2410_dma_interface = { - .name = "s3c2410_dma", - .subsys = &s3c2410_subsys, - .add_dev = s3c2410_dma_add, -}; - -static int __init s3c2410_dma_drvinit(void) -{ - return subsys_interface_register(&s3c2410_dma_interface); -} - -arch_initcall(s3c2410_dma_drvinit); - -static struct subsys_interface s3c2410a_dma_interface = { - .name = "s3c2410a_dma", - .subsys = &s3c2410a_subsys, - .add_dev = s3c2410_dma_add, -}; - -static int __init s3c2410a_dma_drvinit(void) -{ - return subsys_interface_register(&s3c2410a_dma_interface); -} - -arch_initcall(s3c2410a_dma_drvinit); -#endif - -#if defined(CONFIG_CPU_S3C2442) -/* S3C2442 DMA contains the same selection table as the S3C2410 */ -static struct subsys_interface s3c2442_dma_interface = { - .name = "s3c2442_dma", - .subsys = &s3c2442_subsys, - .add_dev = s3c2410_dma_add, -}; - -static int __init s3c2442_dma_drvinit(void) -{ - return subsys_interface_register(&s3c2442_dma_interface); -} - -arch_initcall(s3c2442_dma_drvinit); -#endif - diff --git a/arch/arm/mach-s3c24xx/dma-s3c2412.c b/arch/arm/mach-s3c24xx/dma-s3c2412.c deleted file mode 100644 index 0c0106d1a4d1..000000000000 --- a/arch/arm/mach-s3c24xx/dma-s3c2412.c +++ /dev/null @@ -1,150 +0,0 @@ -/* linux/arch/arm/mach-s3c2412/dma.c - * - * Copyright (c) 2006 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * - * S3C2412 DMA selection - * - * http://armlinux.simtec.co.uk/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/device.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/io.h> - -#include <mach/dma.h> - -#include <plat/dma-s3c24xx.h> -#include <plat/cpu.h> - -#include <mach/regs-gpio.h> -#include <plat/regs-dma.h> -#include <mach/regs-lcd.h> -#include <plat/regs-spi.h> - -#define MAP(x) { (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID, (x)| DMA_CH_VALID } - -static struct s3c24xx_dma_map __initdata s3c2412_dma_mappings[] = { - [DMACH_XD0] = { - .name = "xdreq0", - .channels = MAP(S3C2412_DMAREQSEL_XDREQ0), - }, - [DMACH_XD1] = { - .name = "xdreq1", - .channels = MAP(S3C2412_DMAREQSEL_XDREQ1), - }, - [DMACH_SDI] = { - .name = "sdi", - .channels = MAP(S3C2412_DMAREQSEL_SDI), - }, - [DMACH_SPI0_RX] = { - .name = "spi0-rx", - .channels = MAP(S3C2412_DMAREQSEL_SPI0RX), - }, - [DMACH_SPI0_TX] = { - .name = "spi0-tx", - .channels = MAP(S3C2412_DMAREQSEL_SPI0TX), - }, - [DMACH_SPI1_RX] = { - .name = "spi1-rx", - .channels = MAP(S3C2412_DMAREQSEL_SPI1RX), - }, - [DMACH_SPI1_TX] = { - .name = "spi1-tx", - .channels = MAP(S3C2412_DMAREQSEL_SPI1TX), - }, - [DMACH_UART0] = { - .name = "uart0", - .channels = MAP(S3C2412_DMAREQSEL_UART0_0), - }, - [DMACH_UART1] = { - .name = "uart1", - .channels = MAP(S3C2412_DMAREQSEL_UART1_0), - }, - [DMACH_UART2] = { - .name = "uart2", - .channels = MAP(S3C2412_DMAREQSEL_UART2_0), - }, - [DMACH_UART0_SRC2] = { - .name = "uart0", - .channels = MAP(S3C2412_DMAREQSEL_UART0_1), - }, - [DMACH_UART1_SRC2] = { - .name = "uart1", - .channels = MAP(S3C2412_DMAREQSEL_UART1_1), - }, - [DMACH_UART2_SRC2] = { - .name = "uart2", - .channels = MAP(S3C2412_DMAREQSEL_UART2_1), - }, - [DMACH_TIMER] = { - .name = "timer", - .channels = MAP(S3C2412_DMAREQSEL_TIMER), - }, - [DMACH_I2S_IN] = { - .name = "i2s-sdi", - .channels = MAP(S3C2412_DMAREQSEL_I2SRX), - }, - [DMACH_I2S_OUT] = { - .name = "i2s-sdo", - .channels = MAP(S3C2412_DMAREQSEL_I2STX), - }, - [DMACH_USB_EP1] = { - .name = "usb-ep1", - .channels = MAP(S3C2412_DMAREQSEL_USBEP1), - }, - [DMACH_USB_EP2] = { - .name = "usb-ep2", - .channels = MAP(S3C2412_DMAREQSEL_USBEP2), - }, - [DMACH_USB_EP3] = { - .name = "usb-ep3", - .channels = MAP(S3C2412_DMAREQSEL_USBEP3), - }, - [DMACH_USB_EP4] = { - .name = "usb-ep4", - .channels = MAP(S3C2412_DMAREQSEL_USBEP4), - }, -}; - -static void s3c2412_dma_select(struct s3c2410_dma_chan *chan, - struct s3c24xx_dma_map *map) -{ - unsigned long chsel = map->channels[0] & (~DMA_CH_VALID); - writel(chsel | S3C2412_DMAREQSEL_HW, - chan->regs + S3C2412_DMA_DMAREQSEL); -} - -static struct s3c24xx_dma_selection __initdata s3c2412_dma_sel = { - .select = s3c2412_dma_select, - .dcon_mask = 0, - .map = s3c2412_dma_mappings, - .map_size = ARRAY_SIZE(s3c2412_dma_mappings), -}; - -static int __init s3c2412_dma_add(struct device *dev, - struct subsys_interface *sif) -{ - s3c2410_dma_init(); - return s3c24xx_dma_init_map(&s3c2412_dma_sel); -} - -static struct subsys_interface s3c2412_dma_interface = { - .name = "s3c2412_dma", - .subsys = &s3c2412_subsys, - .add_dev = s3c2412_dma_add, -}; - -static int __init s3c2412_dma_init(void) -{ - return subsys_interface_register(&s3c2412_dma_interface); -} - -arch_initcall(s3c2412_dma_init); diff --git a/arch/arm/mach-s3c24xx/dma-s3c2440.c b/arch/arm/mach-s3c24xx/dma-s3c2440.c deleted file mode 100644 index 2f8e8a3017df..000000000000 --- a/arch/arm/mach-s3c24xx/dma-s3c2440.c +++ /dev/null @@ -1,193 +0,0 @@ -/* linux/arch/arm/mach-s3c2440/dma.c - * - * Copyright (c) 2006 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * - * S3C2440 DMA selection - * - * http://armlinux.simtec.co.uk/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/device.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> - -#include <mach/map.h> -#include <mach/dma.h> - -#include <plat/dma-s3c24xx.h> -#include <plat/cpu.h> - -#include <mach/regs-gpio.h> -#include <plat/regs-dma.h> -#include <mach/regs-lcd.h> -#include <plat/regs-spi.h> - -static struct s3c24xx_dma_map __initdata s3c2440_dma_mappings[] = { - [DMACH_XD0] = { - .name = "xdreq0", - .channels[0] = S3C2410_DCON_CH0_XDREQ0 | DMA_CH_VALID, - }, - [DMACH_XD1] = { - .name = "xdreq1", - .channels[1] = S3C2410_DCON_CH1_XDREQ1 | DMA_CH_VALID, - }, - [DMACH_SDI] = { - .name = "sdi", - .channels[0] = S3C2410_DCON_CH0_SDI | DMA_CH_VALID, - .channels[1] = S3C2440_DCON_CH1_SDI | DMA_CH_VALID, - .channels[2] = S3C2410_DCON_CH2_SDI | DMA_CH_VALID, - .channels[3] = S3C2410_DCON_CH3_SDI | DMA_CH_VALID, - }, - [DMACH_SPI0] = { - .name = "spi0", - .channels[1] = S3C2410_DCON_CH1_SPI | DMA_CH_VALID, - }, - [DMACH_SPI1] = { - .name = "spi1", - .channels[3] = S3C2410_DCON_CH3_SPI | DMA_CH_VALID, - }, - [DMACH_UART0] = { - .name = "uart0", - .channels[0] = S3C2410_DCON_CH0_UART0 | DMA_CH_VALID, - }, - [DMACH_UART1] = { - .name = "uart1", - .channels[1] = S3C2410_DCON_CH1_UART1 | DMA_CH_VALID, - }, - [DMACH_UART2] = { - .name = "uart2", - .channels[3] = S3C2410_DCON_CH3_UART2 | DMA_CH_VALID, - }, - [DMACH_TIMER] = { - .name = "timer", - .channels[0] = S3C2410_DCON_CH0_TIMER | DMA_CH_VALID, - .channels[2] = S3C2410_DCON_CH2_TIMER | DMA_CH_VALID, - .channels[3] = S3C2410_DCON_CH3_TIMER | DMA_CH_VALID, - }, - [DMACH_I2S_IN] = { - .name = "i2s-sdi", - .channels[1] = S3C2410_DCON_CH1_I2SSDI | DMA_CH_VALID, - .channels[2] = S3C2410_DCON_CH2_I2SSDI | DMA_CH_VALID, - }, - [DMACH_I2S_OUT] = { - .name = "i2s-sdo", - .channels[0] = S3C2440_DCON_CH0_I2SSDO | DMA_CH_VALID, - .channels[2] = S3C2410_DCON_CH2_I2SSDO | DMA_CH_VALID, - }, - [DMACH_PCM_IN] = { - .name = "pcm-in", - .channels[0] = S3C2440_DCON_CH0_PCMIN | DMA_CH_VALID, - .channels[2] = S3C2440_DCON_CH2_PCMIN | DMA_CH_VALID, - }, - [DMACH_PCM_OUT] = { - .name = "pcm-out", - .channels[1] = S3C2440_DCON_CH1_PCMOUT | DMA_CH_VALID, - .channels[3] = S3C2440_DCON_CH3_PCMOUT | DMA_CH_VALID, - }, - [DMACH_MIC_IN] = { - .name = "mic-in", - .channels[2] = S3C2440_DCON_CH2_MICIN | DMA_CH_VALID, - .channels[3] = S3C2440_DCON_CH3_MICIN | DMA_CH_VALID, - }, - [DMACH_USB_EP1] = { - .name = "usb-ep1", - .channels[0] = S3C2410_DCON_CH0_USBEP1 | DMA_CH_VALID, - }, - [DMACH_USB_EP2] = { - .name = "usb-ep2", - .channels[1] = S3C2410_DCON_CH1_USBEP2 | DMA_CH_VALID, - }, - [DMACH_USB_EP3] = { - .name = "usb-ep3", - .channels[2] = S3C2410_DCON_CH2_USBEP3 | DMA_CH_VALID, - }, - [DMACH_USB_EP4] = { - .name = "usb-ep4", - .channels[3] = S3C2410_DCON_CH3_USBEP4 | DMA_CH_VALID, - }, -}; - -static void s3c2440_dma_select(struct s3c2410_dma_chan *chan, - struct s3c24xx_dma_map *map) -{ - chan->dcon = map->channels[chan->number] & ~DMA_CH_VALID; -} - -static struct s3c24xx_dma_selection __initdata s3c2440_dma_sel = { - .select = s3c2440_dma_select, - .dcon_mask = 7 << 24, - .map = s3c2440_dma_mappings, - .map_size = ARRAY_SIZE(s3c2440_dma_mappings), -}; - -static struct s3c24xx_dma_order __initdata s3c2440_dma_order = { - .channels = { - [DMACH_SDI] = { - .list = { - [0] = 3 | DMA_CH_VALID, - [1] = 2 | DMA_CH_VALID, - [2] = 1 | DMA_CH_VALID, - [3] = 0 | DMA_CH_VALID, - }, - }, - [DMACH_I2S_IN] = { - .list = { - [0] = 1 | DMA_CH_VALID, - [1] = 2 | DMA_CH_VALID, - }, - }, - [DMACH_I2S_OUT] = { - .list = { - [0] = 2 | DMA_CH_VALID, - [1] = 1 | DMA_CH_VALID, - }, - }, - [DMACH_PCM_IN] = { - .list = { - [0] = 2 | DMA_CH_VALID, - [1] = 1 | DMA_CH_VALID, - }, - }, - [DMACH_PCM_OUT] = { - .list = { - [0] = 1 | DMA_CH_VALID, - [1] = 3 | DMA_CH_VALID, - }, - }, - [DMACH_MIC_IN] = { - .list = { - [0] = 3 | DMA_CH_VALID, - [1] = 2 | DMA_CH_VALID, - }, - }, - }, -}; - -static int __init s3c2440_dma_add(struct device *dev, - struct subsys_interface *sif) -{ - s3c2410_dma_init(); - s3c24xx_dma_order_set(&s3c2440_dma_order); - return s3c24xx_dma_init_map(&s3c2440_dma_sel); -} - -static struct subsys_interface s3c2440_dma_interface = { - .name = "s3c2440_dma", - .subsys = &s3c2440_subsys, - .add_dev = s3c2440_dma_add, -}; - -static int __init s3c2440_dma_init(void) -{ - return subsys_interface_register(&s3c2440_dma_interface); -} - -arch_initcall(s3c2440_dma_init); - diff --git a/arch/arm/mach-s3c24xx/dma-s3c2443.c b/arch/arm/mach-s3c24xx/dma-s3c2443.c deleted file mode 100644 index f4096ec0700a..000000000000 --- a/arch/arm/mach-s3c24xx/dma-s3c2443.c +++ /dev/null @@ -1,179 +0,0 @@ -/* linux/arch/arm/mach-s3c2443/dma.c - * - * Copyright (c) 2007 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * - * S3C2443 DMA selection - * - * http://armlinux.simtec.co.uk/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/device.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/io.h> - -#include <mach/dma.h> - -#include <plat/dma-s3c24xx.h> -#include <plat/cpu.h> - -#include <mach/regs-gpio.h> -#include <plat/regs-dma.h> -#include <mach/regs-lcd.h> -#include <plat/regs-spi.h> - -#define MAP(x) { \ - [0] = (x) | DMA_CH_VALID, \ - [1] = (x) | DMA_CH_VALID, \ - [2] = (x) | DMA_CH_VALID, \ - [3] = (x) | DMA_CH_VALID, \ - [4] = (x) | DMA_CH_VALID, \ - [5] = (x) | DMA_CH_VALID, \ - } - -static struct s3c24xx_dma_map __initdata s3c2443_dma_mappings[] = { - [DMACH_XD0] = { - .name = "xdreq0", - .channels = MAP(S3C2443_DMAREQSEL_XDREQ0), - }, - [DMACH_XD1] = { - .name = "xdreq1", - .channels = MAP(S3C2443_DMAREQSEL_XDREQ1), - }, - [DMACH_SDI] = { /* only on S3C2443 */ - .name = "sdi", - .channels = MAP(S3C2443_DMAREQSEL_SDI), - }, - [DMACH_SPI0_RX] = { - .name = "spi0-rx", - .channels = MAP(S3C2443_DMAREQSEL_SPI0RX), - }, - [DMACH_SPI0_TX] = { - .name = "spi0-tx", - .channels = MAP(S3C2443_DMAREQSEL_SPI0TX), - }, - [DMACH_SPI1_RX] = { /* only on S3C2443/S3C2450 */ - .name = "spi1-rx", - .channels = MAP(S3C2443_DMAREQSEL_SPI1RX), - }, - [DMACH_SPI1_TX] = { /* only on S3C2443/S3C2450 */ - .name = "spi1-tx", - .channels = MAP(S3C2443_DMAREQSEL_SPI1TX), - }, - [DMACH_UART0] = { - .name = "uart0", - .channels = MAP(S3C2443_DMAREQSEL_UART0_0), - }, - [DMACH_UART1] = { - .name = "uart1", - .channels = MAP(S3C2443_DMAREQSEL_UART1_0), - }, - [DMACH_UART2] = { - .name = "uart2", - .channels = MAP(S3C2443_DMAREQSEL_UART2_0), - }, - [DMACH_UART3] = { - .name = "uart3", - .channels = MAP(S3C2443_DMAREQSEL_UART3_0), - }, - [DMACH_UART0_SRC2] = { - .name = "uart0", - .channels = MAP(S3C2443_DMAREQSEL_UART0_1), - }, - [DMACH_UART1_SRC2] = { - .name = "uart1", - .channels = MAP(S3C2443_DMAREQSEL_UART1_1), - }, - [DMACH_UART2_SRC2] = { - .name = "uart2", - .channels = MAP(S3C2443_DMAREQSEL_UART2_1), - }, - [DMACH_UART3_SRC2] = { - .name = "uart3", - .channels = MAP(S3C2443_DMAREQSEL_UART3_1), - }, - [DMACH_TIMER] = { - .name = "timer", - .channels = MAP(S3C2443_DMAREQSEL_TIMER), - }, - [DMACH_I2S_IN] = { - .name = "i2s-sdi", - .channels = MAP(S3C2443_DMAREQSEL_I2SRX), - }, - [DMACH_I2S_OUT] = { - .name = "i2s-sdo", - .channels = MAP(S3C2443_DMAREQSEL_I2STX), - }, - [DMACH_PCM_IN] = { - .name = "pcm-in", - .channels = MAP(S3C2443_DMAREQSEL_PCMIN), - }, - [DMACH_PCM_OUT] = { - .name = "pcm-out", - .channels = MAP(S3C2443_DMAREQSEL_PCMOUT), - }, - [DMACH_MIC_IN] = { - .name = "mic-in", - .channels = MAP(S3C2443_DMAREQSEL_MICIN), - }, -}; - -static void s3c2443_dma_select(struct s3c2410_dma_chan *chan, - struct s3c24xx_dma_map *map) -{ - unsigned long chsel = map->channels[0] & (~DMA_CH_VALID); - writel(chsel | S3C2443_DMAREQSEL_HW, - chan->regs + S3C2443_DMA_DMAREQSEL); -} - -static struct s3c24xx_dma_selection __initdata s3c2443_dma_sel = { - .select = s3c2443_dma_select, - .dcon_mask = 0, - .map = s3c2443_dma_mappings, - .map_size = ARRAY_SIZE(s3c2443_dma_mappings), -}; - -static int __init s3c2443_dma_add(struct device *dev, - struct subsys_interface *sif) -{ - s3c24xx_dma_init(6, IRQ_S3C2443_DMA0, 0x100); - return s3c24xx_dma_init_map(&s3c2443_dma_sel); -} - -#ifdef CONFIG_CPU_S3C2416 -/* S3C2416 DMA contains the same selection table as the S3C2443 */ -static struct subsys_interface s3c2416_dma_interface = { - .name = "s3c2416_dma", - .subsys = &s3c2416_subsys, - .add_dev = s3c2443_dma_add, -}; - -static int __init s3c2416_dma_init(void) -{ - return subsys_interface_register(&s3c2416_dma_interface); -} - -arch_initcall(s3c2416_dma_init); -#endif - -#ifdef CONFIG_CPU_S3C2443 -static struct subsys_interface s3c2443_dma_interface = { - .name = "s3c2443_dma", - .subsys = &s3c2443_subsys, - .add_dev = s3c2443_dma_add, -}; - -static int __init s3c2443_dma_init(void) -{ - return subsys_interface_register(&s3c2443_dma_interface); -} - -arch_initcall(s3c2443_dma_init); -#endif diff --git a/arch/arm/mach-s3c24xx/dma.c b/arch/arm/mach-s3c24xx/dma.c deleted file mode 100644 index a8dafc174fe3..000000000000 --- a/arch/arm/mach-s3c24xx/dma.c +++ /dev/null @@ -1,1465 +0,0 @@ -/* - * Copyright 2003-2006 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * - * S3C2410 DMA core - * - * http://armlinux.simtec.co.uk/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - - -#ifdef CONFIG_S3C2410_DMA_DEBUG -#define DEBUG -#endif - -#include <linux/module.h> -#include <linux/init.h> -#include <linux/sched.h> -#include <linux/spinlock.h> -#include <linux/interrupt.h> -#include <linux/syscore_ops.h> -#include <linux/slab.h> -#include <linux/errno.h> -#include <linux/io.h> - -#include <asm/irq.h> -#include <mach/hardware.h> -#include <mach/dma.h> -#include <mach/map.h> - -#include <plat/dma-s3c24xx.h> -#include <plat/regs-dma.h> - -/* io map for dma */ -static void __iomem *dma_base; -static struct kmem_cache *dma_kmem; - -static int dma_channels; - -static struct s3c24xx_dma_selection dma_sel; - - -/* debugging functions */ - -#define BUF_MAGIC (0xcafebabe) - -#define dmawarn(fmt...) printk(KERN_DEBUG fmt) - -#define dma_regaddr(chan, reg) ((chan)->regs + (reg)) - -#if 1 -#define dma_wrreg(chan, reg, val) writel((val), (chan)->regs + (reg)) -#else -static inline void -dma_wrreg(struct s3c2410_dma_chan *chan, int reg, unsigned long val) -{ - pr_debug("writing %08x to register %08x\n",(unsigned int)val,reg); - writel(val, dma_regaddr(chan, reg)); -} -#endif - -#define dma_rdreg(chan, reg) readl((chan)->regs + (reg)) - -/* captured register state for debug */ - -struct s3c2410_dma_regstate { - unsigned long dcsrc; - unsigned long disrc; - unsigned long dstat; - unsigned long dcon; - unsigned long dmsktrig; -}; - -#ifdef CONFIG_S3C2410_DMA_DEBUG - -/* dmadbg_showregs - * - * simple debug routine to print the current state of the dma registers -*/ - -static void -dmadbg_capture(struct s3c2410_dma_chan *chan, struct s3c2410_dma_regstate *regs) -{ - regs->dcsrc = dma_rdreg(chan, S3C2410_DMA_DCSRC); - regs->disrc = dma_rdreg(chan, S3C2410_DMA_DISRC); - regs->dstat = dma_rdreg(chan, S3C2410_DMA_DSTAT); - regs->dcon = dma_rdreg(chan, S3C2410_DMA_DCON); - regs->dmsktrig = dma_rdreg(chan, S3C2410_DMA_DMASKTRIG); -} - -static void -dmadbg_dumpregs(const char *fname, int line, struct s3c2410_dma_chan *chan, - struct s3c2410_dma_regstate *regs) -{ - printk(KERN_DEBUG "dma%d: %s:%d: DCSRC=%08lx, DISRC=%08lx, DSTAT=%08lx DMT=%02lx, DCON=%08lx\n", - chan->number, fname, line, - regs->dcsrc, regs->disrc, regs->dstat, regs->dmsktrig, - regs->dcon); -} - -static void -dmadbg_showchan(const char *fname, int line, struct s3c2410_dma_chan *chan) -{ - struct s3c2410_dma_regstate state; - - dmadbg_capture(chan, &state); - - printk(KERN_DEBUG "dma%d: %s:%d: ls=%d, cur=%p, %p %p\n", - chan->number, fname, line, chan->load_state, - chan->curr, chan->next, chan->end); - - dmadbg_dumpregs(fname, line, chan, &state); -} - -static void -dmadbg_showregs(const char *fname, int line, struct s3c2410_dma_chan *chan) -{ - struct s3c2410_dma_regstate state; - - dmadbg_capture(chan, &state); - dmadbg_dumpregs(fname, line, chan, &state); -} - -#define dbg_showregs(chan) dmadbg_showregs(__func__, __LINE__, (chan)) -#define dbg_showchan(chan) dmadbg_showchan(__func__, __LINE__, (chan)) -#else -#define dbg_showregs(chan) do { } while(0) -#define dbg_showchan(chan) do { } while(0) -#endif /* CONFIG_S3C2410_DMA_DEBUG */ - -/* s3c2410_dma_stats_timeout - * - * Update DMA stats from timeout info -*/ - -static void -s3c2410_dma_stats_timeout(struct s3c2410_dma_stats *stats, int val) -{ - if (stats == NULL) - return; - - if (val > stats->timeout_longest) - stats->timeout_longest = val; - if (val < stats->timeout_shortest) - stats->timeout_shortest = val; - - stats->timeout_avg += val; -} - -/* s3c2410_dma_waitforload - * - * wait for the DMA engine to load a buffer, and update the state accordingly -*/ - -static int -s3c2410_dma_waitforload(struct s3c2410_dma_chan *chan, int line) -{ - int timeout = chan->load_timeout; - int took; - - if (chan->load_state != S3C2410_DMALOAD_1LOADED) { - printk(KERN_ERR "dma%d: s3c2410_dma_waitforload() called in loadstate %d from line %d\n", chan->number, chan->load_state, line); - return 0; - } - - if (chan->stats != NULL) - chan->stats->loads++; - - while (--timeout > 0) { - if ((dma_rdreg(chan, S3C2410_DMA_DSTAT) << (32-20)) != 0) { - took = chan->load_timeout - timeout; - - s3c2410_dma_stats_timeout(chan->stats, took); - - switch (chan->load_state) { - case S3C2410_DMALOAD_1LOADED: - chan->load_state = S3C2410_DMALOAD_1RUNNING; - break; - - default: - printk(KERN_ERR "dma%d: unknown load_state in s3c2410_dma_waitforload() %d\n", chan->number, chan->load_state); - } - - return 1; - } - } - - if (chan->stats != NULL) { - chan->stats->timeout_failed++; - } - - return 0; -} - -/* s3c2410_dma_loadbuffer - * - * load a buffer, and update the channel state -*/ - -static inline int -s3c2410_dma_loadbuffer(struct s3c2410_dma_chan *chan, - struct s3c2410_dma_buf *buf) -{ - unsigned long reload; - - if (buf == NULL) { - dmawarn("buffer is NULL\n"); - return -EINVAL; - } - - pr_debug("s3c2410_chan_loadbuffer: loading buff %p (0x%08lx,0x%06x)\n", - buf, (unsigned long)buf->data, buf->size); - - /* check the state of the channel before we do anything */ - - if (chan->load_state == S3C2410_DMALOAD_1LOADED) { - dmawarn("load_state is S3C2410_DMALOAD_1LOADED\n"); - } - - if (chan->load_state == S3C2410_DMALOAD_1LOADED_1RUNNING) { - dmawarn("state is S3C2410_DMALOAD_1LOADED_1RUNNING\n"); - } - - /* it would seem sensible if we are the last buffer to not bother - * with the auto-reload bit, so that the DMA engine will not try - * and load another transfer after this one has finished... - */ - if (chan->load_state == S3C2410_DMALOAD_NONE) { - pr_debug("load_state is none, checking for noreload (next=%p)\n", - buf->next); - reload = (buf->next == NULL) ? S3C2410_DCON_NORELOAD : 0; - } else { - //pr_debug("load_state is %d => autoreload\n", chan->load_state); - reload = S3C2410_DCON_AUTORELOAD; - } - - if ((buf->data & 0xf0000000) != 0x30000000) { - dmawarn("dmaload: buffer is %p\n", (void *)buf->data); - } - - writel(buf->data, chan->addr_reg); - - dma_wrreg(chan, S3C2410_DMA_DCON, - chan->dcon | reload | (buf->size/chan->xfer_unit)); - - chan->next = buf->next; - - /* update the state of the channel */ - - switch (chan->load_state) { - case S3C2410_DMALOAD_NONE: - chan->load_state = S3C2410_DMALOAD_1LOADED; - break; - - case S3C2410_DMALOAD_1RUNNING: - chan->load_state = S3C2410_DMALOAD_1LOADED_1RUNNING; - break; - - default: - dmawarn("dmaload: unknown state %d in loadbuffer\n", - chan->load_state); - break; - } - - return 0; -} - -/* s3c2410_dma_call_op - * - * small routine to call the op routine with the given op if it has been - * registered -*/ - -static void -s3c2410_dma_call_op(struct s3c2410_dma_chan *chan, enum s3c2410_chan_op op) -{ - if (chan->op_fn != NULL) { - (chan->op_fn)(chan, op); - } -} - -/* s3c2410_dma_buffdone - * - * small wrapper to check if callback routine needs to be called, and - * if so, call it -*/ - -static inline void -s3c2410_dma_buffdone(struct s3c2410_dma_chan *chan, struct s3c2410_dma_buf *buf, - enum s3c2410_dma_buffresult result) -{ -#if 0 - pr_debug("callback_fn=%p, buf=%p, id=%p, size=%d, result=%d\n", - chan->callback_fn, buf, buf->id, buf->size, result); -#endif - - if (chan->callback_fn != NULL) { - (chan->callback_fn)(chan, buf->id, buf->size, result); - } -} - -/* s3c2410_dma_start - * - * start a dma channel going -*/ - -static int s3c2410_dma_start(struct s3c2410_dma_chan *chan) -{ - unsigned long tmp; - unsigned long flags; - - pr_debug("s3c2410_start_dma: channel=%d\n", chan->number); - - local_irq_save(flags); - - if (chan->state == S3C2410_DMA_RUNNING) { - pr_debug("s3c2410_start_dma: already running (%d)\n", chan->state); - local_irq_restore(flags); - return 0; - } - - chan->state = S3C2410_DMA_RUNNING; - - /* check whether there is anything to load, and if not, see - * if we can find anything to load - */ - - if (chan->load_state == S3C2410_DMALOAD_NONE) { - if (chan->next == NULL) { - printk(KERN_ERR "dma%d: channel has nothing loaded\n", - chan->number); - chan->state = S3C2410_DMA_IDLE; - local_irq_restore(flags); - return -EINVAL; - } - - s3c2410_dma_loadbuffer(chan, chan->next); - } - - dbg_showchan(chan); - - /* enable the channel */ - - if (!chan->irq_enabled) { - enable_irq(chan->irq); - chan->irq_enabled = 1; - } - - /* start the channel going */ - - tmp = dma_rdreg(chan, S3C2410_DMA_DMASKTRIG); - tmp &= ~S3C2410_DMASKTRIG_STOP; - tmp |= S3C2410_DMASKTRIG_ON; - dma_wrreg(chan, S3C2410_DMA_DMASKTRIG, tmp); - - pr_debug("dma%d: %08lx to DMASKTRIG\n", chan->number, tmp); - -#if 0 - /* the dma buffer loads should take care of clearing the AUTO - * reloading feature */ - tmp = dma_rdreg(chan, S3C2410_DMA_DCON); - tmp &= ~S3C2410_DCON_NORELOAD; - dma_wrreg(chan, S3C2410_DMA_DCON, tmp); -#endif - - s3c2410_dma_call_op(chan, S3C2410_DMAOP_START); - - dbg_showchan(chan); - - /* if we've only loaded one buffer onto the channel, then chec - * to see if we have another, and if so, try and load it so when - * the first buffer is finished, the new one will be loaded onto - * the channel */ - - if (chan->next != NULL) { - if (chan->load_state == S3C2410_DMALOAD_1LOADED) { - - if (s3c2410_dma_waitforload(chan, __LINE__) == 0) { - pr_debug("%s: buff not yet loaded, no more todo\n", - __func__); - } else { - chan->load_state = S3C2410_DMALOAD_1RUNNING; - s3c2410_dma_loadbuffer(chan, chan->next); - } - - } else if (chan->load_state == S3C2410_DMALOAD_1RUNNING) { - s3c2410_dma_loadbuffer(chan, chan->next); - } - } - - - local_irq_restore(flags); - - return 0; -} - -/* s3c2410_dma_canload - * - * work out if we can queue another buffer into the DMA engine -*/ - -static int -s3c2410_dma_canload(struct s3c2410_dma_chan *chan) -{ - if (chan->load_state == S3C2410_DMALOAD_NONE || - chan->load_state == S3C2410_DMALOAD_1RUNNING) - return 1; - - return 0; -} - -/* s3c2410_dma_enqueue - * - * queue an given buffer for dma transfer. - * - * id the device driver's id information for this buffer - * data the physical address of the buffer data - * size the size of the buffer in bytes - * - * If the channel is not running, then the flag S3C2410_DMAF_AUTOSTART - * is checked, and if set, the channel is started. If this flag isn't set, - * then an error will be returned. - * - * It is possible to queue more than one DMA buffer onto a channel at - * once, and the code will deal with the re-loading of the next buffer - * when necessary. -*/ - -int s3c2410_dma_enqueue(enum dma_ch channel, void *id, - dma_addr_t data, int size) -{ - struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel); - struct s3c2410_dma_buf *buf; - unsigned long flags; - - if (chan == NULL) - return -EINVAL; - - pr_debug("%s: id=%p, data=%08x, size=%d\n", - __func__, id, (unsigned int)data, size); - - buf = kmem_cache_alloc(dma_kmem, GFP_ATOMIC); - if (buf == NULL) { - pr_debug("%s: out of memory (%ld alloc)\n", - __func__, (long)sizeof(*buf)); - return -ENOMEM; - } - - //pr_debug("%s: new buffer %p\n", __func__, buf); - //dbg_showchan(chan); - - buf->next = NULL; - buf->data = buf->ptr = data; - buf->size = size; - buf->id = id; - buf->magic = BUF_MAGIC; - - local_irq_save(flags); - - if (chan->curr == NULL) { - /* we've got nothing loaded... */ - pr_debug("%s: buffer %p queued onto empty channel\n", - __func__, buf); - - chan->curr = buf; - chan->end = buf; - chan->next = NULL; - } else { - pr_debug("dma%d: %s: buffer %p queued onto non-empty channel\n", - chan->number, __func__, buf); - - if (chan->end == NULL) { - pr_debug("dma%d: %s: %p not empty, and chan->end==NULL?\n", - chan->number, __func__, chan); - } else { - chan->end->next = buf; - chan->end = buf; - } - } - - /* if necessary, update the next buffer field */ - if (chan->next == NULL) - chan->next = buf; - - /* check to see if we can load a buffer */ - if (chan->state == S3C2410_DMA_RUNNING) { - if (chan->load_state == S3C2410_DMALOAD_1LOADED && 1) { - if (s3c2410_dma_waitforload(chan, __LINE__) == 0) { - printk(KERN_ERR "dma%d: loadbuffer:" - "timeout loading buffer\n", - chan->number); - dbg_showchan(chan); - local_irq_restore(flags); - return -EINVAL; - } - } - - while (s3c2410_dma_canload(chan) && chan->next != NULL) { - s3c2410_dma_loadbuffer(chan, chan->next); - } - } else if (chan->state == S3C2410_DMA_IDLE) { - if (chan->flags & S3C2410_DMAF_AUTOSTART) { - s3c2410_dma_ctrl(chan->number | DMACH_LOW_LEVEL, - S3C2410_DMAOP_START); - } - } - - local_irq_restore(flags); - return 0; -} - -EXPORT_SYMBOL(s3c2410_dma_enqueue); - -static inline void -s3c2410_dma_freebuf(struct s3c2410_dma_buf *buf) -{ - int magicok = (buf->magic == BUF_MAGIC); - - buf->magic = -1; - - if (magicok) { - kmem_cache_free(dma_kmem, buf); - } else { - printk("s3c2410_dma_freebuf: buff %p with bad magic\n", buf); - } -} - -/* s3c2410_dma_lastxfer - * - * called when the system is out of buffers, to ensure that the channel - * is prepared for shutdown. -*/ - -static inline void -s3c2410_dma_lastxfer(struct s3c2410_dma_chan *chan) -{ -#if 0 - pr_debug("dma%d: s3c2410_dma_lastxfer: load_state %d\n", - chan->number, chan->load_state); -#endif - - switch (chan->load_state) { - case S3C2410_DMALOAD_NONE: - break; - - case S3C2410_DMALOAD_1LOADED: - if (s3c2410_dma_waitforload(chan, __LINE__) == 0) { - /* flag error? */ - printk(KERN_ERR "dma%d: timeout waiting for load (%s)\n", - chan->number, __func__); - return; - } - break; - - case S3C2410_DMALOAD_1LOADED_1RUNNING: - /* I believe in this case we do not have anything to do - * until the next buffer comes along, and we turn off the - * reload */ - return; - - default: - pr_debug("dma%d: lastxfer: unhandled load_state %d with no next\n", - chan->number, chan->load_state); - return; - - } - - /* hopefully this'll shut the damned thing up after the transfer... */ - dma_wrreg(chan, S3C2410_DMA_DCON, chan->dcon | S3C2410_DCON_NORELOAD); -} - - -#define dmadbg2(x...) - -static irqreturn_t -s3c2410_dma_irq(int irq, void *devpw) -{ - struct s3c2410_dma_chan *chan = (struct s3c2410_dma_chan *)devpw; - struct s3c2410_dma_buf *buf; - - buf = chan->curr; - - dbg_showchan(chan); - - /* modify the channel state */ - - switch (chan->load_state) { - case S3C2410_DMALOAD_1RUNNING: - /* TODO - if we are running only one buffer, we probably - * want to reload here, and then worry about the buffer - * callback */ - - chan->load_state = S3C2410_DMALOAD_NONE; - break; - - case S3C2410_DMALOAD_1LOADED: - /* iirc, we should go back to NONE loaded here, we - * had a buffer, and it was never verified as being - * loaded. - */ - - chan->load_state = S3C2410_DMALOAD_NONE; - break; - - case S3C2410_DMALOAD_1LOADED_1RUNNING: - /* we'll worry about checking to see if another buffer is - * ready after we've called back the owner. This should - * ensure we do not wait around too long for the DMA - * engine to start the next transfer - */ - - chan->load_state = S3C2410_DMALOAD_1LOADED; - break; - - case S3C2410_DMALOAD_NONE: - printk(KERN_ERR "dma%d: IRQ with no loaded buffer?\n", - chan->number); - break; - - default: - printk(KERN_ERR "dma%d: IRQ in invalid load_state %d\n", - chan->number, chan->load_state); - break; - } - - if (buf != NULL) { - /* update the chain to make sure that if we load any more - * buffers when we call the callback function, things should - * work properly */ - - chan->curr = buf->next; - buf->next = NULL; - - if (buf->magic != BUF_MAGIC) { - printk(KERN_ERR "dma%d: %s: buf %p incorrect magic\n", - chan->number, __func__, buf); - return IRQ_HANDLED; - } - - s3c2410_dma_buffdone(chan, buf, S3C2410_RES_OK); - - /* free resouces */ - s3c2410_dma_freebuf(buf); - } else { - } - - /* only reload if the channel is still running... our buffer done - * routine may have altered the state by requesting the dma channel - * to stop or shutdown... */ - - /* todo: check that when the channel is shut-down from inside this - * function, we cope with unsetting reload, etc */ - - if (chan->next != NULL && chan->state != S3C2410_DMA_IDLE) { - unsigned long flags; - - switch (chan->load_state) { - case S3C2410_DMALOAD_1RUNNING: - /* don't need to do anything for this state */ - break; - - case S3C2410_DMALOAD_NONE: - /* can load buffer immediately */ - break; - - case S3C2410_DMALOAD_1LOADED: - if (s3c2410_dma_waitforload(chan, __LINE__) == 0) { - /* flag error? */ - printk(KERN_ERR "dma%d: timeout waiting for load (%s)\n", - chan->number, __func__); - return IRQ_HANDLED; - } - - break; - - case S3C2410_DMALOAD_1LOADED_1RUNNING: - goto no_load; - - default: - printk(KERN_ERR "dma%d: unknown load_state in irq, %d\n", - chan->number, chan->load_state); - return IRQ_HANDLED; - } - - local_irq_save(flags); - s3c2410_dma_loadbuffer(chan, chan->next); - local_irq_restore(flags); - } else { - s3c2410_dma_lastxfer(chan); - - /* see if we can stop this channel.. */ - if (chan->load_state == S3C2410_DMALOAD_NONE) { - pr_debug("dma%d: end of transfer, stopping channel (%ld)\n", - chan->number, jiffies); - s3c2410_dma_ctrl(chan->number | DMACH_LOW_LEVEL, - S3C2410_DMAOP_STOP); - } - } - - no_load: - return IRQ_HANDLED; -} - -static struct s3c2410_dma_chan *s3c2410_dma_map_channel(int channel); - -/* s3c2410_request_dma - * - * get control of an dma channel -*/ - -int s3c2410_dma_request(enum dma_ch channel, - struct s3c2410_dma_client *client, - void *dev) -{ - struct s3c2410_dma_chan *chan; - unsigned long flags; - int err; - - pr_debug("dma%d: s3c2410_request_dma: client=%s, dev=%p\n", - channel, client->name, dev); - - local_irq_save(flags); - - chan = s3c2410_dma_map_channel(channel); - if (chan == NULL) { - local_irq_restore(flags); - return -EBUSY; - } - - dbg_showchan(chan); - - chan->client = client; - chan->in_use = 1; - - if (!chan->irq_claimed) { - pr_debug("dma%d: %s : requesting irq %d\n", - channel, __func__, chan->irq); - - chan->irq_claimed = 1; - local_irq_restore(flags); - - err = request_irq(chan->irq, s3c2410_dma_irq, 0, - client->name, (void *)chan); - - local_irq_save(flags); - - if (err) { - chan->in_use = 0; - chan->irq_claimed = 0; - local_irq_restore(flags); - - printk(KERN_ERR "%s: cannot get IRQ %d for DMA %d\n", - client->name, chan->irq, chan->number); - return err; - } - - chan->irq_enabled = 1; - } - - local_irq_restore(flags); - - /* need to setup */ - - pr_debug("%s: channel initialised, %p\n", __func__, chan); - - return chan->number | DMACH_LOW_LEVEL; -} - -EXPORT_SYMBOL(s3c2410_dma_request); - -/* s3c2410_dma_free - * - * release the given channel back to the system, will stop and flush - * any outstanding transfers, and ensure the channel is ready for the - * next claimant. - * - * Note, although a warning is currently printed if the freeing client - * info is not the same as the registrant's client info, the free is still - * allowed to go through. -*/ - -int s3c2410_dma_free(enum dma_ch channel, struct s3c2410_dma_client *client) -{ - struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel); - unsigned long flags; - - if (chan == NULL) - return -EINVAL; - - local_irq_save(flags); - - if (chan->client != client) { - printk(KERN_WARNING "dma%d: possible free from different client (channel %p, passed %p)\n", - channel, chan->client, client); - } - - /* sort out stopping and freeing the channel */ - - if (chan->state != S3C2410_DMA_IDLE) { - pr_debug("%s: need to stop dma channel %p\n", - __func__, chan); - - /* possibly flush the channel */ - s3c2410_dma_ctrl(channel, S3C2410_DMAOP_STOP); - } - - chan->client = NULL; - chan->in_use = 0; - - if (chan->irq_claimed) - free_irq(chan->irq, (void *)chan); - - chan->irq_claimed = 0; - - if (!(channel & DMACH_LOW_LEVEL)) - s3c_dma_chan_map[channel] = NULL; - - local_irq_restore(flags); - - return 0; -} - -EXPORT_SYMBOL(s3c2410_dma_free); - -static int s3c2410_dma_dostop(struct s3c2410_dma_chan *chan) -{ - unsigned long flags; - unsigned long tmp; - - pr_debug("%s:\n", __func__); - - dbg_showchan(chan); - - local_irq_save(flags); - - s3c2410_dma_call_op(chan, S3C2410_DMAOP_STOP); - - tmp = dma_rdreg(chan, S3C2410_DMA_DMASKTRIG); - tmp |= S3C2410_DMASKTRIG_STOP; - //tmp &= ~S3C2410_DMASKTRIG_ON; - dma_wrreg(chan, S3C2410_DMA_DMASKTRIG, tmp); - -#if 0 - /* should also clear interrupts, according to WinCE BSP */ - tmp = dma_rdreg(chan, S3C2410_DMA_DCON); - tmp |= S3C2410_DCON_NORELOAD; - dma_wrreg(chan, S3C2410_DMA_DCON, tmp); -#endif - - /* should stop do this, or should we wait for flush? */ - chan->state = S3C2410_DMA_IDLE; - chan->load_state = S3C2410_DMALOAD_NONE; - - local_irq_restore(flags); - - return 0; -} - -static void s3c2410_dma_waitforstop(struct s3c2410_dma_chan *chan) -{ - unsigned long tmp; - unsigned int timeout = 0x10000; - - while (timeout-- > 0) { - tmp = dma_rdreg(chan, S3C2410_DMA_DMASKTRIG); - - if (!(tmp & S3C2410_DMASKTRIG_ON)) - return; - } - - pr_debug("dma%d: failed to stop?\n", chan->number); -} - - -/* s3c2410_dma_flush - * - * stop the channel, and remove all current and pending transfers -*/ - -static int s3c2410_dma_flush(struct s3c2410_dma_chan *chan) -{ - struct s3c2410_dma_buf *buf, *next; - unsigned long flags; - - pr_debug("%s: chan %p (%d)\n", __func__, chan, chan->number); - - dbg_showchan(chan); - - local_irq_save(flags); - - if (chan->state != S3C2410_DMA_IDLE) { - pr_debug("%s: stopping channel...\n", __func__ ); - s3c2410_dma_ctrl(chan->number, S3C2410_DMAOP_STOP); - } - - buf = chan->curr; - if (buf == NULL) - buf = chan->next; - - chan->curr = chan->next = chan->end = NULL; - - if (buf != NULL) { - for ( ; buf != NULL; buf = next) { - next = buf->next; - - pr_debug("%s: free buffer %p, next %p\n", - __func__, buf, buf->next); - - s3c2410_dma_buffdone(chan, buf, S3C2410_RES_ABORT); - s3c2410_dma_freebuf(buf); - } - } - - dbg_showregs(chan); - - s3c2410_dma_waitforstop(chan); - -#if 0 - /* should also clear interrupts, according to WinCE BSP */ - { - unsigned long tmp; - - tmp = dma_rdreg(chan, S3C2410_DMA_DCON); - tmp |= S3C2410_DCON_NORELOAD; - dma_wrreg(chan, S3C2410_DMA_DCON, tmp); - } -#endif - - dbg_showregs(chan); - - local_irq_restore(flags); - - return 0; -} - -static int s3c2410_dma_started(struct s3c2410_dma_chan *chan) -{ - unsigned long flags; - - local_irq_save(flags); - - dbg_showchan(chan); - - /* if we've only loaded one buffer onto the channel, then chec - * to see if we have another, and if so, try and load it so when - * the first buffer is finished, the new one will be loaded onto - * the channel */ - - if (chan->next != NULL) { - if (chan->load_state == S3C2410_DMALOAD_1LOADED) { - - if (s3c2410_dma_waitforload(chan, __LINE__) == 0) { - pr_debug("%s: buff not yet loaded, no more todo\n", - __func__); - } else { - chan->load_state = S3C2410_DMALOAD_1RUNNING; - s3c2410_dma_loadbuffer(chan, chan->next); - } - - } else if (chan->load_state == S3C2410_DMALOAD_1RUNNING) { - s3c2410_dma_loadbuffer(chan, chan->next); - } - } - - - local_irq_restore(flags); - - return 0; - -} - -int -s3c2410_dma_ctrl(enum dma_ch channel, enum s3c2410_chan_op op) -{ - struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel); - - if (chan == NULL) - return -EINVAL; - - switch (op) { - case S3C2410_DMAOP_START: - return s3c2410_dma_start(chan); - - case S3C2410_DMAOP_STOP: - return s3c2410_dma_dostop(chan); - - case S3C2410_DMAOP_PAUSE: - case S3C2410_DMAOP_RESUME: - return -ENOENT; - - case S3C2410_DMAOP_FLUSH: - return s3c2410_dma_flush(chan); - - case S3C2410_DMAOP_STARTED: - return s3c2410_dma_started(chan); - - case S3C2410_DMAOP_TIMEOUT: - return 0; - - } - - return -ENOENT; /* unknown, don't bother */ -} - -EXPORT_SYMBOL(s3c2410_dma_ctrl); - -/* DMA configuration for each channel - * - * DISRCC -> source of the DMA (AHB,APB) - * DISRC -> source address of the DMA - * DIDSTC -> destination of the DMA (AHB,APD) - * DIDST -> destination address of the DMA -*/ - -/* s3c2410_dma_config - * - * xfersize: size of unit in bytes (1,2,4) -*/ - -int s3c2410_dma_config(enum dma_ch channel, - int xferunit) -{ - struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel); - unsigned int dcon; - - pr_debug("%s: chan=%d, xfer_unit=%d\n", __func__, channel, xferunit); - - if (chan == NULL) - return -EINVAL; - - dcon = chan->dcon & dma_sel.dcon_mask; - pr_debug("%s: dcon is %08x\n", __func__, dcon); - - switch (chan->req_ch) { - case DMACH_I2S_IN: - case DMACH_I2S_OUT: - case DMACH_PCM_IN: - case DMACH_PCM_OUT: - case DMACH_MIC_IN: - default: - dcon |= S3C2410_DCON_HANDSHAKE; - dcon |= S3C2410_DCON_SYNC_PCLK; - break; - - case DMACH_SDI: - /* note, ensure if need HANDSHAKE or not */ - dcon |= S3C2410_DCON_SYNC_PCLK; - break; - - case DMACH_XD0: - case DMACH_XD1: - dcon |= S3C2410_DCON_HANDSHAKE; - dcon |= S3C2410_DCON_SYNC_HCLK; - break; - } - - switch (xferunit) { - case 1: - dcon |= S3C2410_DCON_BYTE; - break; - - case 2: - dcon |= S3C2410_DCON_HALFWORD; - break; - - case 4: - dcon |= S3C2410_DCON_WORD; - break; - - default: - pr_debug("%s: bad transfer size %d\n", __func__, xferunit); - return -EINVAL; - } - - dcon |= S3C2410_DCON_HWTRIG; - dcon |= S3C2410_DCON_INTREQ; - - pr_debug("%s: dcon now %08x\n", __func__, dcon); - - chan->dcon = dcon; - chan->xfer_unit = xferunit; - - return 0; -} - -EXPORT_SYMBOL(s3c2410_dma_config); - - -/* s3c2410_dma_devconfig - * - * configure the dma source/destination hardware type and address - * - * source: DMA_FROM_DEVICE: source is hardware - * DMA_TO_DEVICE: source is memory - * - * devaddr: physical address of the source -*/ - -int s3c2410_dma_devconfig(enum dma_ch channel, - enum dma_data_direction source, - unsigned long devaddr) -{ - struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel); - unsigned int hwcfg; - - if (chan == NULL) - return -EINVAL; - - pr_debug("%s: source=%d, devaddr=%08lx\n", - __func__, (int)source, devaddr); - - chan->source = source; - chan->dev_addr = devaddr; - - switch (chan->req_ch) { - case DMACH_XD0: - case DMACH_XD1: - hwcfg = 0; /* AHB */ - break; - - default: - hwcfg = S3C2410_DISRCC_APB; - } - - /* always assume our peripheral desintation is a fixed - * address in memory. */ - hwcfg |= S3C2410_DISRCC_INC; - - switch (source) { - case DMA_FROM_DEVICE: - /* source is hardware */ - pr_debug("%s: hw source, devaddr=%08lx, hwcfg=%d\n", - __func__, devaddr, hwcfg); - dma_wrreg(chan, S3C2410_DMA_DISRCC, hwcfg & 3); - dma_wrreg(chan, S3C2410_DMA_DISRC, devaddr); - dma_wrreg(chan, S3C2410_DMA_DIDSTC, (0<<1) | (0<<0)); - - chan->addr_reg = dma_regaddr(chan, S3C2410_DMA_DIDST); - break; - - case DMA_TO_DEVICE: - /* source is memory */ - pr_debug("%s: mem source, devaddr=%08lx, hwcfg=%d\n", - __func__, devaddr, hwcfg); - dma_wrreg(chan, S3C2410_DMA_DISRCC, (0<<1) | (0<<0)); - dma_wrreg(chan, S3C2410_DMA_DIDST, devaddr); - dma_wrreg(chan, S3C2410_DMA_DIDSTC, hwcfg & 3); - - chan->addr_reg = dma_regaddr(chan, S3C2410_DMA_DISRC); - break; - - default: - printk(KERN_ERR "dma%d: invalid source type (%d)\n", - channel, source); - - return -EINVAL; - } - - return 0; -} - -EXPORT_SYMBOL(s3c2410_dma_devconfig); - -/* s3c2410_dma_getposition - * - * returns the current transfer points for the dma source and destination -*/ - -int s3c2410_dma_getposition(enum dma_ch channel, dma_addr_t *src, dma_addr_t *dst) -{ - struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel); - - if (chan == NULL) - return -EINVAL; - - if (src != NULL) - *src = dma_rdreg(chan, S3C2410_DMA_DCSRC); - - if (dst != NULL) - *dst = dma_rdreg(chan, S3C2410_DMA_DCDST); - - return 0; -} - -EXPORT_SYMBOL(s3c2410_dma_getposition); - -/* system core operations */ - -#ifdef CONFIG_PM - -static void s3c2410_dma_suspend_chan(struct s3c2410_dma_chan *cp) -{ - printk(KERN_DEBUG "suspending dma channel %d\n", cp->number); - - if (dma_rdreg(cp, S3C2410_DMA_DMASKTRIG) & S3C2410_DMASKTRIG_ON) { - /* the dma channel is still working, which is probably - * a bad thing to do over suspend/resume. We stop the - * channel and assume that the client is either going to - * retry after resume, or that it is broken. - */ - - printk(KERN_INFO "dma: stopping channel %d due to suspend\n", - cp->number); - - s3c2410_dma_dostop(cp); - } -} - -static int s3c2410_dma_suspend(void) -{ - struct s3c2410_dma_chan *cp = s3c2410_chans; - int channel; - - for (channel = 0; channel < dma_channels; cp++, channel++) - s3c2410_dma_suspend_chan(cp); - - return 0; -} - -static void s3c2410_dma_resume_chan(struct s3c2410_dma_chan *cp) -{ - unsigned int no = cp->number | DMACH_LOW_LEVEL; - - /* restore channel's hardware configuration */ - - if (!cp->in_use) - return; - - printk(KERN_INFO "dma%d: restoring configuration\n", cp->number); - - s3c2410_dma_config(no, cp->xfer_unit); - s3c2410_dma_devconfig(no, cp->source, cp->dev_addr); - - /* re-select the dma source for this channel */ - - if (cp->map != NULL) - dma_sel.select(cp, cp->map); -} - -static void s3c2410_dma_resume(void) -{ - struct s3c2410_dma_chan *cp = s3c2410_chans + dma_channels - 1; - int channel; - - for (channel = dma_channels - 1; channel >= 0; cp--, channel--) - s3c2410_dma_resume_chan(cp); -} - -#else -#define s3c2410_dma_suspend NULL -#define s3c2410_dma_resume NULL -#endif /* CONFIG_PM */ - -struct syscore_ops dma_syscore_ops = { - .suspend = s3c2410_dma_suspend, - .resume = s3c2410_dma_resume, -}; - -/* kmem cache implementation */ - -static void s3c2410_dma_cache_ctor(void *p) -{ - memset(p, 0, sizeof(struct s3c2410_dma_buf)); -} - -/* initialisation code */ - -static int __init s3c24xx_dma_syscore_init(void) -{ - register_syscore_ops(&dma_syscore_ops); - - return 0; -} - -late_initcall(s3c24xx_dma_syscore_init); - -int __init s3c24xx_dma_init(unsigned int channels, unsigned int irq, - unsigned int stride) -{ - struct s3c2410_dma_chan *cp; - int channel; - int ret; - - printk("S3C24XX DMA Driver, Copyright 2003-2006 Simtec Electronics\n"); - - dma_channels = channels; - - dma_base = ioremap(S3C24XX_PA_DMA, stride * channels); - if (dma_base == NULL) { - printk(KERN_ERR "dma failed to remap register block\n"); - return -ENOMEM; - } - - dma_kmem = kmem_cache_create("dma_desc", - sizeof(struct s3c2410_dma_buf), 0, - SLAB_HWCACHE_ALIGN, - s3c2410_dma_cache_ctor); - - if (dma_kmem == NULL) { - printk(KERN_ERR "dma failed to make kmem cache\n"); - ret = -ENOMEM; - goto err; - } - - for (channel = 0; channel < channels; channel++) { - cp = &s3c2410_chans[channel]; - - memset(cp, 0, sizeof(struct s3c2410_dma_chan)); - - /* dma channel irqs are in order.. */ - cp->number = channel; - cp->irq = channel + irq; - cp->regs = dma_base + (channel * stride); - - /* point current stats somewhere */ - cp->stats = &cp->stats_store; - cp->stats_store.timeout_shortest = LONG_MAX; - - /* basic channel configuration */ - - cp->load_timeout = 1<<18; - - printk("DMA channel %d at %p, irq %d\n", - cp->number, cp->regs, cp->irq); - } - - return 0; - - err: - kmem_cache_destroy(dma_kmem); - iounmap(dma_base); - dma_base = NULL; - return ret; -} - -int __init s3c2410_dma_init(void) -{ - return s3c24xx_dma_init(4, IRQ_DMA0, 0x40); -} - -static inline int is_channel_valid(unsigned int channel) -{ - return (channel & DMA_CH_VALID); -} - -static struct s3c24xx_dma_order *dma_order; - - -/* s3c2410_dma_map_channel() - * - * turn the virtual channel number into a real, and un-used hardware - * channel. - * - * first, try the dma ordering given to us by either the relevant - * dma code, or the board. Then just find the first usable free - * channel -*/ - -static struct s3c2410_dma_chan *s3c2410_dma_map_channel(int channel) -{ - struct s3c24xx_dma_order_ch *ord = NULL; - struct s3c24xx_dma_map *ch_map; - struct s3c2410_dma_chan *dmach; - int ch; - - if (dma_sel.map == NULL || channel > dma_sel.map_size) - return NULL; - - ch_map = dma_sel.map + channel; - - /* first, try the board mapping */ - - if (dma_order) { - ord = &dma_order->channels[channel]; - - for (ch = 0; ch < dma_channels; ch++) { - int tmp; - if (!is_channel_valid(ord->list[ch])) - continue; - - tmp = ord->list[ch] & ~DMA_CH_VALID; - if (s3c2410_chans[tmp].in_use == 0) { - ch = tmp; - goto found; - } - } - - if (ord->flags & DMA_CH_NEVER) - return NULL; - } - - /* second, search the channel map for first free */ - - for (ch = 0; ch < dma_channels; ch++) { - if (!is_channel_valid(ch_map->channels[ch])) - continue; - - if (s3c2410_chans[ch].in_use == 0) { - printk("mapped channel %d to %d\n", channel, ch); - break; - } - } - - if (ch >= dma_channels) - return NULL; - - /* update our channel mapping */ - - found: - dmach = &s3c2410_chans[ch]; - dmach->map = ch_map; - dmach->req_ch = channel; - s3c_dma_chan_map[channel] = dmach; - - /* select the channel */ - - (dma_sel.select)(dmach, ch_map); - - return dmach; -} - -static int s3c24xx_dma_check_entry(struct s3c24xx_dma_map *map, int ch) -{ - return 0; -} - -int __init s3c24xx_dma_init_map(struct s3c24xx_dma_selection *sel) -{ - struct s3c24xx_dma_map *nmap; - size_t map_sz = sizeof(*nmap) * sel->map_size; - int ptr; - - nmap = kmemdup(sel->map, map_sz, GFP_KERNEL); - if (nmap == NULL) - return -ENOMEM; - - memcpy(&dma_sel, sel, sizeof(*sel)); - - dma_sel.map = nmap; - - for (ptr = 0; ptr < sel->map_size; ptr++) - s3c24xx_dma_check_entry(nmap+ptr, ptr); - - return 0; -} - -int __init s3c24xx_dma_order_set(struct s3c24xx_dma_order *ord) -{ - struct s3c24xx_dma_order *nord = dma_order; - - if (nord == NULL) - nord = kmalloc(sizeof(struct s3c24xx_dma_order), GFP_KERNEL); - - if (nord == NULL) { - printk(KERN_ERR "no memory to store dma channel order\n"); - return -ENOMEM; - } - - dma_order = nord; - memcpy(nord, ord, sizeof(struct s3c24xx_dma_order)); - return 0; -} diff --git a/arch/arm/mach-s3c24xx/include/mach/dma.h b/arch/arm/mach-s3c24xx/include/mach/dma.h index b55da1d8cd8f..9e8117198e0c 100644 --- a/arch/arm/mach-s3c24xx/include/mach/dma.h +++ b/arch/arm/mach-s3c24xx/include/mach/dma.h @@ -15,8 +15,6 @@ #include <linux/device.h> -#define MAX_DMA_TRANSFER_SIZE 0x100000 /* Data Unit is half word */ - /* We use `virtual` dma channels to hide the fact we have only a limited * number of DMA channels, and not of all of them (dependent on the device) * can be attached to any DMA source. We therefore let the DMA core handle @@ -54,161 +52,4 @@ enum dma_ch { DMACH_MAX, /* the end entry */ }; -static inline bool samsung_dma_has_circular(void) -{ - return false; -} - -static inline bool samsung_dma_is_dmadev(void) -{ - return false; -} - -#include <plat/dma.h> - -#define DMACH_LOW_LEVEL (1<<28) /* use this to specifiy hardware ch no */ - -/* we have 4 dma channels */ -#if !defined(CONFIG_CPU_S3C2443) && !defined(CONFIG_CPU_S3C2416) -#define S3C_DMA_CHANNELS (4) -#else -#define S3C_DMA_CHANNELS (6) -#endif - -/* types */ - -enum s3c2410_dma_state { - S3C2410_DMA_IDLE, - S3C2410_DMA_RUNNING, - S3C2410_DMA_PAUSED -}; - -/* enum s3c2410_dma_loadst - * - * This represents the state of the DMA engine, wrt to the loaded / running - * transfers. Since we don't have any way of knowing exactly the state of - * the DMA transfers, we need to know the state to make decisions on whether - * we can - * - * S3C2410_DMA_NONE - * - * There are no buffers loaded (the channel should be inactive) - * - * S3C2410_DMA_1LOADED - * - * There is one buffer loaded, however it has not been confirmed to be - * loaded by the DMA engine. This may be because the channel is not - * yet running, or the DMA driver decided that it was too costly to - * sit and wait for it to happen. - * - * S3C2410_DMA_1RUNNING - * - * The buffer has been confirmed running, and not finisged - * - * S3C2410_DMA_1LOADED_1RUNNING - * - * There is a buffer waiting to be loaded by the DMA engine, and one - * currently running. -*/ - -enum s3c2410_dma_loadst { - S3C2410_DMALOAD_NONE, - S3C2410_DMALOAD_1LOADED, - S3C2410_DMALOAD_1RUNNING, - S3C2410_DMALOAD_1LOADED_1RUNNING, -}; - - -/* flags */ - -#define S3C2410_DMAF_SLOW (1<<0) /* slow, so don't worry about - * waiting for reloads */ -#define S3C2410_DMAF_AUTOSTART (1<<1) /* auto-start if buffer queued */ - -#define S3C2410_DMAF_CIRCULAR (1 << 2) /* no circular dma support */ - -/* dma buffer */ - -struct s3c2410_dma_buf; - -/* s3c2410_dma_buf - * - * internally used buffer structure to describe a queued or running - * buffer. -*/ - -struct s3c2410_dma_buf { - struct s3c2410_dma_buf *next; - int magic; /* magic */ - int size; /* buffer size in bytes */ - dma_addr_t data; /* start of DMA data */ - dma_addr_t ptr; /* where the DMA got to [1] */ - void *id; /* client's id */ -}; - -/* [1] is this updated for both recv/send modes? */ - -struct s3c2410_dma_stats { - unsigned long loads; - unsigned long timeout_longest; - unsigned long timeout_shortest; - unsigned long timeout_avg; - unsigned long timeout_failed; -}; - -struct s3c2410_dma_map; - -/* struct s3c2410_dma_chan - * - * full state information for each DMA channel -*/ - -struct s3c2410_dma_chan { - /* channel state flags and information */ - unsigned char number; /* number of this dma channel */ - unsigned char in_use; /* channel allocated */ - unsigned char irq_claimed; /* irq claimed for channel */ - unsigned char irq_enabled; /* irq enabled for channel */ - unsigned char xfer_unit; /* size of an transfer */ - - /* channel state */ - - enum s3c2410_dma_state state; - enum s3c2410_dma_loadst load_state; - struct s3c2410_dma_client *client; - - /* channel configuration */ - enum dma_data_direction source; - enum dma_ch req_ch; - unsigned long dev_addr; - unsigned long load_timeout; - unsigned int flags; /* channel flags */ - - struct s3c24xx_dma_map *map; /* channel hw maps */ - - /* channel's hardware position and configuration */ - void __iomem *regs; /* channels registers */ - void __iomem *addr_reg; /* data address register */ - unsigned int irq; /* channel irq */ - unsigned long dcon; /* default value of DCON */ - - /* driver handles */ - s3c2410_dma_cbfn_t callback_fn; /* buffer done callback */ - s3c2410_dma_opfn_t op_fn; /* channel op callback */ - - /* stats gathering */ - struct s3c2410_dma_stats *stats; - struct s3c2410_dma_stats stats_store; - - /* buffer list and information */ - struct s3c2410_dma_buf *curr; /* current dma buffer */ - struct s3c2410_dma_buf *next; /* next buffer to load */ - struct s3c2410_dma_buf *end; /* end of queue */ - - /* system device */ - struct device dev; -}; - -typedef unsigned long dma_device_t; - #endif /* __ASM_ARCH_DMA_H */ diff --git a/arch/arm/mach-s3c64xx/include/mach/dma.h b/arch/arm/mach-s3c64xx/include/mach/dma.h index 059b1fc85037..096e14073bd9 100644 --- a/arch/arm/mach-s3c64xx/include/mach/dma.h +++ b/arch/arm/mach-s3c64xx/include/mach/dma.h @@ -51,21 +51,6 @@ enum dma_ch { DMACH_MAX = 32 }; -struct s3c2410_dma_client { - char *name; -}; - -static inline bool samsung_dma_has_circular(void) -{ - return true; -} - -static inline bool samsung_dma_is_dmadev(void) -{ - return true; -} - #include <linux/amba/pl08x.h> -#include <plat/dma-ops.h> #endif /* __ASM_ARCH_IRQ_H */ diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig index 1b4fafe524ff..bb3d07504d8b 100644 --- a/arch/arm/mach-shmobile/Kconfig +++ b/arch/arm/mach-shmobile/Kconfig @@ -74,11 +74,6 @@ config ARCH_R8A7794 comment "Renesas ARM SoCs Board Type" -config MACH_LAGER - bool "Lager board" - depends on ARCH_R8A7790 - select MICREL_PHY if SH_ETH - config MACH_MARZEN bool "MARZEN board" depends on ARCH_R8A7779 @@ -133,14 +128,6 @@ config ARCH_R8A7779 select ARCH_WANT_OPTIONAL_GPIOLIB select ARM_GIC -config ARCH_R8A7790 - bool "R-Car H2 (R8A77900)" - select ARCH_RCAR_GEN2 - select ARCH_WANT_OPTIONAL_GPIOLIB - select ARM_GIC - select MIGHT_HAVE_PCI - select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE - comment "Renesas ARM SoCs Board Type" config MACH_APE6EVM @@ -208,13 +195,6 @@ config MACH_MARZEN select REGULATOR_FIXED_VOLTAGE if REGULATOR select USE_OF -config MACH_LAGER - bool "Lager board" - depends on ARCH_R8A7790 - select USE_OF - select MICREL_PHY if SH_ETH - select SND_SOC_AK4642 if SND_SIMPLE_CARD - config MACH_KZM9G bool "KZM-A9-GT board" depends on ARCH_SH73A0 diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile index b55cac0e5b2b..d53996e6da97 100644 --- a/arch/arm/mach-shmobile/Makefile +++ b/arch/arm/mach-shmobile/Makefile @@ -27,7 +27,6 @@ obj-$(CONFIG_ARCH_R8A73A4) += clock-r8a73a4.o obj-$(CONFIG_ARCH_R8A7740) += clock-r8a7740.o obj-$(CONFIG_ARCH_R8A7778) += clock-r8a7778.o obj-$(CONFIG_ARCH_R8A7779) += clock-r8a7779.o -obj-$(CONFIG_ARCH_R8A7790) += clock-r8a7790.o endif # CPU reset vector handling objects @@ -57,7 +56,6 @@ obj-$(CONFIG_ARCH_SH7372) += entry-intc.o sleep-sh7372.o # Board objects ifdef CONFIG_ARCH_SHMOBILE_MULTI -obj-$(CONFIG_MACH_LAGER) += board-lager-reference.o obj-$(CONFIG_MACH_MARZEN) += board-marzen-reference.o else obj-$(CONFIG_MACH_APE6EVM) += board-ape6evm.o @@ -66,7 +64,6 @@ obj-$(CONFIG_MACH_MACKEREL) += board-mackerel.o obj-$(CONFIG_MACH_BOCKW) += board-bockw.o obj-$(CONFIG_MACH_BOCKW_REFERENCE) += board-bockw-reference.o obj-$(CONFIG_MACH_MARZEN) += board-marzen.o -obj-$(CONFIG_MACH_LAGER) += board-lager.o obj-$(CONFIG_MACH_ARMADILLO800EVA) += board-armadillo800eva.o obj-$(CONFIG_MACH_KZM9G) += board-kzm9g.o obj-$(CONFIG_MACH_KZM9G_REFERENCE) += board-kzm9g-reference.o diff --git a/arch/arm/mach-shmobile/Makefile.boot b/arch/arm/mach-shmobile/Makefile.boot index 57d00ed6ec0c..02532bea5300 100644 --- a/arch/arm/mach-shmobile/Makefile.boot +++ b/arch/arm/mach-shmobile/Makefile.boot @@ -7,7 +7,6 @@ loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000 loadaddr-$(CONFIG_MACH_BOCKW_REFERENCE) += 0x60008000 loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000 loadaddr-$(CONFIG_MACH_KZM9G_REFERENCE) += 0x41008000 -loadaddr-$(CONFIG_MACH_LAGER) += 0x40008000 loadaddr-$(CONFIG_MACH_MACKEREL) += 0x40008000 loadaddr-$(CONFIG_MACH_MARZEN) += 0x60008000 diff --git a/arch/arm/mach-shmobile/board-lager-reference.c b/arch/arm/mach-shmobile/board-lager-reference.c deleted file mode 100644 index fa06bdba61df..000000000000 --- a/arch/arm/mach-shmobile/board-lager-reference.c +++ /dev/null @@ -1,39 +0,0 @@ -/* - * Lager board support - Reference DT implementation - * - * Copyright (C) 2013 Renesas Solutions Corp. - * Copyright (C) 2013 Simon Horman - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <linux/init.h> -#include <linux/of_platform.h> - -#include <asm/mach/arch.h> - -#include "common.h" -#include "r8a7790.h" -#include "rcar-gen2.h" - -static const char *lager_boards_compat_dt[] __initdata = { - "renesas,lager", - "renesas,lager-reference", - NULL, -}; - -DT_MACHINE_START(LAGER_DT, "lager") - .smp = smp_ops(r8a7790_smp_ops), - .init_early = shmobile_init_delay, - .init_time = rcar_gen2_timer_init, - .init_late = shmobile_init_late, - .reserve = rcar_gen2_reserve, - .dt_compat = lager_boards_compat_dt, -MACHINE_END diff --git a/arch/arm/mach-shmobile/board-lager.c b/arch/arm/mach-shmobile/board-lager.c deleted file mode 100644 index 65b128dd4072..000000000000 --- a/arch/arm/mach-shmobile/board-lager.c +++ /dev/null @@ -1,840 +0,0 @@ -/* - * Lager board support - * - * Copyright (C) 2013-2014 Renesas Solutions Corp. - * Copyright (C) 2013 Magnus Damm - * Copyright (C) 2014 Cogent Embedded, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <linux/gpio.h> -#include <linux/gpio_keys.h> -#include <linux/i2c.h> -#include <linux/input.h> -#include <linux/interrupt.h> -#include <linux/irq.h> -#include <linux/irqchip.h> -#include <linux/irqchip/arm-gic.h> -#include <linux/kernel.h> -#include <linux/leds.h> -#include <linux/mfd/tmio.h> -#include <linux/mmc/host.h> -#include <linux/mmc/sh_mmcif.h> -#include <linux/mmc/sh_mobile_sdhi.h> -#include <linux/mtd/partitions.h> -#include <linux/mtd/mtd.h> -#include <linux/pinctrl/machine.h> -#include <linux/platform_data/camera-rcar.h> -#include <linux/platform_data/gpio-rcar.h> -#include <linux/platform_data/usb-rcar-gen2-phy.h> -#include <linux/platform_device.h> -#include <linux/phy.h> -#include <linux/regulator/driver.h> -#include <linux/regulator/fixed.h> -#include <linux/regulator/gpio-regulator.h> -#include <linux/regulator/machine.h> -#include <linux/sh_eth.h> -#include <linux/spi/flash.h> -#include <linux/spi/rspi.h> -#include <linux/spi/spi.h> -#include <linux/usb/phy.h> -#include <linux/usb/renesas_usbhs.h> - -#include <media/soc_camera.h> -#include <asm/mach-types.h> -#include <asm/mach/arch.h> -#include <sound/rcar_snd.h> -#include <sound/simple_card.h> - -#include "common.h" -#include "irqs.h" -#include "r8a7790.h" -#include "rcar-gen2.h" - -/* - * SSI-AK4643 - * - * SW1: 1: AK4643 - * 2: CN22 - * 3: ADV7511 - * - * this command is required when playback. - * - * # amixer set "LINEOUT Mixer DACL" on - */ - -/* - * SDHI0 (CN8) - * - * JP3: pin1 - * SW20: pin1 - - * GP5_24: 1: VDD 3.3V (defult) - * 0: VDD 0.0V - * GP5_29: 1: VccQ 3.3V (defult) - * 0: VccQ 1.8V - * - */ - -/* LEDS */ -static struct gpio_led lager_leds[] = { - { - .name = "led8", - .gpio = RCAR_GP_PIN(5, 17), - .default_state = LEDS_GPIO_DEFSTATE_ON, - }, { - .name = "led7", - .gpio = RCAR_GP_PIN(4, 23), - .default_state = LEDS_GPIO_DEFSTATE_ON, - }, { - .name = "led6", - .gpio = RCAR_GP_PIN(4, 22), - .default_state = LEDS_GPIO_DEFSTATE_ON, - }, -}; - -static const struct gpio_led_platform_data lager_leds_pdata __initconst = { - .leds = lager_leds, - .num_leds = ARRAY_SIZE(lager_leds), -}; - -/* GPIO KEY */ -#define GPIO_KEY(c, g, d, ...) \ - { .code = c, .gpio = g, .desc = d, .active_low = 1, \ - .wakeup = 1, .debounce_interval = 20 } - -static struct gpio_keys_button gpio_buttons[] = { - GPIO_KEY(KEY_4, RCAR_GP_PIN(1, 28), "SW2-pin4"), - GPIO_KEY(KEY_3, RCAR_GP_PIN(1, 26), "SW2-pin3"), - GPIO_KEY(KEY_2, RCAR_GP_PIN(1, 24), "SW2-pin2"), - GPIO_KEY(KEY_1, RCAR_GP_PIN(1, 14), "SW2-pin1"), -}; - -static const struct gpio_keys_platform_data lager_keys_pdata __initconst = { - .buttons = gpio_buttons, - .nbuttons = ARRAY_SIZE(gpio_buttons), -}; - -/* Fixed 3.3V regulator to be used by MMCIF */ -static struct regulator_consumer_supply fixed3v3_power_consumers[] = -{ - REGULATOR_SUPPLY("vmmc", "sh_mmcif.1"), -}; - -/* - * SDHI regulator macro - * - ** FIXME** - * Lager board vqmmc is provided via DA9063 PMIC chip, - * and we should use ${LINK}/drivers/mfd/da9063-* driver for it. - * but, it doesn't have regulator support at this point. - * It uses gpio-regulator for vqmmc as quick-hack. - */ -#define SDHI_REGULATOR(idx, vdd_pin, vccq_pin) \ -static struct regulator_consumer_supply vcc_sdhi##idx##_consumer = \ - REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi." #idx); \ - \ -static struct regulator_init_data vcc_sdhi##idx##_init_data = { \ - .constraints = { \ - .valid_ops_mask = REGULATOR_CHANGE_STATUS, \ - }, \ - .consumer_supplies = &vcc_sdhi##idx##_consumer, \ - .num_consumer_supplies = 1, \ -}; \ - \ -static const struct fixed_voltage_config vcc_sdhi##idx##_info __initconst = {\ - .supply_name = "SDHI" #idx "Vcc", \ - .microvolts = 3300000, \ - .gpio = vdd_pin, \ - .enable_high = 1, \ - .init_data = &vcc_sdhi##idx##_init_data, \ -}; \ - \ -static struct regulator_consumer_supply vccq_sdhi##idx##_consumer = \ - REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi." #idx); \ - \ -static struct regulator_init_data vccq_sdhi##idx##_init_data = { \ - .constraints = { \ - .input_uV = 3300000, \ - .min_uV = 1800000, \ - .max_uV = 3300000, \ - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | \ - REGULATOR_CHANGE_STATUS, \ - }, \ - .consumer_supplies = &vccq_sdhi##idx##_consumer, \ - .num_consumer_supplies = 1, \ -}; \ - \ -static struct gpio vccq_sdhi##idx##_gpio = \ - { vccq_pin, GPIOF_OUT_INIT_HIGH, "vccq-sdhi" #idx }; \ - \ -static struct gpio_regulator_state vccq_sdhi##idx##_states[] = { \ - { .value = 1800000, .gpios = 0 }, \ - { .value = 3300000, .gpios = 1 }, \ -}; \ - \ -static const struct gpio_regulator_config vccq_sdhi##idx##_info __initconst = {\ - .supply_name = "vqmmc", \ - .gpios = &vccq_sdhi##idx##_gpio, \ - .nr_gpios = 1, \ - .states = vccq_sdhi##idx##_states, \ - .nr_states = ARRAY_SIZE(vccq_sdhi##idx##_states), \ - .type = REGULATOR_VOLTAGE, \ - .init_data = &vccq_sdhi##idx##_init_data, \ -}; - -SDHI_REGULATOR(0, RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 29)); -SDHI_REGULATOR(2, RCAR_GP_PIN(5, 25), RCAR_GP_PIN(5, 30)); - -/* MMCIF */ -static const struct sh_mmcif_plat_data mmcif1_pdata __initconst = { - .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE, - .clk_ctrl2_present = true, - .ccs_unsupported = true, -}; - -static const struct resource mmcif1_resources[] __initconst = { - DEFINE_RES_MEM(0xee220000, 0x80), - DEFINE_RES_IRQ(gic_spi(170)), -}; - -/* Ether */ -static const struct sh_eth_plat_data ether_pdata __initconst = { - .phy = 0x1, - .phy_irq = irq_pin(0), - .edmac_endian = EDMAC_LITTLE_ENDIAN, - .phy_interface = PHY_INTERFACE_MODE_RMII, - .ether_link_active_low = 1, -}; - -static const struct resource ether_resources[] __initconst = { - DEFINE_RES_MEM(0xee700000, 0x400), - DEFINE_RES_IRQ(gic_spi(162)), -}; - -static const struct platform_device_info ether_info __initconst = { - .name = "r8a7790-ether", - .id = -1, - .res = ether_resources, - .num_res = ARRAY_SIZE(ether_resources), - .data = ðer_pdata, - .size_data = sizeof(ether_pdata), - .dma_mask = DMA_BIT_MASK(32), -}; - -/* SPI Flash memory (Spansion S25FL512SAGMFIG11 64Mb) */ -static struct mtd_partition spi_flash_part[] = { - /* Reserved for user loader program, read-only */ - { - .name = "loader", - .offset = 0, - .size = SZ_256K, - .mask_flags = MTD_WRITEABLE, - }, - /* Reserved for user program, read-only */ - { - .name = "user", - .offset = MTDPART_OFS_APPEND, - .size = SZ_4M, - .mask_flags = MTD_WRITEABLE, - }, - /* All else is writable (e.g. JFFS2) */ - { - .name = "flash", - .offset = MTDPART_OFS_APPEND, - .size = MTDPART_SIZ_FULL, - .mask_flags = 0, - }, -}; - -static const struct flash_platform_data spi_flash_data = { - .name = "m25p80", - .parts = spi_flash_part, - .nr_parts = ARRAY_SIZE(spi_flash_part), - .type = "s25fl512s", -}; - -static const struct rspi_plat_data qspi_pdata __initconst = { - .num_chipselect = 1, -}; - -static const struct spi_board_info spi_info[] __initconst = { - { - .modalias = "m25p80", - .platform_data = &spi_flash_data, - .mode = SPI_MODE_0 | SPI_TX_QUAD | SPI_RX_QUAD, - .max_speed_hz = 30000000, - .bus_num = 0, - .chip_select = 0, - }, -}; - -/* QSPI resource */ -static const struct resource qspi_resources[] __initconst = { - DEFINE_RES_MEM(0xe6b10000, 0x1000), - DEFINE_RES_IRQ_NAMED(gic_spi(184), "mux"), -}; - -/* VIN */ -static const struct resource vin_resources[] __initconst = { - /* VIN0 */ - DEFINE_RES_MEM(0xe6ef0000, 0x1000), - DEFINE_RES_IRQ(gic_spi(188)), - /* VIN1 */ - DEFINE_RES_MEM(0xe6ef1000, 0x1000), - DEFINE_RES_IRQ(gic_spi(189)), -}; - -static void __init lager_add_vin_device(unsigned idx, - struct rcar_vin_platform_data *pdata) -{ - struct platform_device_info vin_info = { - .name = "r8a7790-vin", - .id = idx, - .res = &vin_resources[idx * 2], - .num_res = 2, - .dma_mask = DMA_BIT_MASK(32), - .data = pdata, - .size_data = sizeof(*pdata), - }; - - BUG_ON(idx > 1); - - platform_device_register_full(&vin_info); -} - -#define LAGER_CAMERA(idx, name, addr, pdata, flag) \ -static struct i2c_board_info i2c_cam##idx##_device = { \ - I2C_BOARD_INFO(name, addr), \ -}; \ - \ -static struct rcar_vin_platform_data vin##idx##_pdata = { \ - .flags = flag, \ -}; \ - \ -static struct soc_camera_link cam##idx##_link = { \ - .bus_id = idx, \ - .board_info = &i2c_cam##idx##_device, \ - .i2c_adapter_id = 2, \ - .module_name = name, \ - .priv = pdata, \ -} - -/* Camera 0 is not currently supported due to adv7612 support missing */ -LAGER_CAMERA(1, "adv7180", 0x20, NULL, RCAR_VIN_BT656); - -static void __init lager_add_camera1_device(void) -{ - platform_device_register_data(NULL, "soc-camera-pdrv", 1, - &cam1_link, sizeof(cam1_link)); - lager_add_vin_device(1, &vin1_pdata); -} - -/* SATA1 */ -static const struct resource sata1_resources[] __initconst = { - DEFINE_RES_MEM(0xee500000, 0x2000), - DEFINE_RES_IRQ(gic_spi(106)), -}; - -static const struct platform_device_info sata1_info __initconst = { - .name = "sata-r8a7790", - .id = 1, - .res = sata1_resources, - .num_res = ARRAY_SIZE(sata1_resources), - .dma_mask = DMA_BIT_MASK(32), -}; - -/* USBHS */ -static const struct resource usbhs_resources[] __initconst = { - DEFINE_RES_MEM(0xe6590000, 0x100), - DEFINE_RES_IRQ(gic_spi(107)), -}; - -struct usbhs_private { - struct renesas_usbhs_platform_info info; - struct usb_phy *phy; -}; - -#define usbhs_get_priv(pdev) \ - container_of(renesas_usbhs_get_info(pdev), struct usbhs_private, info) - -static int usbhs_power_ctrl(struct platform_device *pdev, - void __iomem *base, int enable) -{ - struct usbhs_private *priv = usbhs_get_priv(pdev); - - if (!priv->phy) - return -ENODEV; - - if (enable) { - int retval = usb_phy_init(priv->phy); - - if (!retval) - retval = usb_phy_set_suspend(priv->phy, 0); - return retval; - } - - usb_phy_set_suspend(priv->phy, 1); - usb_phy_shutdown(priv->phy); - return 0; -} - -static int usbhs_hardware_init(struct platform_device *pdev) -{ - struct usbhs_private *priv = usbhs_get_priv(pdev); - struct usb_phy *phy; - int ret; - - /* USB0 Function - use PWEN as GPIO input to detect DIP Switch SW5 - * setting to avoid VBUS short circuit due to wrong cable. - * PWEN should be pulled up high if USB Function is selected by SW5 - */ - gpio_request_one(RCAR_GP_PIN(5, 18), GPIOF_IN, NULL); /* USB0_PWEN */ - if (!gpio_get_value(RCAR_GP_PIN(5, 18))) { - pr_warn("Error: USB Function not selected - check SW5 + SW6\n"); - ret = -ENOTSUPP; - goto error; - } - - phy = usb_get_phy_dev(&pdev->dev, 0); - if (IS_ERR(phy)) { - ret = PTR_ERR(phy); - goto error; - } - - priv->phy = phy; - return 0; - error: - gpio_free(RCAR_GP_PIN(5, 18)); - return ret; -} - -static int usbhs_hardware_exit(struct platform_device *pdev) -{ - struct usbhs_private *priv = usbhs_get_priv(pdev); - - if (!priv->phy) - return 0; - - usb_put_phy(priv->phy); - priv->phy = NULL; - - gpio_free(RCAR_GP_PIN(5, 18)); - return 0; -} - -static int usbhs_get_id(struct platform_device *pdev) -{ - return USBHS_GADGET; -} - -static u32 lager_usbhs_pipe_type[] = { - USB_ENDPOINT_XFER_CONTROL, - USB_ENDPOINT_XFER_ISOC, - USB_ENDPOINT_XFER_ISOC, - USB_ENDPOINT_XFER_BULK, - USB_ENDPOINT_XFER_BULK, - USB_ENDPOINT_XFER_BULK, - USB_ENDPOINT_XFER_INT, - USB_ENDPOINT_XFER_INT, - USB_ENDPOINT_XFER_INT, - USB_ENDPOINT_XFER_BULK, - USB_ENDPOINT_XFER_BULK, - USB_ENDPOINT_XFER_BULK, - USB_ENDPOINT_XFER_BULK, - USB_ENDPOINT_XFER_BULK, - USB_ENDPOINT_XFER_BULK, - USB_ENDPOINT_XFER_BULK, -}; - -static struct usbhs_private usbhs_priv __initdata = { - .info = { - .platform_callback = { - .power_ctrl = usbhs_power_ctrl, - .hardware_init = usbhs_hardware_init, - .hardware_exit = usbhs_hardware_exit, - .get_id = usbhs_get_id, - }, - .driver_param = { - .buswait_bwait = 4, - .pipe_type = lager_usbhs_pipe_type, - .pipe_size = ARRAY_SIZE(lager_usbhs_pipe_type), - }, - } -}; - -static void __init lager_register_usbhs(void) -{ - usb_bind_phy("renesas_usbhs", 0, "usb_phy_rcar_gen2"); - platform_device_register_resndata(NULL, - "renesas_usbhs", -1, - usbhs_resources, - ARRAY_SIZE(usbhs_resources), - &usbhs_priv.info, - sizeof(usbhs_priv.info)); -} - -/* USBHS PHY */ -static const struct rcar_gen2_phy_platform_data usbhs_phy_pdata __initconst = { - .chan0_pci = 0, /* Channel 0 is USBHS */ - .chan2_pci = 1, /* Channel 2 is PCI USB */ -}; - -static const struct resource usbhs_phy_resources[] __initconst = { - DEFINE_RES_MEM(0xe6590100, 0x100), -}; - -/* I2C */ -static struct i2c_board_info i2c2_devices[] = { - { - I2C_BOARD_INFO("ak4643", 0x12), - } -}; - -/* Sound */ -static struct resource rsnd_resources[] __initdata = { - [RSND_GEN2_SCU] = DEFINE_RES_MEM(0xec500000, 0x1000), - [RSND_GEN2_ADG] = DEFINE_RES_MEM(0xec5a0000, 0x100), - [RSND_GEN2_SSIU] = DEFINE_RES_MEM(0xec540000, 0x1000), - [RSND_GEN2_SSI] = DEFINE_RES_MEM(0xec541000, 0x1280), -}; - -static struct rsnd_ssi_platform_info rsnd_ssi[] = { - RSND_SSI(0, gic_spi(370), 0), - RSND_SSI(0, gic_spi(371), RSND_SSI_CLK_PIN_SHARE), -}; - -static struct rsnd_src_platform_info rsnd_src[2] = { - /* no member at this point */ -}; - -static struct rsnd_dai_platform_info rsnd_dai = { - .playback = { .ssi = &rsnd_ssi[0], }, - .capture = { .ssi = &rsnd_ssi[1], }, -}; - -static struct rcar_snd_info rsnd_info = { - .flags = RSND_GEN2, - .ssi_info = rsnd_ssi, - .ssi_info_nr = ARRAY_SIZE(rsnd_ssi), - .src_info = rsnd_src, - .src_info_nr = ARRAY_SIZE(rsnd_src), - .dai_info = &rsnd_dai, - .dai_info_nr = 1, -}; - -static struct asoc_simple_card_info rsnd_card_info = { - .name = "AK4643", - .card = "SSI01-AK4643", - .codec = "ak4642-codec.2-0012", - .platform = "rcar_sound", - .daifmt = SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_CBM_CFM, - .cpu_dai = { - .name = "rcar_sound", - }, - .codec_dai = { - .name = "ak4642-hifi", - .sysclk = 11289600, - }, -}; - -static void __init lager_add_rsnd_device(void) -{ - struct platform_device_info cardinfo = { - .name = "asoc-simple-card", - .id = -1, - .data = &rsnd_card_info, - .size_data = sizeof(struct asoc_simple_card_info), - .dma_mask = DMA_BIT_MASK(32), - }; - - i2c_register_board_info(2, i2c2_devices, - ARRAY_SIZE(i2c2_devices)); - - platform_device_register_resndata( - NULL, "rcar_sound", -1, - rsnd_resources, ARRAY_SIZE(rsnd_resources), - &rsnd_info, sizeof(rsnd_info)); - - platform_device_register_full(&cardinfo); -} - -/* SDHI0 */ -static struct sh_mobile_sdhi_info sdhi0_info __initdata = { - .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ | - MMC_CAP_POWER_OFF_CARD, - .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | - TMIO_MMC_WRPROTECT_DISABLE, -}; - -static struct resource sdhi0_resources[] __initdata = { - DEFINE_RES_MEM(0xee100000, 0x200), - DEFINE_RES_IRQ(gic_spi(165)), -}; - -/* SDHI2 */ -static struct sh_mobile_sdhi_info sdhi2_info __initdata = { - .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ | - MMC_CAP_POWER_OFF_CARD, - .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | - TMIO_MMC_WRPROTECT_DISABLE, -}; - -static struct resource sdhi2_resources[] __initdata = { - DEFINE_RES_MEM(0xee140000, 0x100), - DEFINE_RES_IRQ(gic_spi(167)), -}; - -/* Internal PCI1 */ -static const struct resource pci1_resources[] __initconst = { - DEFINE_RES_MEM(0xee0b0000, 0x10000), /* CFG */ - DEFINE_RES_MEM(0xee0a0000, 0x10000), /* MEM */ - DEFINE_RES_IRQ(gic_spi(112)), -}; - -static const struct platform_device_info pci1_info __initconst = { - .name = "pci-rcar-gen2", - .id = 1, - .res = pci1_resources, - .num_res = ARRAY_SIZE(pci1_resources), - .dma_mask = DMA_BIT_MASK(32), -}; - -static void __init lager_add_usb1_device(void) -{ - platform_device_register_full(&pci1_info); -} - -/* Internal PCI2 */ -static const struct resource pci2_resources[] __initconst = { - DEFINE_RES_MEM(0xee0d0000, 0x10000), /* CFG */ - DEFINE_RES_MEM(0xee0c0000, 0x10000), /* MEM */ - DEFINE_RES_IRQ(gic_spi(113)), -}; - -static const struct platform_device_info pci2_info __initconst = { - .name = "pci-rcar-gen2", - .id = 2, - .res = pci2_resources, - .num_res = ARRAY_SIZE(pci2_resources), - .dma_mask = DMA_BIT_MASK(32), -}; - -static void __init lager_add_usb2_device(void) -{ - platform_device_register_full(&pci2_info); -} - -static const struct pinctrl_map lager_pinctrl_map[] = { - /* DU (CN10: ARGB0, CN13: LVDS) */ - PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790", - "du_rgb666", "du"), - PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790", - "du_sync_1", "du"), - PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790", - "du_clk_out_0", "du"), - /* I2C2 */ - PIN_MAP_MUX_GROUP_DEFAULT("i2c-rcar.2", "pfc-r8a7790", - "i2c2", "i2c2"), - /* QSPI */ - PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7790", - "qspi_ctrl", "qspi"), - PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7790", - "qspi_data4", "qspi"), - /* SCIF0 (CN19: DEBUG SERIAL0) */ - PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7790", - "scif0_data", "scif0"), - /* SCIF1 (CN20: DEBUG SERIAL1) */ - PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.7", "pfc-r8a7790", - "scif1_data", "scif1"), - /* SDHI0 */ - PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7790", - "sdhi0_data4", "sdhi0"), - PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7790", - "sdhi0_ctrl", "sdhi0"), - PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7790", - "sdhi0_cd", "sdhi0"), - /* SDHI2 */ - PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7790", - "sdhi2_data4", "sdhi2"), - PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7790", - "sdhi2_ctrl", "sdhi2"), - PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7790", - "sdhi2_cd", "sdhi2"), - /* SSI (CN17: sound) */ - PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790", - "ssi0129_ctrl", "ssi"), - PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790", - "ssi0_data", "ssi"), - PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790", - "ssi1_data", "ssi"), - PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790", - "audio_clk_a", "audio_clk"), - /* MMCIF1 */ - PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.1", "pfc-r8a7790", - "mmc1_data8", "mmc1"), - PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.1", "pfc-r8a7790", - "mmc1_ctrl", "mmc1"), - /* Ether */ - PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790", - "eth_link", "eth"), - PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790", - "eth_mdio", "eth"), - PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790", - "eth_rmii", "eth"), - PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790", - "intc_irq0", "intc"), - /* VIN0 */ - PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790", - "vin0_data24", "vin0"), - PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790", - "vin0_sync", "vin0"), - PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790", - "vin0_field", "vin0"), - PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790", - "vin0_clkenb", "vin0"), - PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790", - "vin0_clk", "vin0"), - /* VIN1 */ - PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.1", "pfc-r8a7790", - "vin1_data8", "vin1"), - PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.1", "pfc-r8a7790", - "vin1_clk", "vin1"), - /* USB0 */ - PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs", "pfc-r8a7790", - "usb0_ovc_vbus", "usb0"), - /* USB1 */ - PIN_MAP_MUX_GROUP_DEFAULT("pci-rcar-gen2.1", "pfc-r8a7790", - "usb1", "usb1"), - /* USB2 */ - PIN_MAP_MUX_GROUP_DEFAULT("pci-rcar-gen2.2", "pfc-r8a7790", - "usb2", "usb2"), -}; - -static void __init lager_add_standard_devices(void) -{ - int fixed_regulator_idx = 0; - int gpio_regulator_idx = 0; - - r8a7790_clock_init(); - - pinctrl_register_mappings(lager_pinctrl_map, - ARRAY_SIZE(lager_pinctrl_map)); - r8a7790_pinmux_init(); - - r8a7790_add_standard_devices(); - platform_device_register_data(NULL, "leds-gpio", -1, - &lager_leds_pdata, - sizeof(lager_leds_pdata)); - platform_device_register_data(NULL, "gpio-keys", -1, - &lager_keys_pdata, - sizeof(lager_keys_pdata)); - regulator_register_always_on(fixed_regulator_idx++, - "fixed-3.3V", fixed3v3_power_consumers, - ARRAY_SIZE(fixed3v3_power_consumers), 3300000); - platform_device_register_resndata(NULL, "sh_mmcif", 1, - mmcif1_resources, ARRAY_SIZE(mmcif1_resources), - &mmcif1_pdata, sizeof(mmcif1_pdata)); - - platform_device_register_full(ðer_info); - - platform_device_register_resndata(NULL, "qspi", 0, - qspi_resources, - ARRAY_SIZE(qspi_resources), - &qspi_pdata, sizeof(qspi_pdata)); - spi_register_board_info(spi_info, ARRAY_SIZE(spi_info)); - - platform_device_register_data(NULL, "reg-fixed-voltage", fixed_regulator_idx++, - &vcc_sdhi0_info, sizeof(struct fixed_voltage_config)); - platform_device_register_data(NULL, "reg-fixed-voltage", fixed_regulator_idx++, - &vcc_sdhi2_info, sizeof(struct fixed_voltage_config)); - - platform_device_register_data(NULL, "gpio-regulator", gpio_regulator_idx++, - &vccq_sdhi0_info, sizeof(struct gpio_regulator_config)); - platform_device_register_data(NULL, "gpio-regulator", gpio_regulator_idx++, - &vccq_sdhi2_info, sizeof(struct gpio_regulator_config)); - - lager_add_camera1_device(); - - platform_device_register_full(&sata1_info); - - platform_device_register_resndata(NULL, "usb_phy_rcar_gen2", - -1, usbhs_phy_resources, - ARRAY_SIZE(usbhs_phy_resources), - &usbhs_phy_pdata, - sizeof(usbhs_phy_pdata)); - lager_register_usbhs(); - lager_add_usb1_device(); - lager_add_usb2_device(); - - lager_add_rsnd_device(); - - platform_device_register_resndata(NULL, "sh_mobile_sdhi", 0, - sdhi0_resources, ARRAY_SIZE(sdhi0_resources), - &sdhi0_info, sizeof(struct sh_mobile_sdhi_info)); - platform_device_register_resndata(NULL, "sh_mobile_sdhi", 2, - sdhi2_resources, ARRAY_SIZE(sdhi2_resources), - &sdhi2_info, sizeof(struct sh_mobile_sdhi_info)); -} - -/* - * Ether LEDs on the Lager board are named LINK and ACTIVE which corresponds - * to non-default 01 setting of the Micrel KSZ8041 PHY control register 1 bits - * 14-15. We have to set them back to 01 from the default 00 value each time - * the PHY is reset. It's also important because the PHY's LED0 signal is - * connected to SoC's ETH_LINK signal and in the PHY's default mode it will - * bounce on and off after each packet, which we apparently want to avoid. - */ -static int lager_ksz8041_fixup(struct phy_device *phydev) -{ - u16 phyctrl1 = phy_read(phydev, 0x1e); - - phyctrl1 &= ~0xc000; - phyctrl1 |= 0x4000; - return phy_write(phydev, 0x1e, phyctrl1); -} - -static void __init lager_init(void) -{ - lager_add_standard_devices(); - - irq_set_irq_type(irq_pin(0), IRQ_TYPE_LEVEL_LOW); - - if (IS_ENABLED(CONFIG_PHYLIB)) - phy_register_fixup_for_id("r8a7790-ether-ff:01", - lager_ksz8041_fixup); -} - -static void __init lager_legacy_init_irq(void) -{ - void __iomem *gic_dist_base = ioremap_nocache(0xf1001000, 0x1000); - void __iomem *gic_cpu_base = ioremap_nocache(0xf1002000, 0x1000); - - gic_init(0, 29, gic_dist_base, gic_cpu_base); - - /* Do not invoke DT-based interrupt code via irqchip_init() */ -} - -static const char * const lager_boards_compat_dt[] __initconst = { - "renesas,lager", - NULL, -}; - -DT_MACHINE_START(LAGER_DT, "lager") - .smp = smp_ops(r8a7790_smp_ops), - .init_early = shmobile_init_delay, - .init_irq = lager_legacy_init_irq, - .init_time = rcar_gen2_timer_init, - .init_machine = lager_init, - .init_late = shmobile_init_late, - .reserve = rcar_gen2_reserve, - .dt_compat = lager_boards_compat_dt, -MACHINE_END diff --git a/arch/arm/mach-shmobile/clock-r8a7790.c b/arch/arm/mach-shmobile/clock-r8a7790.c deleted file mode 100644 index f9bbc5f0a9a1..000000000000 --- a/arch/arm/mach-shmobile/clock-r8a7790.c +++ /dev/null @@ -1,459 +0,0 @@ -/* - * r8a7790 clock framework support - * - * Copyright (C) 2013 Renesas Solutions Corp. - * Copyright (C) 2013 Magnus Damm - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ -#include <linux/init.h> -#include <linux/io.h> -#include <linux/kernel.h> -#include <linux/sh_clk.h> -#include <linux/clkdev.h> - -#include "clock.h" -#include "common.h" -#include "r8a7790.h" -#include "rcar-gen2.h" - -/* - * MD EXTAL PLL0 PLL1 PLL3 - * 14 13 19 (MHz) *1 *1 - *--------------------------------------------------- - * 0 0 0 15 x 1 x172/2 x208/2 x106 - * 0 0 1 15 x 1 x172/2 x208/2 x88 - * 0 1 0 20 x 1 x130/2 x156/2 x80 - * 0 1 1 20 x 1 x130/2 x156/2 x66 - * 1 0 0 26 / 2 x200/2 x240/2 x122 - * 1 0 1 26 / 2 x200/2 x240/2 x102 - * 1 1 0 30 / 2 x172/2 x208/2 x106 - * 1 1 1 30 / 2 x172/2 x208/2 x88 - * - * *1 : Table 7.6 indicates VCO ouput (PLLx = VCO/2) - * see "p1 / 2" on R8A7790_CLOCK_ROOT() below - */ - -#define CPG_BASE 0xe6150000 -#define CPG_LEN 0x1000 - -#define SMSTPCR1 0xe6150134 -#define SMSTPCR2 0xe6150138 -#define SMSTPCR3 0xe615013c -#define SMSTPCR5 0xe6150144 -#define SMSTPCR7 0xe615014c -#define SMSTPCR8 0xe6150990 -#define SMSTPCR9 0xe6150994 -#define SMSTPCR10 0xe6150998 - -#define MSTPSR1 IOMEM(0xe6150038) -#define MSTPSR2 IOMEM(0xe6150040) -#define MSTPSR3 IOMEM(0xe6150048) -#define MSTPSR5 IOMEM(0xe615003c) -#define MSTPSR7 IOMEM(0xe61501c4) -#define MSTPSR8 IOMEM(0xe61509a0) -#define MSTPSR9 IOMEM(0xe61509a4) -#define MSTPSR10 IOMEM(0xe61509a8) - -#define SDCKCR 0xE6150074 -#define SD2CKCR 0xE6150078 -#define SD3CKCR 0xE615026C -#define MMC0CKCR 0xE6150240 -#define MMC1CKCR 0xE6150244 -#define SSPCKCR 0xE6150248 -#define SSPRSCKCR 0xE615024C - -static struct clk_mapping cpg_mapping = { - .phys = CPG_BASE, - .len = CPG_LEN, -}; - -static struct clk extal_clk = { - /* .rate will be updated on r8a7790_clock_init() */ - .mapping = &cpg_mapping, -}; - -static struct sh_clk_ops followparent_clk_ops = { - .recalc = followparent_recalc, -}; - -static struct clk main_clk = { - /* .parent will be set r8a7790_clock_init */ - .ops = &followparent_clk_ops, -}; - -static struct clk audio_clk_a = { -}; - -static struct clk audio_clk_b = { -}; - -static struct clk audio_clk_c = { -}; - -/* - * clock ratio of these clock will be updated - * on r8a7790_clock_init() - */ -SH_FIXED_RATIO_CLK_SET(pll1_clk, main_clk, 1, 1); -SH_FIXED_RATIO_CLK_SET(pll3_clk, main_clk, 1, 1); -SH_FIXED_RATIO_CLK_SET(lb_clk, pll1_clk, 1, 1); -SH_FIXED_RATIO_CLK_SET(qspi_clk, pll1_clk, 1, 1); - -/* fixed ratio clock */ -SH_FIXED_RATIO_CLK_SET(extal_div2_clk, extal_clk, 1, 2); -SH_FIXED_RATIO_CLK_SET(cp_clk, extal_clk, 1, 2); - -SH_FIXED_RATIO_CLK_SET(pll1_div2_clk, pll1_clk, 1, 2); -SH_FIXED_RATIO_CLK_SET(zg_clk, pll1_clk, 1, 3); -SH_FIXED_RATIO_CLK_SET(zx_clk, pll1_clk, 1, 3); -SH_FIXED_RATIO_CLK_SET(zs_clk, pll1_clk, 1, 6); -SH_FIXED_RATIO_CLK_SET(hp_clk, pll1_clk, 1, 12); -SH_FIXED_RATIO_CLK_SET(i_clk, pll1_clk, 1, 2); -SH_FIXED_RATIO_CLK_SET(b_clk, pll1_clk, 1, 12); -SH_FIXED_RATIO_CLK_SET(p_clk, pll1_clk, 1, 24); -SH_FIXED_RATIO_CLK_SET(cl_clk, pll1_clk, 1, 48); -SH_FIXED_RATIO_CLK_SET(m2_clk, pll1_clk, 1, 8); -SH_FIXED_RATIO_CLK_SET(imp_clk, pll1_clk, 1, 4); -SH_FIXED_RATIO_CLK_SET(rclk_clk, pll1_clk, 1, (48 * 1024)); -SH_FIXED_RATIO_CLK_SET(oscclk_clk, pll1_clk, 1, (12 * 1024)); - -SH_FIXED_RATIO_CLK_SET(zb3_clk, pll3_clk, 1, 4); -SH_FIXED_RATIO_CLK_SET(zb3d2_clk, pll3_clk, 1, 8); -SH_FIXED_RATIO_CLK_SET(ddr_clk, pll3_clk, 1, 8); -SH_FIXED_RATIO_CLK_SET(mp_clk, pll1_div2_clk, 1, 15); - -static struct clk *main_clks[] = { - &audio_clk_a, - &audio_clk_b, - &audio_clk_c, - &extal_clk, - &extal_div2_clk, - &main_clk, - &pll1_clk, - &pll1_div2_clk, - &pll3_clk, - &lb_clk, - &qspi_clk, - &zg_clk, - &zx_clk, - &zs_clk, - &hp_clk, - &i_clk, - &b_clk, - &p_clk, - &cl_clk, - &m2_clk, - &imp_clk, - &rclk_clk, - &oscclk_clk, - &zb3_clk, - &zb3d2_clk, - &ddr_clk, - &mp_clk, - &cp_clk, -}; - -/* SDHI (DIV4) clock */ -static int divisors[] = { 2, 3, 4, 6, 8, 12, 16, 18, 24, 0, 36, 48, 10 }; - -static struct clk_div_mult_table div4_div_mult_table = { - .divisors = divisors, - .nr_divisors = ARRAY_SIZE(divisors), -}; - -static struct clk_div4_table div4_table = { - .div_mult_table = &div4_div_mult_table, -}; - -enum { - DIV4_SDH, DIV4_SD0, DIV4_SD1, DIV4_NR -}; - -static struct clk div4_clks[DIV4_NR] = { - [DIV4_SDH] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 8, 0x0dff, CLK_ENABLE_ON_INIT), - [DIV4_SD0] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 4, 0x1df0, CLK_ENABLE_ON_INIT), - [DIV4_SD1] = SH_CLK_DIV4(&pll1_clk, SDCKCR, 0, 0x1df0, CLK_ENABLE_ON_INIT), -}; - -/* DIV6 clocks */ -enum { - DIV6_SD2, DIV6_SD3, - DIV6_MMC0, DIV6_MMC1, - DIV6_SSP, DIV6_SSPRS, - DIV6_NR -}; - -static struct clk div6_clks[DIV6_NR] = { - [DIV6_SD2] = SH_CLK_DIV6(&pll1_div2_clk, SD2CKCR, 0), - [DIV6_SD3] = SH_CLK_DIV6(&pll1_div2_clk, SD3CKCR, 0), - [DIV6_MMC0] = SH_CLK_DIV6(&pll1_div2_clk, MMC0CKCR, 0), - [DIV6_MMC1] = SH_CLK_DIV6(&pll1_div2_clk, MMC1CKCR, 0), - [DIV6_SSP] = SH_CLK_DIV6(&pll1_div2_clk, SSPCKCR, 0), - [DIV6_SSPRS] = SH_CLK_DIV6(&pll1_div2_clk, SSPRSCKCR, 0), -}; - -/* MSTP */ -enum { - MSTP1017, /* parent of SCU */ - - MSTP1031, MSTP1030, - MSTP1029, MSTP1028, MSTP1027, MSTP1026, MSTP1025, MSTP1024, MSTP1023, MSTP1022, - MSTP1015, MSTP1014, MSTP1013, MSTP1012, MSTP1011, MSTP1010, - MSTP1009, MSTP1008, MSTP1007, MSTP1006, MSTP1005, - MSTP931, MSTP930, MSTP929, MSTP928, - MSTP917, - MSTP815, MSTP814, - MSTP813, - MSTP811, MSTP810, MSTP809, MSTP808, - MSTP726, MSTP725, MSTP724, MSTP723, MSTP722, MSTP721, MSTP720, - MSTP717, MSTP716, - MSTP704, MSTP703, - MSTP522, - MSTP502, MSTP501, - MSTP315, MSTP314, MSTP313, MSTP312, MSTP311, MSTP305, MSTP304, - MSTP216, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, - MSTP124, - MSTP_NR -}; - -static struct clk mstp_clks[MSTP_NR] = { - [MSTP1031] = SH_CLK_MSTP32_STS(&mstp_clks[MSTP1017], SMSTPCR10, 31, MSTPSR10, 0), /* SCU0 */ - [MSTP1030] = SH_CLK_MSTP32_STS(&mstp_clks[MSTP1017], SMSTPCR10, 30, MSTPSR10, 0), /* SCU1 */ - [MSTP1029] = SH_CLK_MSTP32_STS(&mstp_clks[MSTP1017], SMSTPCR10, 29, MSTPSR10, 0), /* SCU2 */ - [MSTP1028] = SH_CLK_MSTP32_STS(&mstp_clks[MSTP1017], SMSTPCR10, 28, MSTPSR10, 0), /* SCU3 */ - [MSTP1027] = SH_CLK_MSTP32_STS(&mstp_clks[MSTP1017], SMSTPCR10, 27, MSTPSR10, 0), /* SCU4 */ - [MSTP1026] = SH_CLK_MSTP32_STS(&mstp_clks[MSTP1017], SMSTPCR10, 26, MSTPSR10, 0), /* SCU5 */ - [MSTP1025] = SH_CLK_MSTP32_STS(&mstp_clks[MSTP1017], SMSTPCR10, 25, MSTPSR10, 0), /* SCU6 */ - [MSTP1024] = SH_CLK_MSTP32_STS(&mstp_clks[MSTP1017], SMSTPCR10, 24, MSTPSR10, 0), /* SCU7 */ - [MSTP1023] = SH_CLK_MSTP32_STS(&mstp_clks[MSTP1017], SMSTPCR10, 23, MSTPSR10, 0), /* SCU8 */ - [MSTP1022] = SH_CLK_MSTP32_STS(&mstp_clks[MSTP1017], SMSTPCR10, 22, MSTPSR10, 0), /* SCU9 */ - [MSTP1017] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 17, MSTPSR10, 0), /* SCU */ - [MSTP1015] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 15, MSTPSR10, 0), /* SSI0 */ - [MSTP1014] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 14, MSTPSR10, 0), /* SSI1 */ - [MSTP1013] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 13, MSTPSR10, 0), /* SSI2 */ - [MSTP1012] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 12, MSTPSR10, 0), /* SSI3 */ - [MSTP1011] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 11, MSTPSR10, 0), /* SSI4 */ - [MSTP1010] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 10, MSTPSR10, 0), /* SSI5 */ - [MSTP1009] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 9, MSTPSR10, 0), /* SSI6 */ - [MSTP1008] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 8, MSTPSR10, 0), /* SSI7 */ - [MSTP1007] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 7, MSTPSR10, 0), /* SSI8 */ - [MSTP1006] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 6, MSTPSR10, 0), /* SSI9 */ - [MSTP1005] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR10, 5, MSTPSR10, 0), /* SSI ALL */ - [MSTP931] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 31, MSTPSR9, 0), /* I2C0 */ - [MSTP930] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 30, MSTPSR9, 0), /* I2C1 */ - [MSTP929] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 29, MSTPSR9, 0), /* I2C2 */ - [MSTP928] = SH_CLK_MSTP32_STS(&hp_clk, SMSTPCR9, 28, MSTPSR9, 0), /* I2C3 */ - [MSTP917] = SH_CLK_MSTP32_STS(&qspi_clk, SMSTPCR9, 17, MSTPSR9, 0), /* QSPI */ - [MSTP815] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 15, MSTPSR8, 0), /* SATA0 */ - [MSTP814] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR8, 14, MSTPSR8, 0), /* SATA1 */ - [MSTP813] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR8, 13, MSTPSR8, 0), /* Ether */ - [MSTP811] = SH_CLK_MSTP32_STS(&zg_clk, SMSTPCR8, 11, MSTPSR8, 0), /* VIN0 */ - [MSTP810] = SH_CLK_MSTP32_STS(&zg_clk, SMSTPCR8, 10, MSTPSR8, 0), /* VIN1 */ - [MSTP809] = SH_CLK_MSTP32_STS(&zg_clk, SMSTPCR8, 9, MSTPSR8, 0), /* VIN2 */ - [MSTP808] = SH_CLK_MSTP32_STS(&zg_clk, SMSTPCR8, 8, MSTPSR8, 0), /* VIN3 */ - [MSTP726] = SH_CLK_MSTP32_STS(&zx_clk, SMSTPCR7, 26, MSTPSR7, 0), /* LVDS0 */ - [MSTP725] = SH_CLK_MSTP32_STS(&zx_clk, SMSTPCR7, 25, MSTPSR7, 0), /* LVDS1 */ - [MSTP724] = SH_CLK_MSTP32_STS(&zx_clk, SMSTPCR7, 24, MSTPSR7, 0), /* DU0 */ - [MSTP723] = SH_CLK_MSTP32_STS(&zx_clk, SMSTPCR7, 23, MSTPSR7, 0), /* DU1 */ - [MSTP722] = SH_CLK_MSTP32_STS(&zx_clk, SMSTPCR7, 22, MSTPSR7, 0), /* DU2 */ - [MSTP721] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR7, 21, MSTPSR7, 0), /* SCIF0 */ - [MSTP720] = SH_CLK_MSTP32_STS(&p_clk, SMSTPCR7, 20, MSTPSR7, 0), /* SCIF1 */ - [MSTP717] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR7, 17, MSTPSR7, 0), /* HSCIF0 */ - [MSTP716] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR7, 16, MSTPSR7, 0), /* HSCIF1 */ - [MSTP704] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR7, 4, MSTPSR7, 0), /* HSUSB */ - [MSTP703] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR7, 3, MSTPSR7, 0), /* EHCI */ - [MSTP522] = SH_CLK_MSTP32_STS(&extal_clk, SMSTPCR5, 22, MSTPSR5, 0), /* Thermal */ - [MSTP502] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR5, 2, MSTPSR5, 0), /* Audio-DMAC low */ - [MSTP501] = SH_CLK_MSTP32_STS(&zs_clk, SMSTPCR5, 1, MSTPSR5, 0), /* Audio-DMAC hi */ - [MSTP315] = SH_CLK_MSTP32_STS(&div6_clks[DIV6_MMC0], SMSTPCR3, 15, MSTPSR3, 0), /* MMC0 */ - [MSTP314] = SH_CLK_MSTP32_STS(&div4_clks[DIV4_SD0], SMSTPCR3, 14, MSTPSR3, 0), /* SDHI0 */ - [MSTP313] = SH_CLK_MSTP32_STS(&div4_clks[DIV4_SD1], SMSTPCR3, 13, MSTPSR3, 0), /* SDHI1 */ - [MSTP312] = SH_CLK_MSTP32_STS(&div6_clks[DIV6_SD2], SMSTPCR3, 12, MSTPSR3, 0), /* SDHI2 */ - [MSTP311] = SH_CLK_MSTP32_STS(&div6_clks[DIV6_SD3], SMSTPCR3, 11, MSTPSR3, 0), /* SDHI3 */ - [MSTP305] = SH_CLK_MSTP32_STS(&div6_clks[DIV6_MMC1], SMSTPCR3, 5, MSTPSR3, 0), /* MMC1 */ - [MSTP304] = SH_CLK_MSTP32_STS(&cp_clk, SMSTPCR3, 4, MSTPSR3, 0), /* TPU0 */ - [MSTP216] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 16, MSTPSR2, 0), /* SCIFB2 */ - [MSTP207] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 7, MSTPSR2, 0), /* SCIFB1 */ - [MSTP206] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 6, MSTPSR2, 0), /* SCIFB0 */ - [MSTP204] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 4, MSTPSR2, 0), /* SCIFA0 */ - [MSTP203] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 3, MSTPSR2, 0), /* SCIFA1 */ - [MSTP202] = SH_CLK_MSTP32_STS(&mp_clk, SMSTPCR2, 2, MSTPSR2, 0), /* SCIFA2 */ - [MSTP124] = SH_CLK_MSTP32_STS(&rclk_clk, SMSTPCR1, 24, MSTPSR1, 0), /* CMT0 */ -}; - -static struct clk_lookup lookups[] = { - - /* main clocks */ - CLKDEV_CON_ID("extal", &extal_clk), - CLKDEV_CON_ID("extal_div2", &extal_div2_clk), - CLKDEV_CON_ID("main", &main_clk), - CLKDEV_CON_ID("pll1", &pll1_clk), - CLKDEV_CON_ID("pll1_div2", &pll1_div2_clk), - CLKDEV_CON_ID("pll3", &pll3_clk), - CLKDEV_CON_ID("zg", &zg_clk), - CLKDEV_CON_ID("zx", &zx_clk), - CLKDEV_CON_ID("zs", &zs_clk), - CLKDEV_CON_ID("hp", &hp_clk), - CLKDEV_CON_ID("i", &i_clk), - CLKDEV_CON_ID("b", &b_clk), - CLKDEV_CON_ID("lb", &lb_clk), - CLKDEV_CON_ID("p", &p_clk), - CLKDEV_CON_ID("cl", &cl_clk), - CLKDEV_CON_ID("m2", &m2_clk), - CLKDEV_CON_ID("imp", &imp_clk), - CLKDEV_CON_ID("rclk", &rclk_clk), - CLKDEV_CON_ID("oscclk", &oscclk_clk), - CLKDEV_CON_ID("zb3", &zb3_clk), - CLKDEV_CON_ID("zb3d2", &zb3d2_clk), - CLKDEV_CON_ID("ddr", &ddr_clk), - CLKDEV_CON_ID("mp", &mp_clk), - CLKDEV_CON_ID("qspi", &qspi_clk), - CLKDEV_CON_ID("cp", &cp_clk), - - /* DIV4 */ - CLKDEV_CON_ID("sdh", &div4_clks[DIV4_SDH]), - - /* DIV6 */ - CLKDEV_CON_ID("ssp", &div6_clks[DIV6_SSP]), - CLKDEV_CON_ID("ssprs", &div6_clks[DIV6_SSPRS]), - - /* MSTP */ - CLKDEV_DEV_ID("rcar_sound", &mstp_clks[MSTP1005]), - CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), - CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP203]), - CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP206]), - CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP207]), - CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP216]), - CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP202]), - CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP721]), - CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP720]), - CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP717]), - CLKDEV_DEV_ID("sh-sci.9", &mstp_clks[MSTP716]), - CLKDEV_DEV_ID("i2c-rcar_gen2.0", &mstp_clks[MSTP931]), - CLKDEV_DEV_ID("i2c-rcar_gen2.1", &mstp_clks[MSTP930]), - CLKDEV_DEV_ID("i2c-rcar_gen2.2", &mstp_clks[MSTP929]), - CLKDEV_DEV_ID("i2c-rcar_gen2.3", &mstp_clks[MSTP928]), - CLKDEV_DEV_ID("r8a7790-ether", &mstp_clks[MSTP813]), - CLKDEV_DEV_ID("r8a7790-vin.0", &mstp_clks[MSTP811]), - CLKDEV_DEV_ID("r8a7790-vin.1", &mstp_clks[MSTP810]), - CLKDEV_DEV_ID("r8a7790-vin.2", &mstp_clks[MSTP809]), - CLKDEV_DEV_ID("r8a7790-vin.3", &mstp_clks[MSTP808]), - CLKDEV_DEV_ID("rcar_thermal", &mstp_clks[MSTP522]), - CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP502]), - CLKDEV_DEV_ID("sh-dma-engine.1", &mstp_clks[MSTP501]), - CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP315]), - CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), - CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), - CLKDEV_DEV_ID("sh_mobile_sdhi.2", &mstp_clks[MSTP312]), - CLKDEV_DEV_ID("sh_mobile_sdhi.3", &mstp_clks[MSTP311]), - CLKDEV_DEV_ID("sh_mmcif.1", &mstp_clks[MSTP305]), - CLKDEV_DEV_ID("qspi.0", &mstp_clks[MSTP917]), - CLKDEV_DEV_ID("renesas_usbhs", &mstp_clks[MSTP704]), - CLKDEV_DEV_ID("pci-rcar-gen2.0", &mstp_clks[MSTP703]), - CLKDEV_DEV_ID("pci-rcar-gen2.1", &mstp_clks[MSTP703]), - CLKDEV_DEV_ID("pci-rcar-gen2.2", &mstp_clks[MSTP703]), - CLKDEV_DEV_ID("sata-r8a7790.0", &mstp_clks[MSTP815]), - CLKDEV_DEV_ID("sata-r8a7790.1", &mstp_clks[MSTP814]), - - /* ICK */ - CLKDEV_ICK_ID("fck", "sh-cmt-48-gen2.0", &mstp_clks[MSTP124]), - CLKDEV_ICK_ID("usbhs", "usb_phy_rcar_gen2", &mstp_clks[MSTP704]), - CLKDEV_ICK_ID("lvds.0", "rcar-du-r8a7790", &mstp_clks[MSTP726]), - CLKDEV_ICK_ID("lvds.1", "rcar-du-r8a7790", &mstp_clks[MSTP725]), - CLKDEV_ICK_ID("du.0", "rcar-du-r8a7790", &mstp_clks[MSTP724]), - CLKDEV_ICK_ID("du.1", "rcar-du-r8a7790", &mstp_clks[MSTP723]), - CLKDEV_ICK_ID("du.2", "rcar-du-r8a7790", &mstp_clks[MSTP722]), - CLKDEV_ICK_ID("clk_a", "rcar_sound", &audio_clk_a), - CLKDEV_ICK_ID("clk_b", "rcar_sound", &audio_clk_b), - CLKDEV_ICK_ID("clk_c", "rcar_sound", &audio_clk_c), - CLKDEV_ICK_ID("clk_i", "rcar_sound", &m2_clk), - CLKDEV_ICK_ID("src.0", "rcar_sound", &mstp_clks[MSTP1031]), - CLKDEV_ICK_ID("src.1", "rcar_sound", &mstp_clks[MSTP1030]), - CLKDEV_ICK_ID("src.2", "rcar_sound", &mstp_clks[MSTP1029]), - CLKDEV_ICK_ID("src.3", "rcar_sound", &mstp_clks[MSTP1028]), - CLKDEV_ICK_ID("src.4", "rcar_sound", &mstp_clks[MSTP1027]), - CLKDEV_ICK_ID("src.5", "rcar_sound", &mstp_clks[MSTP1026]), - CLKDEV_ICK_ID("src.6", "rcar_sound", &mstp_clks[MSTP1025]), - CLKDEV_ICK_ID("src.7", "rcar_sound", &mstp_clks[MSTP1024]), - CLKDEV_ICK_ID("src.8", "rcar_sound", &mstp_clks[MSTP1023]), - CLKDEV_ICK_ID("src.9", "rcar_sound", &mstp_clks[MSTP1022]), - CLKDEV_ICK_ID("ssi.0", "rcar_sound", &mstp_clks[MSTP1015]), - CLKDEV_ICK_ID("ssi.1", "rcar_sound", &mstp_clks[MSTP1014]), - CLKDEV_ICK_ID("ssi.2", "rcar_sound", &mstp_clks[MSTP1013]), - CLKDEV_ICK_ID("ssi.3", "rcar_sound", &mstp_clks[MSTP1012]), - CLKDEV_ICK_ID("ssi.4", "rcar_sound", &mstp_clks[MSTP1011]), - CLKDEV_ICK_ID("ssi.5", "rcar_sound", &mstp_clks[MSTP1010]), - CLKDEV_ICK_ID("ssi.6", "rcar_sound", &mstp_clks[MSTP1009]), - CLKDEV_ICK_ID("ssi.7", "rcar_sound", &mstp_clks[MSTP1008]), - CLKDEV_ICK_ID("ssi.8", "rcar_sound", &mstp_clks[MSTP1007]), - CLKDEV_ICK_ID("ssi.9", "rcar_sound", &mstp_clks[MSTP1006]), - -}; - -#define R8A7790_CLOCK_ROOT(e, m, p0, p1, p30, p31) \ - extal_clk.rate = e * 1000 * 1000; \ - main_clk.parent = m; \ - SH_CLK_SET_RATIO(&pll1_clk_ratio, p1 / 2, 1); \ - if (mode & MD(19)) \ - SH_CLK_SET_RATIO(&pll3_clk_ratio, p31, 1); \ - else \ - SH_CLK_SET_RATIO(&pll3_clk_ratio, p30, 1) - - -void __init r8a7790_clock_init(void) -{ - u32 mode = rcar_gen2_read_mode_pins(); - int k, ret = 0; - - switch (mode & (MD(14) | MD(13))) { - case 0: - R8A7790_CLOCK_ROOT(15, &extal_clk, 172, 208, 106, 88); - break; - case MD(13): - R8A7790_CLOCK_ROOT(20, &extal_clk, 130, 156, 80, 66); - break; - case MD(14): - R8A7790_CLOCK_ROOT(26 / 2, &extal_div2_clk, 200, 240, 122, 102); - break; - case MD(13) | MD(14): - R8A7790_CLOCK_ROOT(30 / 2, &extal_div2_clk, 172, 208, 106, 88); - break; - } - - if (mode & (MD(18))) - SH_CLK_SET_RATIO(&lb_clk_ratio, 1, 36); - else - SH_CLK_SET_RATIO(&lb_clk_ratio, 1, 24); - - if ((mode & (MD(3) | MD(2) | MD(1))) == MD(2)) - SH_CLK_SET_RATIO(&qspi_clk_ratio, 1, 16); - else - SH_CLK_SET_RATIO(&qspi_clk_ratio, 1, 20); - - for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++) - ret = clk_register(main_clks[k]); - - if (!ret) - ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); - - if (!ret) - ret = sh_clk_div6_register(div6_clks, DIV6_NR); - - if (!ret) - ret = sh_clk_mstp_register(mstp_clks, MSTP_NR); - - clkdev_add_table(lookups, ARRAY_SIZE(lookups)); - - if (!ret) - shmobile_clk_init(); - else - panic("failed to setup r8a7790 clocks\n"); -} diff --git a/arch/arm/mach-shmobile/r8a7790.h b/arch/arm/mach-shmobile/r8a7790.h index 388f0514d931..bf73a850aaed 100644 --- a/arch/arm/mach-shmobile/r8a7790.h +++ b/arch/arm/mach-shmobile/r8a7790.h @@ -1,34 +1,6 @@ #ifndef __ASM_R8A7790_H__ #define __ASM_R8A7790_H__ -/* DMA slave IDs */ -enum { - RCAR_DMA_SLAVE_INVALID, - AUDIO_DMAC_SLAVE_SSI0_TX, - AUDIO_DMAC_SLAVE_SSI0_RX, - AUDIO_DMAC_SLAVE_SSI1_TX, - AUDIO_DMAC_SLAVE_SSI1_RX, - AUDIO_DMAC_SLAVE_SSI2_TX, - AUDIO_DMAC_SLAVE_SSI2_RX, - AUDIO_DMAC_SLAVE_SSI3_TX, - AUDIO_DMAC_SLAVE_SSI3_RX, - AUDIO_DMAC_SLAVE_SSI4_TX, - AUDIO_DMAC_SLAVE_SSI4_RX, - AUDIO_DMAC_SLAVE_SSI5_TX, - AUDIO_DMAC_SLAVE_SSI5_RX, - AUDIO_DMAC_SLAVE_SSI6_TX, - AUDIO_DMAC_SLAVE_SSI6_RX, - AUDIO_DMAC_SLAVE_SSI7_TX, - AUDIO_DMAC_SLAVE_SSI7_RX, - AUDIO_DMAC_SLAVE_SSI8_TX, - AUDIO_DMAC_SLAVE_SSI8_RX, - AUDIO_DMAC_SLAVE_SSI9_TX, - AUDIO_DMAC_SLAVE_SSI9_RX, -}; - -void r8a7790_add_standard_devices(void); -void r8a7790_clock_init(void); -void r8a7790_pinmux_init(void); void r8a7790_pm_init(void); extern struct smp_operations r8a7790_smp_ops; diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c index d191cf419731..dd64caf79216 100644 --- a/arch/arm/mach-shmobile/setup-r8a7740.c +++ b/arch/arm/mach-shmobile/setup-r8a7740.c @@ -656,7 +656,7 @@ static struct resource pmu_resources[] = { }; static struct platform_device pmu_device = { - .name = "arm-pmu", + .name = "armv7-pmu", .id = -1, .num_resources = ARRAY_SIZE(pmu_resources), .resource = pmu_resources, diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c index ec7d97dca4de..3a18af4922b4 100644 --- a/arch/arm/mach-shmobile/setup-r8a7790.c +++ b/arch/arm/mach-shmobile/setup-r8a7790.c @@ -14,295 +14,14 @@ * GNU General Public License for more details. */ -#include <linux/irq.h> -#include <linux/kernel.h> -#include <linux/of_platform.h> -#include <linux/platform_data/gpio-rcar.h> -#include <linux/platform_data/irq-renesas-irqc.h> -#include <linux/serial_sci.h> -#include <linux/sh_dma.h> -#include <linux/sh_timer.h> +#include <linux/init.h> #include <asm/mach/arch.h> #include "common.h" -#include "dma-register.h" -#include "irqs.h" #include "r8a7790.h" #include "rcar-gen2.h" -/* Audio-DMAC */ -#define AUDIO_DMAC_SLAVE(_id, _addr, t, r) \ -{ \ - .slave_id = AUDIO_DMAC_SLAVE_## _id ##_TX, \ - .addr = _addr + 0x8, \ - .chcr = CHCR_TX(XMIT_SZ_32BIT), \ - .mid_rid = t, \ -}, { \ - .slave_id = AUDIO_DMAC_SLAVE_## _id ##_RX, \ - .addr = _addr + 0xc, \ - .chcr = CHCR_RX(XMIT_SZ_32BIT), \ - .mid_rid = r, \ -} - -static const struct sh_dmae_slave_config r8a7790_audio_dmac_slaves[] = { - AUDIO_DMAC_SLAVE(SSI0, 0xec241000, 0x01, 0x02), - AUDIO_DMAC_SLAVE(SSI1, 0xec241040, 0x03, 0x04), - AUDIO_DMAC_SLAVE(SSI2, 0xec241080, 0x05, 0x06), - AUDIO_DMAC_SLAVE(SSI3, 0xec2410c0, 0x07, 0x08), - AUDIO_DMAC_SLAVE(SSI4, 0xec241100, 0x09, 0x0a), - AUDIO_DMAC_SLAVE(SSI5, 0xec241140, 0x0b, 0x0c), - AUDIO_DMAC_SLAVE(SSI6, 0xec241180, 0x0d, 0x0e), - AUDIO_DMAC_SLAVE(SSI7, 0xec2411c0, 0x0f, 0x10), - AUDIO_DMAC_SLAVE(SSI8, 0xec241200, 0x11, 0x12), - AUDIO_DMAC_SLAVE(SSI9, 0xec241240, 0x13, 0x14), -}; - -#define DMAE_CHANNEL(a, b) \ -{ \ - .offset = (a) - 0x20, \ - .dmars = (a) - 0x20 + 0x40, \ - .chclr_bit = (b), \ - .chclr_offset = 0x80 - 0x20, \ -} - -static const struct sh_dmae_channel r8a7790_audio_dmac_channels[] = { - DMAE_CHANNEL(0x8000, 0), - DMAE_CHANNEL(0x8080, 1), - DMAE_CHANNEL(0x8100, 2), - DMAE_CHANNEL(0x8180, 3), - DMAE_CHANNEL(0x8200, 4), - DMAE_CHANNEL(0x8280, 5), - DMAE_CHANNEL(0x8300, 6), - DMAE_CHANNEL(0x8380, 7), - DMAE_CHANNEL(0x8400, 8), - DMAE_CHANNEL(0x8480, 9), - DMAE_CHANNEL(0x8500, 10), - DMAE_CHANNEL(0x8580, 11), - DMAE_CHANNEL(0x8600, 12), -}; - -static struct sh_dmae_pdata r8a7790_audio_dmac_platform_data = { - .slave = r8a7790_audio_dmac_slaves, - .slave_num = ARRAY_SIZE(r8a7790_audio_dmac_slaves), - .channel = r8a7790_audio_dmac_channels, - .channel_num = ARRAY_SIZE(r8a7790_audio_dmac_channels), - .ts_low_shift = TS_LOW_SHIFT, - .ts_low_mask = TS_LOW_BIT << TS_LOW_SHIFT, - .ts_high_shift = TS_HI_SHIFT, - .ts_high_mask = TS_HI_BIT << TS_HI_SHIFT, - .ts_shift = dma_ts_shift, - .ts_shift_num = ARRAY_SIZE(dma_ts_shift), - .dmaor_init = DMAOR_DME, - .chclr_present = 1, - .chclr_bitwise = 1, -}; - -static struct resource r8a7790_audio_dmac_resources[] = { - /* Channel registers and DMAOR for low */ - DEFINE_RES_MEM(0xec700020, 0x8663 - 0x20), - DEFINE_RES_IRQ(gic_spi(346)), - DEFINE_RES_NAMED(gic_spi(320), 13, NULL, IORESOURCE_IRQ), - - /* Channel registers and DMAOR for hi */ - DEFINE_RES_MEM(0xec720020, 0x8663 - 0x20), /* hi */ - DEFINE_RES_IRQ(gic_spi(347)), - DEFINE_RES_NAMED(gic_spi(333), 13, NULL, IORESOURCE_IRQ), -}; - -#define r8a7790_register_audio_dmac(id) \ - platform_device_register_resndata( \ - NULL, "sh-dma-engine", id, \ - &r8a7790_audio_dmac_resources[id * 3], 3, \ - &r8a7790_audio_dmac_platform_data, \ - sizeof(r8a7790_audio_dmac_platform_data)) - -static const struct resource pfc_resources[] __initconst = { - DEFINE_RES_MEM(0xe6060000, 0x250), -}; - -#define r8a7790_register_pfc() \ - platform_device_register_simple("pfc-r8a7790", -1, pfc_resources, \ - ARRAY_SIZE(pfc_resources)) - -#define R8A7790_GPIO(idx) \ -static const struct resource r8a7790_gpio##idx##_resources[] __initconst = { \ - DEFINE_RES_MEM(0xe6050000 + 0x1000 * (idx), 0x50), \ - DEFINE_RES_IRQ(gic_spi(4 + (idx))), \ -}; \ - \ -static const struct gpio_rcar_config \ -r8a7790_gpio##idx##_platform_data __initconst = { \ - .gpio_base = 32 * (idx), \ - .irq_base = 0, \ - .number_of_pins = 32, \ - .pctl_name = "pfc-r8a7790", \ - .has_both_edge_trigger = 1, \ -}; \ - -R8A7790_GPIO(0); -R8A7790_GPIO(1); -R8A7790_GPIO(2); -R8A7790_GPIO(3); -R8A7790_GPIO(4); -R8A7790_GPIO(5); - -#define r8a7790_register_gpio(idx) \ - platform_device_register_resndata(NULL, "gpio_rcar", idx, \ - r8a7790_gpio##idx##_resources, \ - ARRAY_SIZE(r8a7790_gpio##idx##_resources), \ - &r8a7790_gpio##idx##_platform_data, \ - sizeof(r8a7790_gpio##idx##_platform_data)) - -static struct resource i2c_resources[] __initdata = { - /* I2C0 */ - DEFINE_RES_MEM(0xE6508000, 0x40), - DEFINE_RES_IRQ(gic_spi(287)), - /* I2C1 */ - DEFINE_RES_MEM(0xE6518000, 0x40), - DEFINE_RES_IRQ(gic_spi(288)), - /* I2C2 */ - DEFINE_RES_MEM(0xE6530000, 0x40), - DEFINE_RES_IRQ(gic_spi(286)), - /* I2C3 */ - DEFINE_RES_MEM(0xE6540000, 0x40), - DEFINE_RES_IRQ(gic_spi(290)), - -}; - -#define r8a7790_register_i2c(idx) \ - platform_device_register_simple( \ - "i2c-rcar_gen2", idx, \ - i2c_resources + (2 * idx), 2); \ - -void __init r8a7790_pinmux_init(void) -{ - r8a7790_register_pfc(); - r8a7790_register_gpio(0); - r8a7790_register_gpio(1); - r8a7790_register_gpio(2); - r8a7790_register_gpio(3); - r8a7790_register_gpio(4); - r8a7790_register_gpio(5); -} - -#define __R8A7790_SCIF(scif_type, _scscr, index, baseaddr, irq) \ -static struct plat_sci_port scif##index##_platform_data = { \ - .type = scif_type, \ - .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \ - .scscr = _scscr, \ -}; \ - \ -static struct resource scif##index##_resources[] = { \ - DEFINE_RES_MEM(baseaddr, 0x100), \ - DEFINE_RES_IRQ(irq), \ -} - -#define R8A7790_SCIF(index, baseaddr, irq) \ - __R8A7790_SCIF(PORT_SCIF, SCSCR_RE | SCSCR_TE, \ - index, baseaddr, irq) - -#define R8A7790_SCIFA(index, baseaddr, irq) \ - __R8A7790_SCIF(PORT_SCIFA, SCSCR_RE | SCSCR_TE | SCSCR_CKE0, \ - index, baseaddr, irq) - -#define R8A7790_SCIFB(index, baseaddr, irq) \ - __R8A7790_SCIF(PORT_SCIFB, SCSCR_RE | SCSCR_TE, \ - index, baseaddr, irq) - -#define R8A7790_HSCIF(index, baseaddr, irq) \ - __R8A7790_SCIF(PORT_HSCIF, SCSCR_RE | SCSCR_TE, \ - index, baseaddr, irq) - -R8A7790_SCIFA(0, 0xe6c40000, gic_spi(144)); /* SCIFA0 */ -R8A7790_SCIFA(1, 0xe6c50000, gic_spi(145)); /* SCIFA1 */ -R8A7790_SCIFB(2, 0xe6c20000, gic_spi(148)); /* SCIFB0 */ -R8A7790_SCIFB(3, 0xe6c30000, gic_spi(149)); /* SCIFB1 */ -R8A7790_SCIFB(4, 0xe6ce0000, gic_spi(150)); /* SCIFB2 */ -R8A7790_SCIFA(5, 0xe6c60000, gic_spi(151)); /* SCIFA2 */ -R8A7790_SCIF(6, 0xe6e60000, gic_spi(152)); /* SCIF0 */ -R8A7790_SCIF(7, 0xe6e68000, gic_spi(153)); /* SCIF1 */ -R8A7790_HSCIF(8, 0xe62c0000, gic_spi(154)); /* HSCIF0 */ -R8A7790_HSCIF(9, 0xe62c8000, gic_spi(155)); /* HSCIF1 */ - -#define r8a7790_register_scif(index) \ - platform_device_register_resndata(NULL, "sh-sci", index, \ - scif##index##_resources, \ - ARRAY_SIZE(scif##index##_resources), \ - &scif##index##_platform_data, \ - sizeof(scif##index##_platform_data)) - -static const struct renesas_irqc_config irqc0_data __initconst = { - .irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */ -}; - -static const struct resource irqc0_resources[] __initconst = { - DEFINE_RES_MEM(0xe61c0000, 0x200), /* IRQC Event Detector Block_0 */ - DEFINE_RES_IRQ(gic_spi(0)), /* IRQ0 */ - DEFINE_RES_IRQ(gic_spi(1)), /* IRQ1 */ - DEFINE_RES_IRQ(gic_spi(2)), /* IRQ2 */ - DEFINE_RES_IRQ(gic_spi(3)), /* IRQ3 */ -}; - -#define r8a7790_register_irqc(idx) \ - platform_device_register_resndata(NULL, "renesas_irqc", \ - idx, irqc##idx##_resources, \ - ARRAY_SIZE(irqc##idx##_resources), \ - &irqc##idx##_data, \ - sizeof(struct renesas_irqc_config)) - -static const struct resource thermal_resources[] __initconst = { - DEFINE_RES_MEM(0xe61f0000, 0x14), - DEFINE_RES_MEM(0xe61f0100, 0x38), - DEFINE_RES_IRQ(gic_spi(69)), -}; - -#define r8a7790_register_thermal() \ - platform_device_register_simple("rcar_thermal", -1, \ - thermal_resources, \ - ARRAY_SIZE(thermal_resources)) - -static struct sh_timer_config cmt0_platform_data = { - .channels_mask = 0x60, -}; - -static struct resource cmt0_resources[] = { - DEFINE_RES_MEM(0xffca0000, 0x1004), - DEFINE_RES_IRQ(gic_spi(142)), -}; - -#define r8a7790_register_cmt(idx) \ - platform_device_register_resndata(NULL, "sh-cmt-48-gen2", \ - idx, cmt##idx##_resources, \ - ARRAY_SIZE(cmt##idx##_resources), \ - &cmt##idx##_platform_data, \ - sizeof(struct sh_timer_config)) - -void __init r8a7790_add_standard_devices(void) -{ - r8a7790_register_scif(0); - r8a7790_register_scif(1); - r8a7790_register_scif(2); - r8a7790_register_scif(3); - r8a7790_register_scif(4); - r8a7790_register_scif(5); - r8a7790_register_scif(6); - r8a7790_register_scif(7); - r8a7790_register_scif(8); - r8a7790_register_scif(9); - r8a7790_register_cmt(0); - r8a7790_register_irqc(0); - r8a7790_register_thermal(); - r8a7790_register_i2c(0); - r8a7790_register_i2c(1); - r8a7790_register_i2c(2); - r8a7790_register_i2c(3); - r8a7790_register_audio_dmac(0); - r8a7790_register_audio_dmac(1); -} - -#ifdef CONFIG_USE_OF - static const char * const r8a7790_boards_compat_dt[] __initconst = { "renesas,r8a7790", NULL, @@ -316,4 +35,3 @@ DT_MACHINE_START(R8A7790_DT, "Generic R8A7790 (Flattened Device Tree)") .reserve = rcar_gen2_reserve, .dt_compat = r8a7790_boards_compat_dt, MACHINE_END -#endif /* CONFIG_USE_OF */ diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c index fb5e1bb34be8..a8593d1241be 100644 --- a/arch/arm/mach-shmobile/setup-sh73a0.c +++ b/arch/arm/mach-shmobile/setup-sh73a0.c @@ -563,7 +563,7 @@ static struct resource pmu_resources[] = { }; static struct platform_device pmu_device = { - .name = "arm-pmu", + .name = "armv7-pmu", .id = -1, .num_resources = ARRAY_SIZE(pmu_resources), .resource = pmu_resources, diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c index 08fb8c89f414..6ea09fe53426 100644 --- a/arch/arm/mach-versatile/core.c +++ b/arch/arm/mach-versatile/core.c @@ -728,43 +728,6 @@ struct of_dev_auxdata versatile_auxdata_lookup[] __initdata = { }; #endif -#ifdef CONFIG_LEDS -#define VA_LEDS_BASE (__io_address(VERSATILE_SYS_BASE) + VERSATILE_SYS_LED_OFFSET) - -static void versatile_leds_event(led_event_t ledevt) -{ - unsigned long flags; - u32 val; - - local_irq_save(flags); - val = readl(VA_LEDS_BASE); - - switch (ledevt) { - case led_idle_start: - val = val & ~VERSATILE_SYS_LED0; - break; - - case led_idle_end: - val = val | VERSATILE_SYS_LED0; - break; - - case led_timer: - val = val ^ VERSATILE_SYS_LED1; - break; - - case led_halted: - val = 0; - break; - - default: - break; - } - - writel(val, VA_LEDS_BASE); - local_irq_restore(flags); -} -#endif /* CONFIG_LEDS */ - void versatile_restart(enum reboot_mode mode, const char *cmd) { void __iomem *sys = __io_address(VERSATILE_SYS_BASE); diff --git a/arch/arm/plat-iop/pmu.c b/arch/arm/plat-iop/pmu.c index ad9f9744a82d..c6d979ace524 100644 --- a/arch/arm/plat-iop/pmu.c +++ b/arch/arm/plat-iop/pmu.c @@ -24,7 +24,7 @@ static struct resource pmu_resource = { }; static struct platform_device pmu_device = { - .name = "arm-pmu", + .name = "xscale-pmu", .id = -1, .resource = &pmu_resource, .num_resources = 1, diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index 24770e5a5081..6416e03b4482 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c @@ -151,14 +151,6 @@ static int omap_dma_in_1510_mode(void) #endif #ifdef CONFIG_ARCH_OMAP1 -static inline int get_gdma_dev(int req) -{ - u32 reg = OMAP_FUNC_MUX_ARM_BASE + ((req - 1) / 5) * 4; - int shift = ((req - 1) % 5) * 6; - - return ((omap_readl(reg) >> shift) & 0x3f) + 1; -} - static inline void set_gdma_dev(int req, int dev) { u32 reg = OMAP_FUNC_MUX_ARM_BASE + ((req - 1) / 5) * 4; diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig index 9bd2776e7d05..cb8e3d655d1a 100644 --- a/arch/arm/plat-samsung/Kconfig +++ b/arch/arm/plat-samsung/Kconfig @@ -236,13 +236,6 @@ config S3C_SETUP_CAMIF help Compile in common setup code for S3C CAMIF devices -# DMA - -config S3C_DMA - bool - help - Internal configuration for S3C DMA core - config SAMSUNG_PM_GPIO bool default y if GPIO_SAMSUNG && PM @@ -250,14 +243,6 @@ config SAMSUNG_PM_GPIO Include legacy GPIO power management code for platforms not using pinctrl-samsung driver. -config SAMSUNG_DMADEV - bool "Use legacy Samsung DMA abstraction" - depends on CPU_S5PV210 || ARCH_S3C64XX - select DMADEVICES - default y - help - Use DMA device engine for PL330 DMAC. - endif config S5P_DEV_MFC diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile index 87746c37f030..1a29ab1f446d 100644 --- a/arch/arm/plat-samsung/Makefile +++ b/arch/arm/plat-samsung/Makefile @@ -26,12 +26,6 @@ obj-$(CONFIG_SAMSUNG_DEV_BACKLIGHT) += dev-backlight.o obj-$(CONFIG_S3C_SETUP_CAMIF) += setup-camif.o -# DMA support - -obj-$(CONFIG_S3C_DMA) += dma.o s3c-dma-ops.o - -obj-$(CONFIG_SAMSUNG_DMADEV) += dma-ops.o - # PM support obj-$(CONFIG_PM_SLEEP) += pm-common.o diff --git a/arch/arm/plat-samsung/dma-ops.c b/arch/arm/plat-samsung/dma-ops.c deleted file mode 100644 index 886326ee6f6c..000000000000 --- a/arch/arm/plat-samsung/dma-ops.c +++ /dev/null @@ -1,146 +0,0 @@ -/* linux/arch/arm/plat-samsung/dma-ops.c - * - * Copyright (c) 2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Samsung DMA Operations - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/kernel.h> -#include <linux/errno.h> -#include <linux/amba/pl330.h> -#include <linux/scatterlist.h> -#include <linux/export.h> - -#include <mach/dma.h> - -#if defined(CONFIG_PL330_DMA) -#define dma_filter pl330_filter -#elif defined(CONFIG_S3C64XX_PL080) -#define dma_filter pl08x_filter_id -#endif - -static unsigned samsung_dmadev_request(enum dma_ch dma_ch, - struct samsung_dma_req *param, - struct device *dev, char *ch_name) -{ - dma_cap_mask_t mask; - - dma_cap_zero(mask); - dma_cap_set(param->cap, mask); - - if (dev->of_node) - return (unsigned)dma_request_slave_channel(dev, ch_name); - else - return (unsigned)dma_request_channel(mask, dma_filter, - (void *)dma_ch); -} - -static int samsung_dmadev_release(unsigned ch, void *param) -{ - dma_release_channel((struct dma_chan *)ch); - - return 0; -} - -static int samsung_dmadev_config(unsigned ch, - struct samsung_dma_config *param) -{ - struct dma_chan *chan = (struct dma_chan *)ch; - struct dma_slave_config slave_config; - - if (param->direction == DMA_DEV_TO_MEM) { - memset(&slave_config, 0, sizeof(struct dma_slave_config)); - slave_config.direction = param->direction; - slave_config.src_addr = param->fifo; - slave_config.src_addr_width = param->width; - slave_config.src_maxburst = 1; - dmaengine_slave_config(chan, &slave_config); - } else if (param->direction == DMA_MEM_TO_DEV) { - memset(&slave_config, 0, sizeof(struct dma_slave_config)); - slave_config.direction = param->direction; - slave_config.dst_addr = param->fifo; - slave_config.dst_addr_width = param->width; - slave_config.dst_maxburst = 1; - dmaengine_slave_config(chan, &slave_config); - } else { - pr_warn("unsupported direction\n"); - return -EINVAL; - } - - return 0; -} - -static int samsung_dmadev_prepare(unsigned ch, - struct samsung_dma_prep *param) -{ - struct scatterlist sg; - struct dma_chan *chan = (struct dma_chan *)ch; - struct dma_async_tx_descriptor *desc; - - switch (param->cap) { - case DMA_SLAVE: - sg_init_table(&sg, 1); - sg_dma_len(&sg) = param->len; - sg_set_page(&sg, pfn_to_page(PFN_DOWN(param->buf)), - param->len, offset_in_page(param->buf)); - sg_dma_address(&sg) = param->buf; - - desc = dmaengine_prep_slave_sg(chan, - &sg, 1, param->direction, DMA_PREP_INTERRUPT); - break; - case DMA_CYCLIC: - desc = dmaengine_prep_dma_cyclic(chan, param->buf, - param->len, param->period, param->direction, - DMA_PREP_INTERRUPT | DMA_CTRL_ACK); - break; - default: - dev_err(&chan->dev->device, "unsupported format\n"); - return -EFAULT; - } - - if (!desc) { - dev_err(&chan->dev->device, "cannot prepare cyclic dma\n"); - return -EFAULT; - } - - desc->callback = param->fp; - desc->callback_param = param->fp_param; - - dmaengine_submit((struct dma_async_tx_descriptor *)desc); - - return 0; -} - -static inline int samsung_dmadev_trigger(unsigned ch) -{ - dma_async_issue_pending((struct dma_chan *)ch); - - return 0; -} - -static inline int samsung_dmadev_flush(unsigned ch) -{ - return dmaengine_terminate_all((struct dma_chan *)ch); -} - -static struct samsung_dma_ops dmadev_ops = { - .request = samsung_dmadev_request, - .release = samsung_dmadev_release, - .config = samsung_dmadev_config, - .prepare = samsung_dmadev_prepare, - .trigger = samsung_dmadev_trigger, - .started = NULL, - .flush = samsung_dmadev_flush, - .stop = samsung_dmadev_flush, -}; - -void *samsung_dmadev_get_ops(void) -{ - return &dmadev_ops; -} -EXPORT_SYMBOL(samsung_dmadev_get_ops); diff --git a/arch/arm/plat-samsung/dma.c b/arch/arm/plat-samsung/dma.c deleted file mode 100644 index 6143aa147688..000000000000 --- a/arch/arm/plat-samsung/dma.c +++ /dev/null @@ -1,84 +0,0 @@ -/* linux/arch/arm/plat-samsung/dma.c - * - * Copyright (c) 2003-2009 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * http://armlinux.simtec.co.uk/ - * - * S3C DMA core - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -struct s3c2410_dma_buf; - -#include <linux/kernel.h> -#include <linux/module.h> -#include <linux/errno.h> - -#include <mach/dma.h> -#include <mach/irqs.h> - -/* dma channel state information */ -struct s3c2410_dma_chan s3c2410_chans[S3C_DMA_CHANNELS]; -struct s3c2410_dma_chan *s3c_dma_chan_map[DMACH_MAX]; - -/* s3c_dma_lookup_channel - * - * change the dma channel number given into a real dma channel id -*/ - -struct s3c2410_dma_chan *s3c_dma_lookup_channel(unsigned int channel) -{ - if (channel & DMACH_LOW_LEVEL) - return &s3c2410_chans[channel & ~DMACH_LOW_LEVEL]; - else - return s3c_dma_chan_map[channel]; -} - -/* do we need to protect the settings of the fields from - * irq? -*/ - -int s3c2410_dma_set_opfn(enum dma_ch channel, s3c2410_dma_opfn_t rtn) -{ - struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel); - - if (chan == NULL) - return -EINVAL; - - pr_debug("%s: chan=%p, op rtn=%p\n", __func__, chan, rtn); - - chan->op_fn = rtn; - - return 0; -} -EXPORT_SYMBOL(s3c2410_dma_set_opfn); - -int s3c2410_dma_set_buffdone_fn(enum dma_ch channel, s3c2410_dma_cbfn_t rtn) -{ - struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel); - - if (chan == NULL) - return -EINVAL; - - pr_debug("%s: chan=%p, callback rtn=%p\n", __func__, chan, rtn); - - chan->callback_fn = rtn; - - return 0; -} -EXPORT_SYMBOL(s3c2410_dma_set_buffdone_fn); - -int s3c2410_dma_setflags(enum dma_ch channel, unsigned int flags) -{ - struct s3c2410_dma_chan *chan = s3c_dma_lookup_channel(channel); - - if (chan == NULL) - return -EINVAL; - - chan->flags = flags; - return 0; -} -EXPORT_SYMBOL(s3c2410_dma_setflags); diff --git a/arch/arm/plat-samsung/include/plat/dma-core.h b/arch/arm/plat-samsung/include/plat/dma-core.h deleted file mode 100644 index 32ff2a92cb3c..000000000000 --- a/arch/arm/plat-samsung/include/plat/dma-core.h +++ /dev/null @@ -1,22 +0,0 @@ -/* arch/arm/plat-s3c/include/plat/dma.h - * - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * http://armlinux.simtec.co.uk/ - * - * Samsung S3C DMA core support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -extern struct s3c2410_dma_chan *s3c_dma_lookup_channel(unsigned int channel); - -extern struct s3c2410_dma_chan *s3c_dma_chan_map[]; - -/* the currently allocated channel information */ -extern struct s3c2410_dma_chan s3c2410_chans[]; - - diff --git a/arch/arm/plat-samsung/include/plat/dma-ops.h b/arch/arm/plat-samsung/include/plat/dma-ops.h deleted file mode 100644 index ce6d7634b6cb..000000000000 --- a/arch/arm/plat-samsung/include/plat/dma-ops.h +++ /dev/null @@ -1,69 +0,0 @@ -/* arch/arm/plat-samsung/include/plat/dma-ops.h - * - * Copyright (c) 2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Samsung DMA support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#ifndef __SAMSUNG_DMA_OPS_H_ -#define __SAMSUNG_DMA_OPS_H_ __FILE__ - -#include <linux/dmaengine.h> -#include <mach/dma.h> - -struct samsung_dma_req { - enum dma_transaction_type cap; - struct s3c2410_dma_client *client; -}; - -struct samsung_dma_prep { - enum dma_transaction_type cap; - enum dma_transfer_direction direction; - dma_addr_t buf; - unsigned long period; - unsigned long len; - void (*fp)(void *data); - void *fp_param; -}; - -struct samsung_dma_config { - enum dma_transfer_direction direction; - enum dma_slave_buswidth width; - dma_addr_t fifo; -}; - -struct samsung_dma_ops { - unsigned (*request)(enum dma_ch ch, struct samsung_dma_req *param, - struct device *dev, char *ch_name); - int (*release)(unsigned ch, void *param); - int (*config)(unsigned ch, struct samsung_dma_config *param); - int (*prepare)(unsigned ch, struct samsung_dma_prep *param); - int (*trigger)(unsigned ch); - int (*started)(unsigned ch); - int (*flush)(unsigned ch); - int (*stop)(unsigned ch); -}; - -extern void *samsung_dmadev_get_ops(void); -extern void *s3c_dma_get_ops(void); - -static inline void *__samsung_dma_get_ops(void) -{ - if (samsung_dma_is_dmadev()) - return samsung_dmadev_get_ops(); - else - return s3c_dma_get_ops(); -} - -/* - * samsung_dma_get_ops - * get the set of samsung dma operations - */ -#define samsung_dma_get_ops() __samsung_dma_get_ops() - -#endif /* __SAMSUNG_DMA_OPS_H_ */ diff --git a/arch/arm/plat-samsung/include/plat/dma-pl330.h b/arch/arm/plat-samsung/include/plat/dma-pl330.h deleted file mode 100644 index abe07fae71db..000000000000 --- a/arch/arm/plat-samsung/include/plat/dma-pl330.h +++ /dev/null @@ -1,121 +0,0 @@ -/* - * Copyright (C) 2010 Samsung Electronics Co. Ltd. - * Jaswinder Singh <jassi.brar@samsung.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef __DMA_PL330_H_ -#define __DMA_PL330_H_ __FILE__ - -/* - * PL330 can assign any channel to communicate with - * any of the peripherals attched to the DMAC. - * For the sake of consistency across client drivers, - * We keep the channel names unchanged and only add - * missing peripherals are added. - * Order is not important since DMA PL330 API driver - * use these just as IDs. - */ -enum dma_ch { - DMACH_UART0_RX = 0, - DMACH_UART0_TX, - DMACH_UART1_RX, - DMACH_UART1_TX, - DMACH_UART2_RX, - DMACH_UART2_TX, - DMACH_UART3_RX, - DMACH_UART3_TX, - DMACH_UART4_RX, - DMACH_UART4_TX, - DMACH_UART5_RX, - DMACH_UART5_TX, - DMACH_USI_RX, - DMACH_USI_TX, - DMACH_IRDA, - DMACH_I2S0_RX, - DMACH_I2S0_TX, - DMACH_I2S0S_TX, - DMACH_I2S1_RX, - DMACH_I2S1_TX, - DMACH_I2S2_RX, - DMACH_I2S2_TX, - DMACH_SPI0_RX, - DMACH_SPI0_TX, - DMACH_SPI1_RX, - DMACH_SPI1_TX, - DMACH_SPI2_RX, - DMACH_SPI2_TX, - DMACH_AC97_MICIN, - DMACH_AC97_PCMIN, - DMACH_AC97_PCMOUT, - DMACH_EXTERNAL, - DMACH_PWM, - DMACH_SPDIF, - DMACH_HSI_RX, - DMACH_HSI_TX, - DMACH_PCM0_TX, - DMACH_PCM0_RX, - DMACH_PCM1_TX, - DMACH_PCM1_RX, - DMACH_PCM2_TX, - DMACH_PCM2_RX, - DMACH_MSM_REQ3, - DMACH_MSM_REQ2, - DMACH_MSM_REQ1, - DMACH_MSM_REQ0, - DMACH_SLIMBUS0_RX, - DMACH_SLIMBUS0_TX, - DMACH_SLIMBUS0AUX_RX, - DMACH_SLIMBUS0AUX_TX, - DMACH_SLIMBUS1_RX, - DMACH_SLIMBUS1_TX, - DMACH_SLIMBUS2_RX, - DMACH_SLIMBUS2_TX, - DMACH_SLIMBUS3_RX, - DMACH_SLIMBUS3_TX, - DMACH_SLIMBUS4_RX, - DMACH_SLIMBUS4_TX, - DMACH_SLIMBUS5_RX, - DMACH_SLIMBUS5_TX, - DMACH_MIPI_HSI0, - DMACH_MIPI_HSI1, - DMACH_MIPI_HSI2, - DMACH_MIPI_HSI3, - DMACH_MIPI_HSI4, - DMACH_MIPI_HSI5, - DMACH_MIPI_HSI6, - DMACH_MIPI_HSI7, - DMACH_DISP1, - DMACH_MTOM_0, - DMACH_MTOM_1, - DMACH_MTOM_2, - DMACH_MTOM_3, - DMACH_MTOM_4, - DMACH_MTOM_5, - DMACH_MTOM_6, - DMACH_MTOM_7, - /* END Marker, also used to denote a reserved channel */ - DMACH_MAX, -}; - -struct s3c2410_dma_client { - char *name; -}; - -static inline bool samsung_dma_has_circular(void) -{ - return true; -} - -static inline bool samsung_dma_is_dmadev(void) -{ - return true; -} - -#include <plat/dma-ops.h> - -#endif /* __DMA_PL330_H_ */ diff --git a/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h b/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h deleted file mode 100644 index bd3a6db14cbb..000000000000 --- a/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h +++ /dev/null @@ -1,73 +0,0 @@ -/* linux/arch/arm/plat-samsung/include/plat/dma-s3c24xx.h - * - * Copyright (C) 2006 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * - * Samsung S3C24XX DMA support - per SoC functions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include <plat/dma-core.h> - -extern struct bus_type dma_subsys; -extern struct s3c2410_dma_chan s3c2410_chans[S3C_DMA_CHANNELS]; - -#define DMA_CH_VALID (1<<31) -#define DMA_CH_NEVER (1<<30) - -/* struct s3c24xx_dma_map - * - * this holds the mapping information for the channel selected - * to be connected to the specified device -*/ - -struct s3c24xx_dma_map { - const char *name; - - unsigned long channels[S3C_DMA_CHANNELS]; -}; - -struct s3c24xx_dma_selection { - struct s3c24xx_dma_map *map; - unsigned long map_size; - unsigned long dcon_mask; - - void (*select)(struct s3c2410_dma_chan *chan, - struct s3c24xx_dma_map *map); -}; - -extern int s3c24xx_dma_init_map(struct s3c24xx_dma_selection *sel); - -/* struct s3c24xx_dma_order_ch - * - * channel map for one of the `enum dma_ch` dma channels. the list - * entry contains a set of low-level channel numbers, orred with - * DMA_CH_VALID, which are checked in the order in the array. -*/ - -struct s3c24xx_dma_order_ch { - unsigned int list[S3C_DMA_CHANNELS]; /* list of channels */ - unsigned int flags; /* flags */ -}; - -/* struct s3c24xx_dma_order - * - * information provided by either the core or the board to give the - * dma system a hint on how to allocate channels -*/ - -struct s3c24xx_dma_order { - struct s3c24xx_dma_order_ch channels[DMACH_MAX]; -}; - -extern int s3c24xx_dma_order_set(struct s3c24xx_dma_order *map); - -/* DMA init code, called from the cpu support code */ - -extern int s3c2410_dma_init(void); - -extern int s3c24xx_dma_init(unsigned int channels, unsigned int irq, - unsigned int stride); diff --git a/arch/arm/plat-samsung/include/plat/dma.h b/arch/arm/plat-samsung/include/plat/dma.h deleted file mode 100644 index 7b02143ccd9a..000000000000 --- a/arch/arm/plat-samsung/include/plat/dma.h +++ /dev/null @@ -1,130 +0,0 @@ -/* arch/arm/plat-samsung/include/plat/dma.h - * - * Copyright (C) 2003-2006 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * - * Samsung S3C DMA support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __PLAT_DMA_H -#define __PLAT_DMA_H - -#include <linux/dma-mapping.h> - -enum s3c2410_dma_buffresult { - S3C2410_RES_OK, - S3C2410_RES_ERR, - S3C2410_RES_ABORT -}; - -/* enum s3c2410_chan_op - * - * operation codes passed to the DMA code by the user, and also used - * to inform the current channel owner of any changes to the system state -*/ - -enum s3c2410_chan_op { - S3C2410_DMAOP_START, - S3C2410_DMAOP_STOP, - S3C2410_DMAOP_PAUSE, - S3C2410_DMAOP_RESUME, - S3C2410_DMAOP_FLUSH, - S3C2410_DMAOP_TIMEOUT, /* internal signal to handler */ - S3C2410_DMAOP_STARTED, /* indicate channel started */ -}; - -struct s3c2410_dma_client { - char *name; -}; - -struct s3c2410_dma_chan; -enum dma_ch; - -/* s3c2410_dma_cbfn_t - * - * buffer callback routine type -*/ - -typedef void (*s3c2410_dma_cbfn_t)(struct s3c2410_dma_chan *, - void *buf, int size, - enum s3c2410_dma_buffresult result); - -typedef int (*s3c2410_dma_opfn_t)(struct s3c2410_dma_chan *, - enum s3c2410_chan_op ); - - - -/* s3c2410_dma_request - * - * request a dma channel exclusivley -*/ - -extern int s3c2410_dma_request(enum dma_ch channel, - struct s3c2410_dma_client *, void *dev); - - -/* s3c2410_dma_ctrl - * - * change the state of the dma channel -*/ - -extern int s3c2410_dma_ctrl(enum dma_ch channel, enum s3c2410_chan_op op); - -/* s3c2410_dma_setflags - * - * set the channel's flags to a given state -*/ - -extern int s3c2410_dma_setflags(enum dma_ch channel, - unsigned int flags); - -/* s3c2410_dma_free - * - * free the dma channel (will also abort any outstanding operations) -*/ - -extern int s3c2410_dma_free(enum dma_ch channel, struct s3c2410_dma_client *); - -/* s3c2410_dma_enqueue - * - * place the given buffer onto the queue of operations for the channel. - * The buffer must be allocated from dma coherent memory, or the Dcache/WB - * drained before the buffer is given to the DMA system. -*/ - -extern int s3c2410_dma_enqueue(enum dma_ch channel, void *id, - dma_addr_t data, int size); - -/* s3c2410_dma_config - * - * configure the dma channel -*/ - -extern int s3c2410_dma_config(enum dma_ch channel, int xferunit); - -/* s3c2410_dma_devconfig - * - * configure the device we're talking to -*/ - -extern int s3c2410_dma_devconfig(enum dma_ch channel, - enum dma_data_direction source, unsigned long devaddr); - -/* s3c2410_dma_getposition - * - * get the position that the dma transfer is currently at -*/ - -extern int s3c2410_dma_getposition(enum dma_ch channel, - dma_addr_t *src, dma_addr_t *dest); - -extern int s3c2410_dma_set_opfn(enum dma_ch, s3c2410_dma_opfn_t rtn); -extern int s3c2410_dma_set_buffdone_fn(enum dma_ch, s3c2410_dma_cbfn_t rtn); - -#include <plat/dma-ops.h> - -#endif diff --git a/arch/arm/plat-samsung/include/plat/regs-dma.h b/arch/arm/plat-samsung/include/plat/regs-dma.h deleted file mode 100644 index a7d622ef16af..000000000000 --- a/arch/arm/plat-samsung/include/plat/regs-dma.h +++ /dev/null @@ -1,151 +0,0 @@ -/* arch/arm/plat-samsung/include/plat/regs-dma.h - * - * Copyright (C) 2003-2006 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * - * Samsung S3C24XX DMA support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_PLAT_REGS_DMA_H -#define __ASM_PLAT_REGS_DMA_H __FILE__ - -#define S3C2410_DMA_DISRC (0x00) -#define S3C2410_DMA_DISRCC (0x04) -#define S3C2410_DMA_DIDST (0x08) -#define S3C2410_DMA_DIDSTC (0x0C) -#define S3C2410_DMA_DCON (0x10) -#define S3C2410_DMA_DSTAT (0x14) -#define S3C2410_DMA_DCSRC (0x18) -#define S3C2410_DMA_DCDST (0x1C) -#define S3C2410_DMA_DMASKTRIG (0x20) -#define S3C2412_DMA_DMAREQSEL (0x24) -#define S3C2443_DMA_DMAREQSEL (0x24) - -#define S3C2410_DISRCC_INC (1 << 0) -#define S3C2410_DISRCC_APB (1 << 1) - -#define S3C2410_DMASKTRIG_STOP (1 << 2) -#define S3C2410_DMASKTRIG_ON (1 << 1) -#define S3C2410_DMASKTRIG_SWTRIG (1 << 0) - -#define S3C2410_DCON_DEMAND (0 << 31) -#define S3C2410_DCON_HANDSHAKE (1 << 31) -#define S3C2410_DCON_SYNC_PCLK (0 << 30) -#define S3C2410_DCON_SYNC_HCLK (1 << 30) - -#define S3C2410_DCON_INTREQ (1 << 29) - -#define S3C2410_DCON_CH0_XDREQ0 (0 << 24) -#define S3C2410_DCON_CH0_UART0 (1 << 24) -#define S3C2410_DCON_CH0_SDI (2 << 24) -#define S3C2410_DCON_CH0_TIMER (3 << 24) -#define S3C2410_DCON_CH0_USBEP1 (4 << 24) - -#define S3C2410_DCON_CH1_XDREQ1 (0 << 24) -#define S3C2410_DCON_CH1_UART1 (1 << 24) -#define S3C2410_DCON_CH1_I2SSDI (2 << 24) -#define S3C2410_DCON_CH1_SPI (3 << 24) -#define S3C2410_DCON_CH1_USBEP2 (4 << 24) - -#define S3C2410_DCON_CH2_I2SSDO (0 << 24) -#define S3C2410_DCON_CH2_I2SSDI (1 << 24) -#define S3C2410_DCON_CH2_SDI (2 << 24) -#define S3C2410_DCON_CH2_TIMER (3 << 24) -#define S3C2410_DCON_CH2_USBEP3 (4 << 24) - -#define S3C2410_DCON_CH3_UART2 (0 << 24) -#define S3C2410_DCON_CH3_SDI (1 << 24) -#define S3C2410_DCON_CH3_SPI (2 << 24) -#define S3C2410_DCON_CH3_TIMER (3 << 24) -#define S3C2410_DCON_CH3_USBEP4 (4 << 24) - -#define S3C2410_DCON_SRCSHIFT (24) -#define S3C2410_DCON_SRCMASK (7 << 24) - -#define S3C2410_DCON_BYTE (0 << 20) -#define S3C2410_DCON_HALFWORD (1 << 20) -#define S3C2410_DCON_WORD (2 << 20) - -#define S3C2410_DCON_AUTORELOAD (0 << 22) -#define S3C2410_DCON_NORELOAD (1 << 22) -#define S3C2410_DCON_HWTRIG (1 << 23) - -#ifdef CONFIG_CPU_S3C2440 - -#define S3C2440_DIDSTC_CHKINT (1 << 2) - -#define S3C2440_DCON_CH0_I2SSDO (5 << 24) -#define S3C2440_DCON_CH0_PCMIN (6 << 24) - -#define S3C2440_DCON_CH1_PCMOUT (5 << 24) -#define S3C2440_DCON_CH1_SDI (6 << 24) - -#define S3C2440_DCON_CH2_PCMIN (5 << 24) -#define S3C2440_DCON_CH2_MICIN (6 << 24) - -#define S3C2440_DCON_CH3_MICIN (5 << 24) -#define S3C2440_DCON_CH3_PCMOUT (6 << 24) -#endif /* CONFIG_CPU_S3C2440 */ - -#ifdef CONFIG_CPU_S3C2412 - -#define S3C2412_DMAREQSEL_SRC(x) ((x) << 1) - -#define S3C2412_DMAREQSEL_HW (1) - -#define S3C2412_DMAREQSEL_SPI0TX S3C2412_DMAREQSEL_SRC(0) -#define S3C2412_DMAREQSEL_SPI0RX S3C2412_DMAREQSEL_SRC(1) -#define S3C2412_DMAREQSEL_SPI1TX S3C2412_DMAREQSEL_SRC(2) -#define S3C2412_DMAREQSEL_SPI1RX S3C2412_DMAREQSEL_SRC(3) -#define S3C2412_DMAREQSEL_I2STX S3C2412_DMAREQSEL_SRC(4) -#define S3C2412_DMAREQSEL_I2SRX S3C2412_DMAREQSEL_SRC(5) -#define S3C2412_DMAREQSEL_TIMER S3C2412_DMAREQSEL_SRC(9) -#define S3C2412_DMAREQSEL_SDI S3C2412_DMAREQSEL_SRC(10) -#define S3C2412_DMAREQSEL_USBEP1 S3C2412_DMAREQSEL_SRC(13) -#define S3C2412_DMAREQSEL_USBEP2 S3C2412_DMAREQSEL_SRC(14) -#define S3C2412_DMAREQSEL_USBEP3 S3C2412_DMAREQSEL_SRC(15) -#define S3C2412_DMAREQSEL_USBEP4 S3C2412_DMAREQSEL_SRC(16) -#define S3C2412_DMAREQSEL_XDREQ0 S3C2412_DMAREQSEL_SRC(17) -#define S3C2412_DMAREQSEL_XDREQ1 S3C2412_DMAREQSEL_SRC(18) -#define S3C2412_DMAREQSEL_UART0_0 S3C2412_DMAREQSEL_SRC(19) -#define S3C2412_DMAREQSEL_UART0_1 S3C2412_DMAREQSEL_SRC(20) -#define S3C2412_DMAREQSEL_UART1_0 S3C2412_DMAREQSEL_SRC(21) -#define S3C2412_DMAREQSEL_UART1_1 S3C2412_DMAREQSEL_SRC(22) -#define S3C2412_DMAREQSEL_UART2_0 S3C2412_DMAREQSEL_SRC(23) -#define S3C2412_DMAREQSEL_UART2_1 S3C2412_DMAREQSEL_SRC(24) -#endif /* CONFIG_CPU_S3C2412 */ - -#if defined(CONFIG_CPU_S3C2416) || defined(CONFIG_CPU_S3C2443) - -#define S3C2443_DMAREQSEL_SRC(x) ((x) << 1) - -#define S3C2443_DMAREQSEL_HW (1) - -#define S3C2443_DMAREQSEL_SPI0TX S3C2443_DMAREQSEL_SRC(0) -#define S3C2443_DMAREQSEL_SPI0RX S3C2443_DMAREQSEL_SRC(1) -#define S3C2443_DMAREQSEL_SPI1TX S3C2443_DMAREQSEL_SRC(2) -#define S3C2443_DMAREQSEL_SPI1RX S3C2443_DMAREQSEL_SRC(3) -#define S3C2443_DMAREQSEL_I2STX S3C2443_DMAREQSEL_SRC(4) -#define S3C2443_DMAREQSEL_I2SRX S3C2443_DMAREQSEL_SRC(5) -#define S3C2443_DMAREQSEL_TIMER S3C2443_DMAREQSEL_SRC(9) -#define S3C2443_DMAREQSEL_SDI S3C2443_DMAREQSEL_SRC(10) -#define S3C2443_DMAREQSEL_XDREQ0 S3C2443_DMAREQSEL_SRC(17) -#define S3C2443_DMAREQSEL_XDREQ1 S3C2443_DMAREQSEL_SRC(18) -#define S3C2443_DMAREQSEL_UART0_0 S3C2443_DMAREQSEL_SRC(19) -#define S3C2443_DMAREQSEL_UART0_1 S3C2443_DMAREQSEL_SRC(20) -#define S3C2443_DMAREQSEL_UART1_0 S3C2443_DMAREQSEL_SRC(21) -#define S3C2443_DMAREQSEL_UART1_1 S3C2443_DMAREQSEL_SRC(22) -#define S3C2443_DMAREQSEL_UART2_0 S3C2443_DMAREQSEL_SRC(23) -#define S3C2443_DMAREQSEL_UART2_1 S3C2443_DMAREQSEL_SRC(24) -#define S3C2443_DMAREQSEL_UART3_0 S3C2443_DMAREQSEL_SRC(25) -#define S3C2443_DMAREQSEL_UART3_1 S3C2443_DMAREQSEL_SRC(26) -#define S3C2443_DMAREQSEL_PCMOUT S3C2443_DMAREQSEL_SRC(27) -#define S3C2443_DMAREQSEL_PCMIN S3C2443_DMAREQSEL_SRC(28) -#define S3C2443_DMAREQSEL_MICIN S3C2443_DMAREQSEL_SRC(29) -#endif /* CONFIG_CPU_S3C2443 */ - -#endif /* __ASM_PLAT_REGS_DMA_H */ diff --git a/arch/arm/plat-samsung/s3c-dma-ops.c b/arch/arm/plat-samsung/s3c-dma-ops.c deleted file mode 100644 index 98b10ba67dc7..000000000000 --- a/arch/arm/plat-samsung/s3c-dma-ops.c +++ /dev/null @@ -1,146 +0,0 @@ -/* linux/arch/arm/plat-samsung/s3c-dma-ops.c - * - * Copyright (c) 2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Samsung S3C-DMA Operations - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include <linux/kernel.h> -#include <linux/errno.h> -#include <linux/slab.h> -#include <linux/types.h> -#include <linux/export.h> - -#include <mach/dma.h> - -struct cb_data { - void (*fp) (void *); - void *fp_param; - unsigned ch; - struct list_head node; -}; - -static LIST_HEAD(dma_list); - -static void s3c_dma_cb(struct s3c2410_dma_chan *channel, void *param, - int size, enum s3c2410_dma_buffresult res) -{ - struct cb_data *data = param; - - data->fp(data->fp_param); -} - -static unsigned s3c_dma_request(enum dma_ch dma_ch, - struct samsung_dma_req *param, - struct device *dev, char *ch_name) -{ - struct cb_data *data; - - if (s3c2410_dma_request(dma_ch, param->client, NULL) < 0) { - s3c2410_dma_free(dma_ch, param->client); - return 0; - } - - if (param->cap == DMA_CYCLIC) - s3c2410_dma_setflags(dma_ch, S3C2410_DMAF_CIRCULAR); - - data = kzalloc(sizeof(struct cb_data), GFP_KERNEL); - data->ch = dma_ch; - list_add_tail(&data->node, &dma_list); - - return (unsigned)dma_ch; -} - -static int s3c_dma_release(unsigned ch, void *param) -{ - struct cb_data *data; - - list_for_each_entry(data, &dma_list, node) - if (data->ch == ch) - break; - list_del(&data->node); - - s3c2410_dma_free(ch, param); - kfree(data); - - return 0; -} - -static int s3c_dma_config(unsigned ch, struct samsung_dma_config *param) -{ - s3c2410_dma_devconfig(ch, param->direction, param->fifo); - s3c2410_dma_config(ch, param->width); - - return 0; -} - -static int s3c_dma_prepare(unsigned ch, struct samsung_dma_prep *param) -{ - struct cb_data *data; - dma_addr_t pos = param->buf; - dma_addr_t end = param->buf + param->len; - - list_for_each_entry(data, &dma_list, node) - if (data->ch == ch) - break; - - if (!data->fp) { - s3c2410_dma_set_buffdone_fn(ch, s3c_dma_cb); - data->fp = param->fp; - data->fp_param = param->fp_param; - } - - if (param->cap != DMA_CYCLIC) { - s3c2410_dma_enqueue(ch, (void *)data, param->buf, param->len); - return 0; - } - - while (pos < end) { - s3c2410_dma_enqueue(ch, (void *)data, pos, param->period); - pos += param->period; - } - - return 0; -} - -static inline int s3c_dma_trigger(unsigned ch) -{ - return s3c2410_dma_ctrl(ch, S3C2410_DMAOP_START); -} - -static inline int s3c_dma_started(unsigned ch) -{ - return s3c2410_dma_ctrl(ch, S3C2410_DMAOP_STARTED); -} - -static inline int s3c_dma_flush(unsigned ch) -{ - return s3c2410_dma_ctrl(ch, S3C2410_DMAOP_FLUSH); -} - -static inline int s3c_dma_stop(unsigned ch) -{ - return s3c2410_dma_ctrl(ch, S3C2410_DMAOP_STOP); -} - -static struct samsung_dma_ops s3c_dma_ops = { - .request = s3c_dma_request, - .release = s3c_dma_release, - .config = s3c_dma_config, - .prepare = s3c_dma_prepare, - .trigger = s3c_dma_trigger, - .started = s3c_dma_started, - .flush = s3c_dma_flush, - .stop = s3c_dma_stop, -}; - -void *s3c_dma_get_ops(void) -{ - return &s3c_dma_ops; -} -EXPORT_SYMBOL(s3c_dma_get_ops); diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig index f2b2c4e87aef..faf30a4e642b 100644 --- a/drivers/dma/Kconfig +++ b/drivers/dma/Kconfig @@ -184,7 +184,7 @@ config TEGRA20_APB_DMA config S3C24XX_DMAC tristate "Samsung S3C24XX DMA support" - depends on ARCH_S3C24XX && !S3C24XX_DMA + depends on ARCH_S3C24XX select DMA_ENGINE select DMA_VIRTUAL_CHANNELS help diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index 0cf2e1d9cb17..cedb41c95dae 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig @@ -1242,34 +1242,6 @@ config RTC_DRV_AT91SAM9 probably want to use the real RTC block instead of the "RTT as an RTC" driver. -config RTC_DRV_AT91SAM9_RTT - int - range 0 1 - default 0 - depends on RTC_DRV_AT91SAM9 - help - This option is only relevant for legacy board support and - won't be used when booting a DT board. - - More than one RTT module is available. You can choose which - one will be used as an RTC. The default of zero is normally - OK to use, though some systems use that for non-RTC purposes. - -config RTC_DRV_AT91SAM9_GPBR - int - range 0 3 - default 0 - prompt "Backup Register Number" - depends on RTC_DRV_AT91SAM9 - help - This option is only relevant for legacy board support and - won't be used when booting a DT board. - - The RTC driver needs to use one of the General Purpose Backup - Registers (GPBRs) as well as the RTT. You can choose which one - will be used. The default of zero is normally OK to use, but - on some systems other software needs to use that register. - config RTC_DRV_AU1XXX tristate "Au1xxx Counter0 RTC support" depends on MIPS_ALCHEMY |
