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* arm: mxs: Add debug outputs and comments to mxs SPL source filesGraeme Russ2015-02-101-0/+18
| | | | | | | | | | | | | It is difficult to track down fail to boot issues in the mxs SPL. Implement the following to make it easier: - Add debug outputs to allow tracing of SPL progress in order to track where failure to boot occurs. DEUBUG and CONFIG_SPL_SERIAL_SUPPORT must be defined to enable debug output in SPL - Add TODO comments where it is not clear if the code is doing what it is meant to be doing, even tough the board boots properly (these comments refer to existing code, not to any code added by this patch) Signed-off-by: Graeme Russ <gruss@tss-engineering.com>
* arm: mxs: Wait for DRAM to startMarek Vasut2014-09-291-1/+7
| | | | | | | | | Instead of waiting for a fixed period of time and hoping for the best that the DRAM will start, read back an EMI status register which tells us exactly when the DRAM started. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* arm: mxs: Wait when disabling VDDMEM current limiterMarek Vasut2014-09-291-0/+5
| | | | | | | | | According to i.MX23 datasheet Table 32-17, we must wait for the supply to settle before disabling the current limiter. Indeed, not waiting a little here causes the system to crash at times. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-241-17/+1
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* arm: mx23: Fix VDDMEM misconfigurationMarek Vasut2013-05-061-10/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | The VDDMEM ramped up in very weird way as it was horribly misconfigured. Instead of setting up VDDMEM in one swipe, let it rise slowly the same way as VDDD and VDDA in spl_power_init.c and then only clear ILIMIT before memory gets inited. This makes sure the VDDMEM rises sanely, not jumps up and down as it did till now. The VDDMEM prior to this change did this: 2V0____ .--------2V5 | `--' 0V____| The VDDMEM now does this: 2V0_____,-----------2V5 / 0V__| Moreover, VDDIO on MX23 uses 25mV steps while MX28 uses 50mV steps, fix this difference too. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
* mxs: Explain why some mx23 DDR registers are not configuredFabio Estevam2013-05-061-0/+9
| | | | | | | Put an explanation in the source code as to why some DDR registers do not need to be configured. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx23: Operate DDR voltage supply at 2.5VFabio Estevam2013-05-061-2/+2
| | | | | | | After the recent fixes in the mx23 DDR setup, it is safe to operate DDR voltage at the recommended 2.5V voltage level again. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mxs: spl_mem_init: Change EMI port priorityFabio Estevam2013-05-051-1/+1
| | | | | | | | | FSL bootlets code set the PORT_PRIORITY_ORDER field of register HW_EMI_CTRL as 0x2, which means: PORT0231 = 0x02 Priority Order: AXI0, AHB2, AHB3, AHB1 Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mxs: spl_mem_init: Skip the initialization of some DRAM_CTL registersFabio Estevam2013-05-051-2/+15
| | | | | | | | | | | | | HW_DRAM_CTL27, HW_DRAM_CTL28 and HW_DRAM_CTL35 are not initialized as per FSL bootlets code. mx23 Reference Manual mark HW_DRAM_CTL27 and HW_DRAM_CTL28 as "reserved". HW_DRAM_CTL8 is setup as the last element. So skip the initialization of these DRAM_CTL registers. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mxs: spl_mem_init: Remove erroneous DDR settingFabio Estevam2013-05-051-4/+0
| | | | | | | | On mx23 there is no 'DRAM init complete' in register HW_DRAM_CTL18. Remove this erroneous setting. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mxs: spl_mem_init: Fix comment about start bitFabio Estevam2013-05-051-1/+1
| | | | | | Start bit is part of HW_DRAM_CTL8 register, so fix the comment. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx23: Put back RAM voltage level to its original valueFabio Estevam2013-04-281-2/+2
| | | | | | | | | | commit 5c2f444c9 (mxs: Reset the EMI block on mx23) changed the DDR voltage level, which causes mx23evk to fail to load a kernel. Put back the original values, so that mx23evk can boot a kernel again. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Tested-by: Robert Nelson <robertcnelson@gmail.com>
* mxs: spl_mem_init: Align DDR2 init with FSL bootlets sourceFabio Estevam2013-03-201-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | Currently the following kernel hang happens when loading a 2.6.35 kernel from Freeescale on a mx28evk board: RPC: Registered tcp transport module. RPC: Registered tcp NFSv4.1 backchannel transport module. Bus freq driver module loaded IMX usb wakeup probe usb h1 wakeup device is registered mxs_cpu_init: cpufreq init finished ... Loading the same kernel using the bootlets from the imx-bootlets-src-10.12.01 package, the hang does not occur. Comparing the DDR2 initialization from the bootlets code against the U-boot one, we can notice some mismatches, and after applying the same initialization into U-boot the 2.6.35 kernel can boot normally. Also tested with 'mtest' command, which runs succesfully. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Otavio Salvador <otavio@ossystems.com.br> Tested-by: Marek Vasut <marex@denx.de>
* mx23: Document the tRAS lockout setting in memory initializationOtavio Salvador2013-03-071-0/+4
| | | | | | | | | Add a comment about the tRAS lockout setting of HW_DRAM_CTL08 to enable the 'Fast Auto Pre-Charge' found in the memory chip. The setting is applied after memory initialization and it is worth document it. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* mxs: Reset the EMI block on mx23Marek Vasut2013-03-071-2/+10
| | | | | | | | | | | | | | | | The real reason for memory instability was the fact that the EMI block was gated and not reset throughout the boards' operation. This patch resets the EMI block properly while also reverts the memory voltage bump. The memory stability issues were caused by the EMI not being reset properly and thus there is no longer need to run the memory at higher voltage than it ought to run at. This partly reverts 8303ed128a55519f19c5f11087032d4bc4e0537a . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
* mxs: Use __weak annotation to simplify codeFabio Estevam2013-01-281-3/+2
| | | | | | | Using the __weak annotation can make the code cleaner. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de>
* mxs: Boost the memory power supplyMarek Vasut2013-01-281-2/+2
| | | | | | | | | | | The memory power supply on MX23 didn't pump out enough juice into the DRAM chip, thus caused occasional memory corruption. Fix this. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Otavio Salvador <otavio@ossystems.com.br>
* mxs: Fix the memory init for MX23Otavio Salvador2013-01-211-15/+78
| | | | | | | | | | The memory init is slightly different on MX23, thus split the memory init for mx23 and mx28 into different functions. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
* mx23: SPL: Initialize DDR at 133MHzOtavio Salvador2013-01-211-0/+20
| | | | | | | Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* mxs: SPL: Generalize memory initializationOtavio Salvador2012-12-071-6/+13
| | | | | | | | Use a generic 'dram_vals[]' array that has the full initialization sequence and rename the initialization method so it doesn't has a frequency on its name. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* mxs: Staticize SPL functionsMarek Vasut2012-12-041-4/+4
| | | | | | | | | The MXS SPL didn't mark local functions "static". Fix it. This also makes the SPL smaller by roughly 300 bytes. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* mxs: Properly setup VDDD in power supply setup codeMarek Vasut2012-12-041-13/+0
| | | | | | | | | The memory setup code adjusted the VDDD voltage. Remove this adjustment and configure the VDDD voltage correctly in the power supply setup code. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* mxs: Remove not required include of iomux-mx28.hOtavio Salvador2012-09-011-1/+0
| | | | | | | The iomux-mx28.h include is not required on spl_mem_init.c so it has been droped. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* mxs: Reowork SPL to use 'mxs' prefix for methodsOtavio Salvador2012-09-011-15/+15
| | | | Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* mxs: prefix register structs with 'mxs' prefixOtavio Salvador2012-09-011-12/+12
| | | | Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* mxs: reorganize source directory for easy sharing of code in i.MXS SoCsOtavio Salvador2012-09-011-0/+250
Most code can be shared between i.MX23 and i.MX28 as both are from i.MXS family; this source directory structure makes easy to share code among them. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Stefano Babic <sbabic@denx.de>
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