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-rw-r--r--arch/arm/mach-uniphier/boot-mode/Makefile5
-rw-r--r--arch/arm/mach-uniphier/boot-mode/boot-mode-ld20.c21
-rw-r--r--arch/arm/mach-uniphier/boot-mode/boot-mode-ld4.c6
-rw-r--r--arch/arm/mach-uniphier/boot-mode/boot-mode-pro5.c2
-rw-r--r--arch/arm/mach-uniphier/boot-mode/boot-mode-pxs2.c14
-rw-r--r--arch/arm/mach-uniphier/boot-mode/boot-mode-sld3.c2
-rw-r--r--arch/arm/mach-uniphier/boot-mode/boot-mode.c28
-rw-r--r--arch/arm/mach-uniphier/boot-mode/cmd_pinmon.c3
-rw-r--r--arch/arm/mach-uniphier/boot-mode/spl_board.c128
9 files changed, 190 insertions, 19 deletions
diff --git a/arch/arm/mach-uniphier/boot-mode/Makefile b/arch/arm/mach-uniphier/boot-mode/Makefile
index 6cd096ec5f..a8980210b1 100644
--- a/arch/arm/mach-uniphier/boot-mode/Makefile
+++ b/arch/arm/mach-uniphier/boot-mode/Makefile
@@ -11,6 +11,11 @@ obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += boot-mode-ld4.o
obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += boot-mode-pro5.o
obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += boot-mode-pxs2.o
obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += boot-mode-pxs2.o
+obj-$(CONFIG_ARCH_UNIPHIER_LD11) += boot-mode-ld20.o
obj-$(CONFIG_ARCH_UNIPHIER_LD20) += boot-mode-ld20.o
+ifdef CONFIG_SPL_BUILD
+obj-$(CONFIG_SPL_BOARD_LOAD_IMAGE) += spl_board.o
+else
obj-$(CONFIG_CMD_PINMON) += cmd_pinmon.o
+endif
diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode-ld20.c b/arch/arm/mach-uniphier/boot-mode/boot-mode-ld20.c
index b092c1bde8..24255a0f50 100644
--- a/arch/arm/mach-uniphier/boot-mode/boot-mode-ld20.c
+++ b/arch/arm/mach-uniphier/boot-mode/boot-mode-ld20.c
@@ -9,6 +9,7 @@
#include <linux/io.h>
#include "../sg-regs.h"
+#include "../soc-info.h"
#include "boot-device.h"
static struct boot_device_info boot_device_table[] = {
@@ -43,7 +44,7 @@ static struct boot_device_info boot_device_table[] = {
{BOOT_DEVICE_MMC1, "eMMC (High Speed SDR, 8bit, 1.8V, Training Off)"},
{BOOT_DEVICE_MMC1, "eMMC (High Speed SDR, 8bit, 1.8V, Training On)"},
{BOOT_DEVICE_MMC1, "eMMC (Legacy, 4bit, 1.8V, Training Off)"},
- {BOOT_DEVICE_NOR, "NOR Boot (XECS1)"},
+ {BOOT_DEVICE_NOR, "NOR (XECS1)"},
};
static int get_boot_mode_sel(void)
@@ -54,8 +55,24 @@ static int get_boot_mode_sel(void)
u32 uniphier_ld20_boot_device(void)
{
int boot_mode;
+ u32 usb_boot_mask;
- if (~readl(SG_PINMON0) & 0x00000780)
+ switch (uniphier_get_soc_type()) {
+#if defined(CONFIG_ARCH_UNIPHIER_LD11)
+ case SOC_UNIPHIER_LD11:
+ usb_boot_mask = 0x00000080;
+ break;
+#endif
+#if defined(CONFIG_ARCH_UNIPHIER_LD20)
+ case SOC_UNIPHIER_LD20:
+ usb_boot_mask = 0x00000780;
+ break;
+#endif
+ default:
+ BUG();
+ }
+
+ if (~readl(SG_PINMON0) & usb_boot_mask)
return BOOT_DEVICE_USB;
boot_mode = get_boot_mode_sel();
diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode-ld4.c b/arch/arm/mach-uniphier/boot-mode/boot-mode-ld4.c
index 0597618aa4..b066ed9c4b 100644
--- a/arch/arm/mach-uniphier/boot-mode/boot-mode-ld4.c
+++ b/arch/arm/mach-uniphier/boot-mode/boot-mode-ld4.c
@@ -36,14 +36,14 @@ struct boot_device_info boot_device_table[] = {
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 24, ONFI, Addr 5)"},
- {BOOT_DEVICE_MMC1, "eMMC Boot (3.3V)"},
- {BOOT_DEVICE_MMC1, "eMMC Boot (1.8V)"},
+ {BOOT_DEVICE_MMC1, "eMMC (3.3V)"},
+ {BOOT_DEVICE_MMC1, "eMMC (1.8V)"},
{BOOT_DEVICE_NONE, "Reserved"},
{BOOT_DEVICE_NONE, "Reserved"},
{BOOT_DEVICE_NONE, "Reserved"},
{BOOT_DEVICE_NONE, "Reserved"},
{BOOT_DEVICE_NONE, "Reserved"},
- {BOOT_DEVICE_NOR, "NOR Boot"},
+ {BOOT_DEVICE_NOR, "NOR (XECS0)"},
};
static int get_boot_mode_sel(void)
diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode-pro5.c b/arch/arm/mach-uniphier/boot-mode/boot-mode-pro5.c
index f9726f1f66..450c43bba5 100644
--- a/arch/arm/mach-uniphier/boot-mode/boot-mode-pro5.c
+++ b/arch/arm/mach-uniphier/boot-mode/boot-mode-pro5.c
@@ -37,7 +37,7 @@ static struct boot_device_info boot_device_table[] = {
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 4)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 4)"},
{BOOT_DEVICE_NONE, "Reserved"},
- {BOOT_DEVICE_MMC1, "eMMC Boot (1.8V)"},
+ {BOOT_DEVICE_MMC1, "eMMC (1.8V)"},
{BOOT_DEVICE_NONE, "Reserved"},
{BOOT_DEVICE_NONE, "Reserved"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128MB, Addr 5)"},
diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode-pxs2.c b/arch/arm/mach-uniphier/boot-mode/boot-mode-pxs2.c
index 4b06f74712..20ff7731d5 100644
--- a/arch/arm/mach-uniphier/boot-mode/boot-mode-pxs2.c
+++ b/arch/arm/mach-uniphier/boot-mode/boot-mode-pxs2.c
@@ -32,17 +32,17 @@ static struct boot_device_info boot_device_table[] = {
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 4)"},
- {BOOT_DEVICE_MMC1, "eMMC Boot (1.8V)"},
+ {BOOT_DEVICE_MMC1, "eMMC (1.8V)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI, Addr 5)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 4)"},
{BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI, Addr 4)"},
- {BOOT_DEVICE_SPI, "SPI 3Byte CS0"},
- {BOOT_DEVICE_SPI, "SPI 4Byte CS0"},
- {BOOT_DEVICE_SPI, "SPI 3Byte CS1"},
- {BOOT_DEVICE_SPI, "SPI 4Byte CS1"},
- {BOOT_DEVICE_SPI, "SPI 4Byte CS0"},
- {BOOT_DEVICE_SPI, "SPI 3Byte CS0"},
+ {BOOT_DEVICE_SPI, "SPI (3Byte CS0)"},
+ {BOOT_DEVICE_SPI, "SPI (4Byte CS0)"},
+ {BOOT_DEVICE_SPI, "SPI (3Byte CS1)"},
+ {BOOT_DEVICE_SPI, "SPI (4Byte CS1)"},
+ {BOOT_DEVICE_SPI, "SPI (4Byte CS0)"},
+ {BOOT_DEVICE_SPI, "SPI (3Byte CS0)"},
{BOOT_DEVICE_NONE, "Reserved"},
};
diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode-sld3.c b/arch/arm/mach-uniphier/boot-mode/boot-mode-sld3.c
index a4a3c47bfa..ddf8259c2c 100644
--- a/arch/arm/mach-uniphier/boot-mode/boot-mode-sld3.c
+++ b/arch/arm/mach-uniphier/boot-mode/boot-mode-sld3.c
@@ -12,7 +12,7 @@
#include "boot-device.h"
static struct boot_device_info boot_device_table[] = {
- {BOOT_DEVICE_NOR, "NOR boot"},
+ {BOOT_DEVICE_NOR, "NOR (XECS0)"},
{BOOT_DEVICE_NONE, "External Master"},
{BOOT_DEVICE_NONE, "Reserved"},
{BOOT_DEVICE_NONE, "Reserved"},
diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode.c b/arch/arm/mach-uniphier/boot-mode/boot-mode.c
index b180f44ce8..d34b9af9a1 100644
--- a/arch/arm/mach-uniphier/boot-mode/boot-mode.c
+++ b/arch/arm/mach-uniphier/boot-mode/boot-mode.c
@@ -39,7 +39,8 @@ u32 spl_boot_device_raw(void)
case SOC_UNIPHIER_LD6B:
return uniphier_pxs2_boot_device();
#endif
-#if defined(CONFIG_ARCH_UNIPHIER_LD20)
+#if defined(CONFIG_ARCH_UNIPHIER_LD11) || defined(CONFIG_ARCH_UNIPHIER_LD20)
+ case SOC_UNIPHIER_LD11:
case SOC_UNIPHIER_LD20:
return uniphier_ld20_boot_device();
#endif
@@ -50,11 +51,30 @@ u32 spl_boot_device_raw(void)
u32 spl_boot_device(void)
{
- u32 ret;
+ u32 mode;
- ret = spl_boot_device_raw();
+ mode = spl_boot_device_raw();
- return ret == BOOT_DEVICE_USB ? BOOT_DEVICE_NOR : ret;
+ switch (uniphier_get_soc_type()) {
+#if defined(CONFIG_ARCH_UNIPHIER_PXS2) || defined(CONFIG_ARCH_UNIPHIER_LD6B)
+ case SOC_UNIPHIER_PXS2:
+ case SOC_UNIPHIER_LD6B:
+ if (mode == BOOT_DEVICE_USB)
+ mode = BOOT_DEVICE_NOR;
+ break;
+#endif
+#if defined(CONFIG_ARCH_UNIPHIER_LD11) || defined(CONFIG_ARCH_UNIPHIER_LD20)
+ case SOC_UNIPHIER_LD11:
+ case SOC_UNIPHIER_LD20:
+ if (mode == BOOT_DEVICE_MMC1 || mode == BOOT_DEVICE_USB)
+ mode = BOOT_DEVICE_BOARD;
+ break;
+#endif
+ default:
+ break;
+ }
+
+ return mode;
}
u32 spl_boot_mode(void)
diff --git a/arch/arm/mach-uniphier/boot-mode/cmd_pinmon.c b/arch/arm/mach-uniphier/boot-mode/cmd_pinmon.c
index fa97dc5856..a8ee382248 100644
--- a/arch/arm/mach-uniphier/boot-mode/cmd_pinmon.c
+++ b/arch/arm/mach-uniphier/boot-mode/cmd_pinmon.c
@@ -39,7 +39,8 @@ static int do_pinmon(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
uniphier_pxs2_boot_mode_show();
break;
#endif
-#if defined(CONFIG_ARCH_UNIPHIER_LD20)
+#if defined(CONFIG_ARCH_UNIPHIER_LD11) || defined(CONFIG_ARCH_UNIPHIER_LD20)
+ case SOC_UNIPHIER_LD11:
case SOC_UNIPHIER_LD20:
uniphier_ld20_boot_mode_show();
break;
diff --git a/arch/arm/mach-uniphier/boot-mode/spl_board.c b/arch/arm/mach-uniphier/boot-mode/spl_board.c
new file mode 100644
index 0000000000..86292b6f59
--- /dev/null
+++ b/arch/arm/mach-uniphier/boot-mode/spl_board.c
@@ -0,0 +1,128 @@
+/*
+ * Copyright (C) 2016 Socionext Inc.
+ * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <spl.h>
+#include <linux/io.h>
+#include <asm/processor.h>
+
+#include "../soc-info.h"
+
+void spl_board_announce_boot_device(void)
+{
+ printf("eMMC");
+}
+
+struct uniphier_romfunc_table {
+ void *mmc_send_cmd;
+ void *mmc_card_blockaddr;
+ void *mmc_switch_part;
+ void *mmc_load_image;
+};
+
+static const struct uniphier_romfunc_table uniphier_ld11_romfunc_table = {
+ .mmc_send_cmd = (void *)0x20d8,
+ .mmc_card_blockaddr = (void *)0x1b68,
+ .mmc_switch_part = (void *)0x1c38,
+ .mmc_load_image = (void *)0x2e48,
+};
+
+static const struct uniphier_romfunc_table uniphier_ld20_romfunc_table = {
+ .mmc_send_cmd = (void *)0x2130,
+ .mmc_card_blockaddr = (void *)0x1ba0,
+ .mmc_switch_part = (void *)0x1c70,
+ .mmc_load_image = (void *)0x2ef0,
+};
+
+int uniphier_rom_get_mmc_funcptr(int (**send_cmd)(u32, u32),
+ int (**card_blockaddr)(u32),
+ int (**switch_part)(int),
+ int (**load_image)(u32, uintptr_t, u32))
+{
+ const struct uniphier_romfunc_table *table;
+
+ switch (uniphier_get_soc_type()) {
+ case SOC_UNIPHIER_LD11:
+ table = &uniphier_ld11_romfunc_table;
+ break;
+ case SOC_UNIPHIER_LD20:
+ table = &uniphier_ld20_romfunc_table;
+ break;
+ default:
+ printf("unsupported SoC\n");
+ return -EINVAL;
+ }
+
+ *send_cmd = table->mmc_send_cmd;
+ *card_blockaddr = table->mmc_card_blockaddr;
+ *switch_part = table->mmc_switch_part;
+ *load_image = table->mmc_load_image;
+
+ return 0;
+}
+
+int spl_board_load_image(void)
+{
+ int (*send_cmd)(u32 cmd, u32 arg);
+ int (*card_blockaddr)(u32 rca);
+ int (*switch_part)(int part);
+ int (*load_image)(u32 dev_addr, uintptr_t load_addr, u32 block_cnt);
+ u32 dev_addr = CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR;
+ const u32 rca = 0x1000; /* RCA assigned by Boot ROM */
+ int ret;
+
+ ret = uniphier_rom_get_mmc_funcptr(&send_cmd, &card_blockaddr,
+ &switch_part, &load_image);
+ if (ret)
+ return ret;
+
+ /*
+ * deselect card before SEND_CSD command.
+ * Do not check the return code. It fails, but it is OK.
+ */
+ (*send_cmd)(0x071a0000, 0); /* CMD7 (arg=0) */
+
+ /* reset CMD Line */
+ writeb(0x6, 0x5a00022f);
+ while (readb(0x5a00022f))
+ cpu_relax();
+
+ ret = (*card_blockaddr)(rca);
+ if (ret) {
+ debug("card is block addressing\n");
+ } else {
+ debug("card is byte addressing\n");
+ dev_addr *= 512;
+ }
+
+ ret = (*send_cmd)(0x071a0000, rca << 16); /* CMD7: select card again */
+ if (ret)
+ printf("failed to select card\n");
+
+ ret = (*switch_part)(1); /* Switch to Boot Partition 1 */
+ if (ret)
+ printf("failed to switch partition\n");
+
+ ret = (*load_image)(dev_addr, CONFIG_SYS_TEXT_BASE, 1);
+ if (ret) {
+ printf("failed to load image\n");
+ return ret;
+ }
+
+ ret = spl_parse_image_header((void *)CONFIG_SYS_TEXT_BASE);
+ if (ret)
+ return ret;
+
+ ret = (*load_image)(dev_addr, spl_image.load_addr,
+ spl_image.size / 512);
+ if (ret) {
+ printf("failed to load image\n");
+ return ret;
+ }
+
+ return 0;
+}
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