diff options
Diffstat (limited to 'arch/arm/mach-uniphier')
32 files changed, 510 insertions, 30 deletions
diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig index 87d1675ffc..ae763ad94e 100644 --- a/arch/arm/mach-uniphier/Kconfig +++ b/arch/arm/mach-uniphier/Kconfig @@ -23,6 +23,11 @@ config ARCH_UNIPHIER_PRO5_PXS2_LD6B bool "UniPhier PH1-Pro5/ProXstream2/PH1-LD6b SoC" select CPU_V7 +config ARCH_UNIPHIER_LD11 + bool "UniPhier PH1-LD11 SoC" + select ARM64 + select SPL_SEPARATE_BSS + config ARCH_UNIPHIER_LD20 bool "UniPhier PH1-LD20 SoC" select ARM64 diff --git a/arch/arm/mach-uniphier/arm64/smp_kick_cpus.c b/arch/arm/mach-uniphier/arm64/smp_kick_cpus.c index 64412e0ecc..5971ad256b 100644 --- a/arch/arm/mach-uniphier/arm64/smp_kick_cpus.c +++ b/arch/arm/mach-uniphier/arm64/smp_kick_cpus.c @@ -21,11 +21,11 @@ void uniphier_smp_kick_all_cpus(void) rom_boot_rsv0 = map_sysmem(UNIPHIER_SMPCTRL_ROM_RSV0, SZ_8); writeq((u64)uniphier_secondary_startup, rom_boot_rsv0); - readq(rom_boot_rsv0); /* relax */ unmap_sysmem(rom_boot_rsv0); uniphier_smp_setup(); - asm("sev"); /* Bring up all secondary CPUs from Boot ROM into U-Boot */ + asm("dsb ishst\n" /* Ensure the write to ROM_RSV0 is visible */ + "sev"); /* Bring up all secondary CPUs from Boot ROM into U-Boot */ } diff --git a/arch/arm/mach-uniphier/board_early_init_f.c b/arch/arm/mach-uniphier/board_early_init_f.c index 2a7ae1b529..f853701f44 100644 --- a/arch/arm/mach-uniphier/board_early_init_f.c +++ b/arch/arm/mach-uniphier/board_early_init_f.c @@ -62,6 +62,13 @@ int board_early_init_f(void) uniphier_pxs2_clk_init(); break; #endif +#if defined(CONFIG_ARCH_UNIPHIER_LD11) + case SOC_UNIPHIER_LD11: + uniphier_ld20_pin_init(); + led_puts("U1"); + uniphier_ld11_clk_init(); + break; +#endif #if defined(CONFIG_ARCH_UNIPHIER_LD20) case SOC_UNIPHIER_LD20: uniphier_ld20_pin_init(); diff --git a/arch/arm/mach-uniphier/board_late_init.c b/arch/arm/mach-uniphier/board_late_init.c index 845f047b02..a45412677a 100644 --- a/arch/arm/mach-uniphier/board_late_init.c +++ b/arch/arm/mach-uniphier/board_late_init.c @@ -39,6 +39,9 @@ static int uniphier_set_fdt_file(void) int buf_len = 256; int ret; + if (getenv("fdt_file")) + return 0; /* do nothing if it is already set */ + ret = fdt_get_string(gd->fdt_blob, 0, "compatible", &compat); if (ret) return -EINVAL; @@ -56,9 +59,7 @@ static int uniphier_set_fdt_file(void) strncat(dtb_name, ".dtb", buf_len); - setenv("fdt_file", dtb_name); - - return 0; + return setenv("fdt_file", dtb_name); } int board_late_init(void) diff --git a/arch/arm/mach-uniphier/boards.c b/arch/arm/mach-uniphier/boards.c index f0547c336e..ed308f3ecb 100644 --- a/arch/arm/mach-uniphier/boards.c +++ b/arch/arm/mach-uniphier/boards.c @@ -165,6 +165,23 @@ static const struct uniphier_board_data uniphier_ld6b_data = { }; #endif +#if defined(CONFIG_ARCH_UNIPHIER_LD11) +static const struct uniphier_board_data uniphier_ld11_data = { + .dram_freq = 1600, + .dram_nr_ch = 2, + .dram_ch[0] = { + .base = 0x80000000, + .size = 0x20000000, + .width = 16, + }, + .dram_ch[1] = { + .base = 0xa0000000, + .size = 0x20000000, + .width = 16, + }, +}; +#endif + #if defined(CONFIG_ARCH_UNIPHIER_LD20) static const struct uniphier_board_data uniphier_ld20_data = { .dram_freq = 1866, @@ -216,6 +233,9 @@ static const struct uniphier_board_id uniphier_boards[] = { #if defined(CONFIG_ARCH_UNIPHIER_LD6B) { "socionext,ph1-ld6b", &uniphier_ld6b_data, }, #endif +#if defined(CONFIG_ARCH_UNIPHIER_LD11) + { "socionext,ph1-ld11", &uniphier_ld11_data, }, +#endif #if defined(CONFIG_ARCH_UNIPHIER_LD20) { "socionext,ph1-ld20", &uniphier_ld20_data, }, #endif diff --git a/arch/arm/mach-uniphier/boot-mode/Makefile b/arch/arm/mach-uniphier/boot-mode/Makefile index 6cd096ec5f..a8980210b1 100644 --- a/arch/arm/mach-uniphier/boot-mode/Makefile +++ b/arch/arm/mach-uniphier/boot-mode/Makefile @@ -11,6 +11,11 @@ obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += boot-mode-ld4.o obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += boot-mode-pro5.o obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += boot-mode-pxs2.o obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += boot-mode-pxs2.o +obj-$(CONFIG_ARCH_UNIPHIER_LD11) += boot-mode-ld20.o obj-$(CONFIG_ARCH_UNIPHIER_LD20) += boot-mode-ld20.o +ifdef CONFIG_SPL_BUILD +obj-$(CONFIG_SPL_BOARD_LOAD_IMAGE) += spl_board.o +else obj-$(CONFIG_CMD_PINMON) += cmd_pinmon.o +endif diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode-ld20.c b/arch/arm/mach-uniphier/boot-mode/boot-mode-ld20.c index b092c1bde8..24255a0f50 100644 --- a/arch/arm/mach-uniphier/boot-mode/boot-mode-ld20.c +++ b/arch/arm/mach-uniphier/boot-mode/boot-mode-ld20.c @@ -9,6 +9,7 @@ #include <linux/io.h> #include "../sg-regs.h" +#include "../soc-info.h" #include "boot-device.h" static struct boot_device_info boot_device_table[] = { @@ -43,7 +44,7 @@ static struct boot_device_info boot_device_table[] = { {BOOT_DEVICE_MMC1, "eMMC (High Speed SDR, 8bit, 1.8V, Training Off)"}, {BOOT_DEVICE_MMC1, "eMMC (High Speed SDR, 8bit, 1.8V, Training On)"}, {BOOT_DEVICE_MMC1, "eMMC (Legacy, 4bit, 1.8V, Training Off)"}, - {BOOT_DEVICE_NOR, "NOR Boot (XECS1)"}, + {BOOT_DEVICE_NOR, "NOR (XECS1)"}, }; static int get_boot_mode_sel(void) @@ -54,8 +55,24 @@ static int get_boot_mode_sel(void) u32 uniphier_ld20_boot_device(void) { int boot_mode; + u32 usb_boot_mask; - if (~readl(SG_PINMON0) & 0x00000780) + switch (uniphier_get_soc_type()) { +#if defined(CONFIG_ARCH_UNIPHIER_LD11) + case SOC_UNIPHIER_LD11: + usb_boot_mask = 0x00000080; + break; +#endif +#if defined(CONFIG_ARCH_UNIPHIER_LD20) + case SOC_UNIPHIER_LD20: + usb_boot_mask = 0x00000780; + break; +#endif + default: + BUG(); + } + + if (~readl(SG_PINMON0) & usb_boot_mask) return BOOT_DEVICE_USB; boot_mode = get_boot_mode_sel(); diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode-ld4.c b/arch/arm/mach-uniphier/boot-mode/boot-mode-ld4.c index 0597618aa4..b066ed9c4b 100644 --- a/arch/arm/mach-uniphier/boot-mode/boot-mode-ld4.c +++ b/arch/arm/mach-uniphier/boot-mode/boot-mode-ld4.c @@ -36,14 +36,14 @@ struct boot_device_info boot_device_table[] = { {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 5)"}, {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI, Addr 5)"}, {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 24, ONFI, Addr 5)"}, - {BOOT_DEVICE_MMC1, "eMMC Boot (3.3V)"}, - {BOOT_DEVICE_MMC1, "eMMC Boot (1.8V)"}, + {BOOT_DEVICE_MMC1, "eMMC (3.3V)"}, + {BOOT_DEVICE_MMC1, "eMMC (1.8V)"}, {BOOT_DEVICE_NONE, "Reserved"}, {BOOT_DEVICE_NONE, "Reserved"}, {BOOT_DEVICE_NONE, "Reserved"}, {BOOT_DEVICE_NONE, "Reserved"}, {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NOR, "NOR Boot"}, + {BOOT_DEVICE_NOR, "NOR (XECS0)"}, }; static int get_boot_mode_sel(void) diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode-pro5.c b/arch/arm/mach-uniphier/boot-mode/boot-mode-pro5.c index f9726f1f66..450c43bba5 100644 --- a/arch/arm/mach-uniphier/boot-mode/boot-mode-pro5.c +++ b/arch/arm/mach-uniphier/boot-mode/boot-mode-pro5.c @@ -37,7 +37,7 @@ static struct boot_device_info boot_device_table[] = { {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 4)"}, {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 4)"}, {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_MMC1, "eMMC Boot (1.8V)"}, + {BOOT_DEVICE_MMC1, "eMMC (1.8V)"}, {BOOT_DEVICE_NONE, "Reserved"}, {BOOT_DEVICE_NONE, "Reserved"}, {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, EraseSize 128MB, Addr 5)"}, diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode-pxs2.c b/arch/arm/mach-uniphier/boot-mode/boot-mode-pxs2.c index 4b06f74712..20ff7731d5 100644 --- a/arch/arm/mach-uniphier/boot-mode/boot-mode-pxs2.c +++ b/arch/arm/mach-uniphier/boot-mode/boot-mode-pxs2.c @@ -32,17 +32,17 @@ static struct boot_device_info boot_device_table[] = { {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 8, ONFI, Addr 5)"}, {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 5)"}, {BOOT_DEVICE_NAND, "NAND (Mirror 8, ECC 16, ONFI, Addr 4)"}, - {BOOT_DEVICE_MMC1, "eMMC Boot (1.8V)"}, + {BOOT_DEVICE_MMC1, "eMMC (1.8V)"}, {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 5)"}, {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI, Addr 5)"}, {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 8, ONFI, Addr 4)"}, {BOOT_DEVICE_NAND, "NAND (Mirror 1, ECC 16, ONFI, Addr 4)"}, - {BOOT_DEVICE_SPI, "SPI 3Byte CS0"}, - {BOOT_DEVICE_SPI, "SPI 4Byte CS0"}, - {BOOT_DEVICE_SPI, "SPI 3Byte CS1"}, - {BOOT_DEVICE_SPI, "SPI 4Byte CS1"}, - {BOOT_DEVICE_SPI, "SPI 4Byte CS0"}, - {BOOT_DEVICE_SPI, "SPI 3Byte CS0"}, + {BOOT_DEVICE_SPI, "SPI (3Byte CS0)"}, + {BOOT_DEVICE_SPI, "SPI (4Byte CS0)"}, + {BOOT_DEVICE_SPI, "SPI (3Byte CS1)"}, + {BOOT_DEVICE_SPI, "SPI (4Byte CS1)"}, + {BOOT_DEVICE_SPI, "SPI (4Byte CS0)"}, + {BOOT_DEVICE_SPI, "SPI (3Byte CS0)"}, {BOOT_DEVICE_NONE, "Reserved"}, }; diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode-sld3.c b/arch/arm/mach-uniphier/boot-mode/boot-mode-sld3.c index a4a3c47bfa..ddf8259c2c 100644 --- a/arch/arm/mach-uniphier/boot-mode/boot-mode-sld3.c +++ b/arch/arm/mach-uniphier/boot-mode/boot-mode-sld3.c @@ -12,7 +12,7 @@ #include "boot-device.h" static struct boot_device_info boot_device_table[] = { - {BOOT_DEVICE_NOR, "NOR boot"}, + {BOOT_DEVICE_NOR, "NOR (XECS0)"}, {BOOT_DEVICE_NONE, "External Master"}, {BOOT_DEVICE_NONE, "Reserved"}, {BOOT_DEVICE_NONE, "Reserved"}, diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode.c b/arch/arm/mach-uniphier/boot-mode/boot-mode.c index b180f44ce8..d34b9af9a1 100644 --- a/arch/arm/mach-uniphier/boot-mode/boot-mode.c +++ b/arch/arm/mach-uniphier/boot-mode/boot-mode.c @@ -39,7 +39,8 @@ u32 spl_boot_device_raw(void) case SOC_UNIPHIER_LD6B: return uniphier_pxs2_boot_device(); #endif -#if defined(CONFIG_ARCH_UNIPHIER_LD20) +#if defined(CONFIG_ARCH_UNIPHIER_LD11) || defined(CONFIG_ARCH_UNIPHIER_LD20) + case SOC_UNIPHIER_LD11: case SOC_UNIPHIER_LD20: return uniphier_ld20_boot_device(); #endif @@ -50,11 +51,30 @@ u32 spl_boot_device_raw(void) u32 spl_boot_device(void) { - u32 ret; + u32 mode; - ret = spl_boot_device_raw(); + mode = spl_boot_device_raw(); - return ret == BOOT_DEVICE_USB ? BOOT_DEVICE_NOR : ret; + switch (uniphier_get_soc_type()) { +#if defined(CONFIG_ARCH_UNIPHIER_PXS2) || defined(CONFIG_ARCH_UNIPHIER_LD6B) + case SOC_UNIPHIER_PXS2: + case SOC_UNIPHIER_LD6B: + if (mode == BOOT_DEVICE_USB) + mode = BOOT_DEVICE_NOR; + break; +#endif +#if defined(CONFIG_ARCH_UNIPHIER_LD11) || defined(CONFIG_ARCH_UNIPHIER_LD20) + case SOC_UNIPHIER_LD11: + case SOC_UNIPHIER_LD20: + if (mode == BOOT_DEVICE_MMC1 || mode == BOOT_DEVICE_USB) + mode = BOOT_DEVICE_BOARD; + break; +#endif + default: + break; + } + + return mode; } u32 spl_boot_mode(void) diff --git a/arch/arm/mach-uniphier/boot-mode/cmd_pinmon.c b/arch/arm/mach-uniphier/boot-mode/cmd_pinmon.c index fa97dc5856..a8ee382248 100644 --- a/arch/arm/mach-uniphier/boot-mode/cmd_pinmon.c +++ b/arch/arm/mach-uniphier/boot-mode/cmd_pinmon.c @@ -39,7 +39,8 @@ static int do_pinmon(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) uniphier_pxs2_boot_mode_show(); break; #endif -#if defined(CONFIG_ARCH_UNIPHIER_LD20) +#if defined(CONFIG_ARCH_UNIPHIER_LD11) || defined(CONFIG_ARCH_UNIPHIER_LD20) + case SOC_UNIPHIER_LD11: case SOC_UNIPHIER_LD20: uniphier_ld20_boot_mode_show(); break; diff --git a/arch/arm/mach-uniphier/boot-mode/spl_board.c b/arch/arm/mach-uniphier/boot-mode/spl_board.c new file mode 100644 index 0000000000..86292b6f59 --- /dev/null +++ b/arch/arm/mach-uniphier/boot-mode/spl_board.c @@ -0,0 +1,128 @@ +/* + * Copyright (C) 2016 Socionext Inc. + * Author: Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <spl.h> +#include <linux/io.h> +#include <asm/processor.h> + +#include "../soc-info.h" + +void spl_board_announce_boot_device(void) +{ + printf("eMMC"); +} + +struct uniphier_romfunc_table { + void *mmc_send_cmd; + void *mmc_card_blockaddr; + void *mmc_switch_part; + void *mmc_load_image; +}; + +static const struct uniphier_romfunc_table uniphier_ld11_romfunc_table = { + .mmc_send_cmd = (void *)0x20d8, + .mmc_card_blockaddr = (void *)0x1b68, + .mmc_switch_part = (void *)0x1c38, + .mmc_load_image = (void *)0x2e48, +}; + +static const struct uniphier_romfunc_table uniphier_ld20_romfunc_table = { + .mmc_send_cmd = (void *)0x2130, + .mmc_card_blockaddr = (void *)0x1ba0, + .mmc_switch_part = (void *)0x1c70, + .mmc_load_image = (void *)0x2ef0, +}; + +int uniphier_rom_get_mmc_funcptr(int (**send_cmd)(u32, u32), + int (**card_blockaddr)(u32), + int (**switch_part)(int), + int (**load_image)(u32, uintptr_t, u32)) +{ + const struct uniphier_romfunc_table *table; + + switch (uniphier_get_soc_type()) { + case SOC_UNIPHIER_LD11: + table = &uniphier_ld11_romfunc_table; + break; + case SOC_UNIPHIER_LD20: + table = &uniphier_ld20_romfunc_table; + break; + default: + printf("unsupported SoC\n"); + return -EINVAL; + } + + *send_cmd = table->mmc_send_cmd; + *card_blockaddr = table->mmc_card_blockaddr; + *switch_part = table->mmc_switch_part; + *load_image = table->mmc_load_image; + + return 0; +} + +int spl_board_load_image(void) +{ + int (*send_cmd)(u32 cmd, u32 arg); + int (*card_blockaddr)(u32 rca); + int (*switch_part)(int part); + int (*load_image)(u32 dev_addr, uintptr_t load_addr, u32 block_cnt); + u32 dev_addr = CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR; + const u32 rca = 0x1000; /* RCA assigned by Boot ROM */ + int ret; + + ret = uniphier_rom_get_mmc_funcptr(&send_cmd, &card_blockaddr, + &switch_part, &load_image); + if (ret) + return ret; + + /* + * deselect card before SEND_CSD command. + * Do not check the return code. It fails, but it is OK. + */ + (*send_cmd)(0x071a0000, 0); /* CMD7 (arg=0) */ + + /* reset CMD Line */ + writeb(0x6, 0x5a00022f); + while (readb(0x5a00022f)) + cpu_relax(); + + ret = (*card_blockaddr)(rca); + if (ret) { + debug("card is block addressing\n"); + } else { + debug("card is byte addressing\n"); + dev_addr *= 512; + } + + ret = (*send_cmd)(0x071a0000, rca << 16); /* CMD7: select card again */ + if (ret) + printf("failed to select card\n"); + + ret = (*switch_part)(1); /* Switch to Boot Partition 1 */ + if (ret) + printf("failed to switch partition\n"); + + ret = (*load_image)(dev_addr, CONFIG_SYS_TEXT_BASE, 1); + if (ret) { + printf("failed to load image\n"); + return ret; + } + + ret = spl_parse_image_header((void *)CONFIG_SYS_TEXT_BASE); + if (ret) + return ret; + + ret = (*load_image)(dev_addr, spl_image.load_addr, + spl_image.size / 512); + if (ret) { + printf("failed to load image\n"); + return ret; + } + + return 0; +} diff --git a/arch/arm/mach-uniphier/clk/Makefile b/arch/arm/mach-uniphier/clk/Makefile index 93e9d91e47..1428e0c9cc 100644 --- a/arch/arm/mach-uniphier/clk/Makefile +++ b/arch/arm/mach-uniphier/clk/Makefile @@ -9,4 +9,5 @@ obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += clk-ld4.o obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += clk-pro5.o obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += clk-pxs2.o obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += clk-pxs2.o +obj-$(CONFIG_ARCH_UNIPHIER_LD11) += clk-ld11.o obj-$(CONFIG_ARCH_UNIPHIER_LD20) += clk-ld20.o diff --git a/arch/arm/mach-uniphier/clk/clk-ld11.c b/arch/arm/mach-uniphier/clk/clk-ld11.c new file mode 100644 index 0000000000..92a07338a8 --- /dev/null +++ b/arch/arm/mach-uniphier/clk/clk-ld11.c @@ -0,0 +1,28 @@ +/* + * Copyright (C) 2016 Socionext Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <linux/bitops.h> +#include <linux/io.h> + +#include "../init.h" +#include "../sg-regs.h" + +void uniphier_ld11_clk_init(void) +{ + if (readl(SG_PINMON0) & BIT(27)) { + /* if booted without stand-by MPU */ + + writel(1, SG_ETPHYPSHUT); + writel(1, SG_ETPHYCNT); + + udelay(1); /* wait for regulator level 1.1V -> 2.5V */ + + writel(3, SG_ETPHYCNT); + writel(3, SG_ETPHYPSHUT); + writel(7, SG_ETPHYCNT); + } +} diff --git a/arch/arm/mach-uniphier/cpu_info.c b/arch/arm/mach-uniphier/cpu_info.c index f9646c0205..6ad4c76dc4 100644 --- a/arch/arm/mach-uniphier/cpu_info.c +++ b/arch/arm/mach-uniphier/cpu_info.c @@ -45,7 +45,7 @@ int print_cpuinfo(void) puts("PH1-LD6b (MN2WS0320)"); break; case 0x31: - puts("PH1-LD11 ()"); + puts("PH1-LD11 (SC1405AP1)"); break; case 0x32: puts("PH1-LD20 (SC1401AJ1)"); diff --git a/arch/arm/mach-uniphier/dram/Makefile b/arch/arm/mach-uniphier/dram/Makefile index 41aa53b6b5..5b9d892511 100644 --- a/arch/arm/mach-uniphier/dram/Makefile +++ b/arch/arm/mach-uniphier/dram/Makefile @@ -12,6 +12,7 @@ obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += umc-sld8.o \ ddrphy-training.o ddrphy-ld4.o obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += umc-pxs2.o obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += umc-pxs2.o +obj-$(CONFIG_ARCH_UNIPHIER_LD11) += umc-ld11.o obj-$(CONFIG_ARCH_UNIPHIER_LD20) += umc-ld20.o else diff --git a/arch/arm/mach-uniphier/dram/umc-ld11.c b/arch/arm/mach-uniphier/dram/umc-ld11.c new file mode 100644 index 0000000000..1be18a867c --- /dev/null +++ b/arch/arm/mach-uniphier/dram/umc-ld11.c @@ -0,0 +1,124 @@ +/* + * Copyright (C) 2016 Socionext Inc. + */ + +#include <common.h> +#include <linux/io.h> +#include <linux/sizes.h> +#include <asm/processor.h> + +#include "../init.h" +#include "umc64-regs.h" + +#define CONFIG_DDR_FREQ 1866 + +#define DRAM_CH_NR 2 + +enum dram_freq { + DRAM_FREQ_1600M, + DRAM_FREQ_NR, +}; + +enum dram_size { + DRAM_SZ_256M, + DRAM_SZ_512M, + DRAM_SZ_NR, +}; + +/* umc */ +static u32 umc_cmdctla[DRAM_FREQ_NR] = {0x060D0D20}; +static u32 umc_cmdctlb[DRAM_FREQ_NR] = {0x2D211C08}; +static u32 umc_cmdctlc[DRAM_FREQ_NR] = {0x00150C04}; +static u32 umc_cmdctle[DRAM_FREQ_NR] = {0x0078071D}; +static u32 umc_cmdctlf[DRAM_FREQ_NR] = {0x02000200}; +static u32 umc_cmdctlg[DRAM_FREQ_NR] = {0x08080808}; + +static u32 umc_rdatactl_d0[DRAM_FREQ_NR] = {0x00000810}; +static u32 umc_rdatactl_d1[DRAM_FREQ_NR] = {0x00000810}; +static u32 umc_wdatactl_d0[DRAM_FREQ_NR] = {0x00000004}; +static u32 umc_wdatactl_d1[DRAM_FREQ_NR] = {0x00000004}; +static u32 umc_odtctl_d0[DRAM_FREQ_NR] = {0x02000002}; +static u32 umc_odtctl_d1[DRAM_FREQ_NR] = {0x02000002}; +static u32 umc_acssetb[DRAM_CH_NR] = {0x00000200, 0x00000203}; +static u32 umc_memconfch[DRAM_FREQ_NR] = {0x00023605}; + +static int umc_dc_init(void __iomem *dc_base, enum dram_freq freq, + unsigned long size, int ch) +{ + writel(umc_cmdctla[freq], dc_base + UMC_CMDCTLA); + writel(umc_cmdctlb[freq], dc_base + UMC_CMDCTLB); + writel(umc_cmdctlc[freq], dc_base + UMC_CMDCTLC); + writel(umc_cmdctle[freq], dc_base + UMC_CMDCTLE); + writel(umc_cmdctlf[freq], dc_base + UMC_CMDCTLF); + writel(umc_cmdctlg[freq], dc_base + UMC_CMDCTLG); + + writel(umc_rdatactl_d0[freq], dc_base + UMC_RDATACTL_D0); + writel(umc_rdatactl_d1[freq], dc_base + UMC_RDATACTL_D1); + + writel(umc_wdatactl_d0[freq], dc_base + UMC_WDATACTL_D0); + writel(umc_wdatactl_d1[freq], dc_base + UMC_WDATACTL_D1); + + writel(umc_odtctl_d0[freq], dc_base + UMC_ODTCTL_D0); + writel(umc_odtctl_d1[freq], dc_base + UMC_ODTCTL_D1); + + writel(0x00000003, dc_base + UMC_ACSSETA); + writel(0x00000103, dc_base + UMC_FLOWCTLG); + writel(umc_acssetb[ch], dc_base + UMC_ACSSETB); + writel(0x02020200, dc_base + UMC_SPCSETB); + writel(umc_memconfch[freq], dc_base + UMC_MEMCONFCH); + writel(0x00000002, dc_base + UMC_ACFETCHCTRL); + + return 0; +} + +static int umc_ch_init(void __iomem *umc_ch_base, + enum dram_freq freq, unsigned long size, int ch) +{ + void __iomem *dc_base = umc_ch_base; + + return umc_dc_init(dc_base, freq, size, ch); +} + +static void um_init(void __iomem *um_base) +{ + writel(0x00000001, um_base + UMC_SIORST); + writel(0x00000001, um_base + UMC_VO0RST); + writel(0x00000001, um_base + UMC_VPERST); + writel(0x00000001, um_base + UMC_RGLRST); + writel(0x00000001, um_base + UMC_A2DRST); + writel(0x00000001, um_base + UMC_DMDRST); +} + +int uniphier_ld11_umc_init(const struct uniphier_board_data *bd) +{ + void __iomem *um_base = (void __iomem *)0x5B800000; + void __iomem *umc_ch_base = (void __iomem *)0x5BC00000; + enum dram_freq freq; + int ch, ret; + + switch (bd->dram_freq) { + case 1600: + freq = DRAM_FREQ_1600M; + break; + default: + pr_err("unsupported DRAM frequency %d MHz\n", bd->dram_freq); + return -EINVAL; + } + + for (ch = 0; ch < bd->dram_nr_ch; ch++) { + unsigned long size = bd->dram_ch[ch].size; + unsigned int width = bd->dram_ch[ch].width; + + ret = umc_ch_init(umc_ch_base, freq, size / (width / 16), ch); + if (ret) { + pr_err("failed to initialize UMC ch%d\n", ch); + return ret; + } + + umc_ch_base += 0x00200000; + } + + um_init(um_base); + + return 0; +} diff --git a/arch/arm/mach-uniphier/dram/umc-ld20.c b/arch/arm/mach-uniphier/dram/umc-ld20.c index 4614dac5d2..186a398a60 100644 --- a/arch/arm/mach-uniphier/dram/umc-ld20.c +++ b/arch/arm/mach-uniphier/dram/umc-ld20.c @@ -15,7 +15,7 @@ #include "../init.h" #include "ddrphy-ld20-regs.h" -#include "umc-ld20-regs.h" +#include "umc64-regs.h" #define DRAM_CH_NR 3 @@ -200,9 +200,9 @@ static int umc_dc_init(void __iomem *dc_base, enum dram_freq freq, writel(umc_dataset[freq], dc_base + UMC_DATASET); writel(0x00400020, dc_base + UMC_DCCGCTL); - writel(0x00000003, dc_base + UMC_ACSCTLA); + writel(0x00000003, dc_base + UMC_ACSSETA); writel(0x00000103, dc_base + UMC_FLOWCTLG); - writel(0x00010200, dc_base + UMC_ACSSETA); + writel(0x00010200, dc_base + UMC_ACSSETB); writel(umc_flowctla[freq], dc_base + UMC_FLOWCTLA); writel(0x00004444, dc_base + UMC_FLOWCTLC); diff --git a/arch/arm/mach-uniphier/dram/umc-ld20-regs.h b/arch/arm/mach-uniphier/dram/umc64-regs.h index 46e513cd09..860d04e381 100644 --- a/arch/arm/mach-uniphier/dram/umc-ld20-regs.h +++ b/arch/arm/mach-uniphier/dram/umc64-regs.h @@ -18,13 +18,15 @@ #define UMC_INITSET 0x00000040 #define UMC_INITSTAT 0x00000044 #define UMC_CMDCTLE 0x00000050 +#define UMC_CMDCTLF 0x00000054 +#define UMC_CMDCTLG 0x00000058 #define UMC_SPCSETB 0x00000084 #define UMC_SPCSETB_AREFMD_MASK (0x3) /* Auto Refresh Mode */ #define UMC_SPCSETB_AREFMD_ARB (0x0) /* control by arbitor */ #define UMC_SPCSETB_AREFMD_CONT (0x1) /* control by DRAMCONT */ #define UMC_SPCSETB_AREFMD_REG (0x2) /* control by register */ -#define UMC_ACSCTLA 0x000000C0 -#define UMC_ACSSETA 0x000000C4 +#define UMC_ACSSETA 0x000000C0 +#define UMC_ACSSETB 0x000000C4 #define UMC_MEMCONF0A 0x00000200 #define UMC_MEMCONF0B 0x00000204 #define UMC_MEMCONFCH 0x00000240 @@ -32,6 +34,7 @@ #define UMC_FLOWCTLA 0x00000400 #define UMC_FLOWCTLB 0x00000404 #define UMC_FLOWCTLC 0x00000408 +#define UMC_ACFETCHCTRL 0x00000460 #define UMC_FLOWCTLG 0x00000508 #define UMC_RDATACTL_D0 0x00000600 #define UMC_WDATACTL_D0 0x00000604 @@ -42,6 +45,7 @@ #define UMC_ODTCTL_D1 0x0000061C #define UMC_RESPCTL 0x00000624 #define UMC_DIRECTBUSCTRLA 0x00000680 +#define UMC_DEBUGC 0x00000718 #define UMC_DCCGCTL 0x00000720 #define UMC_DICGCTLA 0x00000724 #define UMC_DICGCTLB 0x00000728 @@ -70,4 +74,12 @@ #define UMC_MBUS9 0x00002478 #define UMC_MBUS10 0x000024F8 +/* UMC1 register */ +#define UMC_SIORST 0x00000728 +#define UMC_VO0RST 0x0000073c +#define UMC_VPERST 0x00000744 +#define UMC_RGLRST 0x00000750 +#define UMC_A2DRST 0x00000764 +#define UMC_DMDRST 0x00000770 + #endif /* UMC_LD20_REGS_H */ diff --git a/arch/arm/mach-uniphier/early-clk/Makefile b/arch/arm/mach-uniphier/early-clk/Makefile index 9242b416c5..755a3618b5 100644 --- a/arch/arm/mach-uniphier/early-clk/Makefile +++ b/arch/arm/mach-uniphier/early-clk/Makefile @@ -9,4 +9,5 @@ obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += early-clk-ld4.o obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += early-clk-pro5.o obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += early-clk-pxs2.o obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += early-clk-pxs2.o +obj-$(CONFIG_ARCH_UNIPHIER_LD11) += early-clk-ld11.o obj-$(CONFIG_ARCH_UNIPHIER_LD20) += early-clk-ld20.o diff --git a/arch/arm/mach-uniphier/early-clk/early-clk-ld11.c b/arch/arm/mach-uniphier/early-clk/early-clk-ld11.c new file mode 100644 index 0000000000..c94d83c4ed --- /dev/null +++ b/arch/arm/mach-uniphier/early-clk/early-clk-ld11.c @@ -0,0 +1,32 @@ +/* + * Copyright (C) 2016 Socionext Inc. + * Author: Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <linux/io.h> + +#include "../init.h" +#include "../sc64-regs.h" + +int uniphier_ld11_early_clk_init(const struct uniphier_board_data *bd) +{ + u32 tmp; + + /* deassert reset */ + tmp = readl(SC_RSTCTRL7); + tmp |= SC_RSTCTRL7_UMC31 | SC_RSTCTRL7_UMC30; + writel(tmp, SC_RSTCTRL7); + + /* provide clocks */ + tmp = readl(SC_CLKCTRL4); + tmp |= SC_CLKCTRL4_PERI; + writel(tmp, SC_CLKCTRL4); + + tmp = readl(SC_CLKCTRL7); + tmp |= SC_CLKCTRL7_UMC31 | SC_CLKCTRL7_UMC30; + writel(tmp, SC_CLKCTRL7); + + return 0; +} diff --git a/arch/arm/mach-uniphier/early-pinctrl/Makefile b/arch/arm/mach-uniphier/early-pinctrl/Makefile index a1039025ca..7177a8cf8f 100644 --- a/arch/arm/mach-uniphier/early-pinctrl/Makefile +++ b/arch/arm/mach-uniphier/early-pinctrl/Makefile @@ -3,4 +3,5 @@ # obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += early-pinctrl-sld3.o +obj-$(CONFIG_ARCH_UNIPHIER_LD11) += early-pinctrl-ld20.o obj-$(CONFIG_ARCH_UNIPHIER_LD20) += early-pinctrl-ld20.o diff --git a/arch/arm/mach-uniphier/init.h b/arch/arm/mach-uniphier/init.h index ab0a68d83d..cba0bc9d37 100644 --- a/arch/arm/mach-uniphier/init.h +++ b/arch/arm/mach-uniphier/init.h @@ -32,6 +32,7 @@ int uniphier_pro4_init(const struct uniphier_board_data *bd); int uniphier_sld8_init(const struct uniphier_board_data *bd); int uniphier_pro5_init(const struct uniphier_board_data *bd); int uniphier_pxs2_init(const struct uniphier_board_data *bd); +int uniphier_ld11_init(const struct uniphier_board_data *bd); int uniphier_ld20_init(const struct uniphier_board_data *bd); #if defined(CONFIG_MICRO_SUPPORT_CARD) @@ -81,6 +82,7 @@ int uniphier_ld4_enable_dpll_ssc(const struct uniphier_board_data *bd); int uniphier_ld4_early_clk_init(const struct uniphier_board_data *bd); int uniphier_pro5_early_clk_init(const struct uniphier_board_data *bd); int uniphier_pxs2_early_clk_init(const struct uniphier_board_data *bd); +int uniphier_ld11_early_clk_init(const struct uniphier_board_data *bd); int uniphier_ld20_early_clk_init(const struct uniphier_board_data *bd); int uniphier_sld3_early_pin_init(const struct uniphier_board_data *bd); @@ -91,6 +93,7 @@ int uniphier_pro4_umc_init(const struct uniphier_board_data *bd); int uniphier_sld8_umc_init(const struct uniphier_board_data *bd); int uniphier_pxs2_umc_init(const struct uniphier_board_data *bd); int uniphier_ld20_umc_init(const struct uniphier_board_data *bd); +int uniphier_ld11_umc_init(const struct uniphier_board_data *bd); void uniphier_sld3_pin_init(void); void uniphier_ld4_pin_init(void); @@ -105,6 +108,7 @@ void uniphier_ld4_clk_init(void); void uniphier_pro4_clk_init(void); void uniphier_pro5_clk_init(void); void uniphier_pxs2_clk_init(void); +void uniphier_ld11_clk_init(void); void uniphier_ld20_clk_init(void); void cci500_init(int nr_slaves); diff --git a/arch/arm/mach-uniphier/init/Makefile b/arch/arm/mach-uniphier/init/Makefile index b58e6c885a..dcaa4451ad 100644 --- a/arch/arm/mach-uniphier/init/Makefile +++ b/arch/arm/mach-uniphier/init/Makefile @@ -11,4 +11,5 @@ obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += init-sld8.o obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += init-pro5.o obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += init-pxs2.o obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += init-pxs2.o +obj-$(CONFIG_ARCH_UNIPHIER_LD11) += init-ld11.o obj-$(CONFIG_ARCH_UNIPHIER_LD20) += init-ld20.o diff --git a/arch/arm/mach-uniphier/init/init-ld11.c b/arch/arm/mach-uniphier/init/init-ld11.c new file mode 100644 index 0000000000..de2dc62b5d --- /dev/null +++ b/arch/arm/mach-uniphier/init/init-ld11.c @@ -0,0 +1,59 @@ +/* + * Copyright (C) 2016 Socionext Inc. + * Author: Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <spl.h> + +#include "../init.h" +#include "../micro-support-card.h" + +int uniphier_ld11_init(const struct uniphier_board_data *bd) +{ + uniphier_sbc_init_savepin(bd); + uniphier_pxs2_sbc_init(bd); + uniphier_ld20_early_pin_init(bd); + + support_card_reset(); + + support_card_init(); + + led_puts("L0"); + + memconf_init(bd); + + led_puts("L1"); + + uniphier_ld11_early_clk_init(bd); + + led_puts("L2"); + + led_puts("L3"); + +#ifdef CONFIG_SPL_SERIAL_SUPPORT + preloader_console_init(); +#endif + + led_puts("L4"); + + { + int res; + + res = uniphier_ld11_umc_init(bd); + if (res < 0) { + while (1) + ; + } + } + + led_puts("L5"); + + dcache_disable(); + + led_puts("L6"); + + return 0; +} diff --git a/arch/arm/mach-uniphier/init/init-ld20.c b/arch/arm/mach-uniphier/init/init-ld20.c index 660ad457dc..7f66053e1f 100644 --- a/arch/arm/mach-uniphier/init/init-ld20.c +++ b/arch/arm/mach-uniphier/init/init-ld20.c @@ -51,5 +51,7 @@ int uniphier_ld20_init(const struct uniphier_board_data *bd) led_puts("L5"); + dcache_disable(); + return 0; } diff --git a/arch/arm/mach-uniphier/init/init.c b/arch/arm/mach-uniphier/init/init.c index 15a53ce068..77e5b99047 100644 --- a/arch/arm/mach-uniphier/init/init.c +++ b/arch/arm/mach-uniphier/init/init.c @@ -55,6 +55,11 @@ void spl_board_init(void) uniphier_pxs2_init(param); break; #endif +#if defined(CONFIG_ARCH_UNIPHIER_LD11) + case SOC_UNIPHIER_LD11: + uniphier_ld11_init(param); + break; +#endif #if defined(CONFIG_ARCH_UNIPHIER_LD20) case SOC_UNIPHIER_LD20: uniphier_ld20_init(param); diff --git a/arch/arm/mach-uniphier/pinctrl/Makefile b/arch/arm/mach-uniphier/pinctrl/Makefile index b579cb06e7..7f4d9f76a8 100644 --- a/arch/arm/mach-uniphier/pinctrl/Makefile +++ b/arch/arm/mach-uniphier/pinctrl/Makefile @@ -9,4 +9,5 @@ obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += pinctrl-sld8.o obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += pinctrl-pro5.o obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += pinctrl-pxs2.o obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += pinctrl-ld6b.o +obj-$(CONFIG_ARCH_UNIPHIER_LD11) += pinctrl-ld20.o obj-$(CONFIG_ARCH_UNIPHIER_LD20) += pinctrl-ld20.o diff --git a/arch/arm/mach-uniphier/sbc/Makefile b/arch/arm/mach-uniphier/sbc/Makefile index 38da253975..ec3c22c28d 100644 --- a/arch/arm/mach-uniphier/sbc/Makefile +++ b/arch/arm/mach-uniphier/sbc/Makefile @@ -9,4 +9,5 @@ obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += sbc-savepin.o sbc-ld4.o obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += sbc-savepin.o obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += sbc-savepin.o sbc-pxs2.o obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += sbc-savepin.o sbc-pxs2.o +obj-$(CONFIG_ARCH_UNIPHIER_LD11) += sbc-savepin.o sbc-pxs2.o obj-$(CONFIG_ARCH_UNIPHIER_LD20) += sbc-savepin.o sbc-pxs2.o diff --git a/arch/arm/mach-uniphier/sg-regs.h b/arch/arm/mach-uniphier/sg-regs.h index 1d71ce87ae..a179d615be 100644 --- a/arch/arm/mach-uniphier/sg-regs.h +++ b/arch/arm/mach-uniphier/sg-regs.h @@ -59,6 +59,9 @@ #define SG_MEMCONF_SPARSEMEM (0x1 << 4) +#define SG_ETPHYPSHUT (SG_CTRL_BASE | 0x554) +#define SG_ETPHYCNT (SG_CTRL_BASE | 0x550) + /* Pin Control */ #define SG_PINCTRL_BASE (SG_CTRL_BASE | 0x1000) |
