i2c: i2c-mxs: Wait for I2C to empty queue

Make sure the I2C write queue is empty before leaving the mxs_i2c_write().
If we start and I2C write and only wait for ACK, the MXS I2C IP block may
enter next operation while still processing the write aftermath internally.
This will in turn disrupt one or more subsequent transfer(s).

A testcase for this issue is as such. This testcase is also interesting because
the first I2C_WRITE which becomes disruptive happens in the 'i2c read' command.
The 'i2c read' command first uses I2C_WRITE to send I2C address of the chip and
then uses I2C_READ to read data from the chip. After this command completes, the
'i2c probe' will use sequence of I2C_WRITE commands to probe the I2C bus. The
problem is that the first I2C_WRITE disrupted the I2C IP block operation and
this sideeffect propagates all the way to this next I2C_WRITE used by the 'i2c
probe' call. The result is the 'i2c probe' receives an ACK on I2C address 0x00,
even if this ACK was owned by the previous I2C_WRITE operation. Note that the
'i2c read' command must read from a valid I2C chip address.

Wrong:
> i2c probe
Valid chip addresses: 50 51
> i2c read 0x50 0x0.2 0x10 0x42000000
> i2c probe
Valid chip addresses: 00 50 51

With this patch
> i2c probe
Valid chip addresses: 50 51
> i2c read 0x50 0x0.2 0x10 0x42000000
> i2c probe
Valid chip addresses: 50 51

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>

1 files changed, 32 insertions, 7 deletions

diff --git a/drivers/i2c/mxs_i2c.c b/drivers/i2c/mxs_i2c.c
index a298c95e14..de3b19402b 100644
--- a/drivers/i2c/mxs_i2c.c
+++ b/drivers/i2c/mxs_i2c.c
@@ -64,16 +64,17 @@ static void mxs_i2c_setup_read(uint8_t chip, int len)
 	writel(I2C_QUEUECTRL_QUEUE_RUN, &i2c_regs->hw_i2c_queuectrl_set);
 }
 
-static void mxs_i2c_write(uchar chip, uint addr, int alen,
+static int mxs_i2c_write(uchar chip, uint addr, int alen,
 			uchar *buf, int blen, int stop)
 {
 	struct mxs_i2c_regs *i2c_regs = (struct mxs_i2c_regs *)MXS_I2C0_BASE;
-	uint32_t data;
+	uint32_t data, tmp;
 	int i, remain, off;
+	int timeout = MXS_I2C_MAX_TIMEOUT;
 
 	if ((alen > 4) || (alen == 0)) {
 		debug("MXS I2C: Invalid address length\n");
-		return;
+		return -EINVAL;
 	}
 
 	if (stop)
@@ -106,6 +107,19 @@ static void mxs_i2c_write(uchar chip, uint addr, int alen,
 		writel(data >> remain, &i2c_regs->hw_i2c_data);
 
 	writel(I2C_QUEUECTRL_QUEUE_RUN, &i2c_regs->hw_i2c_queuectrl_set);
+
+	while (--timeout) {
+		tmp = readl(&i2c_regs->hw_i2c_queuestat);
+		if (tmp & I2C_QUEUESTAT_WR_QUEUE_EMPTY)
+			break;
+	}
+
+	if (!timeout) {
+		debug("MXS I2C: Failed transmitting data!\n");
+		return -EINVAL;
+	}
+
+	return 0;
 }
 
 static int mxs_i2c_wait_for_ack(void)
@@ -154,7 +168,12 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
 	int ret;
 	int i;
 
-	mxs_i2c_write(chip, addr, alen, NULL, 0, 0);
+	ret = mxs_i2c_write(chip, addr, alen, NULL, 0, 0);
+	if (ret) {
+		debug("MXS I2C: Failed writing address\n");
+		return ret;
+	}
+
 	ret = mxs_i2c_wait_for_ack();
 	if (ret) {
 		debug("MXS I2C: Failed writing address\n");
@@ -193,7 +212,12 @@ int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len)
 int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
 {
 	int ret;
-	mxs_i2c_write(chip, addr, alen, buffer, len, 1);
+	ret = mxs_i2c_write(chip, addr, alen, buffer, len, 1);
+	if (ret) {
+		debug("MXS I2C: Failed writing address\n");
+		return ret;
+	}
+
 	ret = mxs_i2c_wait_for_ack();
 	if (ret)
 		debug("MXS I2C: Failed writing address\n");
@@ -204,8 +228,9 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)
 int i2c_probe(uchar chip)
 {
 	int ret;
-	mxs_i2c_write(chip, 0, 1, NULL, 0, 1);
-	ret = mxs_i2c_wait_for_ack();
+	ret = mxs_i2c_write(chip, 0, 1, NULL, 0, 1);
+	if (!ret)
+		ret = mxs_i2c_wait_for_ack();
 	mxs_i2c_reset();
 	return ret;
 }