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| author | Markus Klotzbuecher <mk@denx.de> | 2008-07-10 10:26:07 +0200 |
|---|---|---|
| committer | Markus Klotzbuecher <mk@denx.de> | 2008-07-10 10:26:07 +0200 |
| commit | 794a5924972fc8073616e98a2668da4a5f9aea90 (patch) | |
| tree | dd0db39b3e183b5bcb0300d5377d7a0d5ac5fd0c /board | |
| parent | f2aeecc320f5b181b30effcaa67683aec8d5a843 (diff) | |
| parent | 4188f0491886b3b486164e819c0a83fdb97efd7d (diff) | |
| download | blackbird-obmc-uboot-794a5924972fc8073616e98a2668da4a5f9aea90.tar.gz blackbird-obmc-uboot-794a5924972fc8073616e98a2668da4a5f9aea90.zip | |
Merge branch 'master' of git://www.denx.de/git/u-boot
Diffstat (limited to 'board')
663 files changed, 7035 insertions, 3518 deletions
diff --git a/board/BuS/EB+MCF-EV123/EB+MCF-EV123.c b/board/BuS/EB+MCF-EV123/EB+MCF-EV123.c index dcfd83ed27..fad9c406d9 100644 --- a/board/BuS/EB+MCF-EV123/EB+MCF-EV123.c +++ b/board/BuS/EB+MCF-EV123/EB+MCF-EV123.c @@ -39,7 +39,7 @@ int checkboard (void) return 0; } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { int size,i; diff --git a/board/LEOX/elpt860/elpt860.c b/board/LEOX/elpt860/elpt860.c index 775db738e6..5f506314c5 100644 --- a/board/LEOX/elpt860/elpt860.c +++ b/board/LEOX/elpt860/elpt860.c @@ -35,7 +35,7 @@ ** ------ ** int board_early_init_f(void) ** int checkboard(void) -** long int initdram(int board_type) +** phys_size_t initdram(int board_type) ** called from 'board_init_f()' into 'common/board.c' ** ** void reset_phy(void) @@ -179,7 +179,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; diff --git a/board/MAI/AmigaOneG3SE/AmigaOneG3SE.c b/board/MAI/AmigaOneG3SE/AmigaOneG3SE.c index 3bbc09dd9c..e118563fc4 100644 --- a/board/MAI/AmigaOneG3SE/AmigaOneG3SE.c +++ b/board/MAI/AmigaOneG3SE/AmigaOneG3SE.c @@ -81,7 +81,7 @@ int checkboard (void) return 0; } -long initdram (int board_type) +phys_size_t initdram (int board_type) { return articiaS_ram_init (); } diff --git a/board/Marvell/db64360/sdram_init.c b/board/Marvell/db64360/sdram_init.c index f04aaf9a6e..ecadaf2710 100644 --- a/board/Marvell/db64360/sdram_init.c +++ b/board/Marvell/db64360/sdram_init.c @@ -1728,7 +1728,7 @@ long int dram_size (long int *base, long int maxsize) /* ppcboot interface function to SDRAM init - this is where all the * controlling logic happens */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { int s0 = 0, s1 = 0; int checkbank[4] = {[0 ... 3] = 0 }; diff --git a/board/Marvell/db64460/sdram_init.c b/board/Marvell/db64460/sdram_init.c index 176220232e..f36f3484ab 100644 --- a/board/Marvell/db64460/sdram_init.c +++ b/board/Marvell/db64460/sdram_init.c @@ -1737,7 +1737,7 @@ long int dram_size (long int *base, long int maxsize) /* ppcboot interface function to SDRAM init - this is where all the * controlling logic happens */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { int s0 = 0, s1 = 0; int checkbank[4] = {[0 ... 3] = 0 }; diff --git a/board/MigoR/Makefile b/board/MigoR/Makefile index 5a9d651afb..661b59d005 100644 --- a/board/MigoR/Makefile +++ b/board/MigoR/Makefile @@ -24,25 +24,29 @@ include $(TOPDIR)/config.mk -LIB = lib$(BOARD).a +LIB = $(obj)lib$(BOARD).a -OBJS := migo_r.o +COBJS := migo_r.o SOBJS := lowlevel_init.o +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### -.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) - $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@ +# defines $(obj).depend target +include $(SRCTREE)/rules.mk --include .depend +sinclude $(obj).depend ######################################################################### diff --git a/board/RPXClassic/RPXClassic.c b/board/RPXClassic/RPXClassic.c index 49cb8ad24f..804635a4ae 100644 --- a/board/RPXClassic/RPXClassic.c +++ b/board/RPXClassic/RPXClassic.c @@ -165,7 +165,7 @@ void rpxclassic_init (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; diff --git a/board/RPXlite/RPXlite.c b/board/RPXlite/RPXlite.c index f37e07b923..bca31e4c8e 100644 --- a/board/RPXlite/RPXlite.c +++ b/board/RPXlite/RPXlite.c @@ -102,7 +102,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; diff --git a/board/RPXlite_dw/RPXlite_dw.c b/board/RPXlite_dw/RPXlite_dw.c index d3dc081219..d6fabf04ea 100644 --- a/board/RPXlite_dw/RPXlite_dw.c +++ b/board/RPXlite_dw/RPXlite_dw.c @@ -104,7 +104,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *)CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; diff --git a/board/RRvision/RRvision.c b/board/RRvision/RRvision.c index f46bb9e8e4..c0b772d727 100644 --- a/board/RRvision/RRvision.c +++ b/board/RRvision/RRvision.c @@ -110,7 +110,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; diff --git a/board/a3000/a3000.c b/board/a3000/a3000.c index 737d35d76c..c1eceaa2f4 100644 --- a/board/a3000/a3000.c +++ b/board/a3000/a3000.c @@ -38,7 +38,7 @@ int checkboard (void) } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { long size; long new_bank0_end; diff --git a/board/actux1/Makefile b/board/actux1/Makefile index 83611e7c03..b7cc6e11d5 100644 --- a/board/actux1/Makefile +++ b/board/actux1/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/actux2/Makefile b/board/actux2/Makefile index 37fd2622ab..5ef3bdaeab 100644 --- a/board/actux2/Makefile +++ b/board/actux2/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/actux3/Makefile b/board/actux3/Makefile index f6168c3e7f..2cd6d84a17 100644 --- a/board/actux3/Makefile +++ b/board/actux3/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/actux4/Makefile b/board/actux4/Makefile index 845af93fe6..b82fc62e9e 100644 --- a/board/actux4/Makefile +++ b/board/actux4/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/adder/Makefile b/board/adder/Makefile index b2ffd28833..6b3706daae 100644 --- a/board/adder/Makefile +++ b/board/adder/Makefile @@ -41,7 +41,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/adder/adder.c b/board/adder/adder.c index 817c8649aa..e8a5737f58 100644 --- a/board/adder/adder.c +++ b/board/adder/adder.c @@ -65,7 +65,7 @@ static uint sdram_table[] = { 0xfffffc27, 0xfffffc04, 0xfffffc04, 0xfffffc04 }; -long int initdram (int board_type) +phys_size_t initdram (int board_type) { long int msize; volatile immap_t *immap = (volatile immap_t *)CFG_IMMR; diff --git a/board/ads5121/Makefile b/board/ads5121/Makefile index f4dacce285..52d0d3c58c 100644 --- a/board/ads5121/Makefile +++ b/board/ads5121/Makefile @@ -45,7 +45,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/ads5121/ads5121.c b/board/ads5121/ads5121.c index 2892665295..ef66663330 100644 --- a/board/ads5121/ads5121.c +++ b/board/ads5121/ads5121.c @@ -112,7 +112,7 @@ int board_early_init_f (void) return 0; } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { u32 msize = 0; diff --git a/board/adsvix/Makefile b/board/adsvix/Makefile index 214c7dbe45..05601b48d1 100644 --- a/board/adsvix/Makefile +++ b/board/adsvix/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/alaska/Makefile b/board/alaska/Makefile index 27475ea4d7..5297e81435 100644 --- a/board/alaska/Makefile +++ b/board/alaska/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/alaska/alaska.c b/board/alaska/alaska.c index 9531703fc9..49a8f712ba 100644 --- a/board/alaska/alaska.c +++ b/board/alaska/alaska.c @@ -131,7 +131,7 @@ void setupBat (ulong size) mtspr (DBAT7U, batu); } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { ulong size; diff --git a/board/altera/dk1c20/Makefile b/board/altera/dk1c20/Makefile index 6af83890a8..60ac6e6b70 100644 --- a/board/altera/dk1c20/Makefile +++ b/board/altera/dk1c20/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/altera/dk1c20/dk1c20.c b/board/altera/dk1c20/dk1c20.c index d0eb9eacb8..46695bea92 100644 --- a/board/altera/dk1c20/dk1c20.c +++ b/board/altera/dk1c20/dk1c20.c @@ -50,7 +50,7 @@ int checkboard (void) return 0; } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { return (0); } diff --git a/board/altera/dk1s10/Makefile b/board/altera/dk1s10/Makefile index 6af83890a8..60ac6e6b70 100644 --- a/board/altera/dk1s10/Makefile +++ b/board/altera/dk1s10/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/altera/dk1s10/dk1s10.c b/board/altera/dk1s10/dk1s10.c index c45e7f15d7..64d591e714 100644 --- a/board/altera/dk1s10/dk1s10.c +++ b/board/altera/dk1s10/dk1s10.c @@ -54,7 +54,7 @@ int checkboard (void) return 0; } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { return (0); } diff --git a/board/altera/ep1c20/Makefile b/board/altera/ep1c20/Makefile index 7a8caf7c11..acad2aad85 100644 --- a/board/altera/ep1c20/Makefile +++ b/board/altera/ep1c20/Makefile @@ -43,7 +43,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/altera/ep1c20/ep1c20.c b/board/altera/ep1c20/ep1c20.c index 29491391ef..c5bfb85a71 100644 --- a/board/altera/ep1c20/ep1c20.c +++ b/board/altera/ep1c20/ep1c20.c @@ -34,7 +34,7 @@ int checkboard (void) return 0; } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { return (0); } diff --git a/board/altera/ep1s10/Makefile b/board/altera/ep1s10/Makefile index 7a8caf7c11..acad2aad85 100644 --- a/board/altera/ep1s10/Makefile +++ b/board/altera/ep1s10/Makefile @@ -43,7 +43,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/altera/ep1s10/ep1s10.c b/board/altera/ep1s10/ep1s10.c index 9c7e28e68c..de9bf42bdc 100644 --- a/board/altera/ep1s10/ep1s10.c +++ b/board/altera/ep1s10/ep1s10.c @@ -34,7 +34,7 @@ int checkboard (void) return 0; } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { return (0); } diff --git a/board/altera/ep1s40/Makefile b/board/altera/ep1s40/Makefile index 7a8caf7c11..acad2aad85 100644 --- a/board/altera/ep1s40/Makefile +++ b/board/altera/ep1s40/Makefile @@ -43,7 +43,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/altera/ep1s40/ep1s40.c b/board/altera/ep1s40/ep1s40.c index cb75550476..c0eca17b92 100644 --- a/board/altera/ep1s40/ep1s40.c +++ b/board/altera/ep1s40/ep1s40.c @@ -29,7 +29,7 @@ int checkboard (void) return 0; } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { return (0); } diff --git a/board/amcc/acadia/Makefile b/board/amcc/acadia/Makefile index c56b2733a9..9abb29d85f 100644 --- a/board/amcc/acadia/Makefile +++ b/board/amcc/acadia/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend *~ + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/amcc/acadia/memory.c b/board/amcc/acadia/memory.c index 709d41e41a..48a6725745 100644 --- a/board/amcc/acadia/memory.c +++ b/board/amcc/acadia/memory.c @@ -33,14 +33,6 @@ extern void board_pll_init_f(void); -/* - * sdram_init - Dummy implementation for start.S, spd_sdram used on this board! - */ -void sdram_init(void) -{ - return; -} - #if !defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL) static void cram_bcr_write(u32 wr_val) { @@ -67,7 +59,7 @@ static void cram_bcr_write(u32 wr_val) } #endif -long int initdram(int board_type) +phys_size_t initdram(int board_type) { #if defined(CONFIG_NAND_SPL) u32 reg; @@ -116,10 +108,3 @@ long int initdram(int board_type) return (CFG_MBYTES_RAM << 20); } - -#ifndef CONFIG_NAND_SPL -int testdram(void) -{ - return (0); -} -#endif diff --git a/board/amcc/bamboo/Makefile b/board/amcc/bamboo/Makefile index d01cc49e2c..0649799889 100644 --- a/board/amcc/bamboo/Makefile +++ b/board/amcc/bamboo/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/amcc/bamboo/bamboo.c b/board/amcc/bamboo/bamboo.c index 50771879e1..f4157017f1 100644 --- a/board/amcc/bamboo/bamboo.c +++ b/board/amcc/bamboo/bamboo.c @@ -453,7 +453,7 @@ int checkboard(void) } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { #if !(defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL)) long dram_size; @@ -466,73 +466,6 @@ long int initdram (int board_type) #endif } -#if defined(CFG_DRAM_TEST) -int testdram(void) -{ - unsigned long *mem = (unsigned long *)0; - const unsigned long kend = (1024 / sizeof(unsigned long)); - unsigned long k, n, *p32, ctr; - const unsigned long bend = CFG_MBYTES_SDRAM * 1024 * 1024; - - mtmsr(0); - - for (k = 0; k < CFG_MBYTES_SDRAM*1024; - ++k, mem += (1024 / sizeof(unsigned long))) { - if ((k & 1023) == 0) { - printf("%3d MB\r", k / 1024); - } - - memset(mem, 0xaaaaaaaa, 1024); - for (n = 0; n < kend; ++n) { - if (mem[n] != 0xaaaaaaaa) { - printf("SDRAM test fails at: %08x\n", - (uint) & mem[n]); - return 1; - } - } - - memset(mem, 0x55555555, 1024); - for (n = 0; n < kend; ++n) { - if (mem[n] != 0x55555555) { - printf("SDRAM test fails at: %08x\n", - (uint) & mem[n]); - return 1; - } - } - } - - /* - * Perform a sequence test to ensure that all - * memory locations are uniquely addressable - */ - ctr = 0; - p32 = 0; - while ((unsigned long)p32 != bend) { - if (0 == ((unsigned long)p32 & ((1<<20)-1))) - printf("Writing %3d MB\r", (unsigned long)p32 >> 20); - *p32++ = ctr++; - } - - ctr = 0; - p32 = 0; - while ((unsigned long)p32 != bend) { - if (0 == ((unsigned long)p32 & ((1<<20)-1))) - printf("Verifying %3d MB\r", (unsigned long)p32 >> 20); - - if (*p32 != ctr) { - printf("SDRAM test fails at: %08x\n", p32); - return 1; - } - - ctr++; - p32++; - } - - printf("SDRAM test passes\n"); - return 0; -} -#endif - /************************************************************************* * pci_pre_init * diff --git a/board/amcc/bubinga/Makefile b/board/amcc/bubinga/Makefile index 50fecc6d48..1939d51688 100644 --- a/board/amcc/bubinga/Makefile +++ b/board/amcc/bubinga/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/amcc/bubinga/bubinga.c b/board/amcc/bubinga/bubinga.c index 66e7509da8..74a2a1c214 100644 --- a/board/amcc/bubinga/bubinga.c +++ b/board/amcc/bubinga/bubinga.c @@ -66,30 +66,14 @@ int checkboard(void) return (0); } -/* - * sdram_init - Dummy implementation for start.S, spd_sdram used on this board! - */ -void sdram_init(void) -{ - return; -} - /* ------------------------------------------------------------------------- initdram(int board_type) reads EEPROM via I2c. EEPROM contains all of the necessary info for SDRAM controller configuration ------------------------------------------------------------------------- */ -long int initdram(int board_type) +phys_size_t initdram(int board_type) { long int ret; ret = spd_sdram(); return ret; } - -int testdram(void) -{ - /* TODO: XXX XXX XXX */ - printf("test: xxx MB - ok\n"); - - return (0); -} diff --git a/board/amcc/canyonlands/Makefile b/board/amcc/canyonlands/Makefile index 7a2eaa5163..2aeead60f9 100644 --- a/board/amcc/canyonlands/Makefile +++ b/board/amcc/canyonlands/Makefile @@ -40,7 +40,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/amcc/canyonlands/canyonlands.c b/board/amcc/canyonlands/canyonlands.c index 0f66061278..e9eba49c4b 100644 --- a/board/amcc/canyonlands/canyonlands.c +++ b/board/amcc/canyonlands/canyonlands.c @@ -22,6 +22,7 @@ #include <ppc440.h> #include <libfdt.h> #include <fdt_support.h> +#include <i2c.h> #include <asm/processor.h> #include <asm/io.h> #include <asm/mmu.h> @@ -205,50 +206,12 @@ u32 ddr_clktr(u32 default_val) { * I2C SPD DIMM autodetection/calibration doesn't fit into the 4k of boot * code. */ -long int initdram(int board_type) +phys_size_t initdram(int board_type) { return CFG_MBYTES_SDRAM << 20; } #endif -#if defined(CFG_DRAM_TEST) -int testdram(void) -{ - unsigned long *mem = (unsigned long *)0; - const unsigned long kend = (1024 / sizeof(unsigned long)); - unsigned long k, n; - - mtmsr(0); - - for (k = 0; k < CFG_KBYTES_SDRAM; - ++k, mem += (1024 / sizeof(unsigned long))) { - if ((k & 1023) == 0) { - printf("%3d MB\r", k / 1024); - } - - memset(mem, 0xaaaaaaaa, 1024); - for (n = 0; n < kend; ++n) { - if (mem[n] != 0xaaaaaaaa) { - printf("SDRAM test fails at: %08x\n", - (uint) & mem[n]); - return 1; - } - } - - memset(mem, 0x55555555, 1024); - for (n = 0; n < kend; ++n) { - if (mem[n] != 0x55555555) { - printf("SDRAM test fails at: %08x\n", - (uint) & mem[n]); - return 1; - } - } - } - printf("SDRAM test passes\n"); - return 0; -} -#endif - /* * pci_target_init * @@ -431,6 +394,7 @@ int misc_init_r(void) u32 sdr0_srst1 = 0; u32 eth_cfg; u32 pvr = get_pvr(); + u8 val; /* * Set EMAC mode/configuration (GMII, SGMII, RGMII...). @@ -458,6 +422,15 @@ int misc_init_r(void) sdr0_srst1 &= ~SDR0_SRST1_AHB; mtsdr(SDR0_SRST1, sdr0_srst1); + /* + * RTC/M41T62: + * Disable square wave output: Batterie will be drained + * quickly, when this output is not disabled + */ + val = i2c_reg_read(CFG_I2C_RTC_ADDR, 0xa); + val &= ~0x40; + i2c_reg_write(CFG_I2C_RTC_ADDR, 0xa, val); + return 0; } diff --git a/board/amcc/ebony/Makefile b/board/amcc/ebony/Makefile index 5da96e9e1c..6ab1a26b15 100644 --- a/board/amcc/ebony/Makefile +++ b/board/amcc/ebony/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/amcc/ebony/ebony.c b/board/amcc/ebony/ebony.c index ededb3e7e1..9bcdf5997f 100644 --- a/board/amcc/ebony/ebony.c +++ b/board/amcc/ebony/ebony.c @@ -104,7 +104,7 @@ int checkboard(void) return (0); } -long int initdram(int board_type) +phys_size_t initdram(int board_type) { long dram_size = 0; @@ -116,36 +116,6 @@ long int initdram(int board_type) return dram_size; } -#if defined(CFG_DRAM_TEST) -int testdram(void) -{ - uint *pstart = (uint *) 0x00000000; - uint *pend = (uint *) 0x08000000; - uint *p; - - for (p = pstart; p < pend; p++) - *p = 0xaaaaaaaa; - - for (p = pstart; p < pend; p++) { - if (*p != 0xaaaaaaaa) { - printf("SDRAM test fails at: %08x\n", (uint) p); - return 1; - } - } - - for (p = pstart; p < pend; p++) - *p = 0x55555555; - - for (p = pstart; p < pend; p++) { - if (*p != 0x55555555) { - printf("SDRAM test fails at: %08x\n", (uint) p); - return 1; - } - } - return 0; -} -#endif - #if !defined(CONFIG_SPD_EEPROM) /************************************************************************* * fixed sdram init -- doesn't use serial presence detect. diff --git a/board/amcc/katmai/Makefile b/board/amcc/katmai/Makefile index d06a402d17..318016d2ce 100644 --- a/board/amcc/katmai/Makefile +++ b/board/amcc/katmai/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend *~ + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/amcc/katmai/katmai.c b/board/amcc/katmai/katmai.c index 193083fd46..3a0b18f30d 100644 --- a/board/amcc/katmai/katmai.c +++ b/board/amcc/katmai/katmai.c @@ -258,36 +258,6 @@ u32 ddr_clktr(u32 default_val) { return (SDRAM_CLKTR_CLKP_90_DEG_ADV); } -#if defined(CFG_DRAM_TEST) -int testdram (void) -{ - uint *pstart = (uint *) 0x00000000; - uint *pend = (uint *) 0x08000000; - uint *p; - - for (p = pstart; p < pend; p++) - *p = 0xaaaaaaaa; - - for (p = pstart; p < pend; p++) { - if (*p != 0xaaaaaaaa) { - printf ("SDRAM test fails at: %08x\n", (uint) p); - return 1; - } - } - - for (p = pstart; p < pend; p++) - *p = 0x55555555; - - for (p = pstart; p < pend; p++) { - if (*p != 0x55555555) { - printf ("SDRAM test fails at: %08x\n", (uint) p); - return 1; - } - } - return 0; -} -#endif - /************************************************************************* * pci_pre_init * diff --git a/board/amcc/kilauea/Makefile b/board/amcc/kilauea/Makefile index 39328c2bda..df0a68f5d5 100644 --- a/board/amcc/kilauea/Makefile +++ b/board/amcc/kilauea/Makefile @@ -25,8 +25,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).a -COBJS = $(BOARD).o cmd_pll.o memory.o -SOBJS = init.o +COBJS = $(BOARD).o cmd_pll.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) @@ -38,7 +37,7 @@ clean: rm -f $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend *~ + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/amcc/kilauea/init.S b/board/amcc/kilauea/init.S deleted file mode 100644 index 8cd534cd6b..0000000000 --- a/board/amcc/kilauea/init.S +++ /dev/null @@ -1,154 +0,0 @@ -/* - * (C) Copyright 2007-2008 - * Stefan Roese, DENX Software Engineering, sr@denx.de. - * - * Based on code provided from UDTech and AMCC - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <config.h> -#include <ppc4xx.h> - -#include <ppc_asm.tmpl> -#include <ppc_defs.h> - -#define mtsdram_as(reg, value) \ - addi r4,0,reg ; \ - mtdcr memcfga,r4 ; \ - addis r4,0,value@h ; \ - ori r4,r4,value@l ; \ - mtdcr memcfgd,r4 ; - - .globl ext_bus_cntlr_init -ext_bus_cntlr_init: -#if !defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL) - - /* - * DDR2 setup - */ - - /* Following the DDR Core Manual, here is the initialization */ - - /* Step 1 */ - - /* Step 2 */ - - /* Step 3 */ - - /* base=00000000, size=256MByte (6), mode=7 (n*10*8) */ - mtsdram_as(SDRAM_MB0CF, 0x00006701); - - /* SET SDRAM_MB1CF - Not enabled */ - mtsdram_as(SDRAM_MB1CF, 0x00000000); - - /* SET SDRAM_MB2CF - Not enabled */ - mtsdram_as(SDRAM_MB2CF, 0x00000000); - - /* SET SDRAM_MB3CF - Not enabled */ - mtsdram_as(SDRAM_MB3CF, 0x00000000); - - /* SDRAM_CLKTR: Adv Addr clock by 180 deg */ - mtsdram_as(SDRAM_CLKTR, 0x80000000); - - /* Refresh Time register (0x30) Refresh every 7.8125uS */ - mtsdram_as(SDRAM_RTR, 0x06180000); - - /* SDRAM_SDTR1 */ - mtsdram_as(SDRAM_SDTR1, 0x80201000); - - /* SDRAM_SDTR2 */ - mtsdram_as(SDRAM_SDTR2, 0x32204232); - - /* SDRAM_SDTR3 */ - mtsdram_as(SDRAM_SDTR3, 0x080b0d1a); - - mtsdram_as(SDRAM_MMODE, 0x00000442); - mtsdram_as(SDRAM_MEMODE, 0x00000404); - - /* SDRAM0_MCOPT1 (0X20) No ECC Gen */ - mtsdram_as(SDRAM_MCOPT1, 0x04322000); - - /* NOP */ - mtsdram_as(SDRAM_INITPLR0, 0xa8380000); - /* precharge 3 DDR clock cycle */ - mtsdram_as(SDRAM_INITPLR1, 0x81900400); - /* EMR2 twr = 2tck */ - mtsdram_as(SDRAM_INITPLR2, 0x81020000); - /* EMR3 twr = 2tck */ - mtsdram_as(SDRAM_INITPLR3, 0x81030000); - /* EMR DLL ENABLE twr = 2tck */ - mtsdram_as(SDRAM_INITPLR4, 0x81010404); - /* MR w/ DLL reset - * Note: 5 is CL. May need to be changed - */ - mtsdram_as(SDRAM_INITPLR5, 0x81000542); - /* precharge 3 DDR clock cycle */ - mtsdram_as(SDRAM_INITPLR6, 0x81900400); - /* Auto-refresh trfc = 26tck */ - mtsdram_as(SDRAM_INITPLR7, 0x8D080000); - /* Auto-refresh trfc = 26tck */ - mtsdram_as(SDRAM_INITPLR8, 0x8D080000); - /* Auto-refresh */ - mtsdram_as(SDRAM_INITPLR9, 0x8D080000); - /* Auto-refresh */ - mtsdram_as(SDRAM_INITPLR10, 0x8D080000); - /* MRS - normal operation; wait 2 cycle (set wait to tMRD) */ - mtsdram_as(SDRAM_INITPLR11, 0x81000442); - mtsdram_as(SDRAM_INITPLR12, 0x81010780); - mtsdram_as(SDRAM_INITPLR13, 0x81010400); - mtsdram_as(SDRAM_INITPLR14, 0x00000000); - mtsdram_as(SDRAM_INITPLR15, 0x00000000); - - /* SET MCIF0_CODT Die Termination On */ - mtsdram_as(SDRAM_CODT, 0x0080f837); - mtsdram_as(SDRAM_MODT0, 0x01800000); - mtsdram_as(SDRAM_MODT1, 0x00000000); - - mtsdram_as(SDRAM_WRDTR, 0x00000000); - - /* SDRAM0_MCOPT2 (0X21) Start initialization */ - mtsdram_as(SDRAM_MCOPT2, 0x20000000); - - /* Step 5 */ - lis r3,0x1 /* 400000 = wait 100ms */ - mtctr r3 - -pll_wait: - bdnz pll_wait - - /* Step 6 */ - - /* SDRAM_DLCR */ - mtsdram_as(SDRAM_DLCR, 0x030000a5); - - /* SDRAM_RDCC */ - mtsdram_as(SDRAM_RDCC, 0x40000000); - - /* SDRAM_RQDC */ - mtsdram_as(SDRAM_RQDC, 0x80000038); - - /* SDRAM_RFDC */ - mtsdram_as(SDRAM_RFDC, 0x00000209); - - /* Enable memory controller */ - mtsdram_as(SDRAM_MCOPT2, 0x28000000); -#endif /* #ifndef CONFIG_NAND_U_BOOT */ - - blr diff --git a/board/amcc/kilauea/memory.c b/board/amcc/kilauea/memory.c deleted file mode 100644 index 1d7a3fad97..0000000000 --- a/board/amcc/kilauea/memory.c +++ /dev/null @@ -1,79 +0,0 @@ -/* - * (C) Copyright 2007 - * Stefan Roese, DENX Software Engineering, sr@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <asm/processor.h> -#include <i2c.h> - -void sdram_init(void) -{ - return; -} - -long int initdram(int board_type) -{ - return (CFG_MBYTES_SDRAM << 20); -} - -#if defined(CFG_DRAM_TEST) -int testdram (void) -{ - printf ("testdram\n"); -#if defined (CONFIG_NAND_U_BOOT) - return 0; -#endif - uint *pstart = (uint *) 0x00000000; - uint *pend = (uint *) 0x00001000; - uint *p; - - for (p = pstart; p < pend; p++) { - *p = 0xaaaaaaaa; - } - - for (p = pstart; p < pend; p++) { - if (*p != 0xaaaaaaaa) { -#if !defined (CONFIG_NAND_SPL) - printf ("SDRAM test fails at: %08x\n", (uint) p); -#endif - return 1; - } - } - - for (p = pstart; p < pend; p++) { - *p = 0x55555555; - } - - for (p = pstart; p < pend; p++) { - if (*p != 0x55555555) { -#if !defined (CONFIG_NAND_SPL) - printf ("SDRAM test fails at: %08x\n", (uint) p); -#endif - return 1; - } - } -#if !defined (CONFIG_NAND_SPL) - printf ("SDRAM test passed!!!\n"); -#endif - return 0; -} -#endif diff --git a/board/amcc/luan/Makefile b/board/amcc/luan/Makefile index 5da96e9e1c..6ab1a26b15 100644 --- a/board/amcc/luan/Makefile +++ b/board/amcc/luan/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/amcc/luan/luan.c b/board/amcc/luan/luan.c index f964511c57..b14b6e1b56 100644 --- a/board/amcc/luan/luan.c +++ b/board/amcc/luan/luan.c @@ -126,50 +126,6 @@ u32 ddr_clktr(u32 default_val) { } /************************************************************************* - * int testdram() - * - ************************************************************************/ -#if defined(CFG_DRAM_TEST) -int testdram(void) -{ - unsigned long *mem = (unsigned long *) 0; - const unsigned long kend = (1024 / sizeof(unsigned long)); - unsigned long k, n; - - mtmsr(0); - - for (k = 0; k < CFG_KBYTES_SDRAM; - ++k, mem += (1024 / sizeof(unsigned long))) { - if ((k & 1023) == 0) { - printf("%3d MB\r", k / 1024); - } - - memset(mem, 0xaaaaaaaa, 1024); - for (n = 0; n < kend; ++n) { - if (mem[n] != 0xaaaaaaaa) { - printf("SDRAM test fails at: %08x\n", - (uint) & mem[n]); - return 1; - } - } - - memset(mem, 0x55555555, 1024); - for (n = 0; n < kend; ++n) { - if (mem[n] != 0x55555555) { - printf("SDRAM test fails at: %08x\n", - (uint) & mem[n]); - return 1; - } - } - } - printf("SDRAM test passes\n"); - - return 0; -} -#endif - - -/************************************************************************* * pci_pre_init * * This routine is called just prior to registering the hose and gives diff --git a/board/amcc/makalu/Makefile b/board/amcc/makalu/Makefile index 39328c2bda..dc3edc11aa 100644 --- a/board/amcc/makalu/Makefile +++ b/board/amcc/makalu/Makefile @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).a -COBJS = $(BOARD).o cmd_pll.o memory.o +COBJS = $(BOARD).o cmd_pll.o SOBJS = init.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) @@ -38,7 +38,7 @@ clean: rm -f $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend *~ + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/amcc/makalu/init.S b/board/amcc/makalu/init.S index 11c5b1971e..4d0f4609e6 100644 --- a/board/amcc/makalu/init.S +++ b/board/amcc/makalu/init.S @@ -1,8 +1,11 @@ /* + * Copyright (c) 2008 Nuovation System Designs, LLC + * Grant Erickson <gerickson@nuovations.com> + * * (C) Copyright 2007-2008 * Stefan Roese, DENX Software Engineering, sr@denx.de. * - * Based on code provided from Senao and AMCC + * Originally based on code provided from Senao and AMCC * * See file CREDITS for list of people who contributed to this * project. @@ -23,126 +26,6 @@ * MA 02111-1307 USA */ -#include <config.h> -#include <ppc4xx.h> - -#include <ppc_asm.tmpl> -#include <ppc_defs.h> - -#define mtsdram_as(reg, value) \ - addi r4,0,reg ; \ - mtdcr memcfga,r4 ; \ - addis r4,0,value@h ; \ - ori r4,r4,value@l ; \ - mtdcr memcfgd,r4 ; - .globl ext_bus_cntlr_init ext_bus_cntlr_init: - - /* - * DDR2 setup - */ - - /* Following the DDR Core Manual, here is the initialization */ - - /* Step 1 */ - - /* Step 2 */ - - /* Step 3 */ - - /* base=00000000, size=128MByte (5), mode=2 (n*10*4) */ - mtsdram_as(SDRAM_MB0CF, 0x00005201); - - /* base=08000000, size=128MByte (5), mode=2 (n*10*4) */ - mtsdram_as(SDRAM_MB1CF, (0x08000000 >> 3) | 0x5201); - - /* SDRAM_CLKTR: Adv Addr clock by 180 deg */ - mtsdram_as(SDRAM_CLKTR,0x80000000); - - /* Refresh Time register (0x30) Refresh every 7.8125uS */ - mtsdram_as(SDRAM_RTR, 0x06180000); - - /* SDRAM_SDTR1 */ - mtsdram_as(SDRAM_SDTR1, 0x80201000); - - /* SDRAM_SDTR2 */ - mtsdram_as(SDRAM_SDTR2, 0x32204232); - - /* SDRAM_SDTR3 */ - mtsdram_as(SDRAM_SDTR3, 0x080b0d1a); - - mtsdram_as(SDRAM_MMODE, 0x00000442); - mtsdram_as(SDRAM_MEMODE, 0x00000404); - - /* SDRAM0_MCOPT1 (0X20) No ECC Gen */ - mtsdram_as(SDRAM_MCOPT1, 0x04322000); - - /* NOP */ - mtsdram_as(SDRAM_INITPLR0, 0xa8380000); - /* precharge 3 DDR clock cycle */ - mtsdram_as(SDRAM_INITPLR1, 0x81900400); - /* EMR2 twr = 2tck */ - mtsdram_as(SDRAM_INITPLR2, 0x81020000); - /* EMR3 twr = 2tck */ - mtsdram_as(SDRAM_INITPLR3, 0x81030000); - /* EMR DLL ENABLE twr = 2tck */ - mtsdram_as(SDRAM_INITPLR4, 0x81010404); - /* MR w/ DLL reset - * Note: 5 is CL. May need to be changed - */ - mtsdram_as(SDRAM_INITPLR5, 0x81000542); - /* precharge 3 DDR clock cycle */ - mtsdram_as(SDRAM_INITPLR6, 0x81900400); - /* Auto-refresh trfc = 26tck */ - mtsdram_as(SDRAM_INITPLR7, 0x8D080000); - /* Auto-refresh trfc = 26tck */ - mtsdram_as(SDRAM_INITPLR8, 0x8D080000); - /* Auto-refresh */ - mtsdram_as(SDRAM_INITPLR9, 0x8D080000); - /* Auto-refresh */ - mtsdram_as(SDRAM_INITPLR10, 0x8D080000); - /* MRS - normal operation; wait 2 cycle (set wait to tMRD) */ - mtsdram_as(SDRAM_INITPLR11, 0x81000442); - mtsdram_as(SDRAM_INITPLR12, 0x81010780); - mtsdram_as(SDRAM_INITPLR13, 0x81010400); - mtsdram_as(SDRAM_INITPLR14, 0x00000000); - mtsdram_as(SDRAM_INITPLR15, 0x00000000); - - /* SET MCIF0_CODT Die Termination On */ - mtsdram_as(SDRAM_CODT, 0x0080f837); - mtsdram_as(SDRAM_MODT0, 0x01800000); -#if 0 /* test-only: not sure if 0 is ok when 2nd bank is used */ - mtsdram_as(SDRAM_MODT1, 0x00000000); -#endif - - mtsdram_as(SDRAM_WRDTR, 0x00000000); - - /* SDRAM0_MCOPT2 (0X21) Start initialization */ - mtsdram_as(SDRAM_MCOPT2, 0x20000000); - - /* Step 5 */ - lis r3,0x1 /* 400000 = wait 100ms */ - mtctr r3 - -pll_wait: - bdnz pll_wait - - /* Step 6 */ - - /* SDRAM_DLCR */ - mtsdram_as(SDRAM_DLCR, 0x030000a5); - - /* SDRAM_RDCC */ - mtsdram_as(SDRAM_RDCC, 0x40000000); - - /* SDRAM_RQDC */ - mtsdram_as(SDRAM_RQDC, 0x80000038); - - /* SDRAM_RFDC */ - mtsdram_as(SDRAM_RFDC, 0x00000209); - - /* Enable memory controller */ - mtsdram_as(SDRAM_MCOPT2, 0x28000000); - blr diff --git a/board/amcc/makalu/memory.c b/board/amcc/makalu/memory.c deleted file mode 100644 index b03b60b8f4..0000000000 --- a/board/amcc/makalu/memory.c +++ /dev/null @@ -1,188 +0,0 @@ -/* - * (C) Copyright 2007 - * Stefan Roese, DENX Software Engineering, sr@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <asm/processor.h> - -void sdram_init(void) -{ - return; -} - -long int initdram(int board_type) -{ - /* - * Same as on Kilauea, Makalu generates exception 0x200 - * (machine check) after trap_init() in board_init_f, - * when SDRAM is initialized here (late) and d-cache is - * used earlier as INIT_RAM. - * So for now, initialize DDR2 in init.S very early and - * also use it for INIT_RAM. Then this exception doesn't - * occur. - */ -#if 0 - u32 val; - - /* base=00000000, size=128MByte (5), mode=2 (n*10*4) */ - mtsdram(SDRAM_MB0CF, 0x00005201); - - /* SET SDRAM_MB1CF - Not enabled */ - mtsdram(SDRAM_MB1CF, 0x00000000); - - /* SET SDRAM_MB2CF - Not enabled */ - mtsdram(SDRAM_MB2CF, 0x00000000); - - /* SET SDRAM_MB3CF - Not enabled */ - mtsdram(SDRAM_MB3CF, 0x00000000); - - /* SDRAM_CLKTR: Adv Addr clock by 90 deg */ - mtsdram(SDRAM_CLKTR, 0x80000000); - - /* Refresh Time register (0x30) Refresh every 7.8125uS */ - mtsdram(SDRAM_RTR, 0x06180000); - - /* SDRAM_SDTR1 */ - mtsdram(SDRAM_SDTR1, 0x80201000); - - /* SDRAM_SDTR2 */ - mtsdram(SDRAM_SDTR2, 0x32204232); - - /* SDRAM_SDTR3 */ - mtsdram(SDRAM_SDTR3, 0x080b0d1a); - - mtsdram(SDRAM_MMODE, 0x00000442); - mtsdram(SDRAM_MEMODE, 0x00000404); - - /* SDRAM0_MCOPT1 (0X20) No ECC Gen */ - mtsdram(SDRAM_MCOPT1, 0x04322000); - - /* NOP */ - mtsdram(SDRAM_INITPLR0, 0xa8380000); - /* precharge 3 DDR clock cycle */ - mtsdram(SDRAM_INITPLR1, 0x81900400); - /* EMR2 twr = 2tck */ - mtsdram(SDRAM_INITPLR2, 0x81020000); - /* EMR3 twr = 2tck */ - mtsdram(SDRAM_INITPLR3, 0x81030000); - /* EMR DLL ENABLE twr = 2tck */ - mtsdram(SDRAM_INITPLR4, 0x81010404); - /* MR w/ DLL reset - * Note: 5 is CL. May need to be changed - */ - mtsdram(SDRAM_INITPLR5, 0x81000542); - /* precharge 3 DDR clock cycle */ - mtsdram(SDRAM_INITPLR6, 0x81900400); - /* Auto-refresh trfc = 26tck */ - mtsdram(SDRAM_INITPLR7, 0x8D080000); - /* Auto-refresh trfc = 26tck */ - mtsdram(SDRAM_INITPLR8, 0x8D080000); - /* Auto-refresh */ - mtsdram(SDRAM_INITPLR9, 0x8D080000); - /* Auto-refresh */ - mtsdram(SDRAM_INITPLR10, 0x8D080000); - /* MRS - normal operation; wait 2 cycle (set wait to tMRD) */ - mtsdram(SDRAM_INITPLR11, 0x81000442); - mtsdram(SDRAM_INITPLR12, 0x81010780); - mtsdram(SDRAM_INITPLR13, 0x81010400); - mtsdram(SDRAM_INITPLR14, 0x00000000); - mtsdram(SDRAM_INITPLR15, 0x00000000); - - /* SET MCIF0_CODT Die Termination On */ - mtsdram(SDRAM_CODT, 0x0080f837); - mtsdram(SDRAM_MODT0, 0x01800000); - mtsdram(SDRAM_MODT1, 0x00000000); - - mtsdram(SDRAM_WRDTR, 0x00000000); - - /* SDRAM0_MCOPT2 (0X21) Start initialization */ - mtsdram(SDRAM_MCOPT2, 0x20000000); - - /* Step 5 */ - do { - mfsdram(SDRAM_MCSTAT, val); - } while ((val & SDRAM_MCSTAT_MIC_COMP) != SDRAM_MCSTAT_MIC_COMP); - - /* Step 6 */ - - /* SDRAM_DLCR */ - mtsdram(SDRAM_DLCR, 0x030000a5); - - /* SDRAM_RDCC */ - mtsdram(SDRAM_RDCC, 0x40000000); - - /* SDRAM_RQDC */ - mtsdram(SDRAM_RQDC, 0x80000038); - - /* SDRAM_RFDC */ - mtsdram(SDRAM_RFDC, 0x00000209); - - /* Enable memory controller */ - mfsdram(SDRAM_MCOPT2, val); - val |= SDRAM_MCOPT2_DCEN_ENABLE; - mtsdram(SDRAM_MCOPT2, val); -#endif - return (CFG_MBYTES_SDRAM << 20); -} - -#if defined(CFG_DRAM_TEST) -int testdram (void) -{ - printf ("testdram\n"); -#if defined (CONFIG_NAND_U_BOOT) - return 0; -#endif - uint *pstart = (uint *) 0x00000000; - uint *pend = (uint *) 0x00001000; - uint *p; - - for (p = pstart; p < pend; p++) { - *p = 0xaaaaaaaa; - } - - for (p = pstart; p < pend; p++) { - if (*p != 0xaaaaaaaa) { -#if !defined (CONFIG_NAND_SPL) - printf ("SDRAM test fails at: %08x\n", (uint) p); -#endif - return 1; - } - } - - for (p = pstart; p < pend; p++) { - *p = 0x55555555; - } - - for (p = pstart; p < pend; p++) { - if (*p != 0x55555555) { -#if !defined (CONFIG_NAND_SPL) - printf ("SDRAM test fails at: %08x\n", (uint) p); -#endif - return 1; - } - } -#if !defined (CONFIG_NAND_SPL) - printf ("SDRAM test passed!!!\n"); -#endif - return 0; -} -#endif diff --git a/board/amcc/ocotea/Makefile b/board/amcc/ocotea/Makefile index a758650e59..6ab1a26b15 100644 --- a/board/amcc/ocotea/Makefile +++ b/board/amcc/ocotea/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend *~ + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/amcc/ocotea/ocotea.c b/board/amcc/ocotea/ocotea.c index 3bd1b81400..eea1e1e177 100644 --- a/board/amcc/ocotea/ocotea.c +++ b/board/amcc/ocotea/ocotea.c @@ -201,7 +201,7 @@ int checkboard (void) } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { long dram_size = 0; @@ -214,36 +214,6 @@ long int initdram (int board_type) } -#if defined(CFG_DRAM_TEST) -int testdram (void) -{ - uint *pstart = (uint *) 0x00000000; - uint *pend = (uint *) 0x08000000; - uint *p; - - for (p = pstart; p < pend; p++) - *p = 0xaaaaaaaa; - - for (p = pstart; p < pend; p++) { - if (*p != 0xaaaaaaaa) { - printf ("SDRAM test fails at: %08x\n", (uint) p); - return 1; - } - } - - for (p = pstart; p < pend; p++) - *p = 0x55555555; - - for (p = pstart; p < pend; p++) { - if (*p != 0x55555555) { - printf ("SDRAM test fails at: %08x\n", (uint) p); - return 1; - } - } - return 0; -} -#endif - #if !defined(CONFIG_SPD_EEPROM) /************************************************************************* * fixed sdram init -- doesn't use serial presence detect. diff --git a/board/amcc/sequoia/Makefile b/board/amcc/sequoia/Makefile index e1c9ad4d69..a5d501079a 100644 --- a/board/amcc/sequoia/Makefile +++ b/board/amcc/sequoia/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/amcc/sequoia/config.mk b/board/amcc/sequoia/config.mk index e62b8d30e4..5e04ee4e36 100644 --- a/board/amcc/sequoia/config.mk +++ b/board/amcc/sequoia/config.mk @@ -28,6 +28,10 @@ sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp ifndef TEXT_BASE TEXT_BASE = 0xFFFA0000 +# +# When defining CONFIG_VIDEO, TEXT_BASE needs to be 0xFFF80000 +# TEXT_BASE = 0xFFF80000 +# endif PLATFORM_CPPFLAGS += -DCONFIG_440=1 diff --git a/board/amcc/sequoia/sdram.c b/board/amcc/sequoia/sdram.c index b43ec48091..77e6c7b4d1 100644 --- a/board/amcc/sequoia/sdram.c +++ b/board/amcc/sequoia/sdram.c @@ -52,7 +52,7 @@ extern void denali_core_search_data_eye(void); * initdram -- 440EPx's DDR controller is a DENALI Core * ************************************************************************/ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { #if !defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL) #if !defined(CONFIG_NAND_SPL) diff --git a/board/amcc/sequoia/sequoia.c b/board/amcc/sequoia/sequoia.c index 6bcb3ab198..5ff9787d3d 100644 --- a/board/amcc/sequoia/sequoia.c +++ b/board/amcc/sequoia/sequoia.c @@ -329,44 +329,6 @@ int checkboard(void) return (0); } -#if defined(CFG_DRAM_TEST) -int testdram(void) -{ - unsigned long *mem = (unsigned long *)0; - const unsigned long kend = (1024 / sizeof(unsigned long)); - unsigned long k, n; - - mtmsr(0); - - for (k = 0; k < CFG_MBYTES_SDRAM; - ++k, mem += (1024 / sizeof(unsigned long))) { - if ((k & 1023) == 0) { - printf("%3d MB\r", k / 1024); - } - - memset(mem, 0xaaaaaaaa, 1024); - for (n = 0; n < kend; ++n) { - if (mem[n] != 0xaaaaaaaa) { - printf("SDRAM test fails at: %08x\n", - (uint) & mem[n]); - return 1; - } - } - - memset(mem, 0x55555555, 1024); - for (n = 0; n < kend; ++n) { - if (mem[n] != 0x55555555) { - printf("SDRAM test fails at: %08x\n", - (uint) & mem[n]); - return 1; - } - } - } - printf("SDRAM test passes\n"); - return 0; -} -#endif - #if defined(CONFIG_PCI) && defined(CONFIG_PCI_PNP) /* * Assign interrupts to PCI devices. diff --git a/board/amcc/taihu/Makefile b/board/amcc/taihu/Makefile index 9731c6e332..0b9f970ead 100644 --- a/board/amcc/taihu/Makefile +++ b/board/amcc/taihu/Makefile @@ -37,7 +37,7 @@ clean: rm -f $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/amcc/taihu/taihu.c b/board/amcc/taihu/taihu.c index eedde597b8..254e3eb837 100644 --- a/board/amcc/taihu/taihu.c +++ b/board/amcc/taihu/taihu.c @@ -78,10 +78,10 @@ int checkboard(void) } /************************************************************************* - * long int initdram + * phys_size_t initdram * ************************************************************************/ -long int initdram(int board) +phys_size_t initdram(int board) { return CFG_SDRAM_SIZE_PER_BANK * CFG_SDRAM_BANKS; /* 128Mbytes */ } @@ -165,16 +165,20 @@ unsigned char spi_read(void) return (unsigned char)gpio_read_in_bit(SPI_DIN_GPIO15); } -void taihu_spi_chipsel(int cs) +int spi_cs_is_valid(unsigned int bus, unsigned int cs) { - gpio_write_bit(SPI_CS_GPIO0, cs); + return bus == 0 && cs == 0; } -spi_chipsel_type spi_chipsel[]= { - taihu_spi_chipsel -}; +void spi_cs_activate(struct spi_slave *slave) +{ + gpio_write_bit(SPI_CS_GPIO0, 1); +} -int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]); +void spi_cs_deactivate(struct spi_slave *slave) +{ + gpio_write_bit(SPI_CS_GPIO0, 0); +} #ifdef CONFIG_PCI static unsigned char int_lines[32] = { @@ -196,45 +200,3 @@ int pci_pre_init(struct pci_controller *hose) return 1; } #endif /* CONFIG_PCI */ - -#ifdef CFG_DRAM_TEST -int testdram(void) -{ - unsigned long *mem = (unsigned long *)0; - const unsigned long kend = (1024 / sizeof(unsigned long)); - unsigned long k, n; - unsigned long msr; - unsigned long total_kbytes = CFG_SDRAM_SIZE_PER_BANK * CFG_SDRAM_BANKS / 1024; - - msr = mfmsr(); - mtmsr(msr & ~(MSR_EE)); - - for (k = 0; k < total_kbytes ; - ++k, mem += (1024 / sizeof(unsigned long))) { - if ((k & 1023) == 0) - printf("%3d MB\r", k / 1024); - - memset(mem, 0xaaaaaaaa, 1024); - for (n = 0; n < kend; ++n) { - if (mem[n] != 0xaaaaaaaa) { - printf("SDRAM test fails at: %08x\n", - (uint) & mem[n]); - return 1; - } - } - - memset(mem, 0x55555555, 1024); - for (n = 0; n < kend; ++n) { - if (mem[n] != 0x55555555) { - printf("SDRAM test fails at: %08x\n", - (uint) & mem[n]); - return 1; - } - } - } - printf("SDRAM test passes\n"); - mtmsr(msr); - - return 0; -} -#endif /* CFG_DRAM_TEST */ diff --git a/board/amcc/taishan/Makefile b/board/amcc/taishan/Makefile index 462af001b4..9d20e0f6bf 100644 --- a/board/amcc/taishan/Makefile +++ b/board/amcc/taishan/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/amcc/taishan/taishan.c b/board/amcc/taishan/taishan.c index f00397ed19..b6c306539e 100644 --- a/board/amcc/taishan/taishan.c +++ b/board/amcc/taishan/taishan.c @@ -196,36 +196,6 @@ int checkboard (void) return (0); } -#if defined(CFG_DRAM_TEST) -int testdram (void) -{ - uint *pstart = (uint *) 0x04000000; - uint *pend = (uint *) 0x0fc00000; - uint *p; - - for (p = pstart; p < pend; p++) - *p = 0xaaaaaaaa; - - for (p = pstart; p < pend; p++) { - if (*p != 0xaaaaaaaa) { - printf ("SDRAM test fails at: %08x\n", (uint) p); - return 1; - } - } - - for (p = pstart; p < pend; p++) - *p = 0x55555555; - - for (p = pstart; p < pend; p++) { - if (*p != 0x55555555) { - printf ("SDRAM test fails at: %08x\n", (uint) p); - return 1; - } - } - return 0; -} -#endif - /************************************************************************* * pci_pre_init * diff --git a/board/amcc/walnut/Makefile b/board/amcc/walnut/Makefile index 50fecc6d48..1939d51688 100644 --- a/board/amcc/walnut/Makefile +++ b/board/amcc/walnut/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/amcc/walnut/walnut.c b/board/amcc/walnut/walnut.c index 292e02609e..28dcb66ebc 100644 --- a/board/amcc/walnut/walnut.c +++ b/board/amcc/walnut/walnut.c @@ -86,26 +86,10 @@ int checkboard(void) } /* - * sdram_init - Dummy implementation for start.S, spd_sdram used on this board! - */ -void sdram_init(void) -{ - return; -} - -/* * initdram(int board_type) reads EEPROM via I2c. EEPROM contains all of * the necessary info for SDRAM controller configuration */ -long int initdram(int board_type) +phys_size_t initdram(int board_type) { return spd_sdram(); } - -int testdram(void) -{ - /* TODO: XXX XXX XXX */ - printf("test: xxx MB - ok\n"); - - return (0); -} diff --git a/board/amcc/yosemite/Makefile b/board/amcc/yosemite/Makefile index 261e5d49cc..b93f2c3890 100644 --- a/board/amcc/yosemite/Makefile +++ b/board/amcc/yosemite/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/amcc/yosemite/yosemite.c b/board/amcc/yosemite/yosemite.c index 212fab8d08..3b1f8e2d79 100644 --- a/board/amcc/yosemite/yosemite.c +++ b/board/amcc/yosemite/yosemite.c @@ -200,7 +200,7 @@ int checkboard(void) } /************************************************************************* - * sdram_init -- doesn't use serial presence detect. + * initdram -- doesn't use serial presence detect. * * Assumes: 256 MB, ECC, non-registered * PLB @ 133 MHz @@ -281,7 +281,7 @@ void sdram_tr1_set(int ram_address, int* tr1_value) *tr1_value = (first_good + last_bad) / 2; } -void sdram_init(void) +phys_size_t initdram(int board) { register uint reg; int tr1_bank1, tr1_bank2; @@ -327,57 +327,11 @@ void sdram_init(void) sdram_tr1_set(0x00000000, &tr1_bank1); sdram_tr1_set(0x08000000, &tr1_bank2); - mtsdram(mem_tr1, (((tr1_bank1+tr1_bank2)/2) | 0x80800800) ); -} + mtsdram(mem_tr1, (((tr1_bank1+tr1_bank2)/2) | 0x80800800)); -/************************************************************************* - * long int initdram - * - ************************************************************************/ -long int initdram(int board) -{ - sdram_init(); return CFG_SDRAM_BANKS * (CFG_KBYTES_SDRAM * 1024); /* return bytes */ } -#if defined(CFG_DRAM_TEST) -int testdram(void) -{ - unsigned long *mem = (unsigned long *)0; - const unsigned long kend = (1024 / sizeof(unsigned long)); - unsigned long k, n; - - mtmsr(0); - - for (k = 0; k < CFG_KBYTES_SDRAM; - ++k, mem += (1024 / sizeof(unsigned long))) { - if ((k & 1023) == 0) { - printf("%3d MB\r", k / 1024); - } - - memset(mem, 0xaaaaaaaa, 1024); - for (n = 0; n < kend; ++n) { - if (mem[n] != 0xaaaaaaaa) { - printf("SDRAM test fails at: %08x\n", - (uint) & mem[n]); - return 1; - } - } - - memset(mem, 0x55555555, 1024); - for (n = 0; n < kend; ++n) { - if (mem[n] != 0x55555555) { - printf("SDRAM test fails at: %08x\n", - (uint) & mem[n]); - return 1; - } - } - } - printf("SDRAM test passes\n"); - return 0; -} -#endif - /************************************************************************* * pci_pre_init * diff --git a/board/amcc/yucca/Makefile b/board/amcc/yucca/Makefile index 9f42279b46..0ff522c31c 100644 --- a/board/amcc/yucca/Makefile +++ b/board/amcc/yucca/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend *~ + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/amcc/yucca/yucca.c b/board/amcc/yucca/yucca.c index 11d1743355..6608893651 100644 --- a/board/amcc/yucca/yucca.c +++ b/board/amcc/yucca/yucca.c @@ -586,36 +586,6 @@ u32 ddr_clktr(u32 default_val) { return default_val; } -#if defined(CFG_DRAM_TEST) -int testdram (void) -{ - uint *pstart = (uint *) 0x00000000; - uint *pend = (uint *) 0x08000000; - uint *p; - - for (p = pstart; p < pend; p++) - *p = 0xaaaaaaaa; - - for (p = pstart; p < pend; p++) { - if (*p != 0xaaaaaaaa) { - printf ("SDRAM test fails at: %08x\n", (uint) p); - return 1; - } - } - - for (p = pstart; p < pend; p++) - *p = 0x55555555; - - for (p = pstart; p < pend; p++) { - if (*p != 0x55555555) { - printf ("SDRAM test fails at: %08x\n", (uint) p); - return 1; - } - } - return 0; -} -#endif - /************************************************************************* * pci_pre_init * diff --git a/board/amirix/ap1000/Makefile b/board/amirix/ap1000/Makefile index 7b99d314f9..d0729348a9 100644 --- a/board/amirix/ap1000/Makefile +++ b/board/amirix/ap1000/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/amirix/ap1000/ap1000.c b/board/amirix/ap1000/ap1000.c index 7d11b29b59..55277e72d5 100644 --- a/board/amirix/ap1000/ap1000.c +++ b/board/amirix/ap1000/ap1000.c @@ -133,7 +133,7 @@ int checkboard (void) } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { char *s = getenv ("dramsize"); diff --git a/board/amirix/ap1000/init.S b/board/amirix/ap1000/init.S index 3aaa5c2f1a..65f13e17a6 100644 --- a/board/amirix/ap1000/init.S +++ b/board/amirix/ap1000/init.S @@ -28,7 +28,3 @@ .globl ext_bus_cntlr_init ext_bus_cntlr_init: blr - - .globl sdram_init -sdram_init: - blr diff --git a/board/amirix/ap1000/serial.c b/board/amirix/ap1000/serial.c index 5e9e3a31ee..508e880403 100644 --- a/board/amirix/ap1000/serial.c +++ b/board/amirix/ap1000/serial.c @@ -19,9 +19,9 @@ * */ +#include <common.h> #include <asm/u-boot.h> #include <asm/processor.h> -#include <common.h> #include <command.h> #include <config.h> diff --git a/board/apollon/Makefile b/board/apollon/Makefile index 5348f2d302..9bac9a6c0a 100644 --- a/board/apollon/Makefile +++ b/board/apollon/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/apollon/apollon.c b/board/apollon/apollon.c index 7e39817a0f..8efa703951 100644 --- a/board/apollon/apollon.c +++ b/board/apollon/apollon.c @@ -153,10 +153,8 @@ void ether_init(void) do { __raw_writew(0x1, LAN_RESET_REGISTER); udelay(100); - if (cnt == 0) { - printf("1. eth reset err\n"); + if (cnt == 0) goto eth_reset_err_out; - } --cnt; } while (__raw_readw(LAN_RESET_REGISTER) != 0x1); @@ -165,10 +163,8 @@ void ether_init(void) do { __raw_writew(0x0, LAN_RESET_REGISTER); udelay(100); - if (cnt == 0) { - printf("2. eth reset err\n"); + if (cnt == 0) goto eth_reset_err_out; - } --cnt; } while (__raw_readw(LAN_RESET_REGISTER) != 0x0000); udelay(1000); diff --git a/board/apollon/mem.h b/board/apollon/mem.h index 5bc96faa95..d4636f4051 100644 --- a/board/apollon/mem.h +++ b/board/apollon/mem.h @@ -67,7 +67,7 @@ # define APOLLON_24XX_GPMC_CONFIG7_0 (0x00000e40|(APOLLON_CS0_BASE >> 24)) /* CS1: Ethernet */ -# define APOLLON_24XX_GPMC_CONFIG1_1 0x00011200 +# define APOLLON_24XX_GPMC_CONFIG1_1 0x00011203 # define APOLLON_24XX_GPMC_CONFIG2_1 0x001F1F01 # define APOLLON_24XX_GPMC_CONFIG3_1 0x00080803 # define APOLLON_24XX_GPMC_CONFIG4_1 0x1C0b1C0a diff --git a/board/armadillo/Makefile b/board/armadillo/Makefile index 1380e92cf6..b18e42bff3 100644 --- a/board/armadillo/Makefile +++ b/board/armadillo/Makefile @@ -43,7 +43,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/assabet/Makefile b/board/assabet/Makefile index 872c7fbff8..03f0762a3b 100644 --- a/board/assabet/Makefile +++ b/board/assabet/Makefile @@ -41,7 +41,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/atc/atc.c b/board/atc/atc.c index fe32155822..79527f4384 100644 --- a/board/atc/atc.c +++ b/board/atc/atc.c @@ -340,7 +340,7 @@ int misc_init_r(void) return (0); } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8260_t *memctl = &immap->im_memctl; diff --git a/board/atmel/at91cap9adk/Makefile b/board/atmel/at91cap9adk/Makefile index e33af76c02..2d2ff2cbb9 100644 --- a/board/atmel/at91cap9adk/Makefile +++ b/board/atmel/at91cap9adk/Makefile @@ -2,6 +2,10 @@ # (C) Copyright 2003-2008 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. # +# (C) Copyright 2008 +# Stelian Pop <stelian.pop@leadtechdesign.com> +# Lead Tech Design <www.leadtechdesign.com> +# # See file CREDITS for list of people who contributed to this # project. # @@ -41,7 +45,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/atmel/at91cap9adk/at91cap9adk.c b/board/atmel/at91cap9adk/at91cap9adk.c index 5de52b9197..c5082a0925 100644 --- a/board/atmel/at91cap9adk/at91cap9adk.c +++ b/board/atmel/at91cap9adk/at91cap9adk.c @@ -30,6 +30,8 @@ #include <asm/arch/at91_rstc.h> #include <asm/arch/gpio.h> #include <asm/arch/io.h> +#include <lcd.h> +#include <atmel_lcdc.h> #if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB) #include <net.h> #endif @@ -70,6 +72,33 @@ static void at91cap9_serial_hw_init(void) #endif } +static void at91cap9_slowclock_hw_init(void) +{ + /* + * On AT91CAP9 revC CPUs, the slow clock can be based on an + * internal impreciseRC oscillator or an external 32kHz oscillator. + * Switch to the latter. + */ +#define ARCH_ID_AT91CAP9_REVB 0x399 +#define ARCH_ID_AT91CAP9_REVC 0x601 + if (at91_sys_read(AT91_PMC_VER) == ARCH_ID_AT91CAP9_REVC) { + unsigned i, tmp = at91_sys_read(AT91_SCKCR); + if ((tmp & AT91CAP9_SCKCR_OSCSEL) == AT91CAP9_SCKCR_OSCSEL_RC) { + extern void timer_init(void); + timer_init(); + tmp |= AT91CAP9_SCKCR_OSC32EN; + at91_sys_write(AT91_SCKCR, tmp); + for (i = 0; i < 1200; i++) + udelay(1000); + tmp |= AT91CAP9_SCKCR_OSCSEL_32; + at91_sys_write(AT91_SCKCR, tmp); + udelay(200); + tmp &= ~AT91CAP9_SCKCR_RCEN; + at91_sys_write(AT91_SCKCR, tmp); + } + } +} + static void at91cap9_nor_hw_init(void) { unsigned long csa; @@ -116,7 +145,12 @@ static void at91cap9_nand_hw_init(void) at91_sys_write(AT91_SMC_MODE(3), AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | - AT91_SMC_DBW_8 | AT91_SMC_TDF_(1)); +#ifdef CFG_NAND_DBW_16 + AT91_SMC_DBW_16 | +#else /* CFG_NAND_DBW_8 */ + AT91_SMC_DBW_8 | +#endif + AT91_SMC_TDF_(1)); at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_PIOABCD); @@ -162,7 +196,7 @@ static void at91cap9_macb_hw_init(void) /* Need to reset PHY -> 500ms reset */ at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | - AT91_RSTC_ERSTL | (0x0D << 8) | + (AT91_RSTC_ERSTL & (0x0D << 8)) | AT91_RSTC_URSTEN); at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST); @@ -170,6 +204,11 @@ static void at91cap9_macb_hw_init(void) /* Wait for end hardware reset */ while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL)); + /* Restore NRST value */ + at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | + (AT91_RSTC_ERSTL & (0x0 << 8)) | + AT91_RSTC_URSTEN); + /* Re-enable pull-up */ writel(pin_to_mask(AT91_PIN_PB22) | pin_to_mask(AT91_PIN_PB25) | @@ -228,6 +267,65 @@ static void at91cap9_uhp_hw_init(void) } #endif +#ifdef CONFIG_LCD +vidinfo_t panel_info = { + vl_col: 240, + vl_row: 320, + vl_clk: 4965000, + vl_sync: ATMEL_LCDC_INVLINE_INVERTED | + ATMEL_LCDC_INVFRAME_INVERTED, + vl_bpix: 3, + vl_tft: 1, + vl_hsync_len: 5, + vl_left_margin: 1, + vl_right_margin:33, + vl_vsync_len: 1, + vl_upper_margin:1, + vl_lower_margin:0, + mmio: AT91CAP9_LCDC_BASE, +}; + +void lcd_enable(void) +{ + at91_set_gpio_value(AT91_PIN_PC0, 0); /* power up */ +} + +void lcd_disable(void) +{ + at91_set_gpio_value(AT91_PIN_PC0, 1); /* power down */ +} + +static void at91cap9_lcd_hw_init(void) +{ + at91_set_A_periph(AT91_PIN_PC1, 0); /* LCDHSYNC */ + at91_set_A_periph(AT91_PIN_PC2, 0); /* LCDDOTCK */ + at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDDEN */ + at91_set_B_periph(AT91_PIN_PB9, 0); /* LCDCC */ + at91_set_A_periph(AT91_PIN_PC6, 0); /* LCDD2 */ + at91_set_A_periph(AT91_PIN_PC7, 0); /* LCDD3 */ + at91_set_A_periph(AT91_PIN_PC8, 0); /* LCDD4 */ + at91_set_A_periph(AT91_PIN_PC9, 0); /* LCDD5 */ + at91_set_A_periph(AT91_PIN_PC10, 0); /* LCDD6 */ + at91_set_A_periph(AT91_PIN_PC11, 0); /* LCDD7 */ + at91_set_A_periph(AT91_PIN_PC14, 0); /* LCDD10 */ + at91_set_A_periph(AT91_PIN_PC15, 0); /* LCDD11 */ + at91_set_A_periph(AT91_PIN_PC16, 0); /* LCDD12 */ + at91_set_A_periph(AT91_PIN_PC17, 0); /* LCDD13 */ + at91_set_A_periph(AT91_PIN_PC18, 0); /* LCDD14 */ + at91_set_A_periph(AT91_PIN_PC19, 0); /* LCDD15 */ + at91_set_A_periph(AT91_PIN_PC22, 0); /* LCDD18 */ + at91_set_A_periph(AT91_PIN_PC23, 0); /* LCDD19 */ + at91_set_A_periph(AT91_PIN_PC24, 0); /* LCDD20 */ + at91_set_A_periph(AT91_PIN_PC25, 0); /* LCDD21 */ + at91_set_A_periph(AT91_PIN_PC26, 0); /* LCDD22 */ + at91_set_A_periph(AT91_PIN_PC27, 0); /* LCDD23 */ + + at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_LCDC); + + gd->fb_base = 0; +} +#endif + int board_init(void) { /* Enable Ctrlc */ @@ -239,6 +337,7 @@ int board_init(void) gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; at91cap9_serial_hw_init(); + at91cap9_slowclock_hw_init(); at91cap9_nor_hw_init(); #ifdef CONFIG_CMD_NAND at91cap9_nand_hw_init(); @@ -252,7 +351,9 @@ int board_init(void) #ifdef CONFIG_USB_OHCI_NEW at91cap9_uhp_hw_init(); #endif - +#ifdef CONFIG_LCD + at91cap9_lcd_hw_init(); +#endif return 0; } diff --git a/board/atmel/at91cap9adk/nand.c b/board/atmel/at91cap9adk/nand.c index 28091a4226..0432ef13d8 100644 --- a/board/atmel/at91cap9adk/nand.c +++ b/board/atmel/at91cap9adk/nand.c @@ -63,6 +63,9 @@ static void at91cap9adk_nand_hwcontrol(struct mtd_info *mtd, int cmd) int board_nand_init(struct nand_chip *nand) { nand->eccmode = NAND_ECC_SOFT; +#ifdef CFG_NAND_DBW_16 + nand->options = NAND_BUSWIDTH_16; +#endif nand->hwcontrol = at91cap9adk_nand_hwcontrol; nand->chip_delay = 20; diff --git a/board/atmel/at91rm9200dk/Makefile b/board/atmel/at91rm9200dk/Makefile index 5b4cdcfc39..2d806d0668 100755..100644 --- a/board/atmel/at91rm9200dk/Makefile +++ b/board/atmel/at91rm9200dk/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/atmel/at91sam9260ek/Makefile b/board/atmel/at91sam9260ek/Makefile index e6e4082c73..7c8a612e47 100644 --- a/board/atmel/at91sam9260ek/Makefile +++ b/board/atmel/at91sam9260ek/Makefile @@ -2,6 +2,10 @@ # (C) Copyright 2003-2008 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. # +# (C) Copyright 2008 +# Stelian Pop <stelian.pop@leadtechdesign.com> +# Lead Tech Design <www.leadtechdesign.com> +# # See file CREDITS for list of people who contributed to this # project. # @@ -41,7 +45,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/atmel/at91sam9260ek/at91sam9260ek.c b/board/atmel/at91sam9260ek/at91sam9260ek.c index b30aad8373..836a0c40bf 100644 --- a/board/atmel/at91sam9260ek/at91sam9260ek.c +++ b/board/atmel/at91sam9260ek/at91sam9260ek.c @@ -80,8 +80,8 @@ static void at91sam9260ek_nand_hw_init(void) /* Configure SMC CS3 for NAND/SmartMedia */ at91_sys_write(AT91_SMC_SETUP(3), - AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0) | - AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0)); + AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) | + AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0)); at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) | AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3)); @@ -90,7 +90,12 @@ static void at91sam9260ek_nand_hw_init(void) at91_sys_write(AT91_SMC_MODE(3), AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | - AT91_SMC_DBW_8 | AT91_SMC_TDF_(2)); +#ifdef CFG_NAND_DBW_16 + AT91_SMC_DBW_16 | +#else /* CFG_NAND_DBW_8 */ + AT91_SMC_DBW_8 | +#endif + AT91_SMC_TDF_(2)); at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_PIOC); @@ -144,7 +149,7 @@ static void at91sam9260ek_macb_hw_init(void) /* Need to reset PHY -> 500ms reset */ at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | - AT91_RSTC_ERSTL | (0x0D << 8) | + (AT91_RSTC_ERSTL & (0x0D << 8)) | AT91_RSTC_URSTEN); at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST); @@ -154,7 +159,7 @@ static void at91sam9260ek_macb_hw_init(void) /* Restore NRST value */ at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | - AT91_RSTC_ERSTL | (0x0 << 8) | + (AT91_RSTC_ERSTL & (0x0 << 8)) | AT91_RSTC_URSTEN); /* Re-enable pull-up */ diff --git a/board/atmel/at91sam9260ek/nand.c b/board/atmel/at91sam9260ek/nand.c index 7c1e6abd9a..9738f0fd48 100644 --- a/board/atmel/at91sam9260ek/nand.c +++ b/board/atmel/at91sam9260ek/nand.c @@ -68,6 +68,9 @@ static int at91sam9260ek_nand_ready(struct mtd_info *mtd) int board_nand_init(struct nand_chip *nand) { nand->eccmode = NAND_ECC_SOFT; +#ifdef CFG_NAND_DBW_16 + nand->options = NAND_BUSWIDTH_16; +#endif nand->hwcontrol = at91sam9260ek_nand_hwcontrol; nand->dev_ready = at91sam9260ek_nand_ready; nand->chip_delay = 20; diff --git a/board/atmel/at91sam9261ek/Makefile b/board/atmel/at91sam9261ek/Makefile new file mode 100644 index 0000000000..d7b063dec8 --- /dev/null +++ b/board/atmel/at91sam9261ek/Makefile @@ -0,0 +1,57 @@ +# +# (C) Copyright 2003-2008 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# (C) Copyright 2008 +# Stelian Pop <stelian.pop@leadtechdesign.com> +# Lead Tech Design <www.leadtechdesign.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS-y += at91sam9261ek.o +COBJS-y += led.o +COBJS-y += partition.o +COBJS-$(CONFIG_CMD_NAND) += nand.o + +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/atmel/at91sam9261ek/at91sam9261ek.c b/board/atmel/at91sam9261ek/at91sam9261ek.c new file mode 100644 index 0000000000..647aab5256 --- /dev/null +++ b/board/atmel/at91sam9261ek/at91sam9261ek.c @@ -0,0 +1,258 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop <stelian.pop@leadtechdesign.com> + * Lead Tech Design <www.leadtechdesign.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/at91sam9261.h> +#include <asm/arch/at91sam9261_matrix.h> +#include <asm/arch/at91sam9_smc.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/at91_rstc.h> +#include <asm/arch/gpio.h> +#include <asm/arch/io.h> +#include <lcd.h> +#include <atmel_lcdc.h> +#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_DRIVER_DM9000) +#include <net.h> +#endif + +DECLARE_GLOBAL_DATA_PTR; + +/* ------------------------------------------------------------------------- */ +/* + * Miscelaneous platform dependent initialisations + */ + +static void at91sam9261ek_serial_hw_init(void) +{ +#ifdef CONFIG_USART0 + at91_set_A_periph(AT91_PIN_PC8, 1); /* TXD0 */ + at91_set_A_periph(AT91_PIN_PC9, 0); /* RXD0 */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US0); +#endif + +#ifdef CONFIG_USART1 + at91_set_A_periph(AT91_PIN_PC12, 1); /* TXD1 */ + at91_set_A_periph(AT91_PIN_PC13, 0); /* RXD1 */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US1); +#endif + +#ifdef CONFIG_USART2 + at91_set_A_periph(AT91_PIN_PC14, 1); /* TXD2 */ + at91_set_A_periph(AT91_PIN_PC15, 0); /* RXD2 */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US2); +#endif + +#ifdef CONFIG_USART3 /* DBGU */ + at91_set_A_periph(AT91_PIN_PA9, 0); /* DRXD */ + at91_set_A_periph(AT91_PIN_PA10, 1); /* DTXD */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); +#endif +} + +#ifdef CONFIG_CMD_NAND +static void at91sam9261ek_nand_hw_init(void) +{ + unsigned long csa; + + /* Enable CS3 */ + csa = at91_sys_read(AT91_MATRIX_EBICSA); + at91_sys_write(AT91_MATRIX_EBICSA, + csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); + + /* Configure SMC CS3 for NAND/SmartMedia */ + at91_sys_write(AT91_SMC_SETUP(3), + AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) | + AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0)); + at91_sys_write(AT91_SMC_PULSE(3), + AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) | + AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3)); + at91_sys_write(AT91_SMC_CYCLE(3), + AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5)); + at91_sys_write(AT91_SMC_MODE(3), + AT91_SMC_READMODE | AT91_SMC_WRITEMODE | + AT91_SMC_EXNWMODE_DISABLE | +#ifdef CFG_NAND_DBW_16 + AT91_SMC_DBW_16 | +#else /* CFG_NAND_DBW_8 */ + AT91_SMC_DBW_8 | +#endif + AT91_SMC_TDF_(2)); + + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_PIOC); + + /* Configure RDY/BSY */ + at91_set_gpio_input(AT91_PIN_PC15, 1); + + /* Enable NandFlash */ + at91_set_gpio_output(AT91_PIN_PC14, 1); + + at91_set_A_periph(AT91_PIN_PC0, 0); /* NANDOE */ + at91_set_A_periph(AT91_PIN_PC1, 0); /* NANDWE */ +} +#endif + +#ifdef CONFIG_HAS_DATAFLASH +static void at91sam9261ek_spi_hw_init(void) +{ + at91_set_A_periph(AT91_PIN_PA3, 0); /* SPI0_NPCS0 */ + + at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ + at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ + at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ + + /* Enable clock */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_SPI0); +} +#endif + +#ifdef CONFIG_DRIVER_DM9000 +static void at91sam9261ek_dm9000_hw_init(void) +{ + /* Configure SMC CS2 for DM9000 */ + at91_sys_write(AT91_SMC_SETUP(2), + AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0) | + AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0)); + at91_sys_write(AT91_SMC_PULSE(2), + AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(8) | + AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(8)); + at91_sys_write(AT91_SMC_CYCLE(2), + AT91_SMC_NWECYCLE_(16) | AT91_SMC_NRDCYCLE_(16)); + at91_sys_write(AT91_SMC_MODE(2), + AT91_SMC_READMODE | AT91_SMC_WRITEMODE | + AT91_SMC_EXNWMODE_DISABLE | + AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16 | + AT91_SMC_TDF_(1)); + + /* Configure Reset signal as output */ + at91_set_gpio_output(AT91_PIN_PC10, 0); + + /* Configure Interrupt pin as input, no pull-up */ + at91_set_gpio_input(AT91_PIN_PC11, 0); +} +#endif + +#ifdef CONFIG_LCD +vidinfo_t panel_info = { + vl_col: 240, + vl_row: 320, + vl_clk: 4965000, + vl_sync: ATMEL_LCDC_INVLINE_INVERTED | + ATMEL_LCDC_INVFRAME_INVERTED, + vl_bpix: 3, + vl_tft: 1, + vl_hsync_len: 5, + vl_left_margin: 1, + vl_right_margin:33, + vl_vsync_len: 1, + vl_upper_margin:1, + vl_lower_margin:0, + mmio: AT91SAM9261_LCDC_BASE, +}; + +void lcd_enable(void) +{ + at91_set_gpio_value(AT91_PIN_PA12, 0); /* power up */ +} + +void lcd_disable(void) +{ + at91_set_gpio_value(AT91_PIN_PA12, 1); /* power down */ +} + +static void at91sam9261ek_lcd_hw_init(void) +{ + at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */ + at91_set_A_periph(AT91_PIN_PB2, 0); /* LCDDOTCK */ + at91_set_A_periph(AT91_PIN_PB3, 0); /* LCDDEN */ + at91_set_A_periph(AT91_PIN_PB4, 0); /* LCDCC */ + at91_set_A_periph(AT91_PIN_PB7, 0); /* LCDD2 */ + at91_set_A_periph(AT91_PIN_PB8, 0); /* LCDD3 */ + at91_set_A_periph(AT91_PIN_PB9, 0); /* LCDD4 */ + at91_set_A_periph(AT91_PIN_PB10, 0); /* LCDD5 */ + at91_set_A_periph(AT91_PIN_PB11, 0); /* LCDD6 */ + at91_set_A_periph(AT91_PIN_PB12, 0); /* LCDD7 */ + at91_set_A_periph(AT91_PIN_PB15, 0); /* LCDD10 */ + at91_set_A_periph(AT91_PIN_PB16, 0); /* LCDD11 */ + at91_set_A_periph(AT91_PIN_PB17, 0); /* LCDD12 */ + at91_set_A_periph(AT91_PIN_PB18, 0); /* LCDD13 */ + at91_set_A_periph(AT91_PIN_PB19, 0); /* LCDD14 */ + at91_set_A_periph(AT91_PIN_PB20, 0); /* LCDD15 */ + at91_set_B_periph(AT91_PIN_PB23, 0); /* LCDD18 */ + at91_set_B_periph(AT91_PIN_PB24, 0); /* LCDD19 */ + at91_set_B_periph(AT91_PIN_PB25, 0); /* LCDD20 */ + at91_set_B_periph(AT91_PIN_PB26, 0); /* LCDD21 */ + at91_set_B_periph(AT91_PIN_PB27, 0); /* LCDD22 */ + at91_set_B_periph(AT91_PIN_PB28, 0); /* LCDD23 */ + + at91_sys_write(AT91_PMC_SCER, AT91_PMC_HCK1); + + gd->fb_base = AT91SAM9261_SRAM_BASE; +} +#endif + +int board_init(void) +{ + /* Enable Ctrlc */ + console_init_f(); + + /* arch number of AT91SAM9261EK-Board */ + gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9261EK; + /* adress of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + at91sam9261ek_serial_hw_init(); +#ifdef CONFIG_CMD_NAND + at91sam9261ek_nand_hw_init(); +#endif +#ifdef CONFIG_HAS_DATAFLASH + at91sam9261ek_spi_hw_init(); +#endif +#ifdef CONFIG_DRIVER_DM9000 + at91sam9261ek_dm9000_hw_init(); +#endif +#ifdef CONFIG_LCD + at91sam9261ek_lcd_hw_init(); +#endif + return 0; +} + +int dram_init(void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM; + gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; + return 0; +} + +#ifdef CONFIG_RESET_PHY_R +void reset_phy(void) +{ +#ifdef CONFIG_DRIVER_DM9000 + /* + * Initialize ethernet HW addr prior to starting Linux, + * needed for nfsroot + */ + eth_init(gd->bd); +#endif +} +#endif diff --git a/board/atmel/at91sam9261ek/config.mk b/board/atmel/at91sam9261ek/config.mk new file mode 100644 index 0000000000..ff2cfd170b --- /dev/null +++ b/board/atmel/at91sam9261ek/config.mk @@ -0,0 +1 @@ +TEXT_BASE = 0x23f00000 diff --git a/board/atmel/at91sam9261ek/led.c b/board/atmel/at91sam9261ek/led.c new file mode 100644 index 0000000000..eb2bb23411 --- /dev/null +++ b/board/atmel/at91sam9261ek/led.c @@ -0,0 +1,78 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop <stelian.pop@leadtechdesign.com> + * Lead Tech Design <www.leadtechdesign.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/at91sam9261.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/gpio.h> +#include <asm/arch/io.h> + +#define RED_LED AT91_PIN_PA23 /* this is the power led */ +#define GREEN_LED AT91_PIN_PA13 /* this is the user1 led */ +#define YELLOW_LED AT91_PIN_PA14 /* this is the user2 led */ + +void red_LED_on(void) +{ + at91_set_gpio_value(RED_LED, 1); +} + +void red_LED_off(void) +{ + at91_set_gpio_value(RED_LED, 0); +} + +void green_LED_on(void) +{ + at91_set_gpio_value(GREEN_LED, 0); +} + +void green_LED_off(void) +{ + at91_set_gpio_value(GREEN_LED, 1); +} + +void yellow_LED_on(void) +{ + at91_set_gpio_value(YELLOW_LED, 0); +} + +void yellow_LED_off(void) +{ + at91_set_gpio_value(YELLOW_LED, 1); +} + + +void coloured_LED_init(void) +{ + /* Enable clock */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9261_ID_PIOA); + + at91_set_gpio_output(RED_LED, 1); + at91_set_gpio_output(GREEN_LED, 1); + at91_set_gpio_output(YELLOW_LED, 1); + + at91_set_gpio_value(RED_LED, 0); + at91_set_gpio_value(GREEN_LED, 1); + at91_set_gpio_value(YELLOW_LED, 1); +} diff --git a/board/atmel/at91sam9261ek/nand.c b/board/atmel/at91sam9261ek/nand.c new file mode 100644 index 0000000000..35b26dbefe --- /dev/null +++ b/board/atmel/at91sam9261ek/nand.c @@ -0,0 +1,79 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop <stelian.pop@leadtechdesign.com> + * Lead Tech Design <www.leadtechdesign.com> + * + * (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/at91sam9261.h> +#include <asm/arch/gpio.h> +#include <asm/arch/at91_pio.h> + +#include <nand.h> + +/* + * hardware specific access to control-lines + */ +#define MASK_ALE (1 << 22) /* our ALE is AD22 */ +#define MASK_CLE (1 << 21) /* our CLE is AD21 */ + +static void at91sam9261ek_nand_hwcontrol(struct mtd_info *mtd, int cmd) +{ + struct nand_chip *this = mtd->priv; + ulong IO_ADDR_W = (ulong) this->IO_ADDR_W; + + IO_ADDR_W &= ~(MASK_ALE|MASK_CLE); + switch (cmd) { + case NAND_CTL_SETCLE: + IO_ADDR_W |= MASK_CLE; + break; + case NAND_CTL_SETALE: + IO_ADDR_W |= MASK_ALE; + break; + case NAND_CTL_CLRNCE: + at91_set_gpio_value(AT91_PIN_PC14, 1); + break; + case NAND_CTL_SETNCE: + at91_set_gpio_value(AT91_PIN_PC14, 0); + break; + } + this->IO_ADDR_W = (void *) IO_ADDR_W; +} + +static int at91sam9261ek_nand_ready(struct mtd_info *mtd) +{ + return at91_get_gpio_value(AT91_PIN_PC15); +} + +int board_nand_init(struct nand_chip *nand) +{ + nand->eccmode = NAND_ECC_SOFT; +#ifdef CFG_NAND_DBW_16 + nand->options = NAND_BUSWIDTH_16; +#endif + nand->hwcontrol = at91sam9261ek_nand_hwcontrol; + nand->dev_ready = at91sam9261ek_nand_ready; + nand->chip_delay = 20; + + return 0; +} diff --git a/board/atmel/at91sam9261ek/partition.c b/board/atmel/at91sam9261ek/partition.c new file mode 100644 index 0000000000..975be17464 --- /dev/null +++ b/board/atmel/at91sam9261ek/partition.c @@ -0,0 +1,40 @@ +/* + * (C) Copyright 2008 + * Ulf Samuelsson <ulf@atmel.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ +#include <common.h> +#include <config.h> +#include <asm/hardware.h> +#include <dataflash.h> + +AT91S_DATAFLASH_INFO dataflash_info[CFG_MAX_DATAFLASH_BANKS]; + +struct dataflash_addr cs[CFG_MAX_DATAFLASH_BANKS] = { + {CFG_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */ + {CFG_DATAFLASH_LOGIC_ADDR_CS3, 3} +}; + +/*define the area offsets*/ +dataflash_protect_t area_list[NB_DATAFLASH_AREA] = { + {0x00000000, 0x000041FF, FLAG_PROTECT_SET, 0, "Bootstrap"}, + {0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"}, + {0x00008400, 0x00041FFF, FLAG_PROTECT_SET, 0, "U-Boot"}, + {0x00042000, 0x00251FFF, FLAG_PROTECT_CLEAR, 0, "Kernel"}, + {0x00252000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0, "FS"}, +}; diff --git a/board/atmel/at91sam9263ek/Makefile b/board/atmel/at91sam9263ek/Makefile new file mode 100644 index 0000000000..00a6b00ddf --- /dev/null +++ b/board/atmel/at91sam9263ek/Makefile @@ -0,0 +1,57 @@ +# +# (C) Copyright 2003-2008 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# (C) Copyright 2008 +# Stelian Pop <stelian.pop@leadtechdesign.com> +# Lead Tech Design <www.leadtechdesign.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS-y += at91sam9263ek.o +COBJS-y += led.o +COBJS-y += partition.o +COBJS-$(CONFIG_CMD_NAND) += nand.o + +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/atmel/at91sam9263ek/at91sam9263ek.c b/board/atmel/at91sam9263ek/at91sam9263ek.c new file mode 100644 index 0000000000..927fc912c9 --- /dev/null +++ b/board/atmel/at91sam9263ek/at91sam9263ek.c @@ -0,0 +1,310 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop <stelian.pop@leadtechdesign.com> + * Lead Tech Design <www.leadtechdesign.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/sizes.h> +#include <asm/arch/at91sam9263.h> +#include <asm/arch/at91sam9263_matrix.h> +#include <asm/arch/at91sam9_smc.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/at91_rstc.h> +#include <asm/arch/gpio.h> +#include <asm/arch/io.h> +#include <lcd.h> +#include <atmel_lcdc.h> +#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB) +#include <net.h> +#endif + +DECLARE_GLOBAL_DATA_PTR; + +/* ------------------------------------------------------------------------- */ +/* + * Miscelaneous platform dependent initialisations + */ + +static void at91sam9263ek_serial_hw_init(void) +{ +#ifdef CONFIG_USART0 + at91_set_A_periph(AT91_PIN_PA26, 1); /* TXD0 */ + at91_set_A_periph(AT91_PIN_PA27, 0); /* RXD0 */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US0); +#endif + +#ifdef CONFIG_USART1 + at91_set_A_periph(AT91_PIN_PD0, 1); /* TXD1 */ + at91_set_A_periph(AT91_PIN_PD1, 0); /* RXD1 */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US1); +#endif + +#ifdef CONFIG_USART2 + at91_set_A_periph(AT91_PIN_PD2, 1); /* TXD2 */ + at91_set_A_periph(AT91_PIN_PD3, 0); /* RXD2 */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US2); +#endif + +#ifdef CONFIG_USART3 /* DBGU */ + at91_set_A_periph(AT91_PIN_PC30, 0); /* DRXD */ + at91_set_A_periph(AT91_PIN_PC31, 1); /* DTXD */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); +#endif +} + +#ifdef CONFIG_CMD_NAND +static void at91sam9263ek_nand_hw_init(void) +{ + unsigned long csa; + + /* Enable CS3 */ + csa = at91_sys_read(AT91_MATRIX_EBI0CSA); + at91_sys_write(AT91_MATRIX_EBI0CSA, + csa | AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA); + + /* Configure SMC CS3 for NAND/SmartMedia */ + at91_sys_write(AT91_SMC_SETUP(3), + AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) | + AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0)); + at91_sys_write(AT91_SMC_PULSE(3), + AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) | + AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3)); + at91_sys_write(AT91_SMC_CYCLE(3), + AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5)); + at91_sys_write(AT91_SMC_MODE(3), + AT91_SMC_READMODE | AT91_SMC_WRITEMODE | + AT91_SMC_EXNWMODE_DISABLE | +#ifdef CFG_NAND_DBW_16 + AT91_SMC_DBW_16 | +#else /* CFG_NAND_DBW_8 */ + AT91_SMC_DBW_8 | +#endif + AT91_SMC_TDF_(2)); + + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_PIOA | + 1 << AT91SAM9263_ID_PIOCDE); + + /* Configure RDY/BSY */ + at91_set_gpio_input(AT91_PIN_PA22, 1); + + /* Enable NandFlash */ + at91_set_gpio_output(AT91_PIN_PD15, 1); +} +#endif + +#ifdef CONFIG_HAS_DATAFLASH +static void at91sam9263ek_spi_hw_init(void) +{ + at91_set_B_periph(AT91_PIN_PA5, 0); /* SPI0_NPCS0 */ + + at91_set_B_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */ + at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */ + at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */ + + /* Enable clock */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_SPI0); +} +#endif + +#ifdef CONFIG_MACB +static void at91sam9263ek_macb_hw_init(void) +{ + /* Enable clock */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_EMAC); + + /* + * Disable pull-up on: + * RXDV (PC25) => PHY normal mode (not Test mode) + * ERX0 (PE25) => PHY ADDR0 + * ERX1 (PE26) => PHY ADDR1 => PHYADDR = 0x0 + * + * PHY has internal pull-down + */ + writel(pin_to_mask(AT91_PIN_PC25), + pin_to_controller(AT91_PIN_PC0) + PIO_PUDR); + writel(pin_to_mask(AT91_PIN_PE25) | + pin_to_mask(AT91_PIN_PE26), + pin_to_controller(AT91_PIN_PE0) + PIO_PUDR); + + /* Need to reset PHY -> 500ms reset */ + at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | + (AT91_RSTC_ERSTL & (0x0D << 8)) | + AT91_RSTC_URSTEN); + + at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST); + + /* Wait for end hardware reset */ + while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL)); + + /* Restore NRST value */ + at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | + (AT91_RSTC_ERSTL & (0x0 << 8)) | + AT91_RSTC_URSTEN); + + /* Re-enable pull-up */ + writel(pin_to_mask(AT91_PIN_PC25), + pin_to_controller(AT91_PIN_PC0) + PIO_PUER); + writel(pin_to_mask(AT91_PIN_PE25) | + pin_to_mask(AT91_PIN_PE26), + pin_to_controller(AT91_PIN_PE0) + PIO_PUER); + + at91_set_A_periph(AT91_PIN_PE21, 0); /* ETXCK_EREFCK */ + at91_set_B_periph(AT91_PIN_PC25, 0); /* ERXDV */ + at91_set_A_periph(AT91_PIN_PE25, 0); /* ERX0 */ + at91_set_A_periph(AT91_PIN_PE26, 0); /* ERX1 */ + at91_set_A_periph(AT91_PIN_PE27, 0); /* ERXER */ + at91_set_A_periph(AT91_PIN_PE28, 0); /* ETXEN */ + at91_set_A_periph(AT91_PIN_PE23, 0); /* ETX0 */ + at91_set_A_periph(AT91_PIN_PE24, 0); /* ETX1 */ + at91_set_A_periph(AT91_PIN_PE30, 0); /* EMDIO */ + at91_set_A_periph(AT91_PIN_PE29, 0); /* EMDC */ + +#ifndef CONFIG_RMII + at91_set_A_periph(AT91_PIN_PE22, 0); /* ECRS */ + at91_set_B_periph(AT91_PIN_PC26, 0); /* ECOL */ + at91_set_B_periph(AT91_PIN_PC22, 0); /* ERX2 */ + at91_set_B_periph(AT91_PIN_PC23, 0); /* ERX3 */ + at91_set_B_periph(AT91_PIN_PC27, 0); /* ERXCK */ + at91_set_B_periph(AT91_PIN_PC20, 0); /* ETX2 */ + at91_set_B_periph(AT91_PIN_PC21, 0); /* ETX3 */ + at91_set_B_periph(AT91_PIN_PC24, 0); /* ETXER */ +#endif + +} +#endif + +#ifdef CONFIG_USB_OHCI_NEW +static void at91sam9263ek_uhp_hw_init(void) +{ + /* Enable VBus on UHP ports */ + at91_set_gpio_output(AT91_PIN_PA21, 0); + at91_set_gpio_output(AT91_PIN_PA24, 0); +} +#endif + +#ifdef CONFIG_LCD +vidinfo_t panel_info = { + vl_col: 240, + vl_row: 320, + vl_clk: 4965000, + vl_sync: ATMEL_LCDC_INVLINE_INVERTED | + ATMEL_LCDC_INVFRAME_INVERTED, + vl_bpix: 3, + vl_tft: 1, + vl_hsync_len: 5, + vl_left_margin: 1, + vl_right_margin:33, + vl_vsync_len: 1, + vl_upper_margin:1, + vl_lower_margin:0, + mmio: AT91SAM9263_LCDC_BASE, +}; + +void lcd_enable(void) +{ + at91_set_gpio_value(AT91_PIN_PA30, 1); /* power up */ +} + +void lcd_disable(void) +{ + at91_set_gpio_value(AT91_PIN_PA30, 0); /* power down */ +} + +static void at91sam9263ek_lcd_hw_init(void) +{ + at91_set_A_periph(AT91_PIN_PC1, 0); /* LCDHSYNC */ + at91_set_A_periph(AT91_PIN_PC2, 0); /* LCDDOTCK */ + at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDDEN */ + at91_set_B_periph(AT91_PIN_PB9, 0); /* LCDCC */ + at91_set_A_periph(AT91_PIN_PC6, 0); /* LCDD2 */ + at91_set_A_periph(AT91_PIN_PC7, 0); /* LCDD3 */ + at91_set_A_periph(AT91_PIN_PC8, 0); /* LCDD4 */ + at91_set_A_periph(AT91_PIN_PC9, 0); /* LCDD5 */ + at91_set_A_periph(AT91_PIN_PC10, 0); /* LCDD6 */ + at91_set_A_periph(AT91_PIN_PC11, 0); /* LCDD7 */ + at91_set_A_periph(AT91_PIN_PC14, 0); /* LCDD10 */ + at91_set_A_periph(AT91_PIN_PC15, 0); /* LCDD11 */ + at91_set_A_periph(AT91_PIN_PC16, 0); /* LCDD12 */ + at91_set_B_periph(AT91_PIN_PC12, 0); /* LCDD13 */ + at91_set_A_periph(AT91_PIN_PC18, 0); /* LCDD14 */ + at91_set_A_periph(AT91_PIN_PC19, 0); /* LCDD15 */ + at91_set_A_periph(AT91_PIN_PC22, 0); /* LCDD18 */ + at91_set_A_periph(AT91_PIN_PC23, 0); /* LCDD19 */ + at91_set_A_periph(AT91_PIN_PC24, 0); /* LCDD20 */ + at91_set_B_periph(AT91_PIN_PC17, 0); /* LCDD21 */ + at91_set_A_periph(AT91_PIN_PC26, 0); /* LCDD22 */ + at91_set_A_periph(AT91_PIN_PC27, 0); /* LCDD23 */ + + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_LCDC); + + gd->fb_base = AT91SAM9263_SRAM0_BASE; +} +#endif + +int board_init(void) +{ + /* Enable Ctrlc */ + console_init_f(); + + /* arch number of AT91SAM9263EK-Board */ + gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9263EK; + /* adress of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + at91sam9263ek_serial_hw_init(); +#ifdef CONFIG_CMD_NAND + at91sam9263ek_nand_hw_init(); +#endif +#ifdef CONFIG_HAS_DATAFLASH + at91sam9263ek_spi_hw_init(); +#endif +#ifdef CONFIG_MACB + at91sam9263ek_macb_hw_init(); +#endif +#ifdef CONFIG_USB_OHCI_NEW + at91sam9263ek_uhp_hw_init(); +#endif +#ifdef CONFIG_LCD + at91sam9263ek_lcd_hw_init(); +#endif + return 0; +} + +int dram_init(void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM; + gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; + return 0; +} + +#ifdef CONFIG_RESET_PHY_R +void reset_phy(void) +{ +#ifdef CONFIG_MACB + /* + * Initialize ethernet HW addr prior to starting Linux, + * needed for nfsroot + */ + eth_init(gd->bd); +#endif +} +#endif diff --git a/board/atmel/at91sam9263ek/config.mk b/board/atmel/at91sam9263ek/config.mk new file mode 100644 index 0000000000..ff2cfd170b --- /dev/null +++ b/board/atmel/at91sam9263ek/config.mk @@ -0,0 +1 @@ +TEXT_BASE = 0x23f00000 diff --git a/board/atmel/at91sam9263ek/led.c b/board/atmel/at91sam9263ek/led.c new file mode 100644 index 0000000000..eb8d6ca04f --- /dev/null +++ b/board/atmel/at91sam9263ek/led.c @@ -0,0 +1,78 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop <stelian.pop@leadtechdesign.com> + * Lead Tech Design <www.leadtechdesign.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/at91sam9263.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/gpio.h> +#include <asm/arch/io.h> + +#define RED_LED AT91_PIN_PB7 /* this is the power led */ +#define GREEN_LED AT91_PIN_PB8 /* this is the user1 led */ +#define YELLOW_LED AT91_PIN_PC29 /* this is the user2 led */ + +void red_LED_on(void) +{ + at91_set_gpio_value(RED_LED, 1); +} + +void red_LED_off(void) +{ + at91_set_gpio_value(RED_LED, 0); +} + +void green_LED_on(void) +{ + at91_set_gpio_value(GREEN_LED, 0); +} + +void green_LED_off(void) +{ + at91_set_gpio_value(GREEN_LED, 1); +} + +void yellow_LED_on(void) +{ + at91_set_gpio_value(YELLOW_LED, 0); +} + +void yellow_LED_off(void) +{ + at91_set_gpio_value(YELLOW_LED, 1); +} + +void coloured_LED_init(void) +{ + /* Enable clock */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_PIOB | + 1 << AT91SAM9263_ID_PIOCDE); + + at91_set_gpio_output(RED_LED, 1); + at91_set_gpio_output(GREEN_LED, 1); + at91_set_gpio_output(YELLOW_LED, 1); + + at91_set_gpio_value(RED_LED, 0); + at91_set_gpio_value(GREEN_LED, 1); + at91_set_gpio_value(YELLOW_LED, 1); +} diff --git a/board/atmel/at91sam9263ek/nand.c b/board/atmel/at91sam9263ek/nand.c new file mode 100644 index 0000000000..5079972652 --- /dev/null +++ b/board/atmel/at91sam9263ek/nand.c @@ -0,0 +1,79 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop <stelian.pop@leadtechdesign.com> + * Lead Tech Design <www.leadtechdesign.com> + * + * (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/at91sam9263.h> +#include <asm/arch/gpio.h> +#include <asm/arch/at91_pio.h> + +#include <nand.h> + +/* + * hardware specific access to control-lines + */ +#define MASK_ALE (1 << 21) /* our ALE is AD21 */ +#define MASK_CLE (1 << 22) /* our CLE is AD22 */ + +static void at91sam9263ek_nand_hwcontrol(struct mtd_info *mtd, int cmd) +{ + struct nand_chip *this = mtd->priv; + ulong IO_ADDR_W = (ulong) this->IO_ADDR_W; + + IO_ADDR_W &= ~(MASK_ALE|MASK_CLE); + switch (cmd) { + case NAND_CTL_SETCLE: + IO_ADDR_W |= MASK_CLE; + break; + case NAND_CTL_SETALE: + IO_ADDR_W |= MASK_ALE; + break; + case NAND_CTL_CLRNCE: + at91_set_gpio_value(AT91_PIN_PD15, 1); + break; + case NAND_CTL_SETNCE: + at91_set_gpio_value(AT91_PIN_PD15, 0); + break; + } + this->IO_ADDR_W = (void *) IO_ADDR_W; +} + +static int at91sam9263ek_nand_ready(struct mtd_info *mtd) +{ + return at91_get_gpio_value(AT91_PIN_PA22); +} + +int board_nand_init(struct nand_chip *nand) +{ + nand->eccmode = NAND_ECC_SOFT; +#ifdef CFG_NAND_DBW_16 + nand->options = NAND_BUSWIDTH_16; +#endif + nand->hwcontrol = at91sam9263ek_nand_hwcontrol; + nand->dev_ready = at91sam9263ek_nand_ready; + nand->chip_delay = 20; + + return 0; +} diff --git a/board/atmel/at91sam9263ek/partition.c b/board/atmel/at91sam9263ek/partition.c new file mode 100644 index 0000000000..eb1a724ab1 --- /dev/null +++ b/board/atmel/at91sam9263ek/partition.c @@ -0,0 +1,39 @@ +/* + * (C) Copyright 2008 + * Ulf Samuelsson <ulf@atmel.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ +#include <common.h> +#include <config.h> +#include <asm/hardware.h> +#include <dataflash.h> + +AT91S_DATAFLASH_INFO dataflash_info[CFG_MAX_DATAFLASH_BANKS]; + +struct dataflash_addr cs[CFG_MAX_DATAFLASH_BANKS] = { + {CFG_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */ +}; + +/*define the area offsets*/ +dataflash_protect_t area_list[NB_DATAFLASH_AREA] = { + {0x00000000, 0x000041FF, FLAG_PROTECT_SET, 0, "Bootstrap"}, + {0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"}, + {0x00008400, 0x00041FFF, FLAG_PROTECT_SET, 0, "U-Boot"}, + {0x00042000, 0x00251FFF, FLAG_PROTECT_CLEAR, 0, "Kernel"}, + {0x00252000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0, "FS"}, +}; diff --git a/board/atmel/at91sam9rlek/Makefile b/board/atmel/at91sam9rlek/Makefile new file mode 100644 index 0000000000..90029cb872 --- /dev/null +++ b/board/atmel/at91sam9rlek/Makefile @@ -0,0 +1,57 @@ +# +# (C) Copyright 2003-2008 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# (C) Copyright 2008 +# Stelian Pop <stelian.pop@leadtechdesign.com> +# Lead Tech Design <www.leadtechdesign.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS-y += at91sam9rlek.o +COBJS-y += led.o +COBJS-y += partition.o +COBJS-$(CONFIG_CMD_NAND) += nand.o + +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/atmel/at91sam9rlek/at91sam9rlek.c b/board/atmel/at91sam9rlek/at91sam9rlek.c new file mode 100644 index 0000000000..509e7c38e1 --- /dev/null +++ b/board/atmel/at91sam9rlek/at91sam9rlek.c @@ -0,0 +1,215 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop <stelian.pop@leadtechdesign.com> + * Lead Tech Design <www.leadtechdesign.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/at91sam9rl.h> +#include <asm/arch/at91sam9rl_matrix.h> +#include <asm/arch/at91sam9_smc.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/at91_rstc.h> +#include <asm/arch/gpio.h> +#include <asm/arch/io.h> +#include <lcd.h> +#include <atmel_lcdc.h> +#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB) +#include <net.h> +#endif + +DECLARE_GLOBAL_DATA_PTR; + +/* ------------------------------------------------------------------------- */ +/* + * Miscelaneous platform dependent initialisations + */ + +static void at91sam9rlek_serial_hw_init(void) +{ +#ifdef CONFIG_USART0 + at91_set_A_periph(AT91_PIN_PA6, 1); /* TXD0 */ + at91_set_A_periph(AT91_PIN_PA7, 0); /* RXD0 */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US0); +#endif + +#ifdef CONFIG_USART1 + at91_set_A_periph(AT91_PIN_PA11, 1); /* TXD1 */ + at91_set_A_periph(AT91_PIN_PA12, 0); /* RXD1 */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US1); +#endif + +#ifdef CONFIG_USART2 + at91_set_A_periph(AT91_PIN_PA13, 1); /* TXD2 */ + at91_set_A_periph(AT91_PIN_PA14, 0); /* RXD2 */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_US2); +#endif + +#ifdef CONFIG_USART3 /* DBGU */ + at91_set_A_periph(AT91_PIN_PA21, 0); /* DRXD */ + at91_set_A_periph(AT91_PIN_PA22, 1); /* DTXD */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91_ID_SYS); +#endif +} + +#ifdef CONFIG_CMD_NAND +static void at91sam9rlek_nand_hw_init(void) +{ + unsigned long csa; + + /* Enable CS3 */ + csa = at91_sys_read(AT91_MATRIX_EBICSA); + at91_sys_write(AT91_MATRIX_EBICSA, + csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA); + + /* Configure SMC CS3 for NAND/SmartMedia */ + at91_sys_write(AT91_SMC_SETUP(3), + AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) | + AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0)); + at91_sys_write(AT91_SMC_PULSE(3), + AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3) | + AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3)); + at91_sys_write(AT91_SMC_CYCLE(3), + AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5)); + at91_sys_write(AT91_SMC_MODE(3), + AT91_SMC_READMODE | AT91_SMC_WRITEMODE | + AT91_SMC_EXNWMODE_DISABLE | +#ifdef CFG_NAND_DBW_16 + AT91_SMC_DBW_16 | +#else /* CFG_NAND_DBW_8 */ + AT91_SMC_DBW_8 | +#endif + AT91_SMC_TDF_(2)); + + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_PIOD); + + /* Configure RDY/BSY */ + at91_set_gpio_input(AT91_PIN_PD17, 1); + + /* Enable NandFlash */ + at91_set_gpio_output(AT91_PIN_PB6, 1); + + at91_set_A_periph(AT91_PIN_PB4, 0); /* NANDOE */ + at91_set_A_periph(AT91_PIN_PB5, 0); /* NANDWE */ +} +#endif + +#ifdef CONFIG_HAS_DATAFLASH +static void at91sam9rlek_spi_hw_init(void) +{ + at91_set_A_periph(AT91_PIN_PA28, 0); /* SPI0_NPCS0 */ + + at91_set_A_periph(AT91_PIN_PA25, 0); /* SPI0_MISO */ + at91_set_A_periph(AT91_PIN_PA26, 0); /* SPI0_MOSI */ + at91_set_A_periph(AT91_PIN_PA27, 0); /* SPI0_SPCK */ + + /* Enable clock */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_SPI); +} +#endif + +#ifdef CONFIG_LCD +vidinfo_t panel_info = { + vl_col: 240, + vl_row: 320, + vl_clk: 4965000, + vl_sync: ATMEL_LCDC_INVLINE_INVERTED | + ATMEL_LCDC_INVFRAME_INVERTED, + vl_bpix: 3, + vl_tft: 1, + vl_hsync_len: 5, + vl_left_margin: 1, + vl_right_margin:33, + vl_vsync_len: 1, + vl_upper_margin:1, + vl_lower_margin:0, + mmio: AT91SAM9RL_LCDC_BASE, +}; + +void lcd_enable(void) +{ + at91_set_gpio_value(AT91_PIN_PA30, 0); /* power up */ +} + +void lcd_disable(void) +{ + at91_set_gpio_value(AT91_PIN_PA30, 1); /* power down */ +} +static void at91sam9rlek_lcd_hw_init(void) +{ + at91_set_B_periph(AT91_PIN_PC1, 0); /* LCDPWR */ + at91_set_A_periph(AT91_PIN_PC5, 0); /* LCDHSYNC */ + at91_set_A_periph(AT91_PIN_PC6, 0); /* LCDDOTCK */ + at91_set_A_periph(AT91_PIN_PC7, 0); /* LCDDEN */ + at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDCC */ + at91_set_B_periph(AT91_PIN_PC9, 0); /* LCDD3 */ + at91_set_B_periph(AT91_PIN_PC10, 0); /* LCDD4 */ + at91_set_B_periph(AT91_PIN_PC11, 0); /* LCDD5 */ + at91_set_B_periph(AT91_PIN_PC12, 0); /* LCDD6 */ + at91_set_B_periph(AT91_PIN_PC13, 0); /* LCDD7 */ + at91_set_B_periph(AT91_PIN_PC15, 0); /* LCDD11 */ + at91_set_B_periph(AT91_PIN_PC16, 0); /* LCDD12 */ + at91_set_B_periph(AT91_PIN_PC17, 0); /* LCDD13 */ + at91_set_B_periph(AT91_PIN_PC18, 0); /* LCDD14 */ + at91_set_B_periph(AT91_PIN_PC19, 0); /* LCDD15 */ + at91_set_B_periph(AT91_PIN_PC20, 0); /* LCDD18 */ + at91_set_B_periph(AT91_PIN_PC21, 0); /* LCDD19 */ + at91_set_B_periph(AT91_PIN_PC22, 0); /* LCDD20 */ + at91_set_B_periph(AT91_PIN_PC23, 0); /* LCDD21 */ + at91_set_B_periph(AT91_PIN_PC24, 0); /* LCDD22 */ + at91_set_B_periph(AT91_PIN_PC25, 0); /* LCDD23 */ + + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_LCDC); + + gd->fb_base = 0; +} +#endif + + +int board_init(void) +{ + /* Enable Ctrlc */ + console_init_f(); + + /* arch number of AT91SAM9RLEK-Board */ + gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9RLEK; + /* adress of boot parameters */ + gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; + + at91sam9rlek_serial_hw_init(); +#ifdef CONFIG_CMD_NAND + at91sam9rlek_nand_hw_init(); +#endif +#ifdef CONFIG_HAS_DATAFLASH + at91sam9rlek_spi_hw_init(); +#endif +#ifdef CONFIG_LCD + at91sam9rlek_lcd_hw_init(); +#endif + return 0; +} + +int dram_init(void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM; + gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; + return 0; +} diff --git a/board/atmel/at91sam9rlek/config.mk b/board/atmel/at91sam9rlek/config.mk new file mode 100644 index 0000000000..ff2cfd170b --- /dev/null +++ b/board/atmel/at91sam9rlek/config.mk @@ -0,0 +1 @@ +TEXT_BASE = 0x23f00000 diff --git a/board/atmel/at91sam9rlek/led.c b/board/atmel/at91sam9rlek/led.c new file mode 100644 index 0000000000..8a7d8e0bf7 --- /dev/null +++ b/board/atmel/at91sam9rlek/led.c @@ -0,0 +1,77 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop <stelian.pop@leadtechdesign.com> + * Lead Tech Design <www.leadtechdesign.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/at91sam9rl.h> +#include <asm/arch/at91_pmc.h> +#include <asm/arch/gpio.h> +#include <asm/arch/io.h> + +#define RED_LED AT91_PIN_PD14 /* this is the power led */ +#define GREEN_LED AT91_PIN_PD15 /* this is the user1 led */ +#define YELLOW_LED AT91_PIN_PD16 /* this is the user2 led */ + +void red_LED_on(void) +{ + at91_set_gpio_value(RED_LED, 1); +} + +void red_LED_off(void) +{ + at91_set_gpio_value(RED_LED, 0); +} + +void green_LED_on(void) +{ + at91_set_gpio_value(GREEN_LED, 0); +} + +void green_LED_off(void) +{ + at91_set_gpio_value(GREEN_LED, 1); +} + +void yellow_LED_on(void) +{ + at91_set_gpio_value(YELLOW_LED, 0); +} + +void yellow_LED_off(void) +{ + at91_set_gpio_value(YELLOW_LED, 1); +} + +void coloured_LED_init(void) +{ + /* Enable clock */ + at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9RL_ID_PIOD); + + at91_set_gpio_output(RED_LED, 1); + at91_set_gpio_output(GREEN_LED, 1); + at91_set_gpio_output(YELLOW_LED, 1); + + at91_set_gpio_value(RED_LED, 0); + at91_set_gpio_value(GREEN_LED, 1); + at91_set_gpio_value(YELLOW_LED, 1); +} diff --git a/board/atmel/at91sam9rlek/nand.c b/board/atmel/at91sam9rlek/nand.c new file mode 100644 index 0000000000..5af1a31175 --- /dev/null +++ b/board/atmel/at91sam9rlek/nand.c @@ -0,0 +1,79 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop <stelian.pop@leadtechdesign.com> + * Lead Tech Design <www.leadtechdesign.com> + * + * (C) Copyright 2006 ATMEL Rousset, Lacressonniere Nicolas + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/arch/at91sam9rl.h> +#include <asm/arch/gpio.h> +#include <asm/arch/at91_pio.h> + +#include <nand.h> + +/* + * hardware specific access to control-lines + */ +#define MASK_ALE (1 << 21) /* our ALE is AD21 */ +#define MASK_CLE (1 << 22) /* our CLE is AD22 */ + +static void at91sam9rlek_nand_hwcontrol(struct mtd_info *mtd, int cmd) +{ + struct nand_chip *this = mtd->priv; + ulong IO_ADDR_W = (ulong) this->IO_ADDR_W; + + IO_ADDR_W &= ~(MASK_ALE|MASK_CLE); + switch (cmd) { + case NAND_CTL_SETCLE: + IO_ADDR_W |= MASK_CLE; + break; + case NAND_CTL_SETALE: + IO_ADDR_W |= MASK_ALE; + break; + case NAND_CTL_CLRNCE: + at91_set_gpio_value(AT91_PIN_PB6, 1); + break; + case NAND_CTL_SETNCE: + at91_set_gpio_value(AT91_PIN_PB6, 0); + break; + } + this->IO_ADDR_W = (void *) IO_ADDR_W; +} + +static int at91sam9rlek_nand_ready(struct mtd_info *mtd) +{ + return at91_get_gpio_value(AT91_PIN_PD17); +} + +int board_nand_init(struct nand_chip *nand) +{ + nand->eccmode = NAND_ECC_SOFT; +#ifdef CFG_NAND_DBW_16 + nand->options = NAND_BUSWIDTH_16; +#endif + nand->hwcontrol = at91sam9rlek_nand_hwcontrol; + nand->dev_ready = at91sam9rlek_nand_ready; + nand->chip_delay = 20; + + return 0; +} diff --git a/board/atmel/at91sam9rlek/partition.c b/board/atmel/at91sam9rlek/partition.c new file mode 100644 index 0000000000..eb1a724ab1 --- /dev/null +++ b/board/atmel/at91sam9rlek/partition.c @@ -0,0 +1,39 @@ +/* + * (C) Copyright 2008 + * Ulf Samuelsson <ulf@atmel.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ +#include <common.h> +#include <config.h> +#include <asm/hardware.h> +#include <dataflash.h> + +AT91S_DATAFLASH_INFO dataflash_info[CFG_MAX_DATAFLASH_BANKS]; + +struct dataflash_addr cs[CFG_MAX_DATAFLASH_BANKS] = { + {CFG_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */ +}; + +/*define the area offsets*/ +dataflash_protect_t area_list[NB_DATAFLASH_AREA] = { + {0x00000000, 0x000041FF, FLAG_PROTECT_SET, 0, "Bootstrap"}, + {0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"}, + {0x00008400, 0x00041FFF, FLAG_PROTECT_SET, 0, "U-Boot"}, + {0x00042000, 0x00251FFF, FLAG_PROTECT_CLEAR, 0, "Kernel"}, + {0x00252000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0, "FS"}, +}; diff --git a/board/atmel/atngw100/atngw100.c b/board/atmel/atngw100/atngw100.c index 1ccbe2c181..f2c3e79799 100644 --- a/board/atmel/atngw100/atngw100.c +++ b/board/atmel/atngw100/atngw100.c @@ -25,12 +25,12 @@ #include <asm/sdram.h> #include <asm/arch/clk.h> #include <asm/arch/gpio.h> -#include <asm/arch/hmatrix2.h> +#include <asm/arch/hmatrix.h> DECLARE_GLOBAL_DATA_PTR; -static const struct sdram_info sdram = { - .phys_addr = CFG_SDRAM_BASE, +static const struct sdram_config sdram_config = { + .data_bits = SDRAM_DATA_16BIT, .row_bits = 13, .col_bits = 9, .bank_bits = 2, @@ -47,8 +47,8 @@ static const struct sdram_info sdram = { int board_early_init_f(void) { - /* Set the SDRAM_ENABLE bit in the HEBI SFR */ - hmatrix2_writel(SFR4, 1 << 1); + /* Enable SDRAM in the EBI mux */ + hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE)); gpio_enable_ebi(); gpio_enable_usart1(); @@ -60,13 +60,31 @@ int board_early_init_f(void) #if defined(CONFIG_MMC) gpio_enable_mmci(); #endif +#if defined(CONFIG_ATMEL_SPI) + gpio_enable_spi0(1 << 0); +#endif return 0; } -long int initdram(int board_type) +phys_size_t initdram(int board_type) { - return sdram_init(&sdram); + unsigned long expected_size; + unsigned long actual_size; + void *sdram_base; + + sdram_base = map_physmem(EBI_SDRAM_BASE, EBI_SDRAM_SIZE, MAP_NOCACHE); + + expected_size = sdram_init(sdram_base, &sdram_config); + actual_size = get_ram_size(sdram_base, expected_size); + + unmap_physmem(sdram_base, EBI_SDRAM_SIZE); + + if (expected_size != actual_size) + printf("Warning: Only %u of %u MiB SDRAM is working\n", + actual_size >> 20, expected_size >> 20); + + return actual_size; } void board_init_info(void) @@ -74,3 +92,25 @@ void board_init_info(void) gd->bd->bi_phy_id[0] = 0x01; gd->bd->bi_phy_id[1] = 0x03; } + +/* SPI chip select control */ +#ifdef CONFIG_ATMEL_SPI +#include <spi.h> + +#define ATNGW100_DATAFLASH_CS_PIN GPIO_PIN_PA3 + +int spi_cs_is_valid(unsigned int bus, unsigned int cs) +{ + return bus == 0 && cs == 0; +} + +void spi_cs_activate(struct spi_slave *slave) +{ + gpio_set_value(ATNGW100_DATAFLASH_CS_PIN, 0); +} + +void spi_cs_deactivate(struct spi_slave *slave) +{ + gpio_set_value(ATNGW100_DATAFLASH_CS_PIN, 1); +} +#endif /* CONFIG_ATMEL_SPI */ diff --git a/board/atmel/atngw100/u-boot.lds b/board/atmel/atngw100/u-boot.lds index 34e347aecd..e736adf0fc 100644 --- a/board/atmel/atngw100/u-boot.lds +++ b/board/atmel/atngw100/u-boot.lds @@ -29,17 +29,10 @@ SECTIONS . = 0; _text = .; .text : { + *(.exception.text) *(.text) *(.text.*) } - - . = ALIGN(32); - __flashprog_start = .; - .flashprog : { - *(.flashprog) - } - . = ALIGN(32); - __flashprog_end = .; _etext = .; .rodata : { diff --git a/board/atmel/atstk1000/atstk1000.c b/board/atmel/atstk1000/atstk1000.c index 28f64c4a6f..6371e2d4e3 100644 --- a/board/atmel/atstk1000/atstk1000.c +++ b/board/atmel/atstk1000/atstk1000.c @@ -25,13 +25,39 @@ #include <asm/sdram.h> #include <asm/arch/clk.h> #include <asm/arch/gpio.h> -#include <asm/arch/hmatrix2.h> +#include <asm/arch/hmatrix.h> DECLARE_GLOBAL_DATA_PTR; -static const struct sdram_info sdram = { - .phys_addr = CFG_SDRAM_BASE, +static const struct sdram_config sdram_config = { +#if defined(CONFIG_ATSTK1006) + /* Dual MT48LC16M16A2-7E (64 MB) on daughterboard */ + .data_bits = SDRAM_DATA_32BIT, + .row_bits = 13, + .col_bits = 9, + .bank_bits = 2, + .cas = 2, + .twr = 2, + .trc = 7, + .trp = 2, + .trcd = 2, + .tras = 4, + .txsr = 7, + /* 7.81 us */ + .refresh_period = (781 * (SDRAMC_BUS_HZ / 1000)) / 100000, +#else + /* MT48LC2M32B2P-5 (8 MB) on motherboard */ +#ifdef CONFIG_ATSTK1004 + .data_bits = SDRAM_DATA_16BIT, +#else + .data_bits = SDRAM_DATA_32BIT, +#endif +#ifdef CONFIG_ATSTK1000_16MB_SDRAM + /* MT48LC4M32B2P-6 (16 MB) on mod'ed motherboard */ + .row_bits = 12, +#else .row_bits = 11, +#endif .col_bits = 8, .bank_bits = 2, .cas = 3, @@ -43,12 +69,13 @@ static const struct sdram_info sdram = { .txsr = 5, /* 15.6 us */ .refresh_period = (156 * (SDRAMC_BUS_HZ / 1000)) / 10000, +#endif }; int board_early_init_f(void) { - /* Set the SDRAM_ENABLE bit in the HEBI SFR */ - hmatrix2_writel(SFR4, 1 << 1); + /* Enable SDRAM in the EBI mux */ + hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE)); gpio_enable_ebi(); gpio_enable_usart1(); @@ -63,9 +90,24 @@ int board_early_init_f(void) return 0; } -long int initdram(int board_type) +phys_size_t initdram(int board_type) { - return sdram_init(&sdram); + unsigned long expected_size; + unsigned long actual_size; + void *sdram_base; + + sdram_base = map_physmem(EBI_SDRAM_BASE, EBI_SDRAM_SIZE, MAP_NOCACHE); + + expected_size = sdram_init(sdram_base, &sdram_config); + actual_size = get_ram_size(sdram_base, expected_size); + + unmap_physmem(sdram_base, EBI_SDRAM_SIZE); + + if (expected_size != actual_size) + printf("Warning: Only %u of %u MiB SDRAM is working\n", + actual_size >> 20, expected_size >> 20); + + return actual_size; } void board_init_info(void) diff --git a/board/atmel/atstk1000/flash.c b/board/atmel/atstk1000/flash.c index 40478258e7..12537f3142 100644 --- a/board/atmel/atstk1000/flash.c +++ b/board/atmel/atstk1000/flash.c @@ -30,7 +30,7 @@ DECLARE_GLOBAL_DATA_PTR; flash_info_t flash_info[1]; -static void __flashprog flash_identify(uint16_t *flash, flash_info_t *info) +static void flash_identify(uint16_t *flash, flash_info_t *info) { unsigned long flags; @@ -76,7 +76,7 @@ void flash_print_info(flash_info_t *info) info->size >> 10, info->sector_count); } -int __flashprog flash_erase(flash_info_t *info, int s_first, int s_last) +int flash_erase(flash_info_t *info, int s_first, int s_last) { unsigned long flags; unsigned long start_time; @@ -154,7 +154,7 @@ int __flashprog flash_erase(flash_info_t *info, int s_first, int s_last) return ERR_OK; } -int __flashprog write_buff(flash_info_t *info, uchar *src, +int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong count) { unsigned long flags; diff --git a/board/atmel/atstk1000/u-boot.lds b/board/atmel/atstk1000/u-boot.lds index 247812e103..0d3b19c640 100644 --- a/board/atmel/atstk1000/u-boot.lds +++ b/board/atmel/atstk1000/u-boot.lds @@ -29,17 +29,10 @@ SECTIONS . = 0; _text = .; .text : { + *(.exception.text) *(.text) *(.text.*) } - - . = ALIGN(32); - __flashprog_start = .; - .flashprog : { - *(.flashprog) - } - . = ALIGN(32); - __flashprog_end = .; _etext = .; .rodata : { diff --git a/board/atum8548/Makefile b/board/atum8548/Makefile index ac4e583855..d2e689f1fa 100644 --- a/board/atum8548/Makefile +++ b/board/atum8548/Makefile @@ -42,7 +42,7 @@ clean: rm -f $(OBJS) $(SOBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/atum8548/atum8548.c b/board/atum8548/atum8548.c index 2f6ae29d99..4d8c6fbae3 100644 --- a/board/atum8548/atum8548.c +++ b/board/atum8548/atum8548.c @@ -98,7 +98,7 @@ long int fixed_sdram (void) } #endif /* !defined(CONFIG_SPD_EEPROM) */ -long int +phys_size_t initdram(int board_type) { long dram_size = 0; diff --git a/board/atum8548/law.c b/board/atum8548/law.c index 3606cbb52f..b66fd7b297 100644 --- a/board/atum8548/law.c +++ b/board/atum8548/law.c @@ -48,14 +48,14 @@ */ struct law_entry law_table[] = { - SET_LAW_ENTRY(2, CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_1), - SET_LAW_ENTRY(3, CFG_PCI1_IO_PHYS, LAWAR_SIZE_1M, LAW_TRGT_IF_PCI_1), - SET_LAW_ENTRY(4, CFG_PCI2_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2), - SET_LAW_ENTRY(5, CFG_PCI2_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI_2), - SET_LAW_ENTRY(6, CFG_PCIE1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCIE_1), - SET_LAW_ENTRY(7, CFG_PCIE1_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCIE_1), + SET_LAW(CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_1), + SET_LAW(CFG_PCI1_IO_PHYS, LAWAR_SIZE_1M, LAW_TRGT_IF_PCI_1), + SET_LAW(CFG_PCI2_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2), + SET_LAW(CFG_PCI2_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI_2), + SET_LAW(CFG_PCIE1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCIE_1), + SET_LAW(CFG_PCIE1_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCIE_1), /* LBC window - maps 256M 0xf0000000 -> 0xffffffff */ - SET_LAW_ENTRY(8, CFG_LBC_CACHE_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC), + SET_LAW(CFG_LBC_CACHE_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC), }; int num_law_entries = ARRAY_SIZE(law_table); diff --git a/board/barco/barco.c b/board/barco/barco.c index becbd0abda..72e7e0b050 100644 --- a/board/barco/barco.c +++ b/board/barco/barco.c @@ -83,7 +83,7 @@ int checkboard (void) return 0; } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { long size; long new_bank0_end; diff --git a/board/barco/barco_svc.h b/board/barco/barco_svc.h index 088f61e74e..bd924f2b18 100644 --- a/board/barco/barco_svc.h +++ b/board/barco/barco_svc.h @@ -59,7 +59,7 @@ typedef struct SBootInfo { /* barcohydra.c */ int checkboard(void); -long int initdram(int board_type); +phys_size_t initdram(int board_type); void pci_init_board(void); void check_flash(void); int write_flash(char *addr, char value); diff --git a/board/bc3450/Makefile b/board/bc3450/Makefile index d0e147e4ba..9c1d0cc561 100644 --- a/board/bc3450/Makefile +++ b/board/bc3450/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/bc3450/bc3450.c b/board/bc3450/bc3450.c index 56a73fe4d0..a728dc64d7 100644 --- a/board/bc3450/bc3450.c +++ b/board/bc3450/bc3450.c @@ -104,7 +104,7 @@ static void sdram_start (int hi_addr) */ #if defined(CONFIG_MPC5200) -long int initdram (int board_type) +phys_size_t initdram (int board_type) { ulong dramsize = 0; ulong dramsize2 = 0; @@ -205,7 +205,7 @@ long int initdram (int board_type) #elif defined(CONFIG_MGT5100) -long int initdram (int board_type) +phys_size_t initdram (int board_type) { ulong dramsize = 0; #ifndef CFG_RAMBOOT diff --git a/board/bf533-ezkit/Makefile b/board/bf533-ezkit/Makefile index 6688095d23..b2d7acffee 100644 --- a/board/bf533-ezkit/Makefile +++ b/board/bf533-ezkit/Makefile @@ -46,7 +46,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/bf533-ezkit/bf533-ezkit.c b/board/bf533-ezkit/bf533-ezkit.c index 738f69c781..583560adb3 100644 --- a/board/bf533-ezkit/bf533-ezkit.c +++ b/board/bf533-ezkit/bf533-ezkit.c @@ -39,7 +39,7 @@ int checkboard(void) return 0; } -long int initdram(int board_type) +phys_size_t initdram(int board_type) { #ifdef DEBUG int brate; diff --git a/board/bf533-stamp/Makefile b/board/bf533-stamp/Makefile index 1115df8327..21f6ad1b45 100644 --- a/board/bf533-stamp/Makefile +++ b/board/bf533-stamp/Makefile @@ -46,7 +46,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/bf533-stamp/bf533-stamp.c b/board/bf533-stamp/bf533-stamp.c index c4dde92c1a..7a17dfa55b 100644 --- a/board/bf533-stamp/bf533-stamp.c +++ b/board/bf533-stamp/bf533-stamp.c @@ -48,7 +48,7 @@ int checkboard(void) return 0; } -long int initdram(int board_type) +phys_size_t initdram(int board_type) { #ifdef DEBUG printf("SDRAM attributes:\n"); diff --git a/board/bf537-stamp/Makefile b/board/bf537-stamp/Makefile index ea8c43680b..e5481bfc55 100644 --- a/board/bf537-stamp/Makefile +++ b/board/bf537-stamp/Makefile @@ -46,7 +46,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/bf537-stamp/bf537-stamp.c b/board/bf537-stamp/bf537-stamp.c index e714177d7c..cd7a04dbfa 100644 --- a/board/bf537-stamp/bf537-stamp.c +++ b/board/bf537-stamp/bf537-stamp.c @@ -97,7 +97,7 @@ void cf_outsw(unsigned short *addr, unsigned short *sect_buf, int words) } #endif /* CONFIG_BFIN_IDE */ -long int initdram(int board_type) +phys_size_t initdram(int board_type) { #ifdef DEBUG int brate; diff --git a/board/bf561-ezkit/Makefile b/board/bf561-ezkit/Makefile index 73bef24baf..a1a4433fc1 100644 --- a/board/bf561-ezkit/Makefile +++ b/board/bf561-ezkit/Makefile @@ -46,7 +46,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/bf561-ezkit/bf561-ezkit.c b/board/bf561-ezkit/bf561-ezkit.c index d504217a1a..7345b42cb4 100644 --- a/board/bf561-ezkit/bf561-ezkit.c +++ b/board/bf561-ezkit/bf561-ezkit.c @@ -39,7 +39,7 @@ int checkboard(void) return 0; } -long int initdram(int board_type) +phys_size_t initdram(int board_type) { #ifdef DEBUG int brate; diff --git a/board/bmw/bmw.c b/board/bmw/bmw.c index 485e050b19..043143163a 100644 --- a/board/bmw/bmw.c +++ b/board/bmw/bmw.c @@ -51,7 +51,7 @@ int checkboard(void) return 0; } -long int initdram(int board_type) +phys_size_t initdram(int board_type) { return 64*1024*1024; } diff --git a/board/c2mon/c2mon.c b/board/c2mon/c2mon.c index ca8eb0cb02..7d2f746f45 100644 --- a/board/c2mon/c2mon.c +++ b/board/c2mon/c2mon.c @@ -108,7 +108,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; diff --git a/board/canmb/Makefile b/board/canmb/Makefile index 23d410d14e..b6b67d8e72 100644 --- a/board/canmb/Makefile +++ b/board/canmb/Makefile @@ -42,7 +42,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/canmb/canmb.c b/board/canmb/canmb.c index 1782b314f8..d3711d0779 100644 --- a/board/canmb/canmb.c +++ b/board/canmb/canmb.c @@ -82,7 +82,7 @@ static void sdram_start (int hi_addr) */ #if defined(CONFIG_MPC5200) -long int initdram (int board_type) +phys_size_t initdram (int board_type) { ulong dramsize = 0; ulong dramsize2 = 0; @@ -185,7 +185,7 @@ long int initdram (int board_type) #elif defined(CONFIG_MGT5100) -long int initdram (int board_type) +phys_size_t initdram (int board_type) { ulong dramsize = 0; #ifndef CFG_RAMBOOT diff --git a/board/cerf250/Makefile b/board/cerf250/Makefile index 50d07b8022..a806b18492 100644 --- a/board/cerf250/Makefile +++ b/board/cerf250/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/cm4008/Makefile b/board/cm4008/Makefile index f53404148a..cd3f962f28 100644 --- a/board/cm4008/Makefile +++ b/board/cm4008/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/cm41xx/Makefile b/board/cm41xx/Makefile index 5c20477d5d..952a8ae21b 100644 --- a/board/cm41xx/Makefile +++ b/board/cm41xx/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/cm5200/Makefile b/board/cm5200/Makefile index 8ebdb1aa28..d76e13a078 100644 --- a/board/cm5200/Makefile +++ b/board/cm5200/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/cm5200/cm5200.c b/board/cm5200/cm5200.c index 79fb71dc70..24e8db0c60 100644 --- a/board/cm5200/cm5200.c +++ b/board/cm5200/cm5200.c @@ -114,7 +114,7 @@ static mem_conf_t* get_mem_config(int board_type) /* * Initalize SDRAM - configure SDRAM controller, detect memory size. */ -long int initdram(int board_type) +phys_size_t initdram(int board_type) { ulong dramsize = 0; #ifndef CFG_RAMBOOT @@ -275,7 +275,7 @@ static void ft_blob_update(void *blob, bd_t *bd) ret = fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize); if (ret < 0) { - printf("ft_blob_update): cannot set /memory/reg " + printf("ft_blob_update(): cannot set /memory/reg " "property err:%s\n", fdt_strerror(ret)); } } diff --git a/board/cmc_pu2/Makefile b/board/cmc_pu2/Makefile index f7a136034e..9745ebd378 100755..100644 --- a/board/cmc_pu2/Makefile +++ b/board/cmc_pu2/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/cmi/Makefile b/board/cmi/Makefile index 6a4230486f..aeebb9ecb5 100644 --- a/board/cmi/Makefile +++ b/board/cmi/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/cmi/cmi.c b/board/cmi/cmi.c index cbf34f7854..8501cae21a 100644 --- a/board/cmi/cmi.c +++ b/board/cmi/cmi.c @@ -62,7 +62,7 @@ int checkboard(void) /* * Get RAM size. */ -long int initdram(int board_type) +phys_size_t initdram(int board_type) { return (SRAM_SIZE); /* We currently have a static size adapted for cmi board. */ } diff --git a/board/cobra5272/cobra5272.c b/board/cobra5272/cobra5272.c index 86c7ee1eec..b928550504 100644 --- a/board/cobra5272/cobra5272.c +++ b/board/cobra5272/cobra5272.c @@ -32,7 +32,7 @@ int checkboard (void) return 0; }; -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile sdramctrl_t *sdp = (sdramctrl_t *) (MMAP_SDRAM); diff --git a/board/cogent/Makefile b/board/cogent/Makefile index ced04dd725..afa134558f 100644 --- a/board/cogent/Makefile +++ b/board/cogent/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/cogent/mb.c b/board/cogent/mb.c index 917132b3fb..619aea3c0c 100644 --- a/board/cogent/mb.c +++ b/board/cogent/mb.c @@ -233,7 +233,7 @@ int misc_init_f (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { #ifdef CONFIG_CMA111 return (32L * 1024L * 1024L); diff --git a/board/cpc45/cpc45.c b/board/cpc45/cpc45.c index 79eb473176..f4e867ce7d 100644 --- a/board/cpc45/cpc45.c +++ b/board/cpc45/cpc45.c @@ -61,7 +61,7 @@ int checkboard(void) return 0; } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { int m, row, col, bank, i, ref; unsigned long start, end; diff --git a/board/cpu86/cpu86.c b/board/cpu86/cpu86.c index 0eb94efdaa..9e76c72d3e 100644 --- a/board/cpu86/cpu86.c +++ b/board/cpu86/cpu86.c @@ -273,7 +273,7 @@ static long int try_init (volatile memctl8260_t * memctl, ulong sdmr, return (size); } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8260_t *memctl = &immap->im_memctl; diff --git a/board/cpu87/cpu87.c b/board/cpu87/cpu87.c index a2fd19398b..f5a5de5d82 100644 --- a/board/cpu87/cpu87.c +++ b/board/cpu87/cpu87.c @@ -274,7 +274,7 @@ static long int try_init (volatile memctl8260_t * memctl, ulong sdmr, return (size); } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8260_t *memctl = &immap->im_memctl; diff --git a/board/cradle/Makefile b/board/cradle/Makefile index 90a7907936..1ae785db5f 100644 --- a/board/cradle/Makefile +++ b/board/cradle/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/cray/L1/L1.c b/board/cray/L1/L1.c index a72ba4620b..f0dfa07fdc 100644 --- a/board/cray/L1/L1.c +++ b/board/cray/L1/L1.c @@ -170,7 +170,7 @@ int misc_init_r (void) } /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { return (L1_MEMSIZE); } diff --git a/board/cray/L1/Makefile b/board/cray/L1/Makefile index cfdd60e056..21b513c29f 100644 --- a/board/cray/L1/Makefile +++ b/board/cray/L1/Makefile @@ -43,7 +43,7 @@ clean: $(obj)bootscript.image $(obj)bootscript.o distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend $(obj)$(BOARD).o : $(src)$(BOARD).c $(obj)bootscript.o diff --git a/board/cray/L1/init.S b/board/cray/L1/init.S index 72a10d3a1b..4b6b3f4003 100644 --- a/board/cray/L1/init.S +++ b/board/cray/L1/init.S @@ -134,14 +134,3 @@ ext_bus_cntlr_init: mtdcr ebccfgd,r4 blr - -/*----------------------------------------------------------------------------- */ -/* Function: sdram_init */ -/* Description: Configures SDRAM memory banks. */ -/* NOTE: for CrayL1 we have ECC memory, so enable it. */ -/*....now done in C in L1.c:init_sdram for readability. */ -/*----------------------------------------------------------------------------- */ - .globl sdram_init - -sdram_init: - blr diff --git a/board/csb226/Makefile b/board/csb226/Makefile index eee8f13525..c12dbea9cd 100644 --- a/board/csb226/Makefile +++ b/board/csb226/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/csb272/Makefile b/board/csb272/Makefile index 703a25c979..6d42bff750 100644 --- a/board/csb272/Makefile +++ b/board/csb272/Makefile @@ -42,7 +42,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/csb272/csb272.c b/board/csb272/csb272.c index 24c6f0d986..5a585ae37f 100644 --- a/board/csb272/csb272.c +++ b/board/csb272/csb272.c @@ -27,6 +27,8 @@ #include <miiphy.h> #include <ppc4xx_enet.h> +void sdram_init(void); + /* * Configuration data for AMIS FS6377-01 Programmable 3-PLL Clock Generator * @@ -118,12 +120,19 @@ int checkboard(void) * configured by initialization code * */ -long initdram (int board_type) +phys_size_t initdram (int board_type) { ulong tot_size; ulong bank_size; ulong tmp; + /* + * ToDo: Move the asm init routine sdram_init() to this C file, + * or even better use some common ppc4xx code available + * in cpu/ppc4xx + */ + sdram_init(); + tot_size = 0; mtdcr (memcfga, mem_mb0cf); diff --git a/board/csb472/Makefile b/board/csb472/Makefile index 703a25c979..6d42bff750 100644 --- a/board/csb472/Makefile +++ b/board/csb472/Makefile @@ -42,7 +42,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/csb472/csb472.c b/board/csb472/csb472.c index 833bbce923..9dc130efc1 100644 --- a/board/csb472/csb472.c +++ b/board/csb472/csb472.c @@ -27,6 +27,8 @@ #include <miiphy.h> #include <ppc4xx_enet.h> +void sdram_init(void); + /* * board_early_init_f: do early board initialization * @@ -86,12 +88,19 @@ int checkboard(void) * configured by initialization code * */ -long initdram (int board_type) +phys_size_t initdram (int board_type) { ulong tot_size; ulong bank_size; ulong tmp; + /* + * ToDo: Move the asm init routine sdram_init() to this C file, + * or even better use some common ppc4xx code available + * in cpu/ppc4xx + */ + sdram_init(); + tot_size = 0; mtdcr (memcfga, mem_mb0cf); diff --git a/board/csb637/Makefile b/board/csb637/Makefile index ce263aa84e..ab28434a31 100644 --- a/board/csb637/Makefile +++ b/board/csb637/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/cu824/cu824.c b/board/cu824/cu824.c index 3edd27a3eb..ecf6328945 100644 --- a/board/cu824/cu824.c +++ b/board/cu824/cu824.c @@ -45,7 +45,7 @@ int checkboard (void) return 0; } -long int initdram(int board_type) +phys_size_t initdram(int board_type) { long size; long new_bank0_end; diff --git a/board/dave/B2/Makefile b/board/dave/B2/Makefile index 56b286f85e..e70d2c8e37 100644 --- a/board/dave/B2/Makefile +++ b/board/dave/B2/Makefile @@ -43,7 +43,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/dave/PPChameleonEVB/Makefile b/board/dave/PPChameleonEVB/Makefile index cb7becb4db..1869f8ceee 100644 --- a/board/dave/PPChameleonEVB/Makefile +++ b/board/dave/PPChameleonEVB/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/dave/PPChameleonEVB/PPChameleonEVB.c b/board/dave/PPChameleonEVB/PPChameleonEVB.c index e8302d9fc7..c9b288a413 100644 --- a/board/dave/PPChameleonEVB/PPChameleonEVB.c +++ b/board/dave/PPChameleonEVB/PPChameleonEVB.c @@ -203,7 +203,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { unsigned long val; diff --git a/board/davinci/dv-evm/Makefile b/board/davinci/dv-evm/Makefile index fa0013811d..579efe2623 100644 --- a/board/davinci/dv-evm/Makefile +++ b/board/davinci/dv-evm/Makefile @@ -41,7 +41,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak *~ .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### # This is for $(obj).depend target diff --git a/board/davinci/schmoogie/Makefile b/board/davinci/schmoogie/Makefile index fa0013811d..579efe2623 100644 --- a/board/davinci/schmoogie/Makefile +++ b/board/davinci/schmoogie/Makefile @@ -41,7 +41,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak *~ .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### # This is for $(obj).depend target diff --git a/board/davinci/sffsdr/Makefile b/board/davinci/sffsdr/Makefile new file mode 100644 index 0000000000..fb31ee42b2 --- /dev/null +++ b/board/davinci/sffsdr/Makefile @@ -0,0 +1,52 @@ +# +# (C) Copyright 2000, 2001, 2002 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := $(BOARD).o +SOBJS := board_init.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### +# This is for $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/davinci/sffsdr/board_init.S b/board/davinci/sffsdr/board_init.S new file mode 100644 index 0000000000..22d8adc18c --- /dev/null +++ b/board/davinci/sffsdr/board_init.S @@ -0,0 +1,29 @@ +/* + * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> + * + * Board-specific low level initialization code. Called at the very end + * of cpu/arm926ejs/davinci/lowlevel_init.S. Just returns if there is no + * initialization required. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <config.h> + +.globl dv_board_init +dv_board_init: + + mov pc, lr diff --git a/board/davinci/sffsdr/config.mk b/board/davinci/sffsdr/config.mk new file mode 100644 index 0000000000..f3b23d1c83 --- /dev/null +++ b/board/davinci/sffsdr/config.mk @@ -0,0 +1,23 @@ +# +# (C) Copyright 2002 +# Gary Jennejohn, DENX Software Engineering, <gj@denx.de> +# David Mueller, ELSOFT AG, <d.mueller@elsoft.ch> +# +# Copyright (C) 2008 Lyrtech <www.lyrtech.com> +# Copyright (C) 2008 Philip Balister, OpenSDR <philip@opensdr.com> +# +# Lyrtech SFF SDR board (ARM926EJS) cpu +# +# SFF SDR board has 1 bank of 128 MB DDR RAM +# Physical Address: +# 8000'0000 to 87FF'FFFF +# +# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000 +# (mem base + reserved) +# +# Integrity kernel is expected to be at 8000'0000, entry 8000'00D0, +# up to 81FF'FFFF (uses up to 32 MB of memory for text, heap, etc). +# +# we load ourself to 8400'0000 to provide at least 32MB spacing +# between us and the Integrity kernel image +TEXT_BASE = 0x84000000 diff --git a/board/davinci/sffsdr/sffsdr.c b/board/davinci/sffsdr/sffsdr.c new file mode 100644 index 0000000000..b73484ae2b --- /dev/null +++ b/board/davinci/sffsdr/sffsdr.c @@ -0,0 +1,310 @@ +/* + * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> + * + * Copyright (C) 2008 Lyrtech <www.lyrtech.com> + * Copyright (C) 2008 Philip Balister, OpenSDR <philip@opensdr.com> + * + * Parts are shamelessly stolen from various TI sources, original copyright + * follows: + * + * Copyright (C) 2004 Texas Instruments. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. + */ + +#include <common.h> +#include <i2c.h> +#include <asm/arch/hardware.h> +#include <asm/arch/emac_defs.h> + +#define DAVINCI_A3CR (0x01E00014) /* EMIF-A CS3 config register. */ +#define DAVINCI_A3CR_VAL (0x3FFFFFFD) /* EMIF-A CS3 value for FPGA. */ + +#define INTEGRITY_SYSCFG_OFFSET 0x7E8 +#define INTEGRITY_CHECKWORD_OFFSET 0x7F8 +#define INTEGRITY_CHECKWORD_VALUE 0x10ADBEEF + +DECLARE_GLOBAL_DATA_PTR; + +extern void timer_init(void); +extern int eth_hw_init(void); +extern phy_t phy; + + +/* Works on Always On power domain only (no PD argument) */ +void lpsc_on(unsigned int id) +{ + dv_reg_p mdstat, mdctl; + + if (id >= DAVINCI_LPSC_GEM) + return; /* Don't work on DSP Power Domain */ + + mdstat = REG_P(PSC_MDSTAT_BASE + (id * 4)); + mdctl = REG_P(PSC_MDCTL_BASE + (id * 4)); + + while (REG(PSC_PTSTAT) & 0x01); + + if ((*mdstat & 0x1f) == 0x03) + return; /* Already on and enabled */ + + *mdctl |= 0x03; + + /* Special treatment for some modules as for sprue14 p.7.4.2 */ + switch (id) { + case DAVINCI_LPSC_VPSSSLV: + case DAVINCI_LPSC_EMAC: + case DAVINCI_LPSC_EMAC_WRAPPER: + case DAVINCI_LPSC_MDIO: + case DAVINCI_LPSC_USB: + case DAVINCI_LPSC_ATA: + case DAVINCI_LPSC_VLYNQ: + case DAVINCI_LPSC_UHPI: + case DAVINCI_LPSC_DDR_EMIF: + case DAVINCI_LPSC_AEMIF: + case DAVINCI_LPSC_MMC_SD: + case DAVINCI_LPSC_MEMSTICK: + case DAVINCI_LPSC_McBSP: + case DAVINCI_LPSC_GPIO: + *mdctl |= 0x200; + break; + } + + REG(PSC_PTCMD) = 0x01; + + while (REG(PSC_PTSTAT) & 0x03); + while ((*mdstat & 0x1f) != 0x03); /* Probably an overkill... */ +} + +#if !defined(CFG_USE_DSPLINK) +void dsp_on(void) +{ + int i; + + if (REG(PSC_PDSTAT1) & 0x1f) + return; /* Already on */ + + REG(PSC_GBLCTL) |= 0x01; + REG(PSC_PDCTL1) |= 0x01; + REG(PSC_PDCTL1) &= ~0x100; + REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) |= 0x03; + REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) &= 0xfffffeff; + REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) |= 0x03; + REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) &= 0xfffffeff; + REG(PSC_PTCMD) = 0x02; + + for (i = 0; i < 100; i++) { + if (REG(PSC_EPCPR) & 0x02) + break; + } + + REG(PSC_CHP_SHRTSW) = 0x01; + REG(PSC_PDCTL1) |= 0x100; + REG(PSC_EPCCR) = 0x02; + + for (i = 0; i < 100; i++) { + if (!(REG(PSC_PTSTAT) & 0x02)) + break; + } + + REG(PSC_GBLCTL) &= ~0x1f; +} +#endif /* CFG_USE_DSPLINK */ + +int board_init(void) +{ + /* arch number of the board */ + gd->bd->bi_arch_number = MACH_TYPE_SFFSDR; + + /* address of boot parameters */ + gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR; + + /* Workaround for TMS320DM6446 errata 1.3.22 */ + REG(PSC_SILVER_BULLET) = 0; + + /* Power on required peripherals */ + lpsc_on(DAVINCI_LPSC_EMAC); + lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER); + lpsc_on(DAVINCI_LPSC_MDIO); + lpsc_on(DAVINCI_LPSC_I2C); + lpsc_on(DAVINCI_LPSC_UART0); + lpsc_on(DAVINCI_LPSC_TIMER1); + lpsc_on(DAVINCI_LPSC_GPIO); + +#if !defined(CFG_USE_DSPLINK) + /* Powerup the DSP */ + dsp_on(); +#endif /* CFG_USE_DSPLINK */ + + /* Bringup UART0 out of reset */ + REG(UART0_PWREMU_MGMT) = 0x0000e003; + + /* Enable GIO3.3V cells used for EMAC */ + REG(VDD3P3V_PWDN) = 0; + + /* Enable UART0 MUX lines */ + REG(PINMUX1) |= 1; + + /* Enable EMAC and AEMIF pins */ + REG(PINMUX0) = 0x80000c1f; + + /* Enable I2C pin Mux */ + REG(PINMUX1) |= (1 << 7); + + /* Set the Bus Priority Register to appropriate value */ + REG(VBPR) = 0x20; + + timer_init(); + + return(0); +} + +/* Read ethernet MAC address from Integrity data structure inside EEPROM. */ +int read_mac_address(uint8_t *buf) +{ + u_int32_t value, mac[2], address; + + /* Read Integrity data structure checkword. */ + if (i2c_read(CFG_I2C_EEPROM_ADDR, INTEGRITY_CHECKWORD_OFFSET, + CFG_I2C_EEPROM_ADDR_LEN, (uint8_t *) &value, 4)) + goto err; + if (value != INTEGRITY_CHECKWORD_VALUE) + return 1; + + /* Read SYSCFG structure offset. */ + if (i2c_read(CFG_I2C_EEPROM_ADDR, INTEGRITY_SYSCFG_OFFSET, + CFG_I2C_EEPROM_ADDR_LEN, (uint8_t *) &value, 4)) + goto err; + address = 0x800 + (int) value; /* Address of SYSCFG structure. */ + + /* Read NET CONFIG structure offset. */ + if (i2c_read(CFG_I2C_EEPROM_ADDR, address, + CFG_I2C_EEPROM_ADDR_LEN, (uint8_t *) &value, 4)) + goto err; + address = 0x800 + (int) value; /* Address of NET CONFIG structure. */ + address += 12; /* Address of NET INTERFACE CONFIG structure. */ + + /* Read NET INTERFACE CONFIG 2 structure offset. */ + if (i2c_read(CFG_I2C_EEPROM_ADDR, address, + CFG_I2C_EEPROM_ADDR_LEN, (uint8_t *) &value, 4)) + goto err; + address = 0x800 + 16 + (int) value; /* Address of NET INTERFACE + * CONFIG 2 structure. */ + + /* Read MAC address. */ + if (i2c_read(CFG_I2C_EEPROM_ADDR, address, + CFG_I2C_EEPROM_ADDR_LEN, (uint8_t *) &mac[0], 8)) + goto err; + + buf[0] = mac[0] >> 24; + buf[1] = mac[0] >> 16; + buf[2] = mac[0] >> 8; + buf[3] = mac[0]; + buf[4] = mac[1] >> 24; + buf[5] = mac[1] >> 16; + + return 0; + +err: + printf("Read from EEPROM @ 0x%02x failed\n", CFG_I2C_EEPROM_ADDR); + return 1; +} + +/* Platform dependent initialisation. */ +int misc_init_r(void) +{ + int i; + u_int8_t i2cbuf; + u_int8_t env_enetaddr[6], eeprom_enetaddr[6]; + char *tmp = getenv("ethaddr"); + char *end; + int clk; + + /* EMIF-A CS3 configuration for FPGA. */ + REG(DAVINCI_A3CR) = DAVINCI_A3CR_VAL; + + clk = ((REG(PLL2_PLLM) + 1) * 27) / ((REG(PLL2_DIV2) & 0x1f) + 1); + + printf("ARM Clock: %dMHz\n", ((REG(PLL1_PLLM) + 1) * 27) / 2); + printf("DDR Clock: %dMHz\n", (clk / 2)); + + /* Configure I2C switch (PCA9543) to enable channel 0. */ + i2cbuf = CFG_I2C_PCA9543_ENABLE_CH0; + if (i2c_write(CFG_I2C_PCA9543_ADDR, 0, + CFG_I2C_PCA9543_ADDR_LEN, &i2cbuf, 1)) { + printf("Write to MUX @ 0x%02x failed\n", CFG_I2C_PCA9543_ADDR); + return 1; + } + + /* Read Ethernet MAC address from the U-Boot environment. */ + for (i = 0; i < 6; i++) { + env_enetaddr[i] = tmp ? simple_strtoul(tmp, &end, 16) : 0; + if (tmp) + tmp = (*end) ? end+1 : end; + } + + /* Read Ethernet MAC address from EEPROM. */ + if (read_mac_address(eeprom_enetaddr) == 0) { + if (memcmp(env_enetaddr, "\0\0\0\0\0\0", 6) != 0 && + memcmp(env_enetaddr, eeprom_enetaddr, 6) != 0) { + printf("\nWarning: MAC addresses don't match:\n"); + printf("\tHW MAC address: " + "%02X:%02X:%02X:%02X:%02X:%02X\n", + eeprom_enetaddr[0], eeprom_enetaddr[1], + eeprom_enetaddr[2], eeprom_enetaddr[3], + eeprom_enetaddr[4], eeprom_enetaddr[5]); + printf("\t\"ethaddr\" value: " + "%02X:%02X:%02X:%02X:%02X:%02X\n", + env_enetaddr[0], env_enetaddr[1], + env_enetaddr[2], env_enetaddr[3], + env_enetaddr[4], env_enetaddr[5]) ; + debug("### Set MAC addr from environment\n"); + memcpy(eeprom_enetaddr, env_enetaddr, 6); + } + if (!tmp) { + char ethaddr[20]; + + sprintf(ethaddr, "%02X:%02X:%02X:%02X:%02X:%02X", + eeprom_enetaddr[0], eeprom_enetaddr[1], + eeprom_enetaddr[2], eeprom_enetaddr[3], + eeprom_enetaddr[4], eeprom_enetaddr[5]) ; + debug("### Set environment from HW MAC addr = \"%s\"\n", + ethaddr); + setenv("ethaddr", ethaddr); + } + } + + if (!eth_hw_init()) { + printf("Ethernet init failed\n"); + } else { + printf("ETH PHY: %s\n", phy.name); + } + + /* On this platform, U-Boot is copied in RAM by the UBL, + * so we are always in the relocated state. */ + gd->flags |= GD_FLG_RELOC; + + return(0); +} + +int dram_init(void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM_1; + gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; + + return(0); +} diff --git a/board/atmel/at91sam9260ek/u-boot.lds b/board/davinci/sffsdr/u-boot.lds index 996f401f0b..a4fcd1a9bb 100644 --- a/board/atmel/at91sam9260ek/u-boot.lds +++ b/board/davinci/sffsdr/u-boot.lds @@ -12,7 +12,7 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License @@ -22,26 +22,21 @@ */ OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/ OUTPUT_ARCH(arm) ENTRY(_start) SECTIONS { . = 0x00000000; - . = ALIGN(4); - .text : + .text : { cpu/arm926ejs/start.o (.text) *(.text) } - . = ALIGN(4); .rodata : { *(.rodata) } - . = ALIGN(4); .data : { *(.data) } - . = ALIGN(4); .got : { *(.got) } @@ -52,6 +47,6 @@ SECTIONS . = ALIGN(4); __bss_start = .; - .bss : { *(.bss) } + .bss (NOLOAD) : { *(.bss) } _end = .; } diff --git a/board/davinci/sonata/Makefile b/board/davinci/sonata/Makefile index fa0013811d..579efe2623 100644 --- a/board/davinci/sonata/Makefile +++ b/board/davinci/sonata/Makefile @@ -41,7 +41,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak *~ .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### # This is for $(obj).depend target diff --git a/board/dbau1x00/dbau1x00.c b/board/dbau1x00/dbau1x00.c index a13eeeb123..629dc317e0 100644 --- a/board/dbau1x00/dbau1x00.c +++ b/board/dbau1x00/dbau1x00.c @@ -27,7 +27,7 @@ #include <asm/mipsregs.h> #include <asm/io.h> -long int initdram(int board_type) +phys_size_t initdram(int board_type) { /* Sdram is setup by assembler code */ /* If memory could be changed, we should return the true value here */ @@ -52,7 +52,7 @@ int checkboard (void) *sys_counter = 0x100; /* Enable 32 kHz oscillator for RTC/TOY */ - proc_id = read_32bit_cp0_register(CP0_PRID); + proc_id = read_c0_prid(); switch (proc_id >> 24) { case 0: diff --git a/board/dbau1x00/lowlevel_init.S b/board/dbau1x00/lowlevel_init.S index 27b51f73f0..13e6bfcf33 100644 --- a/board/dbau1x00/lowlevel_init.S +++ b/board/dbau1x00/lowlevel_init.S @@ -1,7 +1,6 @@ /* Memory sub-system initialization code */ #include <config.h> -#include <version.h> #include <asm/regdef.h> #include <asm/au1x00.h> #include <asm/mipsregs.h> diff --git a/board/delta/Makefile b/board/delta/Makefile index 7213328609..648e00c314 100644 --- a/board/delta/Makefile +++ b/board/delta/Makefile @@ -40,7 +40,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/dnp1110/Makefile b/board/dnp1110/Makefile index a024e550aa..c56e9d1e81 100644 --- a/board/dnp1110/Makefile +++ b/board/dnp1110/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/eXalion/eXalion.c b/board/eXalion/eXalion.c index 2e3f51998e..385b498d09 100644 --- a/board/eXalion/eXalion.c +++ b/board/eXalion/eXalion.c @@ -52,7 +52,7 @@ int checkflash (void) return (0); } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { int i, cnt; volatile uchar *base = CFG_SDRAM_BASE; diff --git a/board/eltec/bab7xx/Makefile b/board/eltec/bab7xx/Makefile index f4b0b07d96..1e76d25f7a 100644 --- a/board/eltec/bab7xx/Makefile +++ b/board/eltec/bab7xx/Makefile @@ -40,7 +40,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/eltec/bab7xx/bab7xx.c b/board/eltec/bab7xx/bab7xx.c index 555475e4d9..af52352374 100644 --- a/board/eltec/bab7xx/bab7xx.c +++ b/board/eltec/bab7xx/bab7xx.c @@ -162,7 +162,7 @@ long int dram_size (int board_type) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { return dram_size (board_type); } diff --git a/board/eltec/elppc/Makefile b/board/eltec/elppc/Makefile index 5ab96233ff..24cbfeee39 100644 --- a/board/eltec/elppc/Makefile +++ b/board/eltec/elppc/Makefile @@ -40,7 +40,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/eltec/elppc/elppc.c b/board/eltec/elppc/elppc.c index 108adb13d5..1b70605e28 100644 --- a/board/eltec/elppc/elppc.c +++ b/board/eltec/elppc/elppc.c @@ -104,7 +104,7 @@ long int dram_size (int board_type) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { return dram_size (board_type); } diff --git a/board/eltec/mhpc/mhpc.c b/board/eltec/mhpc/mhpc.c index 0ffbdf0e57..3666791e98 100644 --- a/board/eltec/mhpc/mhpc.c +++ b/board/eltec/mhpc/mhpc.c @@ -251,7 +251,7 @@ int misc_init_r (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; diff --git a/board/emk/top5200/Makefile b/board/emk/top5200/Makefile index b257739b0f..86b887029f 100644 --- a/board/emk/top5200/Makefile +++ b/board/emk/top5200/Makefile @@ -42,7 +42,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/emk/top5200/top5200.c b/board/emk/top5200/top5200.c index ccbd72a79b..27886261c7 100644 --- a/board/emk/top5200/top5200.c +++ b/board/emk/top5200/top5200.c @@ -32,7 +32,7 @@ * initialize SDRAM/DDRAM controller. * TBD: get data from I2C EEPROM *****************************************************************************/ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { ulong dramsize = 0; #ifndef CFG_RAMBOOT diff --git a/board/emk/top860/top860.c b/board/emk/top860/top860.c index 84afaaa2b2..aca4991f54 100644 --- a/board/emk/top860/top860.c +++ b/board/emk/top860/top860.c @@ -76,7 +76,7 @@ int checkboard (void) /***************************************************************************** * Initialize DRAM controller *****************************************************************************/ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; diff --git a/board/ep7312/Makefile b/board/ep7312/Makefile index 45ee6cd084..776a444eed 100644 --- a/board/ep7312/Makefile +++ b/board/ep7312/Makefile @@ -43,7 +43,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/ep8248/Makefile b/board/ep8248/Makefile index be7e213a9b..dc40d9b94a 100644 --- a/board/ep8248/Makefile +++ b/board/ep8248/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/ep8248/ep8248.c b/board/ep8248/ep8248.c index 69975caa2e..4cfb2acc85 100644 --- a/board/ep8248/ep8248.c +++ b/board/ep8248/ep8248.c @@ -208,7 +208,7 @@ int board_early_init_f (void) return 0; } -long int initdram(int board_type) +phys_size_t initdram(int board_type) { vu_char *bcsr = (vu_char *)CFG_BCSR; long int msize = 16L << (bcsr[2] & 3); diff --git a/board/ep8260/Makefile b/board/ep8260/Makefile index f75249fc6a..b8bf320347 100644 --- a/board/ep8260/Makefile +++ b/board/ep8260/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/ep8260/ep8260.c b/board/ep8260/ep8260.c index b9e1df43d7..0e43c6df97 100644 --- a/board/ep8260/ep8260.c +++ b/board/ep8260/ep8260.c @@ -243,7 +243,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8260_t *memctl = &immap->im_memctl; diff --git a/board/ep82xxm/Makefile b/board/ep82xxm/Makefile index 349be1f8dc..c69c475a8d 100644 --- a/board/ep82xxm/Makefile +++ b/board/ep82xxm/Makefile @@ -37,7 +37,7 @@ clean: rm -f $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend *~ + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/ep82xxm/ep82xxm.c b/board/ep82xxm/ep82xxm.c index 27443d3dfb..03baf0b59a 100644 --- a/board/ep82xxm/ep82xxm.c +++ b/board/ep82xxm/ep82xxm.c @@ -219,7 +219,7 @@ int board_early_init_f (void) return 0; } -long int initdram(int board_type) +phys_size_t initdram(int board_type) { /* Size in MB of SDRAM populated on board*/ long int msize = 256; diff --git a/board/ep88x/Makefile b/board/ep88x/Makefile index b2ffd28833..6b3706daae 100644 --- a/board/ep88x/Makefile +++ b/board/ep88x/Makefile @@ -41,7 +41,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/ep88x/ep88x.c b/board/ep88x/ep88x.c index 5f57f36bbf..92e5f0c12c 100644 --- a/board/ep88x/ep88x.c +++ b/board/ep88x/ep88x.c @@ -86,7 +86,7 @@ int board_early_init_f (void) return 0; } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { long int msize; volatile immap_t *immap = (volatile immap_t *)CFG_IMMR; diff --git a/board/eric/Makefile b/board/eric/Makefile index f27fca6d7b..81a455202a 100644 --- a/board/eric/Makefile +++ b/board/eric/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/eric/eric.c b/board/eric/eric.c index 5413ae15c7..972d485b5a 100644 --- a/board/eric/eric.c +++ b/board/eric/eric.c @@ -31,6 +31,8 @@ #define PPC405GP_GPIO0_ODR 0xef600718 /* GPIO Open Drain */ #define PPC405GP_GPIO0_IR 0xef60071c /* GPIO Input */ +void sdram_init(void); + int board_early_init_f (void) { @@ -119,7 +121,7 @@ int checkboard (void) */ /* ------------------------------------------------------------------------- */ /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { #ifndef CONFIG_ERIC int i; @@ -127,6 +129,12 @@ long int initdram (int board_type) int TotalSize; #endif + /* + * ToDo: Move the asm init routine sdram_init() to this C file, + * or even better use some common ppc4xx code available + * in cpu/ppc4xx + */ + sdram_init(); #ifdef CONFIG_ERIC /* diff --git a/board/esd/adciop/Makefile b/board/esd/adciop/Makefile index 4283300d89..0fadf814ef 100644 --- a/board/esd/adciop/Makefile +++ b/board/esd/adciop/Makefile @@ -42,7 +42,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/esd/adciop/adciop.c b/board/esd/adciop/adciop.c index 7a11a12cef..0f655b78a5 100644 --- a/board/esd/adciop/adciop.c +++ b/board/esd/adciop/adciop.c @@ -79,7 +79,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { return (16 * 1024 * 1024); } diff --git a/board/esd/apc405/Makefile b/board/esd/apc405/Makefile index c57cd6bb52..9114606557 100644 --- a/board/esd/apc405/Makefile +++ b/board/esd/apc405/Makefile @@ -43,7 +43,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/esd/apc405/apc405.c b/board/esd/apc405/apc405.c index 2cb743ef49..83657c8d5d 100644 --- a/board/esd/apc405/apc405.c +++ b/board/esd/apc405/apc405.c @@ -423,7 +423,7 @@ int checkboard (void) return 0; } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { unsigned long val; diff --git a/board/esd/ar405/Makefile b/board/esd/ar405/Makefile index 4d75868ea8..ba92b24c8d 100644 --- a/board/esd/ar405/Makefile +++ b/board/esd/ar405/Makefile @@ -41,7 +41,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/esd/ar405/ar405.c b/board/esd/ar405/ar405.c index dfead3363c..3abcfe690e 100644 --- a/board/esd/ar405/ar405.c +++ b/board/esd/ar405/ar405.c @@ -190,28 +190,6 @@ int checkboard (void) return 0; } -/* ------------------------------------------------------------------------- */ - -long int initdram (int board_type) -{ - unsigned long val; - - mtdcr(memcfga, mem_mb0cf); - val = mfdcr(memcfgd); - - return (4*1024*1024 << ((val & 0x000e0000) >> 17)); -} - -/* ------------------------------------------------------------------------- */ - -int testdram (void) -{ - /* TODO: XXX XXX XXX */ - printf ("test: 16 MB - ok\n"); - - return (0); -} - #if 1 /* test-only: some internal test routines... */ /* diff --git a/board/esd/ash405/Makefile b/board/esd/ash405/Makefile index 308f752d09..98acb4b771 100644 --- a/board/esd/ash405/Makefile +++ b/board/esd/ash405/Makefile @@ -43,7 +43,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/esd/ash405/ash405.c b/board/esd/ash405/ash405.c index 8a5b03bced..25360a6565 100644 --- a/board/esd/ash405/ash405.c +++ b/board/esd/ash405/ash405.c @@ -207,7 +207,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { unsigned long val; diff --git a/board/esd/canbt/Makefile b/board/esd/canbt/Makefile index 4d75868ea8..ba92b24c8d 100644 --- a/board/esd/canbt/Makefile +++ b/board/esd/canbt/Makefile @@ -41,7 +41,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/esd/canbt/canbt.c b/board/esd/canbt/canbt.c index 055a397730..30fa605abb 100644 --- a/board/esd/canbt/canbt.c +++ b/board/esd/canbt/canbt.c @@ -181,22 +181,3 @@ int checkboard (void) return 0; } - -/* ------------------------------------------------------------------------- */ - -long int initdram (int board_type) -{ - return (16 * 1024 * 1024); -} - -/* ------------------------------------------------------------------------- */ - -int testdram (void) -{ - /* TODO: XXX XXX XXX */ - printf ("test: 16 MB - ok\n"); - - return (0); -} - -/* ------------------------------------------------------------------------- */ diff --git a/board/esd/cms700/Makefile b/board/esd/cms700/Makefile index 0d4ab2d13a..1093c52756 100644 --- a/board/esd/cms700/Makefile +++ b/board/esd/cms700/Makefile @@ -49,7 +49,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/esd/cms700/cms700.c b/board/esd/cms700/cms700.c index 3d4f2371d9..ba27c030b7 100644 --- a/board/esd/cms700/cms700.c +++ b/board/esd/cms700/cms700.c @@ -141,7 +141,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { unsigned long val; diff --git a/board/esd/cpci2dp/Makefile b/board/esd/cpci2dp/Makefile index 2d4e189977..9a5607f695 100644 --- a/board/esd/cpci2dp/Makefile +++ b/board/esd/cpci2dp/Makefile @@ -41,7 +41,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/esd/cpci2dp/cpci2dp.c b/board/esd/cpci2dp/cpci2dp.c index 36bf329f81..54de0b8062 100644 --- a/board/esd/cpci2dp/cpci2dp.c +++ b/board/esd/cpci2dp/cpci2dp.c @@ -117,7 +117,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { unsigned long val; diff --git a/board/esd/cpci405/Makefile b/board/esd/cpci405/Makefile index ce7876c414..3867bd809c 100644 --- a/board/esd/cpci405/Makefile +++ b/board/esd/cpci405/Makefile @@ -41,7 +41,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/esd/cpci405/cpci405.c b/board/esd/cpci405/cpci405.c index 69cb8cef56..b856705ff9 100644 --- a/board/esd/cpci405/cpci405.c +++ b/board/esd/cpci405/cpci405.c @@ -495,7 +495,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { unsigned long val; diff --git a/board/esd/cpci5200/Makefile b/board/esd/cpci5200/Makefile index 673a5b9662..4a640f6638 100644 --- a/board/esd/cpci5200/Makefile +++ b/board/esd/cpci5200/Makefile @@ -47,7 +47,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/esd/cpci5200/cpci5200.c b/board/esd/cpci5200/cpci5200.c index adb8597e1c..20130acfe8 100644 --- a/board/esd/cpci5200/cpci5200.c +++ b/board/esd/cpci5200/cpci5200.c @@ -84,7 +84,7 @@ static void sdram_start(int hi_addr) * is something else than 0x00000000. */ -long int initdram(int board_type) +phys_size_t initdram(int board_type) { ulong dramsize = 0; ulong test1, test2; diff --git a/board/esd/cpci750/sdram_init.c b/board/esd/cpci750/sdram_init.c index f43e83f491..a479f0f5f8 100644 --- a/board/esd/cpci750/sdram_init.c +++ b/board/esd/cpci750/sdram_init.c @@ -1602,7 +1602,7 @@ dram_size(long int *base, long int maxsize) /* ppcboot interface function to SDRAM init - this is where all the * controlling logic happens */ -long int +phys_size_t initdram(int board_type) { int s0 = 0, s1 = 0; diff --git a/board/esd/cpciiser4/Makefile b/board/esd/cpciiser4/Makefile index 4d75868ea8..ba92b24c8d 100644 --- a/board/esd/cpciiser4/Makefile +++ b/board/esd/cpciiser4/Makefile @@ -41,7 +41,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/esd/cpciiser4/cpciiser4.c b/board/esd/cpciiser4/cpciiser4.c index fcb8cbbe73..204117edf5 100644 --- a/board/esd/cpciiser4/cpciiser4.c +++ b/board/esd/cpciiser4/cpciiser4.c @@ -186,7 +186,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { return (16 * 1024 * 1024); } diff --git a/board/esd/dasa_sim/Makefile b/board/esd/dasa_sim/Makefile index 082236593a..d736af8b97 100644 --- a/board/esd/dasa_sim/Makefile +++ b/board/esd/dasa_sim/Makefile @@ -42,7 +42,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/esd/dasa_sim/dasa_sim.c b/board/esd/dasa_sim/dasa_sim.c index 2f8ab1a478..fb0c77e566 100644 --- a/board/esd/dasa_sim/dasa_sim.c +++ b/board/esd/dasa_sim/dasa_sim.c @@ -206,7 +206,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { return (16 * 1024 * 1024); } diff --git a/board/esd/dp405/Makefile b/board/esd/dp405/Makefile index df487662fd..86bd4461de 100644 --- a/board/esd/dp405/Makefile +++ b/board/esd/dp405/Makefile @@ -46,7 +46,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/esd/dp405/dp405.c b/board/esd/dp405/dp405.c index 240ab78aa7..bb3baa477e 100644 --- a/board/esd/dp405/dp405.c +++ b/board/esd/dp405/dp405.c @@ -122,7 +122,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { unsigned long val; diff --git a/board/esd/du405/Makefile b/board/esd/du405/Makefile index 4d75868ea8..ba92b24c8d 100644 --- a/board/esd/du405/Makefile +++ b/board/esd/du405/Makefile @@ -41,7 +41,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/esd/du405/du405.c b/board/esd/du405/du405.c index 69432138d3..78ae4ba67b 100644 --- a/board/esd/du405/du405.c +++ b/board/esd/du405/du405.c @@ -200,7 +200,7 @@ int checkboard (void) } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { return (16 * 1024 * 1024); } diff --git a/board/esd/du440/Makefile b/board/esd/du440/Makefile index e996a0a8c3..909d007c47 100644 --- a/board/esd/du440/Makefile +++ b/board/esd/du440/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/esd/hh405/Makefile b/board/esd/hh405/Makefile index 0e5e57a5ad..c57d90cf6f 100644 --- a/board/esd/hh405/Makefile +++ b/board/esd/hh405/Makefile @@ -44,7 +44,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/esd/hh405/hh405.c b/board/esd/hh405/hh405.c index 279d9214e2..802491a313 100644 --- a/board/esd/hh405/hh405.c +++ b/board/esd/hh405/hh405.c @@ -644,7 +644,7 @@ int checkboard (void) } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { unsigned long val; diff --git a/board/esd/hub405/Makefile b/board/esd/hub405/Makefile index 308f752d09..98acb4b771 100644 --- a/board/esd/hub405/Makefile +++ b/board/esd/hub405/Makefile @@ -43,7 +43,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/esd/hub405/hub405.c b/board/esd/hub405/hub405.c index 25c8068fde..03b87c9dfc 100644 --- a/board/esd/hub405/hub405.c +++ b/board/esd/hub405/hub405.c @@ -229,7 +229,7 @@ int checkboard (void) } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { unsigned long val; diff --git a/board/esd/mecp5200/Makefile b/board/esd/mecp5200/Makefile index 45efdb0dec..3fbb909969 100644 --- a/board/esd/mecp5200/Makefile +++ b/board/esd/mecp5200/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/esd/mecp5200/mecp5200.c b/board/esd/mecp5200/mecp5200.c index ea49f264ab..6d776b7a63 100644 --- a/board/esd/mecp5200/mecp5200.c +++ b/board/esd/mecp5200/mecp5200.c @@ -84,7 +84,7 @@ static void sdram_start(int hi_addr) * is something else than 0x00000000. */ -long int initdram(int board_type) +phys_size_t initdram(int board_type) { ulong dramsize = 0; ulong test1, test2; diff --git a/board/esd/ocrtc/Makefile b/board/esd/ocrtc/Makefile index 99d87c44ff..edf3c56862 100644 --- a/board/esd/ocrtc/Makefile +++ b/board/esd/ocrtc/Makefile @@ -41,7 +41,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/esd/ocrtc/ocrtc.c b/board/esd/ocrtc/ocrtc.c index 261b8a54d0..7b0edd5958 100644 --- a/board/esd/ocrtc/ocrtc.c +++ b/board/esd/ocrtc/ocrtc.c @@ -101,7 +101,7 @@ int checkboard (void) } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { unsigned long val; diff --git a/board/esd/pci405/Makefile b/board/esd/pci405/Makefile index 53f217fb2a..862e88d39f 100644 --- a/board/esd/pci405/Makefile +++ b/board/esd/pci405/Makefile @@ -43,7 +43,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/esd/pci405/pci405.c b/board/esd/pci405/pci405.c index c4ab072009..f740d595be 100644 --- a/board/esd/pci405/pci405.c +++ b/board/esd/pci405/pci405.c @@ -358,7 +358,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { unsigned long val; diff --git a/board/esd/pf5200/Makefile b/board/esd/pf5200/Makefile index 2e54315704..efd24feef8 100644 --- a/board/esd/pf5200/Makefile +++ b/board/esd/pf5200/Makefile @@ -48,7 +48,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/esd/pf5200/pf5200.c b/board/esd/pf5200/pf5200.c index 48b80bfc5f..7970f8988f 100644 --- a/board/esd/pf5200/pf5200.c +++ b/board/esd/pf5200/pf5200.c @@ -84,7 +84,7 @@ static void sdram_start(int hi_addr) * is something else than 0x00000000. */ -long int initdram(int board_type) +phys_size_t initdram(int board_type) { ulong dramsize = 0; ulong test1, test2; diff --git a/board/esd/plu405/Makefile b/board/esd/plu405/Makefile index 0e5e57a5ad..c57d90cf6f 100644 --- a/board/esd/plu405/Makefile +++ b/board/esd/plu405/Makefile @@ -44,7 +44,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/esd/plu405/plu405.c b/board/esd/plu405/plu405.c index 57762b54ee..fc71e9a2a1 100644 --- a/board/esd/plu405/plu405.c +++ b/board/esd/plu405/plu405.c @@ -232,7 +232,7 @@ int checkboard (void) } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { unsigned long val; diff --git a/board/esd/pmc405/Makefile b/board/esd/pmc405/Makefile index 50d0963d26..12c1ba730c 100644 --- a/board/esd/pmc405/Makefile +++ b/board/esd/pmc405/Makefile @@ -46,7 +46,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/esd/pmc405/pmc405.c b/board/esd/pmc405/pmc405.c index 7499671aaf..326d560352 100644 --- a/board/esd/pmc405/pmc405.c +++ b/board/esd/pmc405/pmc405.c @@ -157,7 +157,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { unsigned long val; diff --git a/board/esd/pmc440/Makefile b/board/esd/pmc440/Makefile index 68b566c4a6..8c09efae7b 100644 --- a/board/esd/pmc440/Makefile +++ b/board/esd/pmc440/Makefile @@ -44,7 +44,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/esd/pmc440/sdram.c b/board/esd/pmc440/sdram.c index 624c45791f..c7294c9945 100644 --- a/board/esd/pmc440/sdram.c +++ b/board/esd/pmc440/sdram.c @@ -50,7 +50,7 @@ extern void denali_core_search_data_eye(void); * initdram -- 440EPx's DDR controller is a DENALI Core * ************************************************************************/ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { #if !defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL) #if !defined(CONFIG_NAND_SPL) diff --git a/board/esd/tasreg/tasreg.c b/board/esd/tasreg/tasreg.c index 16724005b7..fabb7464fd 100644 --- a/board/esd/tasreg/tasreg.c +++ b/board/esd/tasreg/tasreg.c @@ -77,7 +77,7 @@ int checkboard (void) { }; -long int initdram (int board_type) { +phys_size_t initdram (int board_type) { unsigned long junk = 0xa5a59696; /* diff --git a/board/esd/voh405/Makefile b/board/esd/voh405/Makefile index 308f752d09..98acb4b771 100644 --- a/board/esd/voh405/Makefile +++ b/board/esd/voh405/Makefile @@ -43,7 +43,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/esd/voh405/voh405.c b/board/esd/voh405/voh405.c index 87a584979b..52534220a7 100644 --- a/board/esd/voh405/voh405.c +++ b/board/esd/voh405/voh405.c @@ -305,7 +305,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { unsigned long val; diff --git a/board/esd/vom405/Makefile b/board/esd/vom405/Makefile index df487662fd..86bd4461de 100644 --- a/board/esd/vom405/Makefile +++ b/board/esd/vom405/Makefile @@ -46,7 +46,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/esd/vom405/vom405.c b/board/esd/vom405/vom405.c index 8be552e2ea..af8efcff3e 100644 --- a/board/esd/vom405/vom405.c +++ b/board/esd/vom405/vom405.c @@ -129,7 +129,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { unsigned long val; diff --git a/board/esd/wuh405/Makefile b/board/esd/wuh405/Makefile index 308f752d09..98acb4b771 100644 --- a/board/esd/wuh405/Makefile +++ b/board/esd/wuh405/Makefile @@ -43,7 +43,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/esd/wuh405/wuh405.c b/board/esd/wuh405/wuh405.c index dba3ce8884..0590fc78f8 100644 --- a/board/esd/wuh405/wuh405.c +++ b/board/esd/wuh405/wuh405.c @@ -205,7 +205,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { unsigned long val; diff --git a/board/esteem192e/esteem192e.c b/board/esteem192e/esteem192e.c index 3959eead27..f3c8662cdb 100644 --- a/board/esteem192e/esteem192e.c +++ b/board/esteem192e/esteem192e.c @@ -101,7 +101,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; diff --git a/board/etin/debris/debris.c b/board/etin/debris/debris.c index 67375e9fea..763760fd23 100644 --- a/board/etin/debris/debris.c +++ b/board/etin/debris/debris.c @@ -53,7 +53,7 @@ int checkflash (void) } #endif -long int initdram (int board_type) +phys_size_t initdram (int board_type) { int m, row, col, bank, i; unsigned long start, end; diff --git a/board/etin/kvme080/kvme080.c b/board/etin/kvme080/kvme080.c index de62fa0973..bfd6854c5d 100644 --- a/board/etin/kvme080/kvme080.c +++ b/board/etin/kvme080/kvme080.c @@ -93,7 +93,7 @@ unsigned long setdram(int m, int row, int col, int bank) return (1 << (col + row + 3) ) * bank * m; } -long int initdram(int board_type) +phys_size_t initdram(int board_type) { unsigned int msr; long int size = 0; diff --git a/board/etx094/etx094.c b/board/etx094/etx094.c index eb58b5d529..7806519e30 100644 --- a/board/etx094/etx094.c +++ b/board/etx094/etx094.c @@ -125,7 +125,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; diff --git a/board/evb4510/Makefile b/board/evb4510/Makefile index 4f98d702d5..3ab1aa038b 100644 --- a/board/evb4510/Makefile +++ b/board/evb4510/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/evb64260/sdram_init.c b/board/evb64260/sdram_init.c index fae6d1090d..9ae4465441 100644 --- a/board/evb64260/sdram_init.c +++ b/board/evb64260/sdram_init.c @@ -524,7 +524,7 @@ static long int dram_size (long int *base, long int maxsize) /* U-Boot interface function to SDRAM init - this is where all the * controlling logic happens */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { ulong checkbank[4] = {[0 ... 3] = 0 }; int bank_no; diff --git a/board/exbitgen/Makefile b/board/exbitgen/Makefile index 5e297afedc..4f752a86b4 100644 --- a/board/exbitgen/Makefile +++ b/board/exbitgen/Makefile @@ -40,7 +40,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/exbitgen/exbitgen.c b/board/exbitgen/exbitgen.c index 39a97225f8..dc07d3df06 100644 --- a/board/exbitgen/exbitgen.c +++ b/board/exbitgen/exbitgen.c @@ -1,8 +1,10 @@ +#include <common.h> #include <asm/u-boot.h> #include <asm/processor.h> -#include <common.h> #include "exbitgen.h" +void sdram_init(void); + /* ************************************************************************ */ int board_early_init_f (void) /* ------------------------------------------------------------------------ -- @@ -69,7 +71,7 @@ int checkboard (void) } /* ************************************************************************ */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) /* ------------------------------------------------------------------------ -- * Purpose : Determines size of mounted DRAM. * Remarks : Size is determined by reading SDRAM configuration registers as @@ -83,6 +85,13 @@ long int initdram (int board_type) ulong bank_size; ulong tmp; + /* + * ToDo: Move the asm init routine sdram_init() to this C file, + * or even better use some common ppc4xx code available + * in cpu/ppc4xx + */ + sdram_init(); + tot_size = 0; mtdcr (memcfga, mem_mb0cf); diff --git a/board/exbitgen/flash.c b/board/exbitgen/flash.c index ae88994b2c..4dd5382876 100644 --- a/board/exbitgen/flash.c +++ b/board/exbitgen/flash.c @@ -28,10 +28,10 @@ * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com */ +#include <common.h> #include <asm/u-boot.h> #include <asm/processor.h> #include <ppc4xx.h> -#include <common.h> flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ diff --git a/board/fads/fads.c b/board/fads/fads.c index 8f5736b414..9e601df1bc 100644 --- a/board/fads/fads.c +++ b/board/fads/fads.c @@ -600,7 +600,7 @@ static int initsdram(uint base, uint *noMbytes) /* ========================================================================= */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { uint sdramsz = 0; /* size of sdram in Mbytes */ uint base = 0; /* base of dram in bytes */ diff --git a/board/flagadm/flagadm.c b/board/flagadm/flagadm.c index 9c553676ec..7caedc99a3 100644 --- a/board/flagadm/flagadm.c +++ b/board/flagadm/flagadm.c @@ -96,7 +96,7 @@ int checkboard (void) return 0; } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *)CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile index 6340b418ea..508e3b569b 100644 --- a/board/freescale/common/Makefile +++ b/board/freescale/common/Makefile @@ -53,7 +53,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/freescale/m52277evb/m52277evb.c b/board/freescale/m52277evb/m52277evb.c index 98424c898b..e5f47d2d93 100644 --- a/board/freescale/m52277evb/m52277evb.c +++ b/board/freescale/m52277evb/m52277evb.c @@ -36,7 +36,7 @@ int checkboard(void) return 0; }; -long int initdram(int board_type) +phys_size_t initdram(int board_type) { volatile sdramc_t *sdram = (volatile sdramc_t *)(MMAP_SDRAM); u32 dramsize, i; diff --git a/board/freescale/m5235evb/m5235evb.c b/board/freescale/m5235evb/m5235evb.c index 585854cd91..c2c8fe8590 100644 --- a/board/freescale/m5235evb/m5235evb.c +++ b/board/freescale/m5235evb/m5235evb.c @@ -37,7 +37,7 @@ int checkboard(void) return 0; }; -long int initdram(int board_type) +phys_size_t initdram(int board_type) { volatile sdram_t *sdram = (volatile sdram_t *)(MMAP_SDRAM); volatile gpio_t *gpio = (volatile gpio_t *)(MMAP_GPIO); diff --git a/board/freescale/m5249evb/m5249evb.c b/board/freescale/m5249evb/m5249evb.c index e8f621ba3f..c9ed341bbd 100644 --- a/board/freescale/m5249evb/m5249evb.c +++ b/board/freescale/m5249evb/m5249evb.c @@ -49,7 +49,7 @@ int checkboard (void) { }; -long int initdram (int board_type) { +phys_size_t initdram (int board_type) { unsigned long junk = 0xa5a59696; /* diff --git a/board/freescale/m5253evbe/m5253evbe.c b/board/freescale/m5253evbe/m5253evbe.c index 43aa84de22..f80a47c7b7 100644 --- a/board/freescale/m5253evbe/m5253evbe.c +++ b/board/freescale/m5253evbe/m5253evbe.c @@ -34,7 +34,7 @@ int checkboard(void) return 0; }; -long int initdram(int board_type) +phys_size_t initdram(int board_type) { int i; diff --git a/board/freescale/m5275evb/Makefile b/board/freescale/m5275evb/Makefile index 9a0fa80538..ef0b19ed2c 100644 --- a/board/freescale/m5275evb/Makefile +++ b/board/freescale/m5275evb/Makefile @@ -23,18 +23,22 @@ include $(TOPDIR)/config.mk -LIB = lib$(BOARD).a +LIB = $(obj)lib$(BOARD).a OBJS = $(BOARD).o mii.o +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + $(LIB): .depend $(OBJS) - $(AR) crv $@ $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) ######################################################################### -.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) - $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@ +# defines $(obj).depend target +include $(SRCTREE)/rules.mk -sinclude .depend +sinclude $(obj).depend ######################################################################### diff --git a/board/freescale/m5275evb/m5275evb.c b/board/freescale/m5275evb/m5275evb.c index a1b2902935..be19e02751 100644 --- a/board/freescale/m5275evb/m5275evb.c +++ b/board/freescale/m5275evb/m5275evb.c @@ -36,7 +36,7 @@ int checkboard(void) return 0; }; -long int initdram(int board_type) +phys_size_t initdram(int board_type) { volatile sdramctrl_t *sdp = (sdramctrl_t *)(MMAP_SDRAM); volatile gpio_t *gpio_reg = (gpio_t *)(MMAP_GPIO); diff --git a/board/freescale/m5329evb/m5329evb.c b/board/freescale/m5329evb/m5329evb.c index 242eb1a188..f9fa9fb9cf 100644 --- a/board/freescale/m5329evb/m5329evb.c +++ b/board/freescale/m5329evb/m5329evb.c @@ -37,7 +37,7 @@ int checkboard(void) return 0; }; -long int initdram(int board_type) +phys_size_t initdram(int board_type) { volatile sdram_t *sdram = (volatile sdram_t *)(MMAP_SDRAM); u32 dramsize, i; diff --git a/board/freescale/m5373evb/m5373evb.c b/board/freescale/m5373evb/m5373evb.c index 26b87b99f0..a269ee6d44 100644 --- a/board/freescale/m5373evb/m5373evb.c +++ b/board/freescale/m5373evb/m5373evb.c @@ -37,7 +37,7 @@ int checkboard(void) return 0; }; -long int initdram(int board_type) +phys_size_t initdram(int board_type) { volatile sdram_t *sdram = (volatile sdram_t *)(MMAP_SDRAM); u32 dramsize, i; diff --git a/board/freescale/m54455evb/m54455evb.c b/board/freescale/m54455evb/m54455evb.c index 6a0278252f..0480b54685 100644 --- a/board/freescale/m54455evb/m54455evb.c +++ b/board/freescale/m54455evb/m54455evb.c @@ -37,7 +37,7 @@ int checkboard(void) return 0; }; -long int initdram(int board_type) +phys_size_t initdram(int board_type) { volatile sdramc_t *sdram = (volatile sdramc_t *)(MMAP_SDRAM); volatile gpio_t *gpio = (volatile gpio_t *)(MMAP_GPIO); diff --git a/board/freescale/m547xevb/m547xevb.c b/board/freescale/m547xevb/m547xevb.c index 539da78de9..6d7d27090f 100644 --- a/board/freescale/m547xevb/m547xevb.c +++ b/board/freescale/m547xevb/m547xevb.c @@ -38,7 +38,7 @@ int checkboard(void) return 0; }; -long int initdram(int board_type) +phys_size_t initdram(int board_type) { volatile siu_t *siu = (siu_t *) (MMAP_SIU); volatile sdram_t *sdram = (volatile sdram_t *)(MMAP_SDRAM); diff --git a/board/freescale/m548xevb/m548xevb.c b/board/freescale/m548xevb/m548xevb.c index 0372807486..e6510c9559 100644 --- a/board/freescale/m548xevb/m548xevb.c +++ b/board/freescale/m548xevb/m548xevb.c @@ -38,7 +38,7 @@ int checkboard(void) return 0; }; -long int initdram(int board_type) +phys_size_t initdram(int board_type) { volatile siu_t *siu = (siu_t *) (MMAP_SIU); volatile sdram_t *sdram = (volatile sdram_t *)(MMAP_SDRAM); diff --git a/board/freescale/mpc7448hpc2/Makefile b/board/freescale/mpc7448hpc2/Makefile index e3d757d5dd..995afbcd5c 100644 --- a/board/freescale/mpc7448hpc2/Makefile +++ b/board/freescale/mpc7448hpc2/Makefile @@ -40,7 +40,7 @@ clean: .PHONY: distclean distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/freescale/mpc7448hpc2/mpc7448hpc2.c b/board/freescale/mpc7448hpc2/mpc7448hpc2.c index 81846eba77..b3d83cc19f 100644 --- a/board/freescale/mpc7448hpc2/mpc7448hpc2.c +++ b/board/freescale/mpc7448hpc2/mpc7448hpc2.c @@ -31,10 +31,7 @@ #include <common.h> #include <74xx_7xx.h> -#if defined(CONFIG_OF_FLAT_TREE) -#include <ft_build.h> -extern void ft_cpu_setup (void *blob, bd_t *bd); -#endif +#include <fdt_support.h> #undef DEBUG @@ -84,24 +81,16 @@ long int dram_size (int board_type) return 0x20000000; /* 256M bytes */ } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { return dram_size (board_type); } -#if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP) +#if defined(CONFIG_OF_BOARD_SETUP) void -ft_board_setup (void *blob, bd_t *bd) +ft_board_setup(void *blob, bd_t *bd) { - u32 *p; - int len; - - ft_cpu_setup (blob, bd); - - p = ft_get_prop (blob, "/memory/reg", &len); - if (p != NULL) { - *p++ = cpu_to_be32 (bd->bi_memstart); - *p = cpu_to_be32 (bd->bi_memsize); - } + ft_cpu_setup(blob, bd); + fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize); } #endif diff --git a/board/freescale/mpc8260ads/Makefile b/board/freescale/mpc8260ads/Makefile index de7d847a5f..e1d4af0f90 100644 --- a/board/freescale/mpc8260ads/Makefile +++ b/board/freescale/mpc8260ads/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/freescale/mpc8260ads/mpc8260ads.c b/board/freescale/mpc8260ads/mpc8260ads.c index 548d813af5..8ab7d356c4 100644 --- a/board/freescale/mpc8260ads/mpc8260ads.c +++ b/board/freescale/mpc8260ads/mpc8260ads.c @@ -46,6 +46,10 @@ #ifdef CONFIG_PCI #include <pci.h> #endif +#ifdef CONFIG_OF_LIBFDT +#include <libfdt.h> +#include <fdt_support.h> +#endif /* * I/O Port configuration table @@ -304,7 +308,7 @@ int board_early_init_f (void) #define ns2clk(ns) (ns / (1000000000 / CONFIG_8260_CLKIN) + 1) -long int initdram (int board_type) +phys_size_t initdram (int board_type) { #if CONFIG_ADSTYPE == CFG_PQ2FADS long int msize = 32; @@ -544,3 +548,26 @@ void pci_init_board(void) pci_mpc8250_init(&hose); } #endif + +#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) +void ft_blob_update(void *blob, bd_t *bd) +{ + int ret; + + ret = fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize); + + if (ret < 0) { + printf("ft_blob_update(): cannot set /memory/reg " + "property err:%s\n", fdt_strerror(ret)); + } +} + +void ft_board_setup(void *blob, bd_t *bd) +{ + ft_cpu_setup(blob, bd); +#ifdef CONFIG_PCI + ft_pci_setup(blob, bd); +#endif + ft_blob_update(blob, bd); +} +#endif diff --git a/board/freescale/mpc8266ads/Makefile b/board/freescale/mpc8266ads/Makefile index 291a1c9566..4ffb83f783 100644 --- a/board/freescale/mpc8266ads/Makefile +++ b/board/freescale/mpc8266ads/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/freescale/mpc8266ads/mpc8266ads.c b/board/freescale/mpc8266ads/mpc8266ads.c index 8f7273c41d..090a534134 100644 --- a/board/freescale/mpc8266ads/mpc8266ads.c +++ b/board/freescale/mpc8266ads/mpc8266ads.c @@ -251,7 +251,7 @@ int checkboard(void) return 0; } -long int initdram(int board_type) +phys_size_t initdram(int board_type) { /* Autoinit part stolen from board/sacsng/sacsng.c */ volatile immap_t *immap = (immap_t *)CFG_IMMR; diff --git a/board/freescale/mpc8313erdb/Makefile b/board/freescale/mpc8313erdb/Makefile index e97ba812c9..7c34c5e164 100644 --- a/board/freescale/mpc8313erdb/Makefile +++ b/board/freescale/mpc8313erdb/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/freescale/mpc8313erdb/sdram.c b/board/freescale/mpc8313erdb/sdram.c index 16ec4bbf54..afd8b9d5ed 100644 --- a/board/freescale/mpc8313erdb/sdram.c +++ b/board/freescale/mpc8313erdb/sdram.c @@ -104,7 +104,7 @@ static long fixed_sdram(void) return msize; } -long int initdram(int board_type) +phys_size_t initdram(int board_type) { volatile immap_t *im = (volatile immap_t *)CFG_IMMR; volatile lbus83xx_t *lbc = &im->lbus; diff --git a/board/freescale/mpc8315erdb/Makefile b/board/freescale/mpc8315erdb/Makefile index e97ba812c9..7c34c5e164 100644 --- a/board/freescale/mpc8315erdb/Makefile +++ b/board/freescale/mpc8315erdb/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/freescale/mpc8315erdb/sdram.c b/board/freescale/mpc8315erdb/sdram.c index f97e3c7804..07e6486eea 100644 --- a/board/freescale/mpc8315erdb/sdram.c +++ b/board/freescale/mpc8315erdb/sdram.c @@ -101,7 +101,7 @@ static long fixed_sdram(void) return msize; } -long int initdram(int board_type) +phys_size_t initdram(int board_type) { volatile immap_t *im = (volatile immap_t *)CFG_IMMR; u32 msize; diff --git a/board/freescale/mpc8323erdb/Makefile b/board/freescale/mpc8323erdb/Makefile index acc954488f..c95f90eaab 100644 --- a/board/freescale/mpc8323erdb/Makefile +++ b/board/freescale/mpc8323erdb/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/freescale/mpc8323erdb/mpc8323erdb.c b/board/freescale/mpc8323erdb/mpc8323erdb.c index afc0eee3b7..f5220abdb0 100644 --- a/board/freescale/mpc8323erdb/mpc8323erdb.c +++ b/board/freescale/mpc8323erdb/mpc8323erdb.c @@ -73,7 +73,7 @@ int board_early_init_f(void) int fixed_sdram(void); -long int initdram(int board_type) +phys_size_t initdram(int board_type) { volatile immap_t *im = (immap_t *) CFG_IMMR; u32 msize = 0; diff --git a/board/freescale/mpc832xemds/Makefile b/board/freescale/mpc832xemds/Makefile index 5ec7a871d4..a97116c391 100644 --- a/board/freescale/mpc832xemds/Makefile +++ b/board/freescale/mpc832xemds/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/freescale/mpc832xemds/mpc832xemds.c b/board/freescale/mpc832xemds/mpc832xemds.c index c10b30f24e..4ad6e9d454 100644 --- a/board/freescale/mpc832xemds/mpc832xemds.c +++ b/board/freescale/mpc832xemds/mpc832xemds.c @@ -94,7 +94,7 @@ int board_early_init_r(void) int fixed_sdram(void); -long int initdram(int board_type) +phys_size_t initdram(int board_type) { volatile immap_t *im = (immap_t *) CFG_IMMR; u32 msize = 0; diff --git a/board/freescale/mpc8349emds/Makefile b/board/freescale/mpc8349emds/Makefile index 5ec7a871d4..a97116c391 100644 --- a/board/freescale/mpc8349emds/Makefile +++ b/board/freescale/mpc8349emds/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/freescale/mpc8349emds/mpc8349emds.c b/board/freescale/mpc8349emds/mpc8349emds.c index 6c825969d3..9a312c37b6 100644 --- a/board/freescale/mpc8349emds/mpc8349emds.c +++ b/board/freescale/mpc8349emds/mpc8349emds.c @@ -59,7 +59,7 @@ int board_early_init_f (void) #define ns2clk(ns) (ns / (1000000000 / CONFIG_8349_CLKIN) + 1) -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *im = (immap_t *)CFG_IMMR; u32 msize = 0; @@ -253,29 +253,28 @@ void sdram_init(void) /* * The following are used to control the SPI chip selects for the SPI command. */ -#ifdef CONFIG_HARD_SPI +#ifdef CONFIG_MPC8XXX_SPI #define SPI_CS_MASK 0x80000000 -void spi_eeprom_chipsel(int cs) +int spi_cs_is_valid(unsigned int bus, unsigned int cs) +{ + return bus == 0 && cs == 0; +} + +void spi_cs_activate(struct spi_slave *slave) { volatile gpio83xx_t *iopd = &((immap_t *)CFG_IMMR)->gpio[0]; - if (cs) - iopd->dat &= ~SPI_CS_MASK; - else - iopd->dat |= SPI_CS_MASK; + iopd->dat &= ~SPI_CS_MASK; } -/* - * The SPI command uses this table of functions for controlling the SPI - * chip selects. - */ -spi_chipsel_type spi_chipsel[] = { - spi_eeprom_chipsel, -}; -int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]); +void spi_cs_deactivate(struct spi_slave *slave) +{ + volatile gpio83xx_t *iopd = &((immap_t *)CFG_IMMR)->gpio[0]; + iopd->dat |= SPI_CS_MASK; +} #endif /* CONFIG_HARD_SPI */ #if defined(CONFIG_OF_BOARD_SETUP) diff --git a/board/freescale/mpc8349itx/Makefile b/board/freescale/mpc8349itx/Makefile index 265e341037..c81ba662fa 100644 --- a/board/freescale/mpc8349itx/Makefile +++ b/board/freescale/mpc8349itx/Makefile @@ -37,7 +37,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/freescale/mpc8349itx/mpc8349itx.c b/board/freescale/mpc8349itx/mpc8349itx.c index 0317bfe6d4..d3fc560df3 100644 --- a/board/freescale/mpc8349itx/mpc8349itx.c +++ b/board/freescale/mpc8349itx/mpc8349itx.c @@ -128,7 +128,7 @@ volatile static struct pci_controller hose[] = { }; #endif /* CONFIG_PCI */ -long int initdram(int board_type) +phys_size_t initdram(int board_type) { volatile immap_t *im = (immap_t *) CFG_IMMR; u32 msize = 0; diff --git a/board/freescale/mpc8360emds/Makefile b/board/freescale/mpc8360emds/Makefile index 5ec7a871d4..a97116c391 100644 --- a/board/freescale/mpc8360emds/Makefile +++ b/board/freescale/mpc8360emds/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/freescale/mpc8360emds/mpc8360emds.c b/board/freescale/mpc8360emds/mpc8360emds.c index 2119320da7..5c3b5dbc93 100644 --- a/board/freescale/mpc8360emds/mpc8360emds.c +++ b/board/freescale/mpc8360emds/mpc8360emds.c @@ -122,7 +122,7 @@ extern void ddr_enable_ecc(unsigned int dram_size); int fixed_sdram(void); void sdram_init(void); -long int initdram(int board_type) +phys_size_t initdram(int board_type) { volatile immap_t *im = (immap_t *) CFG_IMMR; u32 msize = 0; diff --git a/board/freescale/mpc8360erdk/Makefile b/board/freescale/mpc8360erdk/Makefile index 53e0c48276..d1735041f9 100644 --- a/board/freescale/mpc8360erdk/Makefile +++ b/board/freescale/mpc8360erdk/Makefile @@ -40,7 +40,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/freescale/mpc8360erdk/mpc8360erdk.c b/board/freescale/mpc8360erdk/mpc8360erdk.c index 3bcdda7334..61d7000147 100644 --- a/board/freescale/mpc8360erdk/mpc8360erdk.c +++ b/board/freescale/mpc8360erdk/mpc8360erdk.c @@ -266,7 +266,7 @@ int fixed_sdram(void) return msize; } -long int initdram(int board_type) +phys_size_t initdram(int board_type) { #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRC) extern void ddr_enable_ecc(unsigned int dram_size); diff --git a/board/freescale/mpc8360erdk/nand.c b/board/freescale/mpc8360erdk/nand.c index e1e790b34f..8b44a0f38c 100644 --- a/board/freescale/mpc8360erdk/nand.c +++ b/board/freescale/mpc8360erdk/nand.c @@ -39,6 +39,24 @@ static const u32 upm_array[] = { 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01, /* Words 60 to 63 */ }; +static void upm_setup(struct fsl_upm *upm) +{ + int i; + + /* write upm array */ + out_be32(upm->mxmr, MxMR_OP_WARR); + + for (i = 0; i < 64; i++) { + out_be32(upm->mdr, upm_array[i]); + out_8(upm->io_addr, 0x0); + } + + /* normal operation */ + out_be32(upm->mxmr, MxMR_OP_NORM); + while (in_be32(upm->mxmr) != MxMR_OP_NORM) + eieio(); +} + static int dev_ready(void) { if (in_be32(&im->qepio.ioport[4].pdat) & 0x00002000) { @@ -52,10 +70,9 @@ static int dev_ready(void) static struct fsl_upm_nand fun = { .upm = { - .array = upm_array, .io_addr = (void *)CFG_NAND_BASE, }, - .width = 1, + .width = 8, .upm_cmd_offset = 8, .upm_addr_offset = 16, .dev_ready = dev_ready, @@ -68,5 +85,8 @@ int board_nand_init(struct nand_chip *nand) fun.upm.mxmr = &im->lbus.mamr; fun.upm.mdr = &im->lbus.mdr; fun.upm.mar = &im->lbus.mar; + + upm_setup(&fun.upm); + return fsl_upm_nand_init(nand, &fun); } diff --git a/board/freescale/mpc837xemds/Makefile b/board/freescale/mpc837xemds/Makefile index 5ec7a871d4..a97116c391 100644 --- a/board/freescale/mpc837xemds/Makefile +++ b/board/freescale/mpc837xemds/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/freescale/mpc837xemds/mpc837xemds.c b/board/freescale/mpc837xemds/mpc837xemds.c index 40a505b1d4..40f1e63281 100644 --- a/board/freescale/mpc837xemds/mpc837xemds.c +++ b/board/freescale/mpc837xemds/mpc837xemds.c @@ -75,7 +75,7 @@ extern void ddr_enable_ecc(unsigned int dram_size); #endif int fixed_sdram(void); -long int initdram(int board_type) +phys_size_t initdram(int board_type) { volatile immap_t *im = (immap_t *) CFG_IMMR; u32 msize = 0; diff --git a/board/freescale/mpc837xerdb/Makefile b/board/freescale/mpc837xerdb/Makefile index 5ec7a871d4..a97116c391 100644 --- a/board/freescale/mpc837xerdb/Makefile +++ b/board/freescale/mpc837xerdb/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/freescale/mpc837xerdb/mpc837xerdb.c b/board/freescale/mpc837xerdb/mpc837xerdb.c index f73fd5aa55..aaefc18991 100644 --- a/board/freescale/mpc837xerdb/mpc837xerdb.c +++ b/board/freescale/mpc837xerdb/mpc837xerdb.c @@ -64,7 +64,7 @@ void ddr_enable_ecc(unsigned int dram_size); #endif int fixed_sdram(void); -long int initdram(int board_type) +phys_size_t initdram(int board_type) { immap_t *im = (immap_t *) CFG_IMMR; u32 msize = 0; diff --git a/board/freescale/mpc8540ads/Makefile b/board/freescale/mpc8540ads/Makefile index be243885be..2d71cbc516 100644 --- a/board/freescale/mpc8540ads/Makefile +++ b/board/freescale/mpc8540ads/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(OBJS) $(SOBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/freescale/mpc8540ads/law.c b/board/freescale/mpc8540ads/law.c index 785576a35a..3b8bd05ad1 100644 --- a/board/freescale/mpc8540ads/law.c +++ b/board/freescale/mpc8540ads/law.c @@ -46,13 +46,13 @@ struct law_entry law_table[] = { #ifndef CONFIG_SPD_EEPROM - SET_LAW_ENTRY(1, CFG_DDR_SDRAM_BASE, LAW_SIZE_128M, LAW_TRGT_IF_DDR), + SET_LAW(CFG_DDR_SDRAM_BASE, LAW_SIZE_128M, LAW_TRGT_IF_DDR), #endif - SET_LAW_ENTRY(2, CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), + SET_LAW(CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), /* This is not so much the SDRAM map as it is the whole localbus map. */ - SET_LAW_ENTRY(3, CFG_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC), - SET_LAW_ENTRY(4, CFG_PCI1_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI), - SET_LAW_ENTRY(5, CFG_RIO_MEM_BASE, LAWAR_SIZE_512M, LAW_TRGT_IF_RIO), + SET_LAW(CFG_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC), + SET_LAW(CFG_PCI1_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI), + SET_LAW(CFG_RIO_MEM_BASE, LAWAR_SIZE_512M, LAW_TRGT_IF_RIO), }; int num_law_entries = ARRAY_SIZE(law_table); diff --git a/board/freescale/mpc8540ads/mpc8540ads.c b/board/freescale/mpc8540ads/mpc8540ads.c index a951b9e9a3..4f068cc884 100644 --- a/board/freescale/mpc8540ads/mpc8540ads.c +++ b/board/freescale/mpc8540ads/mpc8540ads.c @@ -41,12 +41,6 @@ void local_bus_init(void); void sdram_init(void); long int fixed_sdram(void); - -int board_early_init_f (void) -{ - return 0; -} - int checkboard (void) { puts("Board: ADS\n"); @@ -67,7 +61,7 @@ int checkboard (void) } -long int +phys_size_t initdram(int board_type) { long dram_size = 0; @@ -230,42 +224,6 @@ sdram_init(void) udelay(100); } - -#if defined(CFG_DRAM_TEST) -int testdram (void) -{ - uint *pstart = (uint *) CFG_MEMTEST_START; - uint *pend = (uint *) CFG_MEMTEST_END; - uint *p; - - printf("SDRAM test phase 1:\n"); - for (p = pstart; p < pend; p++) - *p = 0xaaaaaaaa; - - for (p = pstart; p < pend; p++) { - if (*p != 0xaaaaaaaa) { - printf ("SDRAM test fails at: %08x\n", (uint) p); - return 1; - } - } - - printf("SDRAM test phase 2:\n"); - for (p = pstart; p < pend; p++) - *p = 0x55555555; - - for (p = pstart; p < pend; p++) { - if (*p != 0x55555555) { - printf ("SDRAM test fails at: %08x\n", (uint) p); - return 1; - } - } - - printf("SDRAM test passed.\n"); - return 0; -} -#endif - - #if !defined(CONFIG_SPD_EEPROM) /************************************************************************* * fixed sdram init -- doesn't use serial presence detect. diff --git a/board/freescale/mpc8541cds/Makefile b/board/freescale/mpc8541cds/Makefile index 3ae2e97577..98f153056d 100644 --- a/board/freescale/mpc8541cds/Makefile +++ b/board/freescale/mpc8541cds/Makefile @@ -41,7 +41,7 @@ clean: rm -f $(OBJS) $(SOBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/freescale/mpc8541cds/law.c b/board/freescale/mpc8541cds/law.c index 0ac223c53c..fbf2bdc07f 100644 --- a/board/freescale/mpc8541cds/law.c +++ b/board/freescale/mpc8541cds/law.c @@ -47,12 +47,12 @@ */ struct law_entry law_table[] = { - SET_LAW_ENTRY(2, CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), - SET_LAW_ENTRY(3, CFG_PCI2_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2), - SET_LAW_ENTRY(4, CFG_PCI1_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI), - SET_LAW_ENTRY(5, CFG_PCI2_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI_2), + SET_LAW(CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), + SET_LAW(CFG_PCI2_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2), + SET_LAW(CFG_PCI1_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI), + SET_LAW(CFG_PCI2_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI_2), /* LBC window - maps 256M 0xf0000000 -> 0xffffffff */ - SET_LAW_ENTRY(6, CFG_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC), + SET_LAW(CFG_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC), }; int num_law_entries = ARRAY_SIZE(law_table); diff --git a/board/freescale/mpc8541cds/mpc8541cds.c b/board/freescale/mpc8541cds/mpc8541cds.c index 62c8d63cdc..3669ba95d3 100644 --- a/board/freescale/mpc8541cds/mpc8541cds.c +++ b/board/freescale/mpc8541cds/mpc8541cds.c @@ -196,11 +196,6 @@ const iop_conf_t iop_conf_tab[4][32] = { } }; -int board_early_init_f (void) -{ - return 0; -} - int checkboard (void) { volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR); @@ -245,7 +240,7 @@ int checkboard (void) return 0; } -long int +phys_size_t initdram(int board_type) { long dram_size = 0; @@ -425,45 +420,6 @@ sdram_init(void) #endif /* enable SDRAM init */ } -#if defined(CFG_DRAM_TEST) -int -testdram(void) -{ - uint *pstart = (uint *) CFG_MEMTEST_START; - uint *pend = (uint *) CFG_MEMTEST_END; - uint *p; - - printf("Testing DRAM from 0x%08x to 0x%08x\n", - CFG_MEMTEST_START, - CFG_MEMTEST_END); - - printf("DRAM test phase 1:\n"); - for (p = pstart; p < pend; p++) - *p = 0xaaaaaaaa; - - for (p = pstart; p < pend; p++) { - if (*p != 0xaaaaaaaa) { - printf ("DRAM test fails at: %08x\n", (uint) p); - return 1; - } - } - - printf("DRAM test phase 2:\n"); - for (p = pstart; p < pend; p++) - *p = 0x55555555; - - for (p = pstart; p < pend; p++) { - if (*p != 0x55555555) { - printf ("DRAM test fails at: %08x\n", (uint) p); - return 1; - } - } - - printf("DRAM test passed.\n"); - return 0; -} -#endif - #if defined(CONFIG_PCI) /* For some reason the Tundra PCI bridge shows up on itself as a * different device. Work around that by refusing to configure it. diff --git a/board/freescale/mpc8544ds/Makefile b/board/freescale/mpc8544ds/Makefile index 53368b22b8..3a5ea00e80 100644 --- a/board/freescale/mpc8544ds/Makefile +++ b/board/freescale/mpc8544ds/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(OBJS) $(SOBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/freescale/mpc8544ds/law.c b/board/freescale/mpc8544ds/law.c index 433e509fc0..a82dedea3b 100644 --- a/board/freescale/mpc8544ds/law.c +++ b/board/freescale/mpc8544ds/law.c @@ -28,15 +28,15 @@ #include <asm/mmu.h> struct law_entry law_table[] = { - SET_LAW_ENTRY(2, CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), - SET_LAW_ENTRY(3, CFG_PCI1_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCI), - SET_LAW_ENTRY(4, CFG_LBC_CACHE_BASE, LAWAR_SIZE_256M, LAW_TRGT_IF_LBC), - SET_LAW_ENTRY(5, CFG_PCIE1_MEM_PHYS, LAWAR_SIZE_256M, LAW_TRGT_IF_PCIE_1), - SET_LAW_ENTRY(6, CFG_PCIE1_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCIE_1), - SET_LAW_ENTRY(7, CFG_PCIE2_MEM_PHYS, LAWAR_SIZE_512M, LAW_TRGT_IF_PCIE_2), - SET_LAW_ENTRY(8, CFG_PCIE2_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCIE_2), + SET_LAW(CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), + SET_LAW(CFG_PCI1_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCI), + SET_LAW(CFG_LBC_CACHE_BASE, LAWAR_SIZE_256M, LAW_TRGT_IF_LBC), + SET_LAW(CFG_PCIE1_MEM_PHYS, LAWAR_SIZE_256M, LAW_TRGT_IF_PCIE_1), + SET_LAW(CFG_PCIE1_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCIE_1), + SET_LAW(CFG_PCIE2_MEM_PHYS, LAWAR_SIZE_512M, LAW_TRGT_IF_PCIE_2), + SET_LAW(CFG_PCIE2_IO_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_PCIE_2), /* contains both PCIE3 MEM & IO space */ - SET_LAW_ENTRY(9, CFG_PCIE3_MEM_PHYS, LAW_SIZE_4M, LAW_TRGT_IF_PCIE_3), + SET_LAW(CFG_PCIE3_MEM_PHYS, LAW_SIZE_4M, LAW_TRGT_IF_PCIE_3), }; int num_law_entries = ARRAY_SIZE(law_table); diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c index dd10af8092..f615b2384a 100644 --- a/board/freescale/mpc8544ds/mpc8544ds.c +++ b/board/freescale/mpc8544ds/mpc8544ds.c @@ -40,11 +40,6 @@ extern void ddr_enable_ecc(unsigned int dram_size); void sdram_init(void); -int board_early_init_f (void) -{ - return 0; -} - int checkboard (void) { volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR); @@ -64,7 +59,7 @@ int checkboard (void) return 0; } -long int +phys_size_t initdram(int board_type) { long dram_size = 0; @@ -83,45 +78,6 @@ initdram(int board_type) return dram_size; } -#if defined(CFG_DRAM_TEST) -int -testdram(void) -{ - uint *pstart = (uint *) CFG_MEMTEST_START; - uint *pend = (uint *) CFG_MEMTEST_END; - uint *p; - - printf("Testing DRAM from 0x%08x to 0x%08x\n", - CFG_MEMTEST_START, - CFG_MEMTEST_END); - - printf("DRAM test phase 1:\n"); - for (p = pstart; p < pend; p++) - *p = 0xaaaaaaaa; - - for (p = pstart; p < pend; p++) { - if (*p != 0xaaaaaaaa) { - printf ("DRAM test fails at: %08x\n", (uint) p); - return 1; - } - } - - printf("DRAM test phase 2:\n"); - for (p = pstart; p < pend; p++) - *p = 0x55555555; - - for (p = pstart; p < pend; p++) { - if (*p != 0x55555555) { - printf ("DRAM test fails at: %08x\n", (uint) p); - return 1; - } - } - - printf("DRAM test passed.\n"); - return 0; -} -#endif - #ifdef CONFIG_PCI1 static struct pci_controller pci1_hose; #endif diff --git a/board/freescale/mpc8548cds/Makefile b/board/freescale/mpc8548cds/Makefile index 3ae2e97577..98f153056d 100644 --- a/board/freescale/mpc8548cds/Makefile +++ b/board/freescale/mpc8548cds/Makefile @@ -41,7 +41,7 @@ clean: rm -f $(OBJS) $(SOBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/freescale/mpc8548cds/law.c b/board/freescale/mpc8548cds/law.c index 0ee53e2c13..34b9d1c4df 100644 --- a/board/freescale/mpc8548cds/law.c +++ b/board/freescale/mpc8548cds/law.c @@ -52,21 +52,21 @@ struct law_entry law_table[] = { #ifdef CFG_PCI1_MEM_PHYS - SET_LAW_ENTRY(2, CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), - SET_LAW_ENTRY(3, CFG_PCI1_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI), + SET_LAW(CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), + SET_LAW(CFG_PCI1_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI), #endif #ifdef CFG_PCI2_MEM_PHYS - SET_LAW_ENTRY(4, CFG_PCI2_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2), - SET_LAW_ENTRY(5, CFG_PCI2_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI_2), + SET_LAW(CFG_PCI2_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2), + SET_LAW(CFG_PCI2_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI_2), #endif #ifdef CFG_PCIE1_MEM_PHYS - SET_LAW_ENTRY(6, CFG_PCIE1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCIE_1), - SET_LAW_ENTRY(7, CFG_PCIE1_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCIE_1), + SET_LAW(CFG_PCIE1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCIE_1), + SET_LAW(CFG_PCIE1_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCIE_1), #endif /* LBC window - maps 256M 0xf0000000 -> 0xffffffff */ - SET_LAW_ENTRY(8, CFG_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC), + SET_LAW(CFG_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC), #ifdef CFG_RIO_MEM_PHYS - SET_LAW_ENTRY(9, CFG_RIO_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_RIO), + SET_LAW(CFG_RIO_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_RIO), #endif }; diff --git a/board/freescale/mpc8548cds/mpc8548cds.c b/board/freescale/mpc8548cds/mpc8548cds.c index efe2a3a3de..0b037cc697 100644 --- a/board/freescale/mpc8548cds/mpc8548cds.c +++ b/board/freescale/mpc8548cds/mpc8548cds.c @@ -45,11 +45,6 @@ DECLARE_GLOBAL_DATA_PTR; void local_bus_init(void); void sdram_init(void); -int board_early_init_f (void) -{ - return 0; -} - int checkboard (void) { volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR); @@ -93,7 +88,7 @@ int checkboard (void) return 0; } -long int +phys_size_t initdram(int board_type) { long dram_size = 0; @@ -250,45 +245,6 @@ sdram_init(void) #endif /* enable SDRAM init */ } -#if defined(CFG_DRAM_TEST) -int -testdram(void) -{ - uint *pstart = (uint *) CFG_MEMTEST_START; - uint *pend = (uint *) CFG_MEMTEST_END; - uint *p; - - printf("Testing DRAM from 0x%08x to 0x%08x\n", - CFG_MEMTEST_START, - CFG_MEMTEST_END); - - printf("DRAM test phase 1:\n"); - for (p = pstart; p < pend; p++) - *p = 0xaaaaaaaa; - - for (p = pstart; p < pend; p++) { - if (*p != 0xaaaaaaaa) { - printf ("DRAM test fails at: %08x\n", (uint) p); - return 1; - } - } - - printf("DRAM test phase 2:\n"); - for (p = pstart; p < pend; p++) - *p = 0x55555555; - - for (p = pstart; p < pend; p++) { - if (*p != 0x55555555) { - printf ("DRAM test fails at: %08x\n", (uint) p); - return 1; - } - } - - printf("DRAM test passed.\n"); - return 0; -} -#endif - #if defined(CONFIG_PCI) || defined(CONFIG_PCI1) /* For some reason the Tundra PCI bridge shows up on itself as a * different device. Work around that by refusing to configure it. diff --git a/board/freescale/mpc8555cds/Makefile b/board/freescale/mpc8555cds/Makefile index 3ae2e97577..98f153056d 100644 --- a/board/freescale/mpc8555cds/Makefile +++ b/board/freescale/mpc8555cds/Makefile @@ -41,7 +41,7 @@ clean: rm -f $(OBJS) $(SOBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/freescale/mpc8555cds/law.c b/board/freescale/mpc8555cds/law.c index 0ac223c53c..fbf2bdc07f 100644 --- a/board/freescale/mpc8555cds/law.c +++ b/board/freescale/mpc8555cds/law.c @@ -47,12 +47,12 @@ */ struct law_entry law_table[] = { - SET_LAW_ENTRY(2, CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), - SET_LAW_ENTRY(3, CFG_PCI2_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2), - SET_LAW_ENTRY(4, CFG_PCI1_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI), - SET_LAW_ENTRY(5, CFG_PCI2_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI_2), + SET_LAW(CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), + SET_LAW(CFG_PCI2_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2), + SET_LAW(CFG_PCI1_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI), + SET_LAW(CFG_PCI2_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI_2), /* LBC window - maps 256M 0xf0000000 -> 0xffffffff */ - SET_LAW_ENTRY(6, CFG_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC), + SET_LAW(CFG_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC), }; int num_law_entries = ARRAY_SIZE(law_table); diff --git a/board/freescale/mpc8555cds/mpc8555cds.c b/board/freescale/mpc8555cds/mpc8555cds.c index 8acbba4208..9a65101dd2 100644 --- a/board/freescale/mpc8555cds/mpc8555cds.c +++ b/board/freescale/mpc8555cds/mpc8555cds.c @@ -194,11 +194,6 @@ const iop_conf_t iop_conf_tab[4][32] = { } }; -int board_early_init_f (void) -{ - return 0; -} - int checkboard (void) { volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR); @@ -243,7 +238,7 @@ int checkboard (void) return 0; } -long int +phys_size_t initdram(int board_type) { long dram_size = 0; @@ -422,45 +417,6 @@ sdram_init(void) #endif /* enable SDRAM init */ } -#if defined(CFG_DRAM_TEST) -int -testdram(void) -{ - uint *pstart = (uint *) CFG_MEMTEST_START; - uint *pend = (uint *) CFG_MEMTEST_END; - uint *p; - - printf("Testing DRAM from 0x%08x to 0x%08x\n", - CFG_MEMTEST_START, - CFG_MEMTEST_END); - - printf("DRAM test phase 1:\n"); - for (p = pstart; p < pend; p++) - *p = 0xaaaaaaaa; - - for (p = pstart; p < pend; p++) { - if (*p != 0xaaaaaaaa) { - printf ("DRAM test fails at: %08x\n", (uint) p); - return 1; - } - } - - printf("DRAM test phase 2:\n"); - for (p = pstart; p < pend; p++) - *p = 0x55555555; - - for (p = pstart; p < pend; p++) { - if (*p != 0x55555555) { - printf ("DRAM test fails at: %08x\n", (uint) p); - return 1; - } - } - - printf("DRAM test passed.\n"); - return 0; -} -#endif - #ifdef CONFIG_PCI /* For some reason the Tundra PCI bridge shows up on itself as a * different device. Work around that by refusing to configure it diff --git a/board/freescale/mpc8560ads/Makefile b/board/freescale/mpc8560ads/Makefile index be243885be..2d71cbc516 100644 --- a/board/freescale/mpc8560ads/Makefile +++ b/board/freescale/mpc8560ads/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(OBJS) $(SOBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/freescale/mpc8560ads/law.c b/board/freescale/mpc8560ads/law.c index 785576a35a..3b8bd05ad1 100644 --- a/board/freescale/mpc8560ads/law.c +++ b/board/freescale/mpc8560ads/law.c @@ -46,13 +46,13 @@ struct law_entry law_table[] = { #ifndef CONFIG_SPD_EEPROM - SET_LAW_ENTRY(1, CFG_DDR_SDRAM_BASE, LAW_SIZE_128M, LAW_TRGT_IF_DDR), + SET_LAW(CFG_DDR_SDRAM_BASE, LAW_SIZE_128M, LAW_TRGT_IF_DDR), #endif - SET_LAW_ENTRY(2, CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), + SET_LAW(CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), /* This is not so much the SDRAM map as it is the whole localbus map. */ - SET_LAW_ENTRY(3, CFG_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC), - SET_LAW_ENTRY(4, CFG_PCI1_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI), - SET_LAW_ENTRY(5, CFG_RIO_MEM_BASE, LAWAR_SIZE_512M, LAW_TRGT_IF_RIO), + SET_LAW(CFG_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC), + SET_LAW(CFG_PCI1_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI), + SET_LAW(CFG_RIO_MEM_BASE, LAWAR_SIZE_512M, LAW_TRGT_IF_RIO), }; int num_law_entries = ARRAY_SIZE(law_table); diff --git a/board/freescale/mpc8560ads/mpc8560ads.c b/board/freescale/mpc8560ads/mpc8560ads.c index 8d4b8a8b5a..2c14a880e0 100644 --- a/board/freescale/mpc8560ads/mpc8560ads.c +++ b/board/freescale/mpc8560ads/mpc8560ads.c @@ -212,12 +212,6 @@ typedef struct bcsr_ { volatile unsigned char bcsr5; } bcsr_t; - -int board_early_init_f (void) -{ - return 0; -} - void reset_phy (void) { #if defined(CONFIG_ETHER_ON_FCC) /* avoid compile warnings for now */ @@ -270,7 +264,7 @@ int checkboard (void) } -long int +phys_size_t initdram(int board_type) { long dram_size = 0; @@ -433,42 +427,6 @@ sdram_init(void) udelay(100); } - -#if defined(CFG_DRAM_TEST) -int testdram (void) -{ - uint *pstart = (uint *) CFG_MEMTEST_START; - uint *pend = (uint *) CFG_MEMTEST_END; - uint *p; - - printf("SDRAM test phase 1:\n"); - for (p = pstart; p < pend; p++) - *p = 0xaaaaaaaa; - - for (p = pstart; p < pend; p++) { - if (*p != 0xaaaaaaaa) { - printf ("SDRAM test fails at: %08x\n", (uint) p); - return 1; - } - } - - printf("SDRAM test phase 2:\n"); - for (p = pstart; p < pend; p++) - *p = 0x55555555; - - for (p = pstart; p < pend; p++) { - if (*p != 0x55555555) { - printf ("SDRAM test fails at: %08x\n", (uint) p); - return 1; - } - } - - printf("SDRAM test passed.\n"); - return 0; -} -#endif - - #if !defined(CONFIG_SPD_EEPROM) /************************************************************************* * fixed sdram init -- doesn't use serial presence detect. diff --git a/board/freescale/mpc8568mds/Makefile b/board/freescale/mpc8568mds/Makefile index 8294d3bf43..ecdc4d3c22 100644 --- a/board/freescale/mpc8568mds/Makefile +++ b/board/freescale/mpc8568mds/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(OBJS) $(SOBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/freescale/mpc8568mds/law.c b/board/freescale/mpc8568mds/law.c index 5e96ea73a2..3bc24c5c9b 100644 --- a/board/freescale/mpc8568mds/law.c +++ b/board/freescale/mpc8568mds/law.c @@ -50,13 +50,13 @@ */ struct law_entry law_table[] = { - SET_LAW_ENTRY(2, CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), - SET_LAW_ENTRY(3, CFG_PCIE1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCIE_1), - SET_LAW_ENTRY(4, CFG_PCI1_IO_PHYS, LAW_SIZE_8M, LAW_TRGT_IF_PCI), - SET_LAW_ENTRY(5, CFG_PCIE1_IO_PHYS, LAW_SIZE_8M, LAW_TRGT_IF_PCIE_1), - SET_LAW_ENTRY(6, CFG_SRIO_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_RIO), + SET_LAW(CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), + SET_LAW(CFG_PCIE1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCIE_1), + SET_LAW(CFG_PCI1_IO_PHYS, LAW_SIZE_8M, LAW_TRGT_IF_PCI), + SET_LAW(CFG_PCIE1_IO_PHYS, LAW_SIZE_8M, LAW_TRGT_IF_PCIE_1), + SET_LAW(CFG_SRIO_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_RIO), /* LBC window - maps 256M. That's SDRAM, BCSR, PIBs, and Flash */ - SET_LAW_ENTRY(7, CFG_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC), + SET_LAW(CFG_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC), }; int num_law_entries = ARRAY_SIZE(law_table); diff --git a/board/freescale/mpc8568mds/mpc8568mds.c b/board/freescale/mpc8568mds/mpc8568mds.c index 4568aa1df5..2ccff7d81e 100644 --- a/board/freescale/mpc8568mds/mpc8568mds.c +++ b/board/freescale/mpc8568mds/mpc8568mds.c @@ -140,7 +140,7 @@ int checkboard (void) return 0; } -long int +phys_size_t initdram(int board_type) { long dram_size = 0; @@ -292,45 +292,6 @@ sdram_init(void) #endif /* enable SDRAM init */ } -#if defined(CFG_DRAM_TEST) -int -testdram(void) -{ - uint *pstart = (uint *) CFG_MEMTEST_START; - uint *pend = (uint *) CFG_MEMTEST_END; - uint *p; - - printf("Testing DRAM from 0x%08x to 0x%08x\n", - CFG_MEMTEST_START, - CFG_MEMTEST_END); - - printf("DRAM test phase 1:\n"); - for (p = pstart; p < pend; p++) - *p = 0xaaaaaaaa; - - for (p = pstart; p < pend; p++) { - if (*p != 0xaaaaaaaa) { - printf ("DRAM test fails at: %08x\n", (uint) p); - return 1; - } - } - - printf("DRAM test phase 2:\n"); - for (p = pstart; p < pend; p++) - *p = 0x55555555; - - for (p = pstart; p < pend; p++) { - if (*p != 0x55555555) { - printf ("DRAM test fails at: %08x\n", (uint) p); - return 1; - } - } - - printf("DRAM test passed.\n"); - return 0; -} -#endif - #if defined(CONFIG_PCI) #ifndef CONFIG_PCI_PNP static struct pci_config_table pci_mpc8568mds_config_table[] = { diff --git a/board/freescale/mpc8610hpcd/Makefile b/board/freescale/mpc8610hpcd/Makefile index e17a9cb8e6..a457c32e86 100644 --- a/board/freescale/mpc8610hpcd/Makefile +++ b/board/freescale/mpc8610hpcd/Makefile @@ -41,7 +41,7 @@ clean: .PHONY: distclean distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/freescale/mpc8610hpcd/law.c b/board/freescale/mpc8610hpcd/law.c index b4d222d1ae..91b922b86b 100644 --- a/board/freescale/mpc8610hpcd/law.c +++ b/board/freescale/mpc8610hpcd/law.c @@ -29,16 +29,16 @@ struct law_entry law_table[] = { #if !defined(CONFIG_SPD_EEPROM) - SET_LAW_ENTRY(1, CFG_DDR_SDRAM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_DDR_1), + SET_LAW(CFG_DDR_SDRAM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_DDR_1), #endif - SET_LAW_ENTRY(2, CFG_PCIE1_MEM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_PCIE_1), - SET_LAW_ENTRY(3, CFG_PCIE2_MEM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_PCIE_2), - SET_LAW_ENTRY(4, PIXIS_BASE, LAW_SIZE_2M, LAW_TRGT_IF_LBC), - SET_LAW_ENTRY(5, CFG_PCIE1_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCIE_1), - SET_LAW_ENTRY(6, CFG_PCIE2_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCIE_2), - SET_LAW_ENTRY(7, CFG_FLASH_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC), - SET_LAW_ENTRY(8, CFG_PCI1_MEM_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_PCI_1), - SET_LAW_ENTRY(9, CFG_PCI1_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI_1) + SET_LAW(CFG_PCIE1_MEM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_PCIE_1), + SET_LAW(CFG_PCIE2_MEM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_PCIE_2), + SET_LAW(PIXIS_BASE, LAW_SIZE_2M, LAW_TRGT_IF_LBC), + SET_LAW(CFG_PCIE1_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCIE_1), + SET_LAW(CFG_PCIE2_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCIE_2), + SET_LAW(CFG_FLASH_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC), + SET_LAW(CFG_PCI1_MEM_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_PCI_1), + SET_LAW(CFG_PCI1_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI_1) }; int num_law_entries = ARRAY_SIZE(law_table); diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c index 3a855b5903..c85f373c1a 100644 --- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c +++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c @@ -113,7 +113,7 @@ int checkboard(void) } -long int +phys_size_t initdram(int board_type) { long dram_size = 0; @@ -141,42 +141,6 @@ initdram(int board_type) } -#if defined(CFG_DRAM_TEST) -int -testdram(void) -{ - uint *pstart = (uint *) CFG_MEMTEST_START; - uint *pend = (uint *) CFG_MEMTEST_END; - uint *p; - - puts("SDRAM test phase 1:\n"); - for (p = pstart; p < pend; p++) - *p = 0xaaaaaaaa; - - for (p = pstart; p < pend; p++) { - if (*p != 0xaaaaaaaa) { - printf("SDRAM test fails at: %08x\n", (uint) p); - return 1; - } - } - - puts("SDRAM test phase 2:\n"); - for (p = pstart; p < pend; p++) - *p = 0x55555555; - - for (p = pstart; p < pend; p++) { - if (*p != 0x55555555) { - printf("SDRAM test fails at: %08x\n", (uint) p); - return 1; - } - } - - puts("SDRAM test passed.\n"); - return 0; -} -#endif - - #if !defined(CONFIG_SPD_EEPROM) /* * Fixed sdram init -- doesn't use serial presence detect. diff --git a/board/freescale/mpc8641hpcn/Makefile b/board/freescale/mpc8641hpcn/Makefile index 115df0532b..c096e1552e 100644 --- a/board/freescale/mpc8641hpcn/Makefile +++ b/board/freescale/mpc8641hpcn/Makefile @@ -39,7 +39,7 @@ clean: .PHONY: distclean distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/freescale/mpc8641hpcn/law.c b/board/freescale/mpc8641hpcn/law.c index 245f420576..2d6c3c1759 100644 --- a/board/freescale/mpc8641hpcn/law.c +++ b/board/freescale/mpc8641hpcn/law.c @@ -47,18 +47,18 @@ struct law_entry law_table[] = { #if !defined(CONFIG_SPD_EEPROM) - SET_LAW_ENTRY(1, CFG_DDR_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_DDR_1), + SET_LAW(CFG_DDR_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_DDR_1), #endif - SET_LAW_ENTRY(2, CFG_PCI1_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_PCI_1), - SET_LAW_ENTRY(3, CFG_PCI2_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2), - SET_LAW_ENTRY(4, PIXIS_BASE, LAW_SIZE_2M, LAW_TRGT_IF_LBC), - SET_LAW_ENTRY(5, CFG_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI_1), - SET_LAW_ENTRY(6, CFG_PCI2_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI_2), - SET_LAW_ENTRY(7, (CFG_FLASH_BASE & 0xfe000000), LAW_SIZE_32M, LAW_TRGT_IF_LBC), + SET_LAW(CFG_PCI1_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_PCI_1), + SET_LAW(CFG_PCI2_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2), + SET_LAW(PIXIS_BASE, LAW_SIZE_2M, LAW_TRGT_IF_LBC), + SET_LAW(CFG_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI_1), + SET_LAW(CFG_PCI2_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI_2), + SET_LAW((CFG_FLASH_BASE & 0xfe000000), LAW_SIZE_32M, LAW_TRGT_IF_LBC), #if !defined(CONFIG_SPD_EEPROM) - SET_LAW_ENTRY(8, CFG_DDR_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_DDR_2), + SET_LAW(CFG_DDR_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_DDR_2), #endif - SET_LAW_ENTRY(9, CFG_RIO_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_RIO) + SET_LAW(CFG_RIO_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_RIO) }; int num_law_entries = ARRAY_SIZE(law_table); diff --git a/board/freescale/mpc8641hpcn/mpc8641hpcn.c b/board/freescale/mpc8641hpcn/mpc8641hpcn.c index bb1f927b95..cf540fc651 100644 --- a/board/freescale/mpc8641hpcn/mpc8641hpcn.c +++ b/board/freescale/mpc8641hpcn/mpc8641hpcn.c @@ -53,7 +53,7 @@ int checkboard(void) } -long int +phys_size_t initdram(int board_type) { long dram_size = 0; @@ -81,42 +81,6 @@ initdram(int board_type) } -#if defined(CFG_DRAM_TEST) -int -testdram(void) -{ - uint *pstart = (uint *) CFG_MEMTEST_START; - uint *pend = (uint *) CFG_MEMTEST_END; - uint *p; - - puts("SDRAM test phase 1:\n"); - for (p = pstart; p < pend; p++) - *p = 0xaaaaaaaa; - - for (p = pstart; p < pend; p++) { - if (*p != 0xaaaaaaaa) { - printf("SDRAM test fails at: %08x\n", (uint) p); - return 1; - } - } - - puts("SDRAM test phase 2:\n"); - for (p = pstart; p < pend; p++) - *p = 0x55555555; - - for (p = pstart; p < pend; p++) { - if (*p != 0x55555555) { - printf("SDRAM test fails at: %08x\n", (uint) p); - return 1; - } - } - - puts("SDRAM test passed.\n"); - return 0; -} -#endif - - #if !defined(CONFIG_SPD_EEPROM) /* * Fixed sdram init -- doesn't use serial presence detect. diff --git a/board/funkwerk/vovpn-gw/Makefile b/board/funkwerk/vovpn-gw/Makefile index a9a9299a83..493422d390 100644 --- a/board/funkwerk/vovpn-gw/Makefile +++ b/board/funkwerk/vovpn-gw/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/funkwerk/vovpn-gw/vovpn-gw.c b/board/funkwerk/vovpn-gw/vovpn-gw.c index 9b5429afa5..1c3f627a44 100644 --- a/board/funkwerk/vovpn-gw/vovpn-gw.c +++ b/board/funkwerk/vovpn-gw/vovpn-gw.c @@ -318,7 +318,7 @@ do_reset (void *cmdtp, int flag, int argc, char *argv[]) #define ns2clk(ns) (ns / (1000000000 / CONFIG_8260_CLKIN) + 1) -long int initdram (int board_type) +phys_size_t initdram (int board_type) { #ifndef CFG_RAMBOOT volatile immap_t *immap; diff --git a/board/g2000/Makefile b/board/g2000/Makefile index 3c5aa8680a..1c60447e85 100644 --- a/board/g2000/Makefile +++ b/board/g2000/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/g2000/g2000.c b/board/g2000/g2000.c index 2dfd87c78e..647f4b705b 100644 --- a/board/g2000/g2000.c +++ b/board/g2000/g2000.c @@ -131,7 +131,7 @@ long int init_sdram_static_settings(void) } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { long int ret; @@ -149,41 +149,6 @@ long int initdram (int board_type) } -#if 1 /* test-only */ -void sdram_init(void) -{ - init_sdram_static_settings(); -} -#endif - - -#if 0 /* test-only */ -long int initdram (int board_type) -{ - unsigned long val; - - mtdcr(memcfga, mem_mb0cf); - val = mfdcr(memcfgd); - -#if 0 - printf("\nmb0cf=%x\n", val); /* test-only */ - printf("strap=%x\n", mfdcr(strap)); /* test-only */ -#endif - - return (4*1024*1024 << ((val & 0x000e0000) >> 17)); -} -#endif - - -int testdram (void) -{ - /* TODO: XXX XXX XXX */ - printf ("test: 16 MB - ok\n"); - - return (0); -} - - #if defined(CONFIG_CMD_NAND) #include <linux/mtd/nand_legacy.h> extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE]; diff --git a/board/gaisler/gr_cpci_ax2000/Makefile b/board/gaisler/gr_cpci_ax2000/Makefile index d58f50d99f..4a5d73b47c 100644 --- a/board/gaisler/gr_cpci_ax2000/Makefile +++ b/board/gaisler/gr_cpci_ax2000/Makefile @@ -40,7 +40,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/gaisler/gr_cpci_ax2000/gr_cpci_ax2000.c b/board/gaisler/gr_cpci_ax2000/gr_cpci_ax2000.c index d99b45523a..105a74714b 100644 --- a/board/gaisler/gr_cpci_ax2000/gr_cpci_ax2000.c +++ b/board/gaisler/gr_cpci_ax2000/gr_cpci_ax2000.c @@ -22,7 +22,7 @@ #include <config.h> #include <asm/leon.h> -long int initdram(int board_type) +phys_size_t initdram(int board_type) { return 1; } diff --git a/board/gaisler/gr_ep2s60/Makefile b/board/gaisler/gr_ep2s60/Makefile index d58f50d99f..4a5d73b47c 100644 --- a/board/gaisler/gr_ep2s60/Makefile +++ b/board/gaisler/gr_ep2s60/Makefile @@ -40,7 +40,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/gaisler/gr_ep2s60/gr_ep2s60.c b/board/gaisler/gr_ep2s60/gr_ep2s60.c index e8617f0755..2904d32586 100644 --- a/board/gaisler/gr_ep2s60/gr_ep2s60.c +++ b/board/gaisler/gr_ep2s60/gr_ep2s60.c @@ -22,7 +22,7 @@ #include <config.h> #include <asm/leon.h> -long int initdram(int board_type) +phys_size_t initdram(int board_type) { return 1; } diff --git a/board/gaisler/gr_xc3s_1500/Makefile b/board/gaisler/gr_xc3s_1500/Makefile index d58f50d99f..4a5d73b47c 100644 --- a/board/gaisler/gr_xc3s_1500/Makefile +++ b/board/gaisler/gr_xc3s_1500/Makefile @@ -40,7 +40,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/gaisler/gr_xc3s_1500/gr_xc3s_1500.c b/board/gaisler/gr_xc3s_1500/gr_xc3s_1500.c index 1ee7024812..fc8cf84f99 100644 --- a/board/gaisler/gr_xc3s_1500/gr_xc3s_1500.c +++ b/board/gaisler/gr_xc3s_1500/gr_xc3s_1500.c @@ -22,7 +22,7 @@ #include <config.h> #include <asm/leon.h> -long int initdram(int board_type) +phys_size_t initdram(int board_type) { return 1; } diff --git a/board/gaisler/grsim/Makefile b/board/gaisler/grsim/Makefile index 6295109563..56123dc07b 100644 --- a/board/gaisler/grsim/Makefile +++ b/board/gaisler/grsim/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/gaisler/grsim/grsim.c b/board/gaisler/grsim/grsim.c index 70a2f23c55..deccd3d0e7 100644 --- a/board/gaisler/grsim/grsim.c +++ b/board/gaisler/grsim/grsim.c @@ -26,7 +26,7 @@ #include <common.h> #include <asm/leon.h> -long int initdram(int board_type) +phys_size_t initdram(int board_type) { return 1; } diff --git a/board/gaisler/grsim_leon2/Makefile b/board/gaisler/grsim_leon2/Makefile index 6295109563..56123dc07b 100644 --- a/board/gaisler/grsim_leon2/Makefile +++ b/board/gaisler/grsim_leon2/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/gaisler/grsim_leon2/grsim_leon2.c b/board/gaisler/grsim_leon2/grsim_leon2.c index 55dfe8286a..61445fe254 100644 --- a/board/gaisler/grsim_leon2/grsim_leon2.c +++ b/board/gaisler/grsim_leon2/grsim_leon2.c @@ -26,7 +26,7 @@ #include <common.h> #include <asm/leon.h> -long int initdram(int board_type) +phys_size_t initdram(int board_type) { return 1; } diff --git a/board/gcplus/Makefile b/board/gcplus/Makefile index 8a95d83703..7bc636bb9c 100644 --- a/board/gcplus/Makefile +++ b/board/gcplus/Makefile @@ -41,7 +41,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/gen860t/gen860t.c b/board/gen860t/gen860t.c index 73cc16d479..e3d0e435d4 100644 --- a/board/gen860t/gen860t.c +++ b/board/gen860t/gen860t.c @@ -158,7 +158,7 @@ int checkboard (void) /* * Initialize SDRAM */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immr = (immap_t *) CFG_IMMR; volatile memctl8xx_t *memctl = &immr->im_memctl; diff --git a/board/genietv/genietv.c b/board/genietv/genietv.c index c75507f61d..fc2116967a 100644 --- a/board/genietv/genietv.c +++ b/board/genietv/genietv.c @@ -118,7 +118,7 @@ static void PrintState (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *im = (immap_t *) CFG_IMMR; volatile memctl8xx_t *memctl = &im->im_memctl; diff --git a/board/gth/gth.c b/board/gth/gth.c index b1fcbf5cc3..788a6a0948 100644 --- a/board/gth/gth.c +++ b/board/gth/gth.c @@ -265,7 +265,7 @@ int initsdram (uint base, uint * noMbytes) #endif } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { u32 *i; u32 j; diff --git a/board/gth2/gth2.c b/board/gth2/gth2.c index 6da80dc758..cea65c677f 100644 --- a/board/gth2/gth2.c +++ b/board/gth2/gth2.c @@ -36,7 +36,7 @@ static int wdi_status = 0; #define SDRAM_SIZE ((64*1024*1024)-(12*4096)) -#define SERIAL_LOG_BUFFER KSEG1ADDR(SDRAM_SIZE + (8*4096)) +#define SERIAL_LOG_BUFFER CKSEG1ADDR(SDRAM_SIZE + (8*4096)) void inline log_serial_char(char c){ char *serial_log_buffer = (char*)SERIAL_LOG_BUFFER; @@ -83,7 +83,7 @@ void hw_watchdog_reset(void){ } } -long int initdram(int board_type) +phys_size_t initdram(int board_type) { /* Sdram is setup by assembler code */ /* If memory could be changed, we should return the true value here */ @@ -135,7 +135,7 @@ int checkboard (void) *sys_counter = 0x100; /* Enable 32 kHz oscillator for RTC/TOY */ - proc_id = read_32bit_cp0_register(CP0_PRID); + proc_id = read_c0_prid(); switch (proc_id >> 24) { case 0: diff --git a/board/gth2/lowlevel_init.S b/board/gth2/lowlevel_init.S index bf615c1bb1..4c4f0ebd2d 100644 --- a/board/gth2/lowlevel_init.S +++ b/board/gth2/lowlevel_init.S @@ -1,7 +1,6 @@ /* Memory sub-system initialization code */ #include <config.h> -#include <version.h> #include <asm/regdef.h> #include <asm/au1x00.h> #include <asm/mipsregs.h> diff --git a/board/gw8260/Makefile b/board/gw8260/Makefile index 17012dd71d..cb3c566d31 100644 --- a/board/gw8260/Makefile +++ b/board/gw8260/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/gw8260/gw8260.c b/board/gw8260/gw8260.c index 2719a9585f..42c9e0d108 100644 --- a/board/gw8260/gw8260.c +++ b/board/gw8260/gw8260.c @@ -606,7 +606,7 @@ int testdram (void) /* */ /* */ /*********************************************************************/ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8260_t *memctl = &immap->im_memctl; diff --git a/board/hermes/hermes.c b/board/hermes/hermes.c index 8fd081fef3..f9b57204f0 100644 --- a/board/hermes/hermes.c +++ b/board/hermes/hermes.c @@ -134,7 +134,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; diff --git a/board/hidden_dragon/hidden_dragon.c b/board/hidden_dragon/hidden_dragon.c index daab8334ee..5713a3384f 100644 --- a/board/hidden_dragon/hidden_dragon.c +++ b/board/hidden_dragon/hidden_dragon.c @@ -44,7 +44,7 @@ int checkboard (void) return 0; } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { long size; long new_bank0_end; diff --git a/board/hmi1001/Makefile b/board/hmi1001/Makefile index ddfd2ef8af..442e2d0df2 100644 --- a/board/hmi1001/Makefile +++ b/board/hmi1001/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/hmi1001/hmi1001.c b/board/hmi1001/hmi1001.c index 8bdfe78e41..8cfd75bd83 100644 --- a/board/hmi1001/hmi1001.c +++ b/board/hmi1001/hmi1001.c @@ -80,7 +80,7 @@ static void sdram_start (int hi_addr) * is something else than 0x00000000. */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { ulong dramsize = 0; #ifndef CFG_RAMBOOT diff --git a/board/hymod/hymod.c b/board/hymod/hymod.c index 13e60e2226..91aaab1b08 100644 --- a/board/hymod/hymod.c +++ b/board/hymod/hymod.c @@ -364,7 +364,7 @@ misc_init_f (void) /* ------------------------------------------------------------------------- */ -long +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; diff --git a/board/icecube/Makefile b/board/icecube/Makefile index 7762ed3015..c94e24fc6a 100644 --- a/board/icecube/Makefile +++ b/board/icecube/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/icecube/icecube.c b/board/icecube/icecube.c index 07ba2459d8..760db73687 100644 --- a/board/icecube/icecube.c +++ b/board/icecube/icecube.c @@ -134,7 +134,7 @@ static void sdram_start (int hi_addr) */ #if defined(CONFIG_MPC5200) -long int initdram (int board_type) +phys_size_t initdram (int board_type) { ulong dramsize = 0; ulong dramsize2 = 0; @@ -259,7 +259,7 @@ long int initdram (int board_type) #elif defined(CONFIG_MGT5100) -long int initdram (int board_type) +phys_size_t initdram (int board_type) { ulong dramsize = 0; #ifndef CFG_RAMBOOT diff --git a/board/icu862/icu862.c b/board/icu862/icu862.c index 8da9d1c9a4..18aa8bf6dd 100644 --- a/board/icu862/icu862.c +++ b/board/icu862/icu862.c @@ -94,7 +94,7 @@ static long int dram_size (long int, long int *, long int); /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; diff --git a/board/idmr/idmr.c b/board/idmr/idmr.c index 081c375335..4f073fc319 100644 --- a/board/idmr/idmr.c +++ b/board/idmr/idmr.c @@ -29,7 +29,7 @@ int checkboard (void) { return 0; }; -long int initdram (int board_type) { +phys_size_t initdram (int board_type) { int i; /* diff --git a/board/ids8247/ids8247.c b/board/ids8247/ids8247.c index 7176770f68..44fc79cd58 100644 --- a/board/ids8247/ids8247.c +++ b/board/ids8247/ids8247.c @@ -276,7 +276,7 @@ static long int try_init (volatile memctl8260_t * memctl, ulong sdmr, return (size); } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8260_t *memctl = &immap->im_memctl; @@ -334,7 +334,7 @@ void ft_blob_update(void *blob, bd_t *bd) ret = fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize); if (ret < 0) { - printf("ft_blob_update): cannot set /memory/reg " + printf("ft_blob_update(): cannot set /memory/reg " "property err:%s\n", fdt_strerror(ret)); } } diff --git a/board/impa7/Makefile b/board/impa7/Makefile index b64d85f751..4cb13b74ab 100644 --- a/board/impa7/Makefile +++ b/board/impa7/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/imx31_litekit/Makefile b/board/imx31_litekit/Makefile index ea8c8897a9..218d9684a1 100644 --- a/board/imx31_litekit/Makefile +++ b/board/imx31_litekit/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/imx31_litekit/lowlevel_init.S b/board/imx31_litekit/lowlevel_init.S index 9d96db8b48..0003a42424 100644 --- a/board/imx31_litekit/lowlevel_init.S +++ b/board/imx31_litekit/lowlevel_init.S @@ -62,9 +62,9 @@ lowlevel_init: REG 0x43FAC26C, 0 /* SDCLK */ REG 0x43FAC270, 0 /* CAS */ REG 0x43FAC274, 0 /* RAS */ - REG 0x43FAC27C, 0x1000 /* CS2 CSD0) */ + REG 0x43FAC27C, 0x1000 /* CS2 (CSD0) */ REG 0x43FAC284, 0 /* DQM3 */ - REG 0x43FAC288, 0 /* DQM2, DQM1, DQM0, SD31-SD0, A25-A0, MA10 0x288..0x2DC) */ + REG 0x43FAC288, 0 /* DQM2, DQM1, DQM0, SD31-SD0, A25-A0, MA10 (0x288..0x2DC) */ REG 0x43FAC28C, 0 REG 0x43FAC290, 0 REG 0x43FAC294, 0 diff --git a/board/imx31_phycore/Makefile b/board/imx31_phycore/Makefile index cb0e8e83f3..5ed2b4bd9f 100644 --- a/board/imx31_phycore/Makefile +++ b/board/imx31_phycore/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/imx31_phycore/lowlevel_init.S b/board/imx31_phycore/lowlevel_init.S index 70f30c0cd9..c5d6eb05fe 100644 --- a/board/imx31_phycore/lowlevel_init.S +++ b/board/imx31_phycore/lowlevel_init.S @@ -63,9 +63,9 @@ lowlevel_init: REG 0x43FAC26C, 0 /* SDCLK */ REG 0x43FAC270, 0 /* CAS */ REG 0x43FAC274, 0 /* RAS */ - REG 0x43FAC27C, 0x1000 /* CS2 CSD0) */ + REG 0x43FAC27C, 0x1000 /* CS2 (CSD0) */ REG 0x43FAC284, 0 /* DQM3 */ - REG 0x43FAC288, 0 /* DQM2, DQM1, DQM0, SD31-SD0, A25-A0, MA10 0x288..0x2DC) */ + REG 0x43FAC288, 0 /* DQM2, DQM1, DQM0, SD31-SD0, A25-A0, MA10 (0x288..0x2DC) */ REG 0x43FAC28C, 0 REG 0x43FAC290, 0 REG 0x43FAC294, 0 diff --git a/board/incaip/incaip.c b/board/incaip/incaip.c index c624b3d82e..ac7ad8f292 100644 --- a/board/incaip/incaip.c +++ b/board/incaip/incaip.c @@ -53,7 +53,7 @@ static ulong max_sdram_size(void) return size; } -long int initdram(int board_type) +phys_size_t initdram(int board_type) { int rows, cols, best_val = *INCA_IP_SDRAM_MC_CFGPB0; ulong size, max_size = 0; @@ -63,7 +63,7 @@ long int initdram(int board_type) /* Can't probe for RAM size unless we are running from Flash. */ - if (PHYSADDR(our_address) < PHYSADDR(PHYS_FLASH_1)) + if (CPHYSADDR(our_address) < CPHYSADDR(PHYS_FLASH_1)) { return max_sdram_size(); } diff --git a/board/incaip/lowlevel_init.S b/board/incaip/lowlevel_init.S index 08f7f211f7..fe525ec70e 100644 --- a/board/incaip/lowlevel_init.S +++ b/board/incaip/lowlevel_init.S @@ -23,7 +23,6 @@ */ #include <config.h> -#include <version.h> #include <asm/regdef.h> diff --git a/board/inka4x0/Makefile b/board/inka4x0/Makefile index ddfd2ef8af..442e2d0df2 100644 --- a/board/inka4x0/Makefile +++ b/board/inka4x0/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/inka4x0/inka4x0.c b/board/inka4x0/inka4x0.c index 46074e4649..a2e35ff0f6 100644 --- a/board/inka4x0/inka4x0.c +++ b/board/inka4x0/inka4x0.c @@ -92,7 +92,7 @@ static void sdram_start (int hi_addr) * is something else than 0x00000000. */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { ulong dramsize = 0; #ifndef CFG_RAMBOOT diff --git a/board/innokom/Makefile b/board/innokom/Makefile index 71c6bba364..afae217242 100644 --- a/board/innokom/Makefile +++ b/board/innokom/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/integratorap/Makefile b/board/integratorap/Makefile index 505121e071..f78de3a100 100644 --- a/board/integratorap/Makefile +++ b/board/integratorap/Makefile @@ -43,7 +43,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/integratorcp/Makefile b/board/integratorcp/Makefile index e15ef73e2f..9201accb26 100644 --- a/board/integratorcp/Makefile +++ b/board/integratorcp/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/ip860/ip860.c b/board/ip860/ip860.c index 9dd809b678..375cd4d266 100644 --- a/board/ip860/ip860.c +++ b/board/ip860/ip860.c @@ -137,7 +137,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; diff --git a/board/iphase4539/Makefile b/board/iphase4539/Makefile index 3a28f5caf0..877afde1ce 100644 --- a/board/iphase4539/Makefile +++ b/board/iphase4539/Makefile @@ -40,7 +40,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/iphase4539/iphase4539.c b/board/iphase4539/iphase4539.c index 0ca9cf5137..e5d0254a12 100644 --- a/board/iphase4539/iphase4539.c +++ b/board/iphase4539/iphase4539.c @@ -193,7 +193,7 @@ const iop_conf_t iop_conf_tab[4][32] = { } }; -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8260_t *memctl = &immap->im_memctl; diff --git a/board/ispan/Makefile b/board/ispan/Makefile index b2ffd28833..6b3706daae 100644 --- a/board/ispan/Makefile +++ b/board/ispan/Makefile @@ -41,7 +41,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/ispan/ispan.c b/board/ispan/ispan.c index d39b8cd533..12fb91fb8a 100644 --- a/board/ispan/ispan.c +++ b/board/ispan/ispan.c @@ -356,7 +356,7 @@ static int hwc_board_type (char **str) return id; } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { long maxsize = hwc_main_sdram_size(); diff --git a/board/ivm/ivm.c b/board/ivm/ivm.c index 7927ea9a50..4882f0450d 100644 --- a/board/ivm/ivm.c +++ b/board/ivm/ivm.c @@ -159,7 +159,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immr = (immap_t *) CFG_IMMR; volatile memctl8xx_t *memctl = &immr->im_memctl; diff --git a/board/ixdp425/Makefile b/board/ixdp425/Makefile index 5d4feb0f70..efeb31dba7 100644 --- a/board/ixdp425/Makefile +++ b/board/ixdp425/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/jse/Makefile b/board/jse/Makefile index e858c83f73..6be03ac541 100644 --- a/board/jse/Makefile +++ b/board/jse/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/jse/init.S b/board/jse/init.S index 231cd1caf5..c564ed3c94 100644 --- a/board/jse/init.S +++ b/board/jse/init.S @@ -93,13 +93,3 @@ ext_bus_cntlr_init: mtdcr ebccfgd,r4 blr - - -/*----------------------------------------------------------------------- */ -/* Function: sdram_init */ -/* Description: This function is called by cpu/ppc4xx/start.S code */ -/* to get the SDRAM initialized. */ -/*----------------------------------------------------------------------- */ - .globl sdram_init -sdram_init: - blr diff --git a/board/jse/sdram.c b/board/jse/sdram.c index 9060d979d0..8ba6c454fd 100644 --- a/board/jse/sdram.c +++ b/board/jse/sdram.c @@ -30,7 +30,7 @@ * in lib_ppc/board.c to initialize the memory and return what I * found. */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { /* Configure the SDRAMS */ diff --git a/board/jupiter/Makefile b/board/jupiter/Makefile index aed3af000f..aa80a71982 100644 --- a/board/jupiter/Makefile +++ b/board/jupiter/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/jupiter/jupiter.c b/board/jupiter/jupiter.c index efdc333493..7913c75376 100644 --- a/board/jupiter/jupiter.c +++ b/board/jupiter/jupiter.c @@ -92,7 +92,7 @@ static void sdram_start (int hi_addr) * is something else than 0x00000000. */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { ulong dramsize = 0; ulong dramsize2 = 0; diff --git a/board/kb9202/Makefile b/board/kb9202/Makefile index 0207d1222a..363f6657ee 100644 --- a/board/kb9202/Makefile +++ b/board/kb9202/Makefile @@ -41,7 +41,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/korat/Makefile b/board/korat/Makefile index fa19e6feaa..df74774bf7 100644 --- a/board/korat/Makefile +++ b/board/korat/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/kup/kup4k/kup4k.c b/board/kup/kup4k/kup4k.c index 4e377a142b..66d618072d 100644 --- a/board/kup/kup4k/kup4k.c +++ b/board/kup/kup4k/kup4k.c @@ -137,7 +137,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; diff --git a/board/kup/kup4x/kup4x.c b/board/kup/kup4x/kup4x.c index cd9ed13d6d..f07ef18703 100644 --- a/board/kup/kup4x/kup4x.c +++ b/board/kup/kup4x/kup4x.c @@ -134,7 +134,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; diff --git a/board/lantec/lantec.c b/board/lantec/lantec.c index 417dbbb05b..46f4da9e66 100644 --- a/board/lantec/lantec.c +++ b/board/lantec/lantec.c @@ -109,7 +109,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; diff --git a/board/lart/Makefile b/board/lart/Makefile index cbc07bd88a..9eeaa990ba 100644 --- a/board/lart/Makefile +++ b/board/lart/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/linkstation/Makefile b/board/linkstation/Makefile index 8d92d8a6c7..8f4da0c978 100644 --- a/board/linkstation/Makefile +++ b/board/linkstation/Makefile @@ -31,7 +31,7 @@ SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(OBJS)) $(LIB): $(obj).depend $(OBJS) - $(AR) crv $@ $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) ######################################################################### diff --git a/board/linkstation/linkstation.c b/board/linkstation/linkstation.c index f6bc0a958d..241cf032d8 100644 --- a/board/linkstation/linkstation.c +++ b/board/linkstation/linkstation.c @@ -50,7 +50,7 @@ int checkboard (void) return 0; } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { return (get_ram_size(CFG_SDRAM_BASE, CFG_MAX_RAM_SIZE)); } diff --git a/board/logodl/Makefile b/board/logodl/Makefile index 0c88a6e590..0795b6b2af 100644 --- a/board/logodl/Makefile +++ b/board/logodl/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/lpc2292sodimm/Makefile b/board/lpc2292sodimm/Makefile index 18a95d7f9b..4eeb03258b 100644 --- a/board/lpc2292sodimm/Makefile +++ b/board/lpc2292sodimm/Makefile @@ -33,7 +33,7 @@ OBJS := $(addprefix $(obj),$(COBJS)) SOBJS := $(addprefix $(obj),$(SOBJTS)) $(LIB): $(obj).depend $(OBJS) $(SOBJS) - $(AR) crv $@ $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/lpd7a40x/Makefile b/board/lpd7a40x/Makefile index 0e302d961f..446fd5bb82 100644 --- a/board/lpd7a40x/Makefile +++ b/board/lpd7a40x/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/lubbock/Makefile b/board/lubbock/Makefile index 8e397b411c..65923070c4 100644 --- a/board/lubbock/Makefile +++ b/board/lubbock/Makefile @@ -40,7 +40,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/lwmon/lwmon.c b/board/lwmon/lwmon.c index c68978aa98..4a2d8e4a4f 100644 --- a/board/lwmon/lwmon.c +++ b/board/lwmon/lwmon.c @@ -192,7 +192,7 @@ int checkboard (void) } /*********************************************************************** -F* Function: long int initdram (int board_type) P*A*Z* +F* Function: phys_size_t initdram (int board_type) P*A*Z* * P* Parameters: int board_type P* - Usually type of the board - ignored here. @@ -209,7 +209,7 @@ D* Design: wd@denx.de C* Coding: wd@denx.de V* Verification: dzu@denx.de ***********************************************************************/ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immr = (immap_t *) CFG_IMMR; volatile memctl8xx_t *memctl = &immr->im_memctl; diff --git a/board/lwmon5/Makefile b/board/lwmon5/Makefile index 2a9357146c..5bb266f799 100644 --- a/board/lwmon5/Makefile +++ b/board/lwmon5/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/lwmon5/lwmon5.c b/board/lwmon5/lwmon5.c index b63fbdc0cd..85795b7c2a 100644 --- a/board/lwmon5/lwmon5.c +++ b/board/lwmon5/lwmon5.c @@ -275,44 +275,6 @@ int checkboard(void) return (0); } -#if defined(CFG_DRAM_TEST) -int testdram(void) -{ - unsigned long *mem = (unsigned long *)0; - const unsigned long kend = (1024 / sizeof(unsigned long)); - unsigned long k, n; - - mtmsr(0); - - for (k = 0; k < CFG_MBYTES_SDRAM; - ++k, mem += (1024 / sizeof(unsigned long))) { - if ((k & 1023) == 0) { - printf("%3d MB\r", k / 1024); - } - - memset(mem, 0xaaaaaaaa, 1024); - for (n = 0; n < kend; ++n) { - if (mem[n] != 0xaaaaaaaa) { - printf("SDRAM test fails at: %08x\n", - (uint) & mem[n]); - return 1; - } - } - - memset(mem, 0x55555555, 1024); - for (n = 0; n < kend; ++n) { - if (mem[n] != 0x55555555) { - printf("SDRAM test fails at: %08x\n", - (uint) & mem[n]); - return 1; - } - } - } - printf("SDRAM test passes\n"); - return 0; -} -#endif - /************************************************************************* * pci_pre_init * diff --git a/board/lwmon5/sdram.c b/board/lwmon5/sdram.c index 36b51007ea..0a13831156 100644 --- a/board/lwmon5/sdram.c +++ b/board/lwmon5/sdram.c @@ -158,7 +158,7 @@ static void program_ecc(u32 start_address, * initdram -- 440EPx's DDR controller is a DENALI Core * ************************************************************************/ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { #if 0 /* test-only: will remove this define later, when ECC problems are solved! */ /* CL=3 */ diff --git a/board/m501sk/Makefile b/board/m501sk/Makefile index b403095f16..c562c600a4 100644 --- a/board/m501sk/Makefile +++ b/board/m501sk/Makefile @@ -34,13 +34,13 @@ OBJS := $(addprefix $(obj),$(COBJS)) SOBJS := $(addprefix $(obj),$(SOBJS)) $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/m5271evb/m5271evb.c b/board/m5271evb/m5271evb.c index 9caad6325a..e089d5f02f 100644 --- a/board/m5271evb/m5271evb.c +++ b/board/m5271evb/m5271evb.c @@ -29,7 +29,7 @@ int checkboard (void) { return 0; }; -long int initdram (int board_type) { +phys_size_t initdram (int board_type) { int i; diff --git a/board/m5272c3/m5272c3.c b/board/m5272c3/m5272c3.c index 6dcda4f254..d17cb2ef98 100644 --- a/board/m5272c3/m5272c3.c +++ b/board/m5272c3/m5272c3.c @@ -31,7 +31,7 @@ int checkboard (void) { return 0; }; -long int initdram (int board_type) { +phys_size_t initdram (int board_type) { volatile sdramctrl_t * sdp = (sdramctrl_t *)(MMAP_SDRAM); sdp->sdram_sdtr = 0xf539; diff --git a/board/m5282evb/m5282evb.c b/board/m5282evb/m5282evb.c index 7d6d1d6231..50e5e77368 100644 --- a/board/m5282evb/m5282evb.c +++ b/board/m5282evb/m5282evb.c @@ -32,7 +32,7 @@ int checkboard (void) return 0; } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { u32 dramsize, i, dramclk; diff --git a/board/mbx8xx/mbx8xx.c b/board/mbx8xx/mbx8xx.c index 9a9bf809ea..414d879193 100644 --- a/board/mbx8xx/mbx8xx.c +++ b/board/mbx8xx/mbx8xx.c @@ -304,7 +304,7 @@ static ulong get_ramsize (dimm_t * dimm) return size; } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; diff --git a/board/mcc200/Makefile b/board/mcc200/Makefile index 5869119697..e6e81ce3c1 100644 --- a/board/mcc200/Makefile +++ b/board/mcc200/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/mcc200/mcc200.c b/board/mcc200/mcc200.c index a4c4644b4c..77ee3d7ed7 100644 --- a/board/mcc200/mcc200.c +++ b/board/mcc200/mcc200.c @@ -96,7 +96,7 @@ static void sdram_start (int hi_addr) * is something else than 0x00000000. */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { ulong dramsize = 0; ulong dramsize2 = 0; diff --git a/board/mgcoge/Makefile b/board/mgcoge/Makefile index 1a1424406f..d4087ccbb6 100644 --- a/board/mgcoge/Makefile +++ b/board/mgcoge/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/mgcoge/mgcoge.c b/board/mgcoge/mgcoge.c index e7c3fa00c7..51b6dc6016 100644 --- a/board/mgcoge/mgcoge.c +++ b/board/mgcoge/mgcoge.c @@ -249,7 +249,7 @@ static long int try_init (volatile memctl8260_t * memctl, ulong sdmr, return (size); } -long int initdram(int board_type) +phys_size_t initdram(int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8260_t *memctl = &immap->im_memctl; @@ -307,7 +307,7 @@ void ft_blob_update(void *blob, bd_t *bd) ret = fdt_setprop(blob, nodeoffset, "reg", memory_data, sizeof(memory_data)); if (ret < 0) - printf("ft_blob_update): cannot set /memory/reg " + printf("ft_blob_update(): cannot set /memory/reg " "property err:%s\n", fdt_strerror(ret)); } else { @@ -327,7 +327,7 @@ void ft_blob_update(void *blob, bd_t *bd) ret = fdt_setprop(blob, nodeoffset, "ranges", flash_data, sizeof(flash_data)); if (ret < 0) - printf("ft_blob_update): cannot set /localbus/ranges " + printf("ft_blob_update(): cannot set /localbus/ranges " "property err:%s\n", fdt_strerror(ret)); } else { @@ -341,7 +341,7 @@ void ft_blob_update(void *blob, bd_t *bd) ret = fdt_setprop(blob, nodeoffset, "mac-address", bd->bi_enetaddr, sizeof(uchar) * 6); if (ret < 0) - printf("ft_blob_update): cannot set /soc/cpm/ethernet/mac-address " + printf("ft_blob_update(): cannot set /soc/cpm/ethernet/mac-address " "property err:%s\n", fdt_strerror(ret)); } else { diff --git a/board/mgsuvd/mgsuvd.c b/board/mgsuvd/mgsuvd.c index e0123bfa50..c51ea7e76e 100644 --- a/board/mgsuvd/mgsuvd.c +++ b/board/mgsuvd/mgsuvd.c @@ -66,7 +66,7 @@ int checkboard (void) return (0); } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; @@ -164,7 +164,7 @@ void ft_blob_update(void *blob, bd_t *bd) ret = fdt_setprop(blob, nodeoffset, "reg", memory_data, sizeof(memory_data)); if (ret < 0) - printf("ft_blob_update): cannot set /memory/reg " + printf("ft_blob_update(): cannot set /memory/reg " "property err:%s\n", fdt_strerror(ret)); } else { @@ -180,7 +180,7 @@ void ft_blob_update(void *blob, bd_t *bd) ret = fdt_setprop(blob, nodeoffset, "ranges", flash_data, sizeof(flash_data)); if (ret < 0) - printf("ft_blob_update): cannot set /localbus/ranges " + printf("ft_blob_update(): cannot set /localbus/ranges " "property err:%s\n", fdt_strerror(ret)); } else { @@ -195,7 +195,7 @@ void ft_blob_update(void *blob, bd_t *bd) ret = fdt_setprop(blob, nodeoffset, "brg-frequency", brg_data, sizeof(brg_data)); if (ret < 0) - printf("ft_blob_update): cannot set /soc/cpm/brg-frequency " + printf("ft_blob_update(): cannot set /soc/cpm/brg-frequency " "property err:%s\n", fdt_strerror(ret)); } else { @@ -209,7 +209,7 @@ void ft_blob_update(void *blob, bd_t *bd) ret = fdt_setprop(blob, nodeoffset, "mac-address", bd->bi_enetaddr, sizeof(uchar) * 6); if (ret < 0) - printf("ft_blob_update): cannot set /soc/cpm/scc/mac-address " + printf("ft_blob_update(): cannot set /soc/cpm/scc/mac-address " "property err:%s\n", fdt_strerror(ret)); } else { diff --git a/board/ml2/Makefile b/board/ml2/Makefile index 731e8fea11..2a9366656f 100644 --- a/board/ml2/Makefile +++ b/board/ml2/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/ml2/init.S b/board/ml2/init.S index 80f98c5bd9..9064d3b669 100644 --- a/board/ml2/init.S +++ b/board/ml2/init.S @@ -28,7 +28,3 @@ .globl ext_bus_cntlr_init ext_bus_cntlr_init: blr - - .globl sdram_init -sdram_init: - blr diff --git a/board/ml2/ml2.c b/board/ml2/ml2.c index f32e512d4f..981e1decda 100644 --- a/board/ml2/ml2.c +++ b/board/ml2/ml2.c @@ -53,7 +53,7 @@ int checkboard (void) } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { return 32 * 1024 * 1024; } diff --git a/board/ml2/serial.c b/board/ml2/serial.c index 659314572a..c18815bf88 100644 --- a/board/ml2/serial.c +++ b/board/ml2/serial.c @@ -19,9 +19,9 @@ * */ +#include <common.h> #include <asm/u-boot.h> #include <asm/processor.h> -#include <common.h> #include <command.h> #include <configs/ML2.h> diff --git a/board/modnet50/Makefile b/board/modnet50/Makefile index 45141fd9e5..bee5a8668b 100644 --- a/board/modnet50/Makefile +++ b/board/modnet50/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/motionpro/Makefile b/board/motionpro/Makefile index 698ead195c..22ce8e64f2 100644 --- a/board/motionpro/Makefile +++ b/board/motionpro/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/motionpro/motionpro.c b/board/motionpro/motionpro.c index 68257b861d..3b34062226 100644 --- a/board/motionpro/motionpro.c +++ b/board/motionpro/motionpro.c @@ -132,7 +132,7 @@ static void sdram_start(int hi_addr) /* * Initalize SDRAM - configure SDRAM controller, detect memory size. */ -long int initdram(int board_type) +phys_size_t initdram(int board_type) { ulong dramsize = 0; #ifndef CFG_RAMBOOT diff --git a/board/mousse/mousse.c b/board/mousse/mousse.c index 7208a17c1a..f8f152976c 100644 --- a/board/mousse/mousse.c +++ b/board/mousse/mousse.c @@ -55,7 +55,7 @@ int checkflash (void) return 0; } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { return CFG_RAM_SIZE; } diff --git a/board/mp2usb/Makefile b/board/mp2usb/Makefile index 423d77da3b..67efd725db 100644 --- a/board/mp2usb/Makefile +++ b/board/mp2usb/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/mpc8540eval/Makefile b/board/mpc8540eval/Makefile index 28d6cb9976..325d6d5722 100644 --- a/board/mpc8540eval/Makefile +++ b/board/mpc8540eval/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(OBJS) $(SOBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/mpc8540eval/law.c b/board/mpc8540eval/law.c index 273ec5c06f..cfcd73e9e1 100644 --- a/board/mpc8540eval/law.c +++ b/board/mpc8540eval/law.c @@ -43,11 +43,11 @@ struct law_entry law_table[] = { #ifndef CONFIG_SPD_EEPROM - SET_LAW_ENTRY(1, CFG_DDR_SDRAM_BASE, LAW_SIZE_128M, LAW_TRGT_IF_DDR), + SET_LAW(CFG_DDR_SDRAM_BASE, LAW_SIZE_128M, LAW_TRGT_IF_DDR), #endif - SET_LAW_ENTRY(2, CFG_PCI_MEM_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_PCI), + SET_LAW(CFG_PCI_MEM_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_PCI), #ifndef CONFIG_RAM_AS_FLASH - SET_LAW_ENTRY(3, CFG_LBC_SDRAM_BASE, LAW_SIZE_128M, LAW_TRGT_IF_LBC), + SET_LAW(CFG_LBC_SDRAM_BASE, LAW_SIZE_128M, LAW_TRGT_IF_LBC), #endif }; diff --git a/board/mpc8540eval/mpc8540eval.c b/board/mpc8540eval/mpc8540eval.c index 8328b3a062..1ac333c815 100644 --- a/board/mpc8540eval/mpc8540eval.c +++ b/board/mpc8540eval/mpc8540eval.c @@ -61,7 +61,7 @@ int checkboard (void) return (0); } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { long dram_size = 0; diff --git a/board/mpl/mip405/Makefile b/board/mpl/mip405/Makefile index f8f4329f73..53bf846586 100644 --- a/board/mpl/mip405/Makefile +++ b/board/mpl/mip405/Makefile @@ -44,7 +44,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/mpl/mip405/init.S b/board/mpl/mip405/init.S index 3351b5b840..f00a871dfd 100644 --- a/board/mpl/mip405/init.S +++ b/board/mpl/mip405/init.S @@ -178,19 +178,6 @@ ext_bus_cntlr_init: nop /* pass2 DCR errata #8 */ blr -/*----------------------------------------------------------------------------- - * Function: sdram_init - * Description: Configures the internal SRAM memory. and setup the - * Stackpointer in it. - *----------------------------------------------------------------------------- */ - .globl sdram_init - -sdram_init: - - - blr - - #if defined(CONFIG_BOOT_PCI) .section .bootpg,"ax" .globl _start_pci diff --git a/board/mpl/mip405/mip405.c b/board/mpl/mip405/mip405.c index 9e8f9bbdd4..cf0afd1add 100644 --- a/board/mpl/mip405/mip405.c +++ b/board/mpl/mip405/mip405.c @@ -620,7 +620,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ static int test_dram (unsigned long ramsize); -long int initdram (int board_type) +phys_size_t initdram (int board_type) { unsigned long bank_reg[4], tmp, bank_size; diff --git a/board/mpl/pati/Makefile b/board/mpl/pati/Makefile index 82c97d6d5d..adeba69ee0 100644 --- a/board/mpl/pati/Makefile +++ b/board/mpl/pati/Makefile @@ -42,7 +42,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/mpl/pati/pati.c b/board/mpl/pati/pati.c index 7893d61f16..475741d2af 100644 --- a/board/mpl/pati/pati.c +++ b/board/mpl/pati/pati.c @@ -149,7 +149,7 @@ extern void mem_test_reloc(void); /* * Get RAM size. */ -long int initdram(int board_type) +phys_size_t initdram(int board_type) { unsigned char board_rev; unsigned long reg; diff --git a/board/mpl/pip405/Makefile b/board/mpl/pip405/Makefile index 72143f0911..590c7da5bb 100644 --- a/board/mpl/pip405/Makefile +++ b/board/mpl/pip405/Makefile @@ -47,7 +47,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/mpl/pip405/init.S b/board/mpl/pip405/init.S index 39f2ea534a..838432525d 100644 --- a/board/mpl/pip405/init.S +++ b/board/mpl/pip405/init.S @@ -175,19 +175,6 @@ nop /* pass2 DCR errata #8 */ blr -/*----------------------------------------------------------------------------- - * Function: sdram_init - * Description: Configures the internal SRAM memory. and setup the - * Stackpointer in it. - *----------------------------------------------------------------------------- */ - .globl sdram_init - -sdram_init: - - - blr - - #if defined(CONFIG_BOOT_PCI) .section .bootpg,"ax" .globl _start_pci diff --git a/board/mpl/pip405/pip405.c b/board/mpl/pip405/pip405.c index 38286081ae..6cba892e78 100644 --- a/board/mpl/pip405/pip405.c +++ b/board/mpl/pip405/pip405.c @@ -608,7 +608,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ static int test_dram (unsigned long ramsize); -long int initdram (int board_type) +phys_size_t initdram (int board_type) { unsigned long bank_reg[4], tmp, bank_size; int i, ds; diff --git a/board/mpl/vcma9/Makefile b/board/mpl/vcma9/Makefile index 209322e51c..10bcb3b0a7 100644 --- a/board/mpl/vcma9/Makefile +++ b/board/mpl/vcma9/Makefile @@ -44,7 +44,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/mpr2/Makefile b/board/mpr2/Makefile index 17ca17ec5b..9f8fb807ab 100644 --- a/board/mpr2/Makefile +++ b/board/mpr2/Makefile @@ -30,25 +30,29 @@ include $(TOPDIR)/config.mk -LIB = lib$(BOARD).a +LIB = $(obj)lib$(BOARD).a -OBJS := mpr2.o +COBJS := mpr2.o SOBJS := lowlevel_init.o +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### -.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) - $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@ +# defines $(obj).depend target +include $(SRCTREE)/rules.mk --include .depend +sinclude $(obj).depend ######################################################################### diff --git a/board/ms7720se/Makefile b/board/ms7720se/Makefile index d1af93700e..18745ecff3 100644 --- a/board/ms7720se/Makefile +++ b/board/ms7720se/Makefile @@ -27,25 +27,29 @@ include $(TOPDIR)/config.mk -LIB = lib$(BOARD).a +LIB = $(obj)lib$(BOARD).a -OBJS := ms7720se.o +COBJS := ms7720se.o SOBJS := lowlevel_init.o +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### -.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) - $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@ +# defines $(obj).depend target +include $(SRCTREE)/rules.mk --include .depend +sinclude $(obj).depend ######################################################################### diff --git a/board/ms7720se/ms7720se.c b/board/ms7720se/ms7720se.c index ad76c0b2c7..af62cdfd28 100644 --- a/board/ms7720se/ms7720se.c +++ b/board/ms7720se/ms7720se.c @@ -40,7 +40,6 @@ int checkboard(void) int board_init(void) { - return 0; } diff --git a/board/ms7722se/Makefile b/board/ms7722se/Makefile index 6dec0136c2..b203b6d4c7 100644 --- a/board/ms7722se/Makefile +++ b/board/ms7722se/Makefile @@ -24,25 +24,29 @@ include $(TOPDIR)/config.mk -LIB = lib$(BOARD).a +LIB = $(obj)lib$(BOARD).a -OBJS := ms7722se.o +COBJS := ms7722se.o SOBJS := lowlevel_init.o +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### -.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) - $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@ +# defines $(obj).depend target +include $(SRCTREE)/rules.mk --include .depend +sinclude $(obj).depend ######################################################################### diff --git a/board/ms7722se/ms7722se.c b/board/ms7722se/ms7722se.c index 0d3d55cf5c..cf02242299 100644 --- a/board/ms7722se/ms7722se.c +++ b/board/ms7722se/ms7722se.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2007 + * Copyright (C) 2007,2008 * Nobuhiro Iwamatsu <iwamatsu@nigauri.org> * * Copyright (C) 2007 @@ -43,7 +43,7 @@ int board_init(void) return 0; } -int dram_init (void) +int dram_init(void) { DECLARE_GLOBAL_DATA_PTR; @@ -53,7 +53,7 @@ int dram_init (void) return 0; } -void led_set_state (unsigned short value) +void led_set_state(unsigned short value) { - *((volatile unsigned short *) LED_BASE) = (value & 0xFF); + writew(value & 0xFF, LED_BASE); } diff --git a/board/ms7750se/Makefile b/board/ms7750se/Makefile index f81d56cb44..01ddf69201 100644 --- a/board/ms7750se/Makefile +++ b/board/ms7750se/Makefile @@ -19,25 +19,29 @@ # include $(TOPDIR)/config.mk -LIB = lib$(BOARD).a +LIB = $(obj)lib$(BOARD).a -OBJS := ms7750se.o +COBJS := ms7750se.o SOBJS := lowlevel_init.o +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend -################################################################# +######################################################################### -.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) - $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@ +# defines $(obj).depend target +include $(SRCTREE)/rules.mk --include .depend +sinclude $(obj).depend -################################################################# +######################################################################### diff --git a/board/munices/Makefile b/board/munices/Makefile index 09c63c3ee4..5862bed5cc 100644 --- a/board/munices/Makefile +++ b/board/munices/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/munices/munices.c b/board/munices/munices.c index 395909d7cd..162f89c500 100644 --- a/board/munices/munices.c +++ b/board/munices/munices.c @@ -74,7 +74,7 @@ static void sdram_start (int hi_addr) * is something else than 0x00000000. */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { ulong dramsize = 0; ulong dramsize2 = 0; diff --git a/board/musenki/musenki.c b/board/musenki/musenki.c index 4408b07c55..b2b70e756d 100644 --- a/board/musenki/musenki.c +++ b/board/musenki/musenki.c @@ -45,7 +45,7 @@ int checkflash (void) } #endif -long int initdram (int board_type) +phys_size_t initdram (int board_type) { long size; long new_bank0_end; diff --git a/board/mvblm7/Makefile b/board/mvblm7/Makefile new file mode 100644 index 0000000000..cfbecfbe8f --- /dev/null +++ b/board/mvblm7/Makefile @@ -0,0 +1,48 @@ +# +# Copyright (C) Freescale Semiconductor, Inc. 2006. All rights reserved. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := $(BOARD).o pci.o fpga.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/mvblm7/config.mk b/board/mvblm7/config.mk new file mode 100644 index 0000000000..1d85f4fd0e --- /dev/null +++ b/board/mvblm7/config.mk @@ -0,0 +1,25 @@ +# +# Copyright (C) Freescale Semiconductor, Inc. 2006. All rights reserved. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp + +TEXT_BASE = 0xFFF00000 diff --git a/board/mvblm7/fpga.c b/board/mvblm7/fpga.c new file mode 100644 index 0000000000..a60af019a7 --- /dev/null +++ b/board/mvblm7/fpga.c @@ -0,0 +1,188 @@ +/* + * (C) Copyright 2002 + * Rich Ireland, Enterasys Networks, rireland@enterasys.com. + * Keith Outwater, keith_outwater@mvis.com. + * + * (C) Copyright 2008 + * Andre Schwarz, Matrix Vision GmbH, andre.schwarz@matrix-vision.de + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#include <common.h> +#include <ACEX1K.h> +#include <command.h> +#include "fpga.h" +#include "mvblm7.h" + +#ifdef FPGA_DEBUG +#define fpga_debug(fmt, args...) printf("%s: "fmt, __func__, ##args) +#else +#define fpga_debug(fmt, args...) +#endif + +Altera_CYC2_Passive_Serial_fns altera_fns = { + fpga_null_fn, + fpga_config_fn, + fpga_status_fn, + fpga_done_fn, + fpga_wr_fn, + fpga_null_fn, + fpga_null_fn, + 0 +}; + +Altera_desc cyclone2 = { + Altera_CYC2, + passive_serial, + Altera_EP2C20_SIZE, + (void *) &altera_fns, + NULL, + 0 +}; + +DECLARE_GLOBAL_DATA_PTR; + +int mvblm7_init_fpga(void) +{ + fpga_debug("Initialize FPGA interface (reloc 0x%.8lx)\n", + gd->reloc_off); + fpga_init(gd->reloc_off); + fpga_add(fpga_altera, &cyclone2); + fpga_config_fn(0, 1, 0); + udelay(60); + + return 1; +} + +int fpga_null_fn(int cookie) +{ + return 0; +} + +int fpga_config_fn(int assert, int flush, int cookie) +{ + volatile immap_t *im = (volatile immap_t *)CFG_IMMR; + volatile gpio83xx_t *gpio = (volatile gpio83xx_t *)&im->gpio[0]; + u32 dvo = gpio->dat; + + fpga_debug("SET config : %s\n", assert ? "low" : "high"); + if (assert) + dvo |= FPGA_CONFIG; + else + dvo &= ~FPGA_CONFIG; + + if (flush) + gpio->dat = dvo; + + return assert; +} + +int fpga_done_fn(int cookie) +{ + volatile immap_t *im = (volatile immap_t *)CFG_IMMR; + volatile gpio83xx_t *gpio = (volatile gpio83xx_t *)&im->gpio[0]; + int result = 0; + + udelay(10); + fpga_debug("CONF_DONE check ... "); + if (gpio->dat & FPGA_CONF_DONE) { + fpga_debug("high\n"); + result = 1; + } else + fpga_debug("low\n"); + + return result; +} + +int fpga_status_fn(int cookie) +{ + volatile immap_t *im = (volatile immap_t *)CFG_IMMR; + volatile gpio83xx_t *gpio = (volatile gpio83xx_t *)&im->gpio[0]; + int result = 0; + + fpga_debug("STATUS check ... "); + if (gpio->dat & FPGA_STATUS) { + fpga_debug("high\n"); + result = 1; + } else + fpga_debug("low\n"); + + return result; +} + +int fpga_clk_fn(int assert_clk, int flush, int cookie) +{ + volatile immap_t *im = (volatile immap_t *)CFG_IMMR; + volatile gpio83xx_t *gpio = (volatile gpio83xx_t *)&im->gpio[0]; + u32 dvo = gpio->dat; + + fpga_debug("CLOCK %s\n", assert_clk ? "high" : "low"); + if (assert_clk) + dvo |= FPGA_CCLK; + else + dvo &= ~FPGA_CCLK; + + if (flush) + gpio->dat = dvo; + + return assert_clk; +} + +static inline int _write_fpga(u8 val, int dump) +{ + volatile immap_t *im = (volatile immap_t *)CFG_IMMR; + volatile gpio83xx_t *gpio = (volatile gpio83xx_t *)&im->gpio[0]; + int i; + u32 dvo = gpio->dat; + + if (dump) + fpga_debug(" %02x -> ", val); + for (i = 0; i < 8; i++) { + dvo &= ~FPGA_CCLK; + gpio->dat = dvo; + dvo &= ~FPGA_DIN; + if (dump) + fpga_debug("%d ", val&1); + if (val & 1) + dvo |= FPGA_DIN; + gpio->dat = dvo; + dvo |= FPGA_CCLK; + gpio->dat = dvo; + val >>= 1; + } + if (dump) + fpga_debug("\n"); + + return 0; +} + +int fpga_wr_fn(void *buf, size_t len, int flush, int cookie) +{ + unsigned char *data = (unsigned char *) buf; + int i; + + fpga_debug("fpga_wr: buf %p / size %d\n", buf, len); + for (i = 0; i < len; i++) + _write_fpga(data[i], 0); + fpga_debug("\n"); + + return FPGA_SUCCESS; +} diff --git a/board/atmel/at91cap9adk/u-boot.lds b/board/mvblm7/fpga.h index 996f401f0b..19277eb05f 100644 --- a/board/atmel/at91cap9adk/u-boot.lds +++ b/board/mvblm7/fpga.h @@ -1,6 +1,7 @@ /* * (C) Copyright 2002 - * Gary Jennejohn, DENX Software Engineering, <gj@denx.de> + * Rich Ireland, Enterasys Networks, rireland@enterasys.com. + * Keith Outwater, keith_outwater@mvis.com. * * See file CREDITS for list of people who contributed to this * project. @@ -12,46 +13,22 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA + * */ -OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/ -OUTPUT_ARCH(arm) -ENTRY(_start) -SECTIONS -{ - . = 0x00000000; - - . = ALIGN(4); - .text : - { - cpu/arm926ejs/start.o (.text) - *(.text) - } - - . = ALIGN(4); - .rodata : { *(.rodata) } - - . = ALIGN(4); - .data : { *(.data) } - - . = ALIGN(4); - .got : { *(.got) } - - . = .; - __u_boot_cmd_start = .; - .u_boot_cmd : { *(.u_boot_cmd) } - __u_boot_cmd_end = .; +extern int mvblm7_init_fpga(void); - . = ALIGN(4); - __bss_start = .; - .bss : { *(.bss) } - _end = .; -} +extern int fpga_pgm_fn(int assert_pgm, int flush, int cookie); +extern int fpga_status_fn(int cookie); +extern int fpga_config_fn(int assert, int flush, int cookie); +extern int fpga_done_fn(int cookie); +extern int fpga_clk_fn(int assert_clk, int flush, int cookie); +extern int fpga_wr_fn(void *buf, size_t len, int flush, int cookie); +extern int fpga_null_fn(int cookie); diff --git a/board/mvblm7/mvblm7.c b/board/mvblm7/mvblm7.c new file mode 100644 index 0000000000..b07f91393c --- /dev/null +++ b/board/mvblm7/mvblm7.c @@ -0,0 +1,157 @@ +/* + * Copyright (C) Freescale Semiconductor, Inc. 2006. All rights reserved. + * + * (C) Copyright 2008 + * Andre Schwarz, Matrix Vision GmbH, andre.schwarz@matrix-vision.de + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS for A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <ioports.h> +#include <mpc83xx.h> +#include <asm/mpc8349_pci.h> +#include <pci.h> +#include <spi.h> +#include <asm/mmu.h> +#if defined(CONFIG_OF_LIBFDT) +#include <libfdt.h> +#endif + +#include "mvblm7.h" + +int fixed_sdram(void) +{ + volatile immap_t *im = (immap_t *)CFG_IMMR; + u32 msize = 0; + u32 ddr_size; + u32 ddr_size_log2; + + msize = CFG_DDR_SIZE; + for (ddr_size = msize << 20, ddr_size_log2 = 0; + (ddr_size > 1); + ddr_size = ddr_size >> 1, ddr_size_log2++) { + if (ddr_size & 1) + return -1; + } + im->sysconf.ddrlaw[0].bar = ((CFG_DDR_SDRAM_BASE>>12) & 0xfffff); + im->sysconf.ddrlaw[0].ar = LAWAR_EN | ((ddr_size_log2 - 1) & + LAWAR_SIZE); + + im->ddr.csbnds[0].csbnds = CFG_DDR_CS0_BNDS; + im->ddr.cs_config[0] = CFG_DDR_CS0_CONFIG; + im->ddr.timing_cfg_0 = CFG_DDR_TIMING_0; + im->ddr.timing_cfg_1 = CFG_DDR_TIMING_1; + im->ddr.timing_cfg_2 = CFG_DDR_TIMING_2; + im->ddr.timing_cfg_3 = CFG_DDR_TIMING_3; + im->ddr.sdram_cfg = CFG_DDR_SDRAM_CFG; + im->ddr.sdram_cfg2 = CFG_DDR_SDRAM_CFG2; + im->ddr.sdram_mode = CFG_DDR_MODE; + im->ddr.sdram_interval = CFG_DDR_INTERVAL; + im->ddr.sdram_clk_cntl = CFG_DDR_CLK_CNTL; + + udelay(300); + + im->ddr.sdram_cfg |= SDRAM_CFG_MEM_EN; + + return CFG_DDR_SIZE; +} + +phys_size_t initdram(int board_type) +{ + volatile immap_t *im = (immap_t *) CFG_IMMR; + u32 msize = 0; + + if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im) + return -1; + + im->sysconf.ddrlaw[0].bar = CFG_DDR_BASE & LAWBAR_BAR; + msize = fixed_sdram(); + + /* return total bus RAM size(bytes) */ + return msize * 1024 * 1024; +} + +int checkboard(void) +{ + puts("Board: Matrix Vision mvBlueLYNX-M7\n"); + + return 0; +} + +u8 *dhcp_vendorex_prep(u8 *e) +{ + char *ptr; + + /* DHCP vendor-class-identifier = 60 */ + ptr = getenv("dhcp_vendor-class-identifier"); + if (ptr) { + *e++ = 60; + *e++ = strlen(ptr); + while (*ptr) + *e++ = *ptr++; + } + /* DHCP_CLIENT_IDENTIFIER = 61 */ + ptr = getenv("dhcp_client_id"); + if (ptr) { + *e++ = 61; + *e++ = strlen(ptr); + while (*ptr) + *e++ = *ptr++; + } + + return e; +} + +u8 *dhcp_vendorex_proc(u8 *popt) +{ + return NULL; +} + +#ifdef CONFIG_HARD_SPI +int spi_cs_is_valid(unsigned int bus, unsigned int cs) +{ + return bus == 0 && cs == 0; +} + +void spi_cs_activate(struct spi_slave *slave) +{ + volatile gpio83xx_t *iopd = &((immap_t *)CFG_IMMR)->gpio[0]; + + iopd->dat &= ~MVBLM7_MMC_CS; +} + +void spi_cs_deactivate(struct spi_slave *slave) +{ + volatile gpio83xx_t *iopd = &((immap_t *)CFG_IMMR)->gpio[0]; + + iopd->dat |= ~MVBLM7_MMC_CS; +} +#endif + +#if defined(CONFIG_OF_BOARD_SETUP) +void ft_board_setup(void *blob, bd_t *bd) +{ + ft_cpu_setup(blob, bd); +#ifdef CONFIG_PCI + ft_pci_setup(blob, bd); +#endif +} + +#endif diff --git a/board/mvblm7/mvblm7.h b/board/mvblm7/mvblm7.h new file mode 100644 index 0000000000..03e9f4170a --- /dev/null +++ b/board/mvblm7/mvblm7.h @@ -0,0 +1,21 @@ +#ifndef __MVBC_H__ +#define __MVBC_H__ + +#define MV_GPIO + +#define FPGA_CONFIG 0x80000000 +#define FPGA_CCLK 0x40000000 +#define FPGA_DIN 0x20000000 +#define FPGA_STATUS 0x10000000 +#define FPGA_CONF_DONE 0x08000000 +#define MMC_CS 0x04000000 + +#define WD_WDI 0x00400000 +#define WD_TS 0x00200000 +#define MAN_RST 0x00100000 + +#define MV_GPIO_DAT (WD_TS) +#define MV_GPIO_OUT (FPGA_CONFIG|FPGA_DIN|FPGA_CCLK|WD_TS|WD_WDI|MMC_CS) +#define MV_GPIO_ODE (FPGA_CONFIG|MAN_RST) + +#endif diff --git a/board/mvblm7/mvblm7_autoscript b/board/mvblm7/mvblm7_autoscript new file mode 100644 index 0000000000..ec6e34ef05 --- /dev/null +++ b/board/mvblm7/mvblm7_autoscript @@ -0,0 +1,37 @@ +echo +echo "==== running autoscript ====" +echo +setenv bootdtb bootm \${kernel_boot} \${mv_initrd_addr_ram} \${mv_dtb_addr_ram} +setenv ramkernel setenv kernel_boot \${loadaddr} +setenv flashkernel setenv kernel_boot \${mv_kernel_addr} +setenv cpird cp \${mv_initrd_addr} \${mv_initrd_addr_ram} \${mv_initrd_length} +setenv bootfromflash run flashkernel cpird ramparam bootdtb +setenv getdtb tftp \${mv_dtb_addr_ram} \${dtb_name} +setenv cpdtb cp \${mv_dtb_addr} \${mv_dtb_addr_ram} 0x2000 +setenv rundtb fdt addr \${mv_dtb_addr_ram}\;fdt boardsetup +setenv bootfromnet tftp \${mv_initrd_addr_ram} \${initrd_name}\;run ramkernel +setenv set_static_ip setenv ipaddr \${static_ipaddr} +setenv set_static_nm setenv netmask \${static_netmask} +setenv set_static_gw setenv gatewayip \${static_gateway} +setenv set_ip setenv ip \${ipaddr}::\${gatewayip}:\${netmask} +setenv ramparam setenv bootargs root=/dev/ram0 ro rootfstype=squashfs +if test ${autoscr_boot} != no; +then + if test ${netboot} = yes; + then + bootp + if test $? = 0; + then + echo "=== bootp succeeded -> netboot ===" + run set_ip + run getdtb rundtb bootfromnet ramparam bootdtb + else + echo "=== netboot failed ===" + fi + fi + run set_static_ip set_static_nm set_static_gw set_ip + echo "=== bootfromflash ===" + run cpdtb rundtb bootfromflash +else + echo "=== boot stopped with autoscr_boot no ===" +fi diff --git a/board/mvblm7/pci.c b/board/mvblm7/pci.c new file mode 100644 index 0000000000..ef34a6b453 --- /dev/null +++ b/board/mvblm7/pci.c @@ -0,0 +1,133 @@ +/* + * Copyright (C) Freescale Semiconductor, Inc. 2006. All rights reserved. + * + * (C) Copyright 2008 + * Andre Schwarz, Matrix Vision GmbH, andre.schwarz@matrix-vision.de + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#if defined(CONFIG_OF_LIBFDT) +#include <libfdt.h> +#endif +#include <pci.h> +#include <mpc83xx.h> +#include <fpga.h> +#include "mvblm7.h" +#include "fpga.h" + +DECLARE_GLOBAL_DATA_PTR; + +int mvblm7_load_fpga(void) +{ + size_t data_size = 0; + void *fpga_data = NULL; + char *datastr = getenv("fpgadata"); + char *sizestr = getenv("fpgadatasize"); + + if (datastr) + fpga_data = (void *)simple_strtoul(datastr, NULL, 16); + if (sizestr) + data_size = (size_t)simple_strtoul(sizestr, NULL, 16); + + return fpga_load(0, fpga_data, data_size); +} + +static struct pci_region pci_regions[] = { + { + bus_start: CFG_PCI1_MEM_BASE, + phys_start: CFG_PCI1_MEM_PHYS, + size: CFG_PCI1_MEM_SIZE, + flags: PCI_REGION_MEM | PCI_REGION_PREFETCH + }, + { + bus_start: CFG_PCI1_MMIO_BASE, + phys_start: CFG_PCI1_MMIO_PHYS, + size: CFG_PCI1_MMIO_SIZE, + flags: PCI_REGION_MEM + }, + { + bus_start: CFG_PCI1_IO_BASE, + phys_start: CFG_PCI1_IO_PHYS, + size: CFG_PCI1_IO_SIZE, + flags: PCI_REGION_IO + } +}; + +void pci_init_board(void) +{ + char *s; + int i; + int warmboot; + int load_fpga; + volatile immap_t *immr; + volatile pcictrl83xx_t *pci_ctrl; + volatile gpio83xx_t *gpio; + volatile clk83xx_t *clk; + volatile law83xx_t *pci_law; + struct pci_region *reg[] = { pci_regions }; + + load_fpga = 1; + immr = (immap_t *) CFG_IMMR; + clk = (clk83xx_t *) &immr->clk; + pci_ctrl = immr->pci_ctrl; + pci_law = immr->sysconf.pcilaw; + gpio = (volatile gpio83xx_t *)&immr->gpio[0]; + + s = getenv("skip_fpga"); + if (s) { + printf("found 'skip_fpga' -> FPGA _not_ loaded !\n"); + load_fpga = 0; + } + + gpio->dat = MV_GPIO_DAT; + gpio->odr = MV_GPIO_ODE; + if (load_fpga) + gpio->dir = MV_GPIO_OUT; + else + gpio->dir = MV_GPIO_OUT & ~(FPGA_DIN|FPGA_CCLK); + + printf("SICRH / SICRL : 0x%08x / 0x%08x\n", immr->sysconf.sicrh, + immr->sysconf.sicrl); + + mvblm7_init_fpga(); + if (load_fpga) + mvblm7_load_fpga(); + + /* Enable PCI_CLK_OUTPUTs 0 and 1 with 1:1 clocking */ + clk->occr = 0xc0000000; + + pci_ctrl[0].gcr = 0; + udelay(2000); + pci_ctrl[0].gcr = 1; + + for (i = 0; i < 1000; ++i) + udelay(1000); + + pci_law[0].bar = CFG_PCI1_MEM_PHYS & LAWBAR_BAR; + pci_law[0].ar = LBLAWAR_EN | LBLAWAR_1GB; + + pci_law[1].bar = CFG_PCI1_IO_PHYS & LAWBAR_BAR; + pci_law[1].ar = LBLAWAR_EN | LBLAWAR_1MB; + + warmboot = gd->bd->bi_bootflags & BOOTFLAG_WARM; + + mpc83xx_pci_init(1, reg, warmboot); +} diff --git a/board/mvblue/mvblue.c b/board/mvblue/mvblue.c index ee8f3e3015..a979102ab5 100644 --- a/board/mvblue/mvblue.c +++ b/board/mvblue/mvblue.c @@ -76,7 +76,7 @@ int checkboard (void) return 0; } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { long size; long new_bank0_end; diff --git a/board/mvs1/mvs1.c b/board/mvs1/mvs1.c index f8a8cb7578..58b84f5ae1 100644 --- a/board/mvs1/mvs1.c +++ b/board/mvs1/mvs1.c @@ -136,7 +136,7 @@ static void test_dram (unsigned long *start, unsigned long *end) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; diff --git a/board/mx1ads/Makefile b/board/mx1ads/Makefile index 14a8b81c96..b68b1bdd25 100644 --- a/board/mx1ads/Makefile +++ b/board/mx1ads/Makefile @@ -43,7 +43,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/mx1fs2/Makefile b/board/mx1fs2/Makefile index 516a8b90f3..f81f7acd57 100644 --- a/board/mx1fs2/Makefile +++ b/board/mx1fs2/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/mx31ads/Makefile b/board/mx31ads/Makefile index dfadd9685c..a12f39174b 100644 --- a/board/mx31ads/Makefile +++ b/board/mx31ads/Makefile @@ -35,7 +35,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/nc650/nc650.c b/board/nc650/nc650.c index 707e4b97d1..657abc46d8 100644 --- a/board/nc650/nc650.c +++ b/board/nc650/nc650.c @@ -128,7 +128,7 @@ static long int dram_size (long int, long int *, long int); /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; diff --git a/board/netphone/netphone.c b/board/netphone/netphone.c index 1072b3f88a..38eb7c8118 100644 --- a/board/netphone/netphone.c +++ b/board/netphone/netphone.c @@ -404,7 +404,7 @@ void check_ram(unsigned int addr, unsigned int size) } } -long int initdram(int board_type) +phys_size_t initdram(int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; diff --git a/board/netstal/hcu4/Makefile b/board/netstal/hcu4/Makefile index 53df61edbb..6722d53927 100644 --- a/board/netstal/hcu4/Makefile +++ b/board/netstal/hcu4/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/netstal/hcu4/hcu4.c b/board/netstal/hcu4/hcu4.c index dc526fcd7a..c144741822 100644 --- a/board/netstal/hcu4/hcu4.c +++ b/board/netstal/hcu4/hcu4.c @@ -121,15 +121,6 @@ void hcu_led_set(u32 value) } /* - * sdram_init - Dummy implementation for start.S, spd_sdram or initdram - * used for HCUx - */ -void sdram_init(void) -{ - return; -} - -/* * hcu_get_slot */ u32 hcu_get_slot(void) @@ -163,7 +154,7 @@ int misc_init_r(void) return 0; } -long int initdram(int board_type) +phys_size_t initdram(int board_type) { long dram_size = 0; u16 boardVersReg = in_be16((u16 *)HCU_MACH_VERSIONS_REGISTER); diff --git a/board/netstal/hcu5/Makefile b/board/netstal/hcu5/Makefile index 5ffae65ea1..445677104c 100644 --- a/board/netstal/hcu5/Makefile +++ b/board/netstal/hcu5/Makefile @@ -40,7 +40,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/netstal/hcu5/sdram.c b/board/netstal/hcu5/sdram.c index 6b1b53a4d0..80e84aebb8 100644 --- a/board/netstal/hcu5/sdram.c +++ b/board/netstal/hcu5/sdram.c @@ -40,28 +40,6 @@ void hcu_led_set(u32 value); void dcbz_area(u32 start_address, u32 num_bytes); -#define DDR_DCR_BASE 0x10 -#define ddrcfga (DDR_DCR_BASE+0x0) /* DDR configuration address reg */ -#define ddrcfgd (DDR_DCR_BASE+0x1) /* DDR configuration data reg */ - -#define DDR0_01_INT_MASK_MASK 0x000000FF -#define DDR0_00_INT_ACK_ALL 0x7F000000 -#define DDR0_01_INT_MASK_ALL_ON 0x000000FF -#define DDR0_01_INT_MASK_ALL_OFF 0x00000000 - -#define DDR0_17_DLLLOCKREG_MASK 0x00010000 /* Read only */ -#define DDR0_17_DLLLOCKREG_UNLOCKED 0x00000000 -#define DDR0_17_DLLLOCKREG_LOCKED 0x00010000 - -#define DDR0_22 0x16 -/* ECC */ -#define DDR0_22_CTRL_RAW_MASK 0x03000000 -#define DDR0_22_CTRL_RAW_ECC_DISABLE 0x00000000 /* ECC not enabled */ -#define DDR0_22_CTRL_RAW_ECC_CHECK_ONLY 0x01000000 /* ECC no correction */ -#define DDR0_22_CTRL_RAW_NO_ECC_RAM 0x02000000 /* Not a ECC RAM*/ -#define DDR0_22_CTRL_RAW_ECC_ENABLE 0x03000000 /* ECC correcting on */ -#define DDR0_03_CASLAT_DECODE(n) ((((unsigned long)(n))>>16)&0x7) - #define ECC_RAM 0x03267F0B #define NO_ECC_RAM 0x00267F0B @@ -111,11 +89,11 @@ static int wait_for_dlllock(void) /* -----------------------------------------------------------+ * Wait for the DCC master delay line to finish calibration * ----------------------------------------------------------*/ - mtdcr(ddrcfga, DDR0_17); + mtdcr(memcfga, DDR0_17); val = DDR0_17_DLLLOCKREG_UNLOCKED; while (wait != 0xffff) { - val = mfdcr(ddrcfgd); + val = mfdcr(memcfgd); if ((val & DDR0_17_DLLLOCKREG_MASK) == DDR0_17_DLLLOCKREG_LOCKED) /* dlllockreg bit on */ @@ -221,7 +199,7 @@ static void program_ecc(unsigned long start_address, unsigned long num_bytes) * initdram -- 440EPx's DDR controller is a DENALI Core * ************************************************************************/ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { unsigned int dram_size = 0; diff --git a/board/netstal/mcu25/Makefile b/board/netstal/mcu25/Makefile index 53df61edbb..6722d53927 100644 --- a/board/netstal/mcu25/Makefile +++ b/board/netstal/mcu25/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/netstal/mcu25/mcu25.c b/board/netstal/mcu25/mcu25.c index 2b21444e2d..ed171bfeb0 100644 --- a/board/netstal/mcu25/mcu25.c +++ b/board/netstal/mcu25/mcu25.c @@ -128,15 +128,6 @@ void hcu_led_set(u32 value) } /* - * sdram_init - Dummy implementation for start.S, spd_sdram or initdram - * used for HCUx - */ -void sdram_init(void) -{ - return; -} - -/* * hcu_get_slot */ u32 hcu_get_slot(void) @@ -170,7 +161,7 @@ int misc_init_r(void) return 0; } -long int initdram(int board_type) +phys_size_t initdram(int board_type) { unsigned int dram_size = 64*1024*1024; init_ppc405_sdram(dram_size); diff --git a/board/netstar/Makefile b/board/netstar/Makefile index 88da2b9483..8d911b845b 100644 --- a/board/netstar/Makefile +++ b/board/netstar/Makefile @@ -84,7 +84,7 @@ clean: $(obj)crcek.bin distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/netta/netta.c b/board/netta/netta.c index 5a75e53e0d..1183f33ef8 100644 --- a/board/netta/netta.c +++ b/board/netta/netta.c @@ -337,7 +337,7 @@ void check_ram(unsigned int addr, unsigned int size) } } -long int initdram(int board_type) +phys_size_t initdram(int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; diff --git a/board/netta2/netta2.c b/board/netta2/netta2.c index b216c5a8ef..a97c14cee7 100644 --- a/board/netta2/netta2.c +++ b/board/netta2/netta2.c @@ -402,7 +402,7 @@ void check_ram(unsigned int addr, unsigned int size) } } -long int initdram(int board_type) +phys_size_t initdram(int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; diff --git a/board/netvia/netvia.c b/board/netvia/netvia.c index 856b7769cd..4140bac861 100644 --- a/board/netvia/netvia.c +++ b/board/netvia/netvia.c @@ -245,7 +245,7 @@ int checkboard(void) #define MCR_MCLF(x) ((unsigned long)((x) & 15) << (31 - 23)) #define MCR_MCLF_MASK MCR_MCLF(15) -long int initdram(int board_type) +phys_size_t initdram(int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; diff --git a/board/ns9750dev/Makefile b/board/ns9750dev/Makefile index b5203775a8..2ffed99f7a 100644 --- a/board/ns9750dev/Makefile +++ b/board/ns9750dev/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/nx823/nx823.c b/board/nx823/nx823.c index 4a426ec498..18840ff48f 100644 --- a/board/nx823/nx823.c +++ b/board/nx823/nx823.c @@ -157,7 +157,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; diff --git a/board/o2dnt/Makefile b/board/o2dnt/Makefile index f356bd39c7..58afd7b659 100644 --- a/board/o2dnt/Makefile +++ b/board/o2dnt/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/o2dnt/o2dnt.c b/board/o2dnt/o2dnt.c index 81a27002f4..a4eed3a436 100644 --- a/board/o2dnt/o2dnt.c +++ b/board/o2dnt/o2dnt.c @@ -67,7 +67,7 @@ static void sdram_start (int hi_addr) * use of CFG_SDRAM_BASE. The code does not work if CFG_SDRAM_BASE * is something else than 0x00000000. */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { ulong dramsize = 0; ulong dramsize2 = 0; diff --git a/board/omap1510inn/Makefile b/board/omap1510inn/Makefile index fe4b8d6524..cd222dbc16 100644 --- a/board/omap1510inn/Makefile +++ b/board/omap1510inn/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/omap1610inn/Makefile b/board/omap1610inn/Makefile index c375bc1353..1adcad64e0 100644 --- a/board/omap1610inn/Makefile +++ b/board/omap1610inn/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/omap2420h4/Makefile b/board/omap2420h4/Makefile index 2f2645a76b..f39eef0adb 100644 --- a/board/omap2420h4/Makefile +++ b/board/omap2420h4/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/omap5912osk/Makefile b/board/omap5912osk/Makefile index 8e14c699d3..e9bb0ecd72 100644 --- a/board/omap5912osk/Makefile +++ b/board/omap5912osk/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/omap730p2/Makefile b/board/omap730p2/Makefile index 104ff4e912..0d7ae6145c 100644 --- a/board/omap730p2/Makefile +++ b/board/omap730p2/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/oxc/oxc.c b/board/oxc/oxc.c index 6cc3cc5a3e..b61d399512 100644 --- a/board/oxc/oxc.c +++ b/board/oxc/oxc.c @@ -34,7 +34,7 @@ int checkboard (void) return 0; } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { #ifndef CFG_RAMBOOT long size; diff --git a/board/pb1x00/lowlevel_init.S b/board/pb1x00/lowlevel_init.S index 98bb394acb..b145e438f0 100644 --- a/board/pb1x00/lowlevel_init.S +++ b/board/pb1x00/lowlevel_init.S @@ -1,7 +1,6 @@ /* Memory sub-system initialization code */ #include <config.h> -#include <version.h> #include <asm/regdef.h> #include <asm/au1x00.h> #include <asm/mipsregs.h> diff --git a/board/pb1x00/pb1x00.c b/board/pb1x00/pb1x00.c index 536c9544f5..82e2613e2d 100644 --- a/board/pb1x00/pb1x00.c +++ b/board/pb1x00/pb1x00.c @@ -27,7 +27,7 @@ #include <asm/mipsregs.h> #include <asm/io.h> -long int initdram(int board_type) +phys_size_t initdram(int board_type) { /* Sdram is setup by assembler code */ /* If memory could be changed, we should return the true value here */ @@ -51,7 +51,7 @@ int checkboard (void) *sys_counter = 0x100; /* Enable 32 kHz oscillator for RTC/TOY */ - proc_id = read_32bit_cp0_register(CP0_PRID); + proc_id = read_c0_prid(); switch (proc_id >> 24) { case 0: diff --git a/board/pcippc2/pcippc2.c b/board/pcippc2/pcippc2.c index 1148c6aa27..c1917c11b4 100644 --- a/board/pcippc2/pcippc2.c +++ b/board/pcippc2/pcippc2.c @@ -63,7 +63,7 @@ u32 pcippc2_sdram_size (void) return in32 (REG (CPC0, RGBAN1)); } -long initdram (int board_type) +phys_size_t initdram (int board_type) { return cpc710_ram_init (); } diff --git a/board/pcs440ep/Makefile b/board/pcs440ep/Makefile index 2a3cfbe1b3..40446884c8 100644 --- a/board/pcs440ep/Makefile +++ b/board/pcs440ep/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/pcs440ep/pcs440ep.c b/board/pcs440ep/pcs440ep.c index 620000a229..f66f3f233e 100644 --- a/board/pcs440ep/pcs440ep.c +++ b/board/pcs440ep/pcs440ep.c @@ -537,7 +537,7 @@ void spd_ddr_init_hang (void) } } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { long dram_size = 0; @@ -553,44 +553,6 @@ long int initdram (int board_type) return dram_size; } -#if defined(CFG_DRAM_TEST) -int testdram(void) -{ - unsigned long *mem = (unsigned long *)0; - const unsigned long kend = (1024 / sizeof(unsigned long)); - unsigned long k, n; - - mtmsr(0); - - for (k = 0; k < CFG_KBYTES_SDRAM; - ++k, mem += (1024 / sizeof(unsigned long))) { - if ((k & 1023) == 0) { - printf("%3d MB\r", k / 1024); - } - - memset(mem, 0xaaaaaaaa, 1024); - for (n = 0; n < kend; ++n) { - if (mem[n] != 0xaaaaaaaa) { - printf("SDRAM test fails at: %08x\n", - (uint) & mem[n]); - return 1; - } - } - - memset(mem, 0x55555555, 1024); - for (n = 0; n < kend; ++n) { - if (mem[n] != 0x55555555) { - printf("SDRAM test fails at: %08x\n", - (uint) & mem[n]); - return 1; - } - } - } - printf("SDRAM test passes\n"); - return 0; -} -#endif - /************************************************************************* * pci_pre_init * diff --git a/board/pleb2/Makefile b/board/pleb2/Makefile index fef0eb3094..faa26911b8 100644 --- a/board/pleb2/Makefile +++ b/board/pleb2/Makefile @@ -40,7 +40,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/pm520/Makefile b/board/pm520/Makefile index 7762ed3015..c94e24fc6a 100644 --- a/board/pm520/Makefile +++ b/board/pm520/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/pm520/pm520.c b/board/pm520/pm520.c index 14c3f1d442..83d9bcd025 100644 --- a/board/pm520/pm520.c +++ b/board/pm520/pm520.c @@ -84,7 +84,7 @@ static void sdram_start (int hi_addr) */ #if defined(CONFIG_MPC5200) -long int initdram (int board_type) +phys_size_t initdram (int board_type) { ulong dramsize = 0; ulong dramsize2 = 0; @@ -187,7 +187,7 @@ long int initdram (int board_type) #elif defined(CONFIG_MGT5100) -long int initdram (int board_type) +phys_size_t initdram (int board_type) { ulong dramsize = 0; #ifndef CFG_RAMBOOT diff --git a/board/pm826/pm826.c b/board/pm826/pm826.c index 1420e649d2..7ee3ab65c0 100644 --- a/board/pm826/pm826.c +++ b/board/pm826/pm826.c @@ -279,7 +279,7 @@ static long int try_init (volatile memctl8260_t * memctl, ulong sdmr, } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8260_t *memctl = &immap->im_memctl; diff --git a/board/pm828/pm828.c b/board/pm828/pm828.c index 98cd80bc8d..6038e9758d 100644 --- a/board/pm828/pm828.c +++ b/board/pm828/pm828.c @@ -312,7 +312,7 @@ static long int try_init (volatile memctl8260_t * memctl, ulong sdmr, } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8260_t *memctl = &immap->im_memctl; diff --git a/board/pm854/Makefile b/board/pm854/Makefile index be243885be..2d71cbc516 100644 --- a/board/pm854/Makefile +++ b/board/pm854/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(OBJS) $(SOBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/pm854/law.c b/board/pm854/law.c index cb6b37f95d..d74d17abdf 100644 --- a/board/pm854/law.c +++ b/board/pm854/law.c @@ -46,13 +46,13 @@ struct law_entry law_table[] = { #ifndef CONFIG_SPD_EEPROM - SET_LAW_ENTRY(1, CFG_DDR_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_DDR), + SET_LAW(CFG_DDR_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_DDR), #endif - SET_LAW_ENTRY(2, CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), + SET_LAW(CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), /* This is not so much the SDRAM map as it is the whole localbus map. */ - SET_LAW_ENTRY(3, CFG_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC), - SET_LAW_ENTRY(4, CFG_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI), - SET_LAW_ENTRY(5, CFG_RIO_MEM_BASE, LAWAR_SIZE_512M, LAW_TRGT_IF_RIO), + SET_LAW(CFG_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC), + SET_LAW(CFG_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI), + SET_LAW(CFG_RIO_MEM_BASE, LAWAR_SIZE_512M, LAW_TRGT_IF_RIO), }; int num_law_entries = ARRAY_SIZE(law_table); diff --git a/board/pm854/pm854.c b/board/pm854/pm854.c index 5d3252573e..555f6c0caa 100644 --- a/board/pm854/pm854.c +++ b/board/pm854/pm854.c @@ -71,7 +71,7 @@ int checkboard (void) } -long int +phys_size_t initdram(int board_type) { long dram_size = 0; diff --git a/board/pm856/Makefile b/board/pm856/Makefile index be243885be..2d71cbc516 100644 --- a/board/pm856/Makefile +++ b/board/pm856/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(OBJS) $(SOBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/pm856/law.c b/board/pm856/law.c index cb6b37f95d..d74d17abdf 100644 --- a/board/pm856/law.c +++ b/board/pm856/law.c @@ -46,13 +46,13 @@ struct law_entry law_table[] = { #ifndef CONFIG_SPD_EEPROM - SET_LAW_ENTRY(1, CFG_DDR_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_DDR), + SET_LAW(CFG_DDR_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_DDR), #endif - SET_LAW_ENTRY(2, CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), + SET_LAW(CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), /* This is not so much the SDRAM map as it is the whole localbus map. */ - SET_LAW_ENTRY(3, CFG_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC), - SET_LAW_ENTRY(4, CFG_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI), - SET_LAW_ENTRY(5, CFG_RIO_MEM_BASE, LAWAR_SIZE_512M, LAW_TRGT_IF_RIO), + SET_LAW(CFG_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC), + SET_LAW(CFG_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI), + SET_LAW(CFG_RIO_MEM_BASE, LAWAR_SIZE_512M, LAW_TRGT_IF_RIO), }; int num_law_entries = ARRAY_SIZE(law_table); diff --git a/board/pm856/pm856.c b/board/pm856/pm856.c index 6386abcd3f..bf325f89ef 100644 --- a/board/pm856/pm856.c +++ b/board/pm856/pm856.c @@ -225,7 +225,7 @@ int checkboard (void) } -long int +phys_size_t initdram(int board_type) { long dram_size = 0; diff --git a/board/pn62/pn62.c b/board/pn62/pn62.c index b2f348d4d6..d905b2965c 100644 --- a/board/pn62/pn62.c +++ b/board/pn62/pn62.c @@ -75,7 +75,7 @@ int checkboard (void) return 0; } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { long size; long new_bank0_end; diff --git a/board/ppmc7xx/Makefile b/board/ppmc7xx/Makefile index 5fbefeb71c..22332fb3dc 100644 --- a/board/ppmc7xx/Makefile +++ b/board/ppmc7xx/Makefile @@ -40,7 +40,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/ppmc7xx/ppmc7xx.c b/board/ppmc7xx/ppmc7xx.c index 402ac5e201..061e01ec4f 100644 --- a/board/ppmc7xx/ppmc7xx.c +++ b/board/ppmc7xx/ppmc7xx.c @@ -29,7 +29,7 @@ extern void _start_warm(void); * the SDRAM was already initialised by board_asm_init (see init.S) so we just * return the size of RAM. */ -long initdram( int board_type ) +phys_size_t initdram( int board_type ) { return CFG_SDRAM_SIZE; } diff --git a/board/ppmc8260/Makefile b/board/ppmc8260/Makefile index 7fd545b9d5..1d56d16183 100644 --- a/board/ppmc8260/Makefile +++ b/board/ppmc8260/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/ppmc8260/ppmc8260.c b/board/ppmc8260/ppmc8260.c index 2b20c26f17..f3c85096b3 100644 --- a/board/ppmc8260/ppmc8260.c +++ b/board/ppmc8260/ppmc8260.c @@ -199,7 +199,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8260_t *memctl = &immap->im_memctl; diff --git a/board/prodrive/alpr/Makefile b/board/prodrive/alpr/Makefile index 00dc180bbd..ef3accbf18 100644 --- a/board/prodrive/alpr/Makefile +++ b/board/prodrive/alpr/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend *~ + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/prodrive/alpr/alpr.c b/board/prodrive/alpr/alpr.c index 287f32e587..8d60936881 100644 --- a/board/prodrive/alpr/alpr.c +++ b/board/prodrive/alpr/alpr.c @@ -132,36 +132,6 @@ int checkboard (void) return (0); } -#if defined(CFG_DRAM_TEST) -int testdram (void) -{ - uint *pstart = (uint *) 0x00000000; - uint *pend = (uint *) 0x08000000; - uint *p; - - for (p = pstart; p < pend; p++) - *p = 0xaaaaaaaa; - - for (p = pstart; p < pend; p++) { - if (*p != 0xaaaaaaaa) { - printf ("SDRAM test fails at: %08x\n", (uint) p); - return 1; - } - } - - for (p = pstart; p < pend; p++) - *p = 0x55555555; - - for (p = pstart; p < pend; p++) { - if (*p != 0x55555555) { - printf ("SDRAM test fails at: %08x\n", (uint) p); - return 1; - } - } - return 0; -} -#endif - /************************************************************************* * pci_pre_init * diff --git a/board/prodrive/p3mx/Makefile b/board/prodrive/p3mx/Makefile index bf74a5a83b..8456df3630 100644 --- a/board/prodrive/p3mx/Makefile +++ b/board/prodrive/p3mx/Makefile @@ -43,7 +43,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend *~ + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/prodrive/p3mx/sdram_init.c b/board/prodrive/p3mx/sdram_init.c index 0464860424..d881d38079 100644 --- a/board/prodrive/p3mx/sdram_init.c +++ b/board/prodrive/p3mx/sdram_init.c @@ -160,7 +160,7 @@ long int dram_size (long int *base, long int maxsize) #define SDRAM_NOP 0x5 #define SDRAM_SELF_REFRESH 0x7 -long int initdram (int board_type) +phys_size_t initdram (int board_type) { int tmp; int start; diff --git a/board/prodrive/p3p440/Makefile b/board/prodrive/p3p440/Makefile index 261e5d49cc..b93f2c3890 100644 --- a/board/prodrive/p3p440/Makefile +++ b/board/prodrive/p3p440/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/prodrive/pdnb3/Makefile b/board/prodrive/pdnb3/Makefile index 096db6f7af..d07f25f981 100644 --- a/board/prodrive/pdnb3/Makefile +++ b/board/prodrive/pdnb3/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/psyent/pci5441/Makefile b/board/psyent/pci5441/Makefile index 3639cbaf58..301b4a0a5d 100644 --- a/board/psyent/pci5441/Makefile +++ b/board/psyent/pci5441/Makefile @@ -43,7 +43,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/psyent/pci5441/pci5441.c b/board/psyent/pci5441/pci5441.c index ea80dd1395..0afef6f967 100644 --- a/board/psyent/pci5441/pci5441.c +++ b/board/psyent/pci5441/pci5441.c @@ -34,7 +34,7 @@ int checkboard (void) return 0; } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { return (0); } diff --git a/board/psyent/pk1c20/Makefile b/board/psyent/pk1c20/Makefile index 2568a68ede..e23a17bc31 100644 --- a/board/psyent/pk1c20/Makefile +++ b/board/psyent/pk1c20/Makefile @@ -43,7 +43,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/psyent/pk1c20/pk1c20.c b/board/psyent/pk1c20/pk1c20.c index 1924ae3d17..95b48bc57b 100644 --- a/board/psyent/pk1c20/pk1c20.c +++ b/board/psyent/pk1c20/pk1c20.c @@ -34,7 +34,7 @@ int checkboard (void) return 0; } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { return (0); } diff --git a/board/purple/lowlevel_init.S b/board/purple/lowlevel_init.S index b9d03fc15e..1bd3edb815 100644 --- a/board/purple/lowlevel_init.S +++ b/board/purple/lowlevel_init.S @@ -23,7 +23,6 @@ */ #include <config.h> -#include <version.h> #include <asm/regdef.h> #define MC_IOGP 0xBF800800 diff --git a/board/purple/purple.c b/board/purple/purple.c index 89cb906972..9775591129 100644 --- a/board/purple/purple.c +++ b/board/purple/purple.c @@ -85,16 +85,16 @@ static void sdram_timing_init (ulong size) while (p4 < 32 && done == 0) { WRITE_MC_IOGP_1; - for (addr = KSEG1 + 0x4000; - addr < KSEG1ADDR (size); + for (addr = CKSEG1 + 0x4000; + addr < CKSEG1ADDR (size); addr = addr + 4) { *(uint *) addr = 0xaa55aa55; } pass = 1; - for (addr = KSEG1 + 0x4000; - addr < KSEG1ADDR (size) && pass == 1; + for (addr = CKSEG1 + 0x4000; + addr < CKSEG1ADDR (size) && pass == 1; addr = addr + 4) { if (*(uint *) addr != 0xaa55aa55) pass = 0; @@ -124,7 +124,7 @@ static void sdram_timing_init (ulong size) } } -long int initdram(int board_type) +phys_size_t initdram(int board_type) { /* The only supported number of SDRAM banks is 4. */ @@ -138,7 +138,7 @@ long int initdram(int board_type) ulong size = (1 << (rows + cols)) * (1 << (dw - 1)) * CFG_NB; void (* sdram_init) (ulong); - sdram_init = (void (*)(ulong)) KSEG0ADDR(&sdram_timing_init); + sdram_init = (void (*)(ulong)) CKSEG0ADDR(&sdram_timing_init); sdram_init(0x10000); @@ -260,14 +260,14 @@ void copy_code (ulong dest_addr) /* flush caches */ - start = KSEG0; + start = CKSEG0; end = start + CFG_DCACHE_SIZE; while(start < end) { cache_unroll(start,Index_Writeback_Inv_D); start += CFG_CACHELINE_SIZE; } - start = KSEG0; + start = CKSEG0; end = start + CFG_ICACHE_SIZE; while(start < end) { cache_unroll(start,Index_Invalidate_I); diff --git a/board/pxa255_idp/Makefile b/board/pxa255_idp/Makefile index 32399f0e94..4892b42bc1 100644 --- a/board/pxa255_idp/Makefile +++ b/board/pxa255_idp/Makefile @@ -40,7 +40,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/qemu-mips/lowlevel_init.S b/board/qemu-mips/lowlevel_init.S index 836e0271a1..b0f7072701 100644 --- a/board/qemu-mips/lowlevel_init.S +++ b/board/qemu-mips/lowlevel_init.S @@ -1,7 +1,6 @@ /* Memory sub-system initialization code */ #include <config.h> -#include <version.h> #include <asm/regdef.h> #include <asm/mipsregs.h> diff --git a/board/qemu-mips/qemu-mips.c b/board/qemu-mips/qemu-mips.c index 68690743d6..7a69a00f99 100644 --- a/board/qemu-mips/qemu-mips.c +++ b/board/qemu-mips/qemu-mips.c @@ -26,7 +26,7 @@ #include <asm/mipsregs.h> #include <asm/io.h> -long int initdram(int board_type) +phys_size_t initdram(int board_type) { /* Sdram is setup by assembler code */ /* If memory could be changed, we should return the true value here */ @@ -38,7 +38,7 @@ int checkboard(void) u32 proc_id; u32 config1; - proc_id = read_32bit_cp0_register(CP0_PRID); + proc_id = read_c0_prid(); printf("Board: Qemu -M mips CPU: "); switch (proc_id) { case 0x00018000: @@ -51,7 +51,7 @@ int checkboard(void) printf("4KEc"); break; case 0x00019300: - config1 = read_mips32_cp0_config1(); + config1 = read_c0_config1(); if (config1 & 1) printf("24Kf"); else @@ -64,7 +64,7 @@ int checkboard(void) printf("R4000"); break; case 0x00018100: - config1 = read_mips32_cp0_config1(); + config1 = read_c0_config1(); if (config1 & 1) printf("5Kf"); else diff --git a/board/quad100hd/Makefile b/board/quad100hd/Makefile new file mode 100644 index 0000000000..f9db112e7c --- /dev/null +++ b/board/quad100hd/Makefile @@ -0,0 +1,51 @@ +# +# (C) Copyright 2007 +# Stefan Roese, DENX Software Engineering, sr@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS = $(BOARD).o nand.o +SOBJS = + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/quad100hd/config.mk b/board/quad100hd/config.mk new file mode 100644 index 0000000000..1bdf5e4fcf --- /dev/null +++ b/board/quad100hd/config.mk @@ -0,0 +1,24 @@ +# +# (C) Copyright 2000 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +TEXT_BASE = 0xFFFC0000 diff --git a/board/quad100hd/nand.c b/board/quad100hd/nand.c new file mode 100644 index 0000000000..a36b89dd79 --- /dev/null +++ b/board/quad100hd/nand.c @@ -0,0 +1,79 @@ +/* + * (C) Copyright 2008 + * Gary Jennejohn, DENX Software Engineering GmbH, garyj@denx.de + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <config.h> +#if defined(CONFIG_CMD_NAND) +#include <asm/gpio.h> +#include <nand.h> + +/* + * hardware specific access to control-lines + */ +static void quad100hd_hwcontrol(struct mtd_info *mtd, int cmd) +{ + switch(cmd) { + case NAND_CTL_SETCLE: + gpio_write_bit(CFG_NAND_CLE, 1); + break; + case NAND_CTL_CLRCLE: + gpio_write_bit(CFG_NAND_CLE, 0); + break; + + case NAND_CTL_SETALE: + gpio_write_bit(CFG_NAND_ALE, 1); + break; + case NAND_CTL_CLRALE: + gpio_write_bit(CFG_NAND_ALE, 0); + break; + + case NAND_CTL_SETNCE: + gpio_write_bit(CFG_NAND_CE, 0); + break; + case NAND_CTL_CLRNCE: + gpio_write_bit(CFG_NAND_CE, 1); + break; + } +} + +static int quad100hd_nand_ready(struct mtd_info *mtd) +{ + return gpio_read_in_bit(CFG_NAND_RDY); +} + +/* + * Main initialization routine + */ +int board_nand_init(struct nand_chip *nand) +{ + /* Set address of hardware control function */ + nand->hwcontrol = quad100hd_hwcontrol; + nand->dev_ready = quad100hd_nand_ready; + nand->eccmode = NAND_ECC_SOFT; + /* 15 us command delay time */ + nand->chip_delay = 20; + + /* Return happy */ + return 0; +} +#endif /* CONFIG_CMD_NAND */ diff --git a/board/quad100hd/quad100hd.c b/board/quad100hd/quad100hd.c new file mode 100644 index 0000000000..81186782b2 --- /dev/null +++ b/board/quad100hd/quad100hd.c @@ -0,0 +1,93 @@ +/* + * (C) Copyright 2008 + * Gary Jennejohn, DENX Software Engineering GmbH, garyj@denx.de. + * + * Based in part on board/icecube/icecube.c from PPCBoot + * (C) Copyright 2003 Intrinsyc Software + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <command.h> +#include <malloc.h> +#include <environment.h> +#include <logbuff.h> +#include <post.h> + +#include <asm/processor.h> +#include <asm/io.h> +#include <asm/gpio.h> + +DECLARE_GLOBAL_DATA_PTR; + +int board_early_init_f(void) +{ + /* taken from PPCBoot */ + mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */ + mtdcr(uicer, 0x00000000); /* disable all ints */ + mtdcr(uiccr, 0x00000000); + mtdcr(uicpr, 0xFFFF7FFE); /* set int polarities */ + mtdcr(uictr, 0x00000000); /* set int trigger levels */ + mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */ + mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority */ + + mtdcr(CPC0_SRR, 0x00040000); /* Hold PCI bridge in reset */ + + return 0; +} + +/* + * Check Board Identity: + */ +int checkboard(void) +{ + char *s = getenv("serial#"); +#ifdef DISPLAY_BOARD_INFO + sys_info_t sysinfo; +#endif + + puts("Board: Quad100hd"); + + if (s != NULL) { + puts(", serial# "); + puts(s); + } + putc('\n'); + +#ifdef DISPLAY_BOARD_INFO + /* taken from ppcboot */ + get_sys_info(&sysinfo); + + printf("\tVCO: %lu MHz\n", sysinfo.freqVCOMhz); + printf("\tCPU: %lu MHz\n", sysinfo.freqProcessor / 1000000); + printf("\tPLB: %lu MHz\n", sysinfo.freqPLB / 1000000); + printf("\tOPB: %lu MHz\n", sysinfo.freqOPB / 1000000); + printf("\tEPB: %lu MHz\n", sysinfo.freqPLB / (sysinfo.pllExtBusDiv * + 1000000)); + printf("\tPCI: %lu MHz\n", sysinfo.freqPCI / 1000000); +#endif + + return 0; +} + +phys_size_t initdram(int board_type) +{ + return CFG_SDRAM_SIZE; +} diff --git a/board/quad100hd/u-boot.lds b/board/quad100hd/u-boot.lds new file mode 100644 index 0000000000..195d91b712 --- /dev/null +++ b/board/quad100hd/u-boot.lds @@ -0,0 +1,133 @@ +/* + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_ARCH(powerpc) +SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib); +/* Do we need any of these for elf? + __DYNAMIC = 0; */ +SECTIONS +{ + .resetvec 0xFFFFFFFC : + { + *(.resetvec) + } = 0xffff + + /* Read-only sections, merged into text segment: */ + . = + SIZEOF_HEADERS; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .rel.text : { *(.rel.text) } + .rela.text : { *(.rela.text) } + .rel.data : { *(.rel.data) } + .rela.data : { *(.rela.data) } + .rel.rodata : { *(.rel.rodata) } + .rela.rodata : { *(.rela.rodata) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : { *(.init) } + .plt : { *(.plt) } + .text : + { + cpu/ppc4xx/start.o (.text) + + *(.text) + *(.fixup) + *(.got1) + } + _etext = .; + PROVIDE (etext = .); + .rodata : + { + *(.rodata) + *(.rodata1) + *(.rodata.str1.4) + } + .fini : { *(.fini) } =0 + .ctors : { *(.ctors) } + .dtors : { *(.dtors) } + + /* Read-write section, merged into data segment: */ + . = (. + 0x00FF) & 0xFFFFFF00; + _erotext = .; + PROVIDE (erotext = .); + .reloc : + { + *(.got) + _GOT2_TABLE_ = .; + *(.got2) + _FIXUP_TABLE_ = .; + *(.fixup) + } + __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; + __fixup_entries = (. - _FIXUP_TABLE_)>>2; + + .data : + { + *(.data) + *(.data1) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } + _edata = .; + PROVIDE (edata = .); + + . = .; + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + . = .; + __start___ex_table = .; + __ex_table : { *(__ex_table) } + __stop___ex_table = .; + + . = ALIGN(256); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(256); + __init_end = .; + + __bss_start = .; + .bss (NOLOAD) : + { + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss) + *(COMMON) + } + _end = . ; + PROVIDE (end = .); +} diff --git a/board/quantum/quantum.c b/board/quantum/quantum.c index afa6e113d8..345f127b63 100644 --- a/board/quantum/quantum.c +++ b/board/quantum/quantum.c @@ -102,7 +102,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; diff --git a/board/r2dplus/Makefile b/board/r2dplus/Makefile index ed609ea67e..e96a8aa986 100644 --- a/board/r2dplus/Makefile +++ b/board/r2dplus/Makefile @@ -19,25 +19,29 @@ # include $(TOPDIR)/config.mk -LIB = lib$(BOARD).a +LIB = $(obj)lib$(BOARD).a -OBJS := r2dplus.o +COBJS := r2dplus.o SOBJS := lowlevel_init.o +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend -################################################################# +######################################################################### -.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) - $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@ +# defines $(obj).depend target +include $(SRCTREE)/rules.mk --include .depend +sinclude $(obj).depend -################################################################# +######################################################################### diff --git a/board/r2dplus/r2dplus.c b/board/r2dplus/r2dplus.c index 2ee3ea2f3f..8fb8ff667a 100644 --- a/board/r2dplus/r2dplus.c +++ b/board/r2dplus/r2dplus.c @@ -24,6 +24,7 @@ #include <common.h> #include <ide.h> #include <asm/processor.h> +#include <asm/io.h> #include <asm/pci.h> int checkboard(void) @@ -37,7 +38,7 @@ int board_init(void) return 0; } -int dram_init (void) +int dram_init(void) { DECLARE_GLOBAL_DATA_PTR; @@ -52,25 +53,26 @@ int board_late_init(void) return 0; } -#define FPGA_BASE 0xA4000000 -#define FPGA_CFCTL (FPGA_BASE + 0x04) -#define FPGA_CFPOW (FPGA_BASE + 0x06) -#define FPGA_CFCDINTCLR (FPGA_BASE + 0x2A) +#define FPGA_BASE 0xA4000000 +#define FPGA_CFCTL (FPGA_BASE + 0x04) +#define CFCTL_EN (0x432) +#define FPGA_CFPOW (FPGA_BASE + 0x06) +#define CFPOW_ON (0x02) +#define FPGA_CFCDINTCLR (FPGA_BASE + 0x2A) +#define CFCDINTCLR_EN (0x01) -void ide_set_reset (int idereset) +void ide_set_reset(int idereset) { /* if reset = 1 IDE reset will be asserted */ - if (idereset){ - (*(vu_short *)FPGA_CFCTL) = 0x432; - (*(vu_short *)FPGA_CFPOW) |= 0x02; - (*(vu_short *)FPGA_CFCDINTCLR) = 0x01; + if (idereset) { + outw(CFCTL_EN, FPGA_CFCTL); /* CF enable */ + outw(inw(FPGA_CFPOW)|CFPOW_ON, FPGA_CFPOW); /* Power OM */ + outw(CFCDINTCLR_EN, FPGA_CFCDINTCLR); /* Int clear */ } } -#if defined(CONFIG_PCI) static struct pci_controller hose; void pci_init_board(void) { - pci_sh7751_init( &hose ); + pci_sh7751_init(&hose); } -#endif /* CONFIG_PCI */ diff --git a/board/r360mpi/r360mpi.c b/board/r360mpi/r360mpi.c index ffb4c0ecf9..c51e412f46 100644 --- a/board/r360mpi/r360mpi.c +++ b/board/r360mpi/r360mpi.c @@ -103,7 +103,7 @@ static long int dram_size (long int, long int *, long int); /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; diff --git a/board/r7780mp/Makefile b/board/r7780mp/Makefile index 554dca1d5f..c100e7e2ad 100644 --- a/board/r7780mp/Makefile +++ b/board/r7780mp/Makefile @@ -20,25 +20,29 @@ include $(TOPDIR)/config.mk -LIB = lib$(BOARD).a +LIB = $(obj)lib$(BOARD).a -OBJS := r7780mp.o +COBJS := r7780mp.o SOBJS := lowlevel_init.o +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### -.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c) - $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@ +# defines $(obj).depend target +include $(SRCTREE)/rules.mk --include .depend +sinclude $(obj).depend ######################################################################### diff --git a/board/r7780mp/r7780mp.c b/board/r7780mp/r7780mp.c index 1a37711d6f..19c35d3494 100644 --- a/board/r7780mp/r7780mp.c +++ b/board/r7780mp/r7780mp.c @@ -38,12 +38,12 @@ int checkboard(void) int board_init(void) { /* SCIF Enable */ - *(vu_short*)PHCR = 0x0000; + writew(0x0, PHCR); return 0; } -int dram_init (void) +int dram_init(void) { DECLARE_GLOBAL_DATA_PTR; @@ -53,29 +53,27 @@ int dram_init (void) return 0; } -void led_set_state (unsigned short value) +void led_set_state(unsigned short value) { } -void ide_set_reset (int idereset) +void ide_set_reset(int idereset) { /* if reset = 1 IDE reset will be asserted */ - if (idereset){ - (*(vu_short *)FPGA_CFCTL) = 0x432; + if (idereset) { + writew(0x432, FPGA_CFCTL); #if defined(CONFIG_R7780MP) - (*(vu_short *)FPGA_CFPOW) |= 0x01; + writew(inw(FPGA_CFPOW)|0x01, FPGA_CFPOW); #else - (*(vu_short *)FPGA_CFPOW) |= 0x02; + writew(inw(FPGA_CFPOW)|0x02, FPGA_CFPOW); #endif - (*(vu_short *)FPGA_CFCDINTCLR) = 0x01; + writew(0x01, FPGA_CFCDINTCLR); } } -#if defined(CONFIG_PCI) static struct pci_controller hose; void pci_init_board(void) { - pci_sh7780_init( &hose ); + pci_sh7780_init(&hose); } -#endif diff --git a/board/rattler/Makefile b/board/rattler/Makefile index be7e213a9b..dc40d9b94a 100644 --- a/board/rattler/Makefile +++ b/board/rattler/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/rattler/rattler.c b/board/rattler/rattler.c index be7977dec4..ad75c21561 100644 --- a/board/rattler/rattler.c +++ b/board/rattler/rattler.c @@ -185,7 +185,7 @@ const iop_conf_t iop_conf_tab[4][32] = { } }; -long int initdram(int board_type) +phys_size_t initdram(int board_type) { long int msize = CFG_SDRAM_SIZE; diff --git a/board/rbc823/rbc823.c b/board/rbc823/rbc823.c index 9e60c2b646..5b62af6146 100644 --- a/board/rbc823/rbc823.c +++ b/board/rbc823/rbc823.c @@ -142,7 +142,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; diff --git a/board/rmu/rmu.c b/board/rmu/rmu.c index 8cb03c7f84..e22dc52587 100644 --- a/board/rmu/rmu.c +++ b/board/rmu/rmu.c @@ -92,7 +92,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; diff --git a/board/rpxsuper/Makefile b/board/rpxsuper/Makefile index 4b0dc25d57..a749e26cce 100644 --- a/board/rpxsuper/Makefile +++ b/board/rpxsuper/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/rpxsuper/rpxsuper.c b/board/rpxsuper/rpxsuper.c index b4331f1cde..f633c5c476 100644 --- a/board/rpxsuper/rpxsuper.c +++ b/board/rpxsuper/rpxsuper.c @@ -225,7 +225,7 @@ int checkboard(void) /* ------------------------------------------------------------------------- */ -long int initdram(int board_type) +phys_size_t initdram(int board_type) { volatile immap_t *immap = (immap_t *)CFG_IMMR; volatile memctl8260_t *memctl = &immap->im_memctl; diff --git a/board/rsdproto/rsdproto.c b/board/rsdproto/rsdproto.c index 312d4b8605..eeec3b4dcd 100644 --- a/board/rsdproto/rsdproto.c +++ b/board/rsdproto/rsdproto.c @@ -282,7 +282,7 @@ int misc_init_f (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8260_t *memctl = &immap->im_memctl; diff --git a/board/sacsng/Makefile b/board/sacsng/Makefile index 9bb9c15525..de8a5b2a0d 100644 --- a/board/sacsng/Makefile +++ b/board/sacsng/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/sacsng/sacsng.c b/board/sacsng/sacsng.c index 25209e0546..c00f14ee60 100644 --- a/board/sacsng/sacsng.c +++ b/board/sacsng/sacsng.c @@ -22,8 +22,8 @@ * MA 02111-1307 USA */ -#include <asm/u-boot.h> #include <common.h> +#include <asm/u-boot.h> #include <ioports.h> #include <mpc8260.h> #include <i2c.h> @@ -159,7 +159,7 @@ int checkboard(void) /* ------------------------------------------------------------------------- */ -long int initdram(int board_type) +phys_size_t initdram(int board_type) { volatile immap_t *immap = (immap_t *)CFG_IMMR; volatile memctl8260_t *memctl = &immap->im_memctl; @@ -842,37 +842,30 @@ void show_boot_progress (int status) #define SPI_ADC_CS_MASK 0x00000800 #define SPI_DAC_CS_MASK 0x00001000 -void spi_adc_chipsel(int cs) +static const u32 cs_mask[] = { + SPI_ADC_CS_MASK, + SPI_DAC_CS_MASK, +}; + +int spi_cs_is_valid(unsigned int bus, unsigned int cs) +{ + return bus == 0 && cs < sizeof(cs_mask) / sizeof(cs_mask[0]); +} + +void spi_cs_activate(struct spi_slave *slave) { volatile ioport_t *iopd = ioport_addr((immap_t *)CFG_IMMR, 3 /* port D */); - if(cs) - iopd->pdat &= ~SPI_ADC_CS_MASK; /* activate the chip select */ - else - iopd->pdat |= SPI_ADC_CS_MASK; /* deactivate the chip select */ + iopd->pdat &= ~cs_mask[slave->cs]; } -void spi_dac_chipsel(int cs) +void spi_cs_deactivate(struct spi_slave *slave) { volatile ioport_t *iopd = ioport_addr((immap_t *)CFG_IMMR, 3 /* port D */); - if(cs) - iopd->pdat &= ~SPI_DAC_CS_MASK; /* activate the chip select */ - else - iopd->pdat |= SPI_DAC_CS_MASK; /* deactivate the chip select */ + iopd->pdat |= cs_mask[slave->cs]; } -/* - * The SPI command uses this table of functions for controlling the SPI - * chip selects: it calls the appropriate function to control the SPI - * chip selects. - */ -spi_chipsel_type spi_chipsel[] = { - spi_adc_chipsel, - spi_dac_chipsel -}; -int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]); - #endif #endif /* CONFIG_MISC_INIT_R */ diff --git a/board/sandburst/common/sb_common.c b/board/sandburst/common/sb_common.c index 8a831fa35f..51b1c75140 100644 --- a/board/sandburst/common/sb_common.c +++ b/board/sandburst/common/sb_common.c @@ -200,7 +200,7 @@ void sbcommon_fans(void) * Initialize sdram * ************************************************************************/ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { long dram_size = 0; diff --git a/board/sandburst/karef/Makefile b/board/sandburst/karef/Makefile index 3b094ce1d4..49d240c4ca 100644 --- a/board/sandburst/karef/Makefile +++ b/board/sandburst/karef/Makefile @@ -56,7 +56,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend *~ + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/sandburst/metrobox/Makefile b/board/sandburst/metrobox/Makefile index c143e5e8ca..eb149108ac 100644 --- a/board/sandburst/metrobox/Makefile +++ b/board/sandburst/metrobox/Makefile @@ -54,7 +54,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend *~ + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/sandpoint/sandpoint.c b/board/sandpoint/sandpoint.c index aeb10a7434..7429647b80 100644 --- a/board/sandpoint/sandpoint.c +++ b/board/sandpoint/sandpoint.c @@ -50,7 +50,7 @@ int checkflash (void) } #endif -long int initdram (int board_type) +phys_size_t initdram (int board_type) { long size; long new_bank0_end; diff --git a/board/sbc2410x/Makefile b/board/sbc2410x/Makefile index a68c3832af..95f2ad120d 100644 --- a/board/sbc2410x/Makefile +++ b/board/sbc2410x/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/sbc405/Makefile b/board/sbc405/Makefile index 3c5aa8680a..1c60447e85 100644 --- a/board/sbc405/Makefile +++ b/board/sbc405/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/sbc405/sbc405.c b/board/sbc405/sbc405.c index 0ae6d0ba45..7818cd7e55 100644 --- a/board/sbc405/sbc405.c +++ b/board/sbc405/sbc405.c @@ -96,7 +96,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { return spd_sdram (); } diff --git a/board/sbc8240/sbc8240.c b/board/sbc8240/sbc8240.c index 8a52f67418..175720d906 100644 --- a/board/sbc8240/sbc8240.c +++ b/board/sbc8240/sbc8240.c @@ -45,7 +45,7 @@ int checkboard (void) return 0; } -long int initdram(int board_type) +phys_size_t initdram(int board_type) { long size; long new_bank0_end; diff --git a/board/sbc8260/Makefile b/board/sbc8260/Makefile index 422dbc7139..034a55169c 100644 --- a/board/sbc8260/Makefile +++ b/board/sbc8260/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/sbc8260/sbc8260.c b/board/sbc8260/sbc8260.c index 48aefa010e..5781f6281b 100644 --- a/board/sbc8260/sbc8260.c +++ b/board/sbc8260/sbc8260.c @@ -208,7 +208,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8260_t *memctl = &immap->im_memctl; diff --git a/board/sbc8349/Makefile b/board/sbc8349/Makefile index 02cf569b5b..fd6bb2d29a 100644 --- a/board/sbc8349/Makefile +++ b/board/sbc8349/Makefile @@ -37,7 +37,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/sbc8349/sbc8349.c b/board/sbc8349/sbc8349.c index e89b6e8248..4a44fda31e 100644 --- a/board/sbc8349/sbc8349.c +++ b/board/sbc8349/sbc8349.c @@ -52,7 +52,7 @@ int board_early_init_f (void) #define ns2clk(ns) (ns / (1000000000 / CONFIG_8349_CLKIN) + 1) -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *im = (immap_t *)CFG_IMMR; u32 msize = 0; diff --git a/board/sbc8548/Makefile b/board/sbc8548/Makefile index 4b2a9f61bc..bb96d95a3a 100644 --- a/board/sbc8548/Makefile +++ b/board/sbc8548/Makefile @@ -41,7 +41,7 @@ clean: rm -f $(OBJS) $(SOBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/sbc8548/law.c b/board/sbc8548/law.c index bcf3468ba6..ab54260b06 100644 --- a/board/sbc8548/law.c +++ b/board/sbc8548/law.c @@ -46,12 +46,12 @@ struct law_entry law_table[] = { #ifndef CONFIG_SPD_EEPROM - SET_LAW_ENTRY(1, CFG_DDR_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_DDR), + SET_LAW(CFG_DDR_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_DDR), #endif - SET_LAW_ENTRY(2, CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), - SET_LAW_ENTRY(3, CFG_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI), + SET_LAW(CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), + SET_LAW(CFG_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI), /* LBC window - maps 256M 0xf0000000 -> 0xffffffff */ - SET_LAW_ENTRY(4, CFG_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC), + SET_LAW(CFG_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC), }; int num_law_entries = ARRAY_SIZE(law_table); diff --git a/board/sbc8548/sbc8548.c b/board/sbc8548/sbc8548.c index 9c8c6733f7..91b40e59f0 100644 --- a/board/sbc8548/sbc8548.c +++ b/board/sbc8548/sbc8548.c @@ -81,7 +81,7 @@ int checkboard (void) return 0; } -long int +phys_size_t initdram(int board_type) { long dram_size = 0; diff --git a/board/sbc8560/Makefile b/board/sbc8560/Makefile index 4b2a9f61bc..bb96d95a3a 100644 --- a/board/sbc8560/Makefile +++ b/board/sbc8560/Makefile @@ -41,7 +41,7 @@ clean: rm -f $(OBJS) $(SOBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/sbc8560/law.c b/board/sbc8560/law.c index e370853e96..10dedb481c 100644 --- a/board/sbc8560/law.c +++ b/board/sbc8560/law.c @@ -51,10 +51,10 @@ struct law_entry law_table[] = { #ifndef CONFIG_SPD_EEPROM - SET_LAW_ENTRY(1, CFG_DDR_SDRAM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_DDR), + SET_LAW(CFG_DDR_SDRAM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_DDR), #endif - SET_LAW_ENTRY(2, CFG_PCI_MEM_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_PCI), - SET_LAW_ENTRY(3, CFG_LBC_SDRAM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_LBC), + SET_LAW(CFG_PCI_MEM_PHYS, LAW_SIZE_256M, LAW_TRGT_IF_PCI), + SET_LAW(CFG_LBC_SDRAM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_LBC), }; int num_law_entries = ARRAY_SIZE(law_table); diff --git a/board/sbc8560/sbc8560.c b/board/sbc8560/sbc8560.c index 8df4f3a975..2946ca1055 100644 --- a/board/sbc8560/sbc8560.c +++ b/board/sbc8560/sbc8560.c @@ -257,7 +257,7 @@ int checkboard (void) } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { long dram_size = 0; diff --git a/board/sbc8641d/Makefile b/board/sbc8641d/Makefile index 115df0532b..c096e1552e 100644 --- a/board/sbc8641d/Makefile +++ b/board/sbc8641d/Makefile @@ -39,7 +39,7 @@ clean: .PHONY: distclean distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/sbc8641d/law.c b/board/sbc8641d/law.c index d403873d9e..801c5b75f7 100644 --- a/board/sbc8641d/law.c +++ b/board/sbc8641d/law.c @@ -44,15 +44,15 @@ struct law_entry law_table[] = { - SET_LAW_ENTRY(1, CFG_DDR_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_DDR_1), - SET_LAW_ENTRY(2, CFG_PCI1_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_PCI_1), - SET_LAW_ENTRY(3, CFG_PCI2_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2), - SET_LAW_ENTRY(4, 0xf8000000, LAW_SIZE_2M, LAW_TRGT_IF_LBC), - SET_LAW_ENTRY(5, CFG_PCI1_IO_BASE, LAW_SIZE_16M, LAW_TRGT_IF_PCI_1), - SET_LAW_ENTRY(6, CFG_PCI2_IO_BASE, LAW_SIZE_16M, LAW_TRGT_IF_PCI_2), - SET_LAW_ENTRY(7, 0xfe000000, LAW_SIZE_32M, LAW_TRGT_IF_LBC), - SET_LAW_ENTRY(8, CFG_DDR_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_DDR_2), - SET_LAW_ENTRY(9, CFG_RIO_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_RIO) + SET_LAW(CFG_DDR_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_DDR_1), + SET_LAW(CFG_PCI1_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_PCI_1), + SET_LAW(CFG_PCI2_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2), + SET_LAW(0xf8000000, LAW_SIZE_2M, LAW_TRGT_IF_LBC), + SET_LAW(CFG_PCI1_IO_BASE, LAW_SIZE_16M, LAW_TRGT_IF_PCI_1), + SET_LAW(CFG_PCI2_IO_BASE, LAW_SIZE_16M, LAW_TRGT_IF_PCI_2), + SET_LAW(0xfe000000, LAW_SIZE_32M, LAW_TRGT_IF_LBC), + SET_LAW(CFG_DDR_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_DDR_2), + SET_LAW(CFG_RIO_MEM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_RIO) }; int num_law_entries = ARRAY_SIZE(law_table); diff --git a/board/sbc8641d/sbc8641d.c b/board/sbc8641d/sbc8641d.c index 519f332784..c724effa06 100644 --- a/board/sbc8641d/sbc8641d.c +++ b/board/sbc8641d/sbc8641d.c @@ -57,7 +57,7 @@ int checkboard (void) return 0; } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { long dram_size = 0; diff --git a/board/sc3/Makefile b/board/sc3/Makefile index 4cc2b4171c..88989bd1c3 100644 --- a/board/sc3/Makefile +++ b/board/sc3/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/sc3/sc3.c b/board/sc3/sc3.c index fbdc1d769c..3d1a6542dc 100644 --- a/board/sc3/sc3.c +++ b/board/sc3/sc3.c @@ -579,7 +579,7 @@ static int printSDRAMConfig(char reg, unsigned long cr) static unsigned int mbcf[] = {mem_mb0cf, mem_mb1cf, mem_mb2cf, mem_mb3cf}; #endif -long int initdram (int board_type) +phys_size_t initdram (int board_type) { unsigned int mems=0; unsigned long ul1; diff --git a/board/sc520_cdp/Makefile b/board/sc520_cdp/Makefile index e19be51c30..0d2800d5e4 100644 --- a/board/sc520_cdp/Makefile +++ b/board/sc520_cdp/Makefile @@ -42,7 +42,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/sc520_spunk/Makefile b/board/sc520_spunk/Makefile index 226c756bf4..e04172e3b9 100644 --- a/board/sc520_spunk/Makefile +++ b/board/sc520_spunk/Makefile @@ -42,7 +42,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/scb9328/Makefile b/board/scb9328/Makefile index 85b6b0474c..3bac4776d7 100644 --- a/board/scb9328/Makefile +++ b/board/scb9328/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/sh7763rdp/Makefile b/board/sh7763rdp/Makefile new file mode 100644 index 0000000000..62a683d57f --- /dev/null +++ b/board/sh7763rdp/Makefile @@ -0,0 +1,51 @@ +# +# Copyright (C) 2008 Renesas Solutions Corp. +# Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> +# Copyright (C) 2007 Kenati Technologies, Inc. +# +# board/sh7763rdp/Makefile +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS := sh7763rdp.o +SOBJS := lowlevel_init.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/sh7763rdp/config.mk b/board/sh7763rdp/config.mk new file mode 100644 index 0000000000..c52dbfd7b0 --- /dev/null +++ b/board/sh7763rdp/config.mk @@ -0,0 +1,11 @@ +# +# board/sh7763rdp/config.mk +# +# TEXT_BASE refers to image _after_ relocation. +# +# NOTE: Must match value used in u-boot.lds (in this directory). +# + +TEXT_BASE = 0x8FFC0000 + +# PLATFORM_CPPFLAGS += -DCONFIG_MULTIBOOT diff --git a/board/sh7763rdp/lowlevel_init.S b/board/sh7763rdp/lowlevel_init.S new file mode 100644 index 0000000000..2a44eee1ad --- /dev/null +++ b/board/sh7763rdp/lowlevel_init.S @@ -0,0 +1,350 @@ +/* + * Copyright (C) 2008 Renesas Solutions Corp. + * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> + * Copyright (C) 2007 Kenati Technologies, Inc. + * + * board/sh7763rdp/lowlevel_init.S + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <config.h> +#include <version.h> + +#include <asm/processor.h> + + .global lowlevel_init + + .text + .align 2 + +lowlevel_init: + + mov.l WDTCSR_A, r1 /* Watchdog Control / Status Register */ + mov.l WDTCSR_D, r0 + mov.l r0, @r1 + + mov.l WDTST_A, r1 /* Watchdog Stop Time Register */ + mov.l WDTST_D, r0 + mov.l r0, @r1 + + mov.l WDTBST_A, r1 /* 0xFFCC0008 (Watchdog Base Stop Time Register */ + mov.l WDTBST_D, r0 + mov.l r0, @r1 + + mov.l CCR_A, r1 /* Address of Cache Control Register */ + mov.l CCR_CACHE_ICI_D, r0 /* Instruction Cache Invalidate */ + mov.l r0, @r1 + + mov.l MMUCR_A, r1 /* Address of MMU Control Register */ + mov.l MMU_CONTROL_TI_D, r0 /* TI == TLB Invalidate bit */ + mov.l r0, @r1 + + mov.l MSTPCR0_A, r1 /* Address of Power Control Register 0 */ + mov.l MSTPCR0_D, r0 + mov.l r0, @r1 + + mov.l MSTPCR1_A, r1 /*i Address of Power Control Register 1 */ + mov.l MSTPCR1_D, r0 + mov.l r0, @r1 + + mov.l RAMCR_A,r1 + mov.l RAMCR_D,r0 + mov.l r0, @r1 + + mov.l MMSELR_A,r1 + mov.l MMSELR_D,r0 + synco + mov.l r0, @r1 + + mov.l @r1,r2 /* execute two reads after setting MMSELR*/ + mov.l @r1,r2 + synco + + /* issue memory read */ + mov.l DDRSD_START_A,r1 /* memory address to read*/ + mov.l @r1,r0 + synco + + mov.l MIM8_A,r1 + mov.l MIM8_D,r0 + mov.l r0,@r1 + + mov.l MIMC_A,r1 + mov.l MIMC_D1,r0 + mov.l r0,@r1 + + mov.l STRC_A,r1 + mov.l STRC_D,r0 + mov.l r0,@r1 + + mov.l SDR4_A,r1 + mov.l SDR4_D,r0 + mov.l r0,@r1 + + mov.l MIMC_A,r1 + mov.l MIMC_D2,r0 + mov.l r0,@r1 + + nop + nop + nop + + mov.l SCR4_A,r1 + mov.l SCR4_D3,r0 + mov.l r0,@r1 + + mov.l SCR4_A,r1 + mov.l SCR4_D2,r0 + mov.l r0,@r1 + + mov.l SDMR02000_A,r1 + mov.l SDMR02000_D,r0 + mov.l r0,@r1 + + mov.l SDMR00B08_A,r1 + mov.l SDMR00B08_D,r0 + mov.l r0,@r1 + + mov.l SCR4_A,r1 + mov.l SCR4_D2,r0 + mov.l r0,@r1 + + mov.l SCR4_A,r1 + mov.l SCR4_D4,r0 + mov.l r0,@r1 + + nop + nop + nop + nop + + mov.l SCR4_A,r1 + mov.l SCR4_D4,r0 + mov.l r0,@r1 + + nop + nop + nop + nop + + mov.l SDMR00308_A,r1 + mov.l SDMR00308_D,r0 + mov.l r0,@r1 + + mov.l MIMC_A,r1 + mov.l MIMC_D3,r0 + mov.l r0,@r1 + + mov.l SCR4_A,r1 + mov.l SCR4_D1,r0 + mov.l DELAY60_D,r3 + +delay_loop_60: + mov.l r0,@r1 + dt r3 + bf delay_loop_60 + nop + + mov.l CCR_A, r1 /* Address of Cache Control Register */ + mov.l CCR_CACHE_D_2, r0 + mov.l r0, @r1 + +bsc_init: + mov.l BCR_A, r1 + mov.l BCR_D, r0 + mov.l r0, @r1 + + mov.l CS0BCR_A, r1 + mov.l CS0BCR_D, r0 + mov.l r0, @r1 + + mov.l CS1BCR_A,r1 + mov.l CS1BCR_D,r0 + mov.l r0,@r1 + + mov.l CS2BCR_A, r1 + mov.l CS2BCR_D, r0 + mov.l r0, @r1 + + mov.l CS4BCR_A, r1 + mov.l CS4BCR_D, r0 + mov.l r0, @r1 + + mov.l CS5BCR_A, r1 + mov.l CS5BCR_D, r0 + mov.l r0, @r1 + + mov.l CS6BCR_A, r1 + mov.l CS6BCR_D, r0 + mov.l r0, @r1 + + mov.l CS0WCR_A, r1 + mov.l CS0WCR_D, r0 + mov.l r0, @r1 + + mov.l CS1WCR_A, r1 + mov.l CS1WCR_D, r0 + mov.l r0, @r1 + + mov.l CS2WCR_A, r1 + mov.l CS2WCR_D, r0 + mov.l r0, @r1 + + mov.l CS4WCR_A, r1 + mov.l CS4WCR_D, r0 + mov.l r0, @r1 + + mov.l CS5WCR_A, r1 + mov.l CS5WCR_D, r0 + mov.l r0, @r1 + + mov.l CS6WCR_A, r1 + mov.l CS6WCR_D, r0 + mov.l r0, @r1 + + mov.l CS5PCR_A, r1 + mov.l CS5PCR_D, r0 + mov.l r0, @r1 + + mov.l CS6PCR_A, r1 + mov.l CS6PCR_D, r0 + mov.l r0, @r1 + + mov.l DELAY200_D,r3 + +delay_loop_200: + dt r3 + bf delay_loop_200 + nop + + mov.l PSEL0_A,r1 + mov.l PSEL0_D,r0 + mov.w r0,@r1 + + mov.l PSEL1_A,r1 + mov.l PSEL1_D,r0 + mov.w r0,@r1 + + mov.l ICR0_A,r1 + mov.l ICR0_D,r0 + mov.l r0,@r1 + + stc sr, r0 /* BL bit off(init=ON) */ + mov.l SR_MASK_D, r1 + and r1, r0 + ldc r0, sr + + rts + nop + + .align 2 + +DELAY60_D: .long 60 +DELAY200_D: .long 17800 + +CCR_A: .long 0xFF00001C +MMUCR_A: .long 0xFF000010 +RAMCR_A: .long 0xFF000074 + +/* Low power mode control */ +MSTPCR0_A: .long 0xFFC80030 +MSTPCR1_A: .long 0xFFC80038 + +/* RWBT */ +WDTST_A: .long 0xFFCC0000 +WDTCSR_A: .long 0xFFCC0004 +WDTBST_A: .long 0xFFCC0008 + +/* BSC */ +MMSELR_A: .long 0xFE600020 +BCR_A: .long 0xFF801000 +CS0BCR_A: .long 0xFF802000 +CS1BCR_A: .long 0xFF802010 +CS2BCR_A: .long 0xFF802020 +CS4BCR_A: .long 0xFF802040 +CS5BCR_A: .long 0xFF802050 +CS6BCR_A: .long 0xFF802060 +CS0WCR_A: .long 0xFF802008 +CS1WCR_A: .long 0xFF802018 +CS2WCR_A: .long 0xFF802028 +CS4WCR_A: .long 0xFF802048 +CS5WCR_A: .long 0xFF802058 +CS6WCR_A: .long 0xFF802068 +CS5PCR_A: .long 0xFF802070 +CS6PCR_A: .long 0xFF802080 +DDRSD_START_A: .long 0xAC000000 + +/* INTC */ +ICR0_A: .long 0xFFD00000 + +/* DDR I/F */ +MIM8_A: .long 0xFE800008 +MIMC_A: .long 0xFE80000C +SCR4_A: .long 0xFE800014 +STRC_A: .long 0xFE80001C +SDR4_A: .long 0xFE800034 +SDMR00308_A: .long 0xFE900308 +SDMR00B08_A: .long 0xFE900B08 +SDMR02000_A: .long 0xFE902000 + +/* GPIO */ +PSEL0_A: .long 0xFFEF0070 +PSEL1_A: .long 0xFFEF0072 + +CCR_CACHE_ICI_D:.long 0x00000800 +CCR_CACHE_D_2: .long 0x00000103 +MMU_CONTROL_TI_D:.long 0x00000004 +RAMCR_D: .long 0x00000200 +MSTPCR0_D: .long 0x00000000 +MSTPCR1_D: .long 0x00000000 + +MMSELR_D: .long 0xa5a50000 +BCR_D: .long 0x00000000 +CS0BCR_D: .long 0x77777770 +CS1BCR_D: .long 0x77777670 +CS2BCR_D: .long 0x77777670 +CS4BCR_D: .long 0x77777670 +CS5BCR_D: .long 0x77777670 +CS6BCR_D: .long 0x77777670 +CS0WCR_D: .long 0x7777770F +CS1WCR_D: .long 0x22000002 +CS2WCR_D: .long 0x7777770F +CS4WCR_D: .long 0x7777770F +CS5WCR_D: .long 0x7777770F +CS6WCR_D: .long 0x7777770F +CS5PCR_D: .long 0x77000000 +CS6PCR_D: .long 0x77000000 +ICR0_D: .long 0x00E00000 +MIM8_D: .long 0x00000000 +MIMC_D1: .long 0x01d10008 +MIMC_D2: .long 0x01d10009 +MIMC_D3: .long 0x01d10209 +SCR4_D1: .long 0x00000001 +SCR4_D2: .long 0x00000002 +SCR4_D3: .long 0x00000003 +SCR4_D4: .long 0x00000004 +STRC_D: .long 0x000f3980 +SDR4_D: .long 0x00000300 +SDMR00308_D: .long 0x00000000 +SDMR00B08_D: .long 0x00000000 +SDMR02000_D: .long 0x00000000 +PSEL0_D: .long 0x00000001 +PSEL1_D: .long 0x00000244 +SR_MASK_D: .long 0xEFFFFF0F +WDTST_D: .long 0x5A000FFF +WDTCSR_D: .long 0xA5000000 +WDTBST_D: .long 0x55000000 diff --git a/board/sh7763rdp/sh7763rdp.c b/board/sh7763rdp/sh7763rdp.c new file mode 100644 index 0000000000..92ac7b7a96 --- /dev/null +++ b/board/sh7763rdp/sh7763rdp.c @@ -0,0 +1,77 @@ +/* + * Copyright (C) 2008 Renesas Solutions Corp. + * Copyright (C) 2008 Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> + * Copyright (C) 2007 Kenati Technologies, Inc. + * + * board/sh7763rdp/sh7763rdp.c + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/processor.h> + +#define CPU_CMDREG 0xB1000006 +#define PDCR 0xffef0006 +#define PECR 0xffef0008 +#define PFCR 0xffef000a +#define PGCR 0xffef000c +#define PHCR 0xffef000e +#define PJCR 0xffef0012 +#define PKCR 0xffef0014 +#define PLCR 0xffef0016 +#define PMCR 0xffef0018 +#define PSEL1 0xffef0072 +#define PSEL2 0xffef0074 +#define PSEL3 0xffef0076 + +int checkboard(void) +{ + puts("BOARD: Renesas SH7763 RDP\n"); + return 0; +} + +int board_init(void) +{ + vu_short dat; + + /* Enable mode */ + writew(inw(CPU_CMDREG)|0x0001, CPU_CMDREG); + + /* GPIO Setting (eth1) */ + dat = inw(PSEL1); + writew(((dat & ~0xff00) | 0x2400), PSEL1); + writew(0, PFCR); + writew(0, PGCR); + writew(0, PHCR); + + return 0; +} + +int dram_init(void) +{ + DECLARE_GLOBAL_DATA_PTR; + + gd->bd->bi_memstart = CFG_SDRAM_BASE; + gd->bd->bi_memsize = CFG_SDRAM_SIZE; + printf("DRAM: %dMB\n", CFG_SDRAM_SIZE / (1024 * 1024)); + return 0; +} + +void led_set_state(unsigned short value) +{ +} diff --git a/board/sh7763rdp/u-boot.lds b/board/sh7763rdp/u-boot.lds new file mode 100644 index 0000000000..c07f0d80ed --- /dev/null +++ b/board/sh7763rdp/u-boot.lds @@ -0,0 +1,105 @@ +/* + * Copyrigth (c) 2007,2008 + * Nobuhiro Iwamatsu <iwamatsu@nigauri.org> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux") +OUTPUT_ARCH(sh) +ENTRY(_start) + +SECTIONS +{ + /* + Base address of internal SDRAM is 0x0C000000. + Although size of SDRAM can be either 16 or 32 MBytes, + we assume 16 MBytes (ie ignore upper half if the full + 32 MBytes is present). + + NOTE: This address must match with the definition of + TEXT_BASE in config.mk (in this directory). + + */ + . = 0x8C000000 + (64*1024*1024) - (256*1024); + + PROVIDE (reloc_dst = .); + + PROVIDE (_ftext = .); + PROVIDE (_fcode = .); + PROVIDE (_start = .); + + .text : + { + cpu/sh4/start.o (.text) + . = ALIGN(8192); + common/environment.o (.ppcenv) + . = ALIGN(8192); + common/environment.o (.ppcenvr) + . = ALIGN(8192); + *(.text) + . = ALIGN(4); + } =0xFF + PROVIDE (_ecode = .); + .rodata : + { + *(.rodata) + . = ALIGN(4); + } + PROVIDE (_etext = .); + + + PROVIDE (_fdata = .); + .data : + { + *(.data) + . = ALIGN(4); + } + PROVIDE (_edata = .); + + PROVIDE (_fgot = .); + .got : + { + *(.got) + . = ALIGN(4); + } + PROVIDE (_egot = .); + + PROVIDE (__u_boot_cmd_start = .); + .u_boot_cmd : + { + *(.u_boot_cmd) + . = ALIGN(4); + } + PROVIDE (__u_boot_cmd_end = .); + + PROVIDE (reloc_dst_end = .); + /* _reloc_dst_end = .; */ + + PROVIDE (bss_start = .); + PROVIDE (__bss_start = .); + .bss : + { + *(.bss) + . = ALIGN(4); + } + PROVIDE (bss_end = .); + + PROVIDE (_end = .); +} diff --git a/board/shannon/Makefile b/board/shannon/Makefile index 37774a90c4..16ed4cf413 100644 --- a/board/shannon/Makefile +++ b/board/shannon/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/siemens/CCM/Makefile b/board/siemens/CCM/Makefile index e053c7d661..c5695f98cb 100644 --- a/board/siemens/CCM/Makefile +++ b/board/siemens/CCM/Makefile @@ -22,23 +22,30 @@ # include $(TOPDIR)/config.mk + ifneq ($(OBJTREE),$(SRCTREE)) $(shell mkdir -p $(obj)../common) -$(shell mkdir -p $(obj)../../tqm8xx) +$(shell mkdir -p $(obj)../../tqc/tqm8xx) endif LIB = $(obj)lib$(BOARD).a COBJS = ccm.o flash.o fpga_ccm.o ../common/fpga.o \ - ../../tqm8xx/load_sernum_ethaddr.o + ../../tqc/tqm8xx/load_sernum_ethaddr.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) SOBJS := $(addprefix $(obj),$(SOBJS)) -$(LIB): $(obj).depend $(OBJS) +$(LIB): $(OBJS) $(AR) $(ARFLAGS) $@ $(OBJS) +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + ######################################################################### # defines $(obj).depend target diff --git a/board/siemens/CCM/ccm.c b/board/siemens/CCM/ccm.c index 5a32e45e28..d653763285 100644 --- a/board/siemens/CCM/ccm.c +++ b/board/siemens/CCM/ccm.c @@ -155,7 +155,7 @@ static void init_leds (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *)CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; diff --git a/board/siemens/IAD210/IAD210.c b/board/siemens/IAD210/IAD210.c index e498937b65..9c0ff02783 100644 --- a/board/siemens/IAD210/IAD210.c +++ b/board/siemens/IAD210/IAD210.c @@ -100,7 +100,7 @@ const uint sdram_table[] = { /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; diff --git a/board/siemens/IAD210/atm.c b/board/siemens/IAD210/atm.c index c77e35912e..1b27f336b2 100644 --- a/board/siemens/IAD210/atm.c +++ b/board/siemens/IAD210/atm.c @@ -1,4 +1,3 @@ - #include <common.h> #include <mpc8xx.h> #include <commproc.h> @@ -7,7 +6,7 @@ #include <linux/stddef.h> #define SYNC __asm__("sync") -#define ALIGN(p, a) ((char *)(((uint32)(p)+(a)-1) & ~((uint32)(a)-1))) +#define MY_ALIGN(p, a) ((char *)(((uint32)(p)+(a)-1) & ~((uint32)(a)-1))) #define FALSE 1 #define TRUE 0 @@ -160,7 +159,7 @@ int atmMemInit() g_atm.csram = &csram[0]; memset(&(g_atm.csram), 0x00, g_atm.csram_size); - g_atm.int_reload_ptr = (uint32 *)ALIGN(g_atm.csram, 4); + g_atm.int_reload_ptr = (uint32 *)MY_ALIGN(g_atm.csram, 4); g_atm.rbd_base_ptr = (struct atm_bd_t *)(g_atm.int_reload_ptr + NUM_INT_ENTRIES); g_atm.tbd_base_ptr = (struct atm_bd_t *)(g_atm.rbd_base_ptr + total_num_rbd); diff --git a/board/siemens/SCM/Makefile b/board/siemens/SCM/Makefile index edc1820007..6ef49c2ce9 100644 --- a/board/siemens/SCM/Makefile +++ b/board/siemens/SCM/Makefile @@ -22,23 +22,30 @@ # include $(TOPDIR)/config.mk + ifneq ($(OBJTREE),$(SRCTREE)) $(shell mkdir -p $(obj)../common) -$(shell mkdir -p $(obj)../../tqm8xx/) +$(shell mkdir -p $(obj)../../tqc/tqm8xx) endif LIB = $(obj)lib$(BOARD).a COBJS = scm.o flash.o fpga_scm.o ../common/fpga.o \ - ../../tqm8xx/load_sernum_ethaddr.o + ../../tqc/tqm8xx/load_sernum_ethaddr.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) SOBJS := $(addprefix $(obj),$(SOBJS)) -$(LIB): $(obj).depend $(OBJS) +$(LIB): $(OBJS) $(AR) $(ARFLAGS) $@ $(OBJS) +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + ######################################################################### # defines $(obj).depend target diff --git a/board/siemens/SCM/scm.c b/board/siemens/SCM/scm.c index 8783aafe9a..6a9dd25835 100644 --- a/board/siemens/SCM/scm.c +++ b/board/siemens/SCM/scm.c @@ -306,7 +306,7 @@ int power_on_reset (void) return gd->reset_status & RSR_CSRS ? 0 : 1; } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8260_t *memctl = &immap->im_memctl; diff --git a/board/siemens/SMN42/Makefile b/board/siemens/SMN42/Makefile index 2c7b54b081..4e75b6f7a3 100644 --- a/board/siemens/SMN42/Makefile +++ b/board/siemens/SMN42/Makefile @@ -33,7 +33,7 @@ OBJS := $(addprefix $(obj),$(COBJS)) SOBJS := $(addprefix $(obj),$(SOBJTS)) $(LIB): $(obj).depend $(OBJS) $(SOBJS) - $(AR) crv $@ $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/siemens/pcu_e/pcu_e.c b/board/siemens/pcu_e/pcu_e.c index 2309069a60..5647f7af04 100644 --- a/board/siemens/pcu_e/pcu_e.c +++ b/board/siemens/pcu_e/pcu_e.c @@ -156,7 +156,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immr = (immap_t *) CFG_IMMR; volatile memctl8xx_t *memctl = &immr->im_memctl; diff --git a/board/sixnet/sixnet.c b/board/sixnet/sixnet.c index 798e1855bd..dcd34726b0 100644 --- a/board/sixnet/sixnet.c +++ b/board/sixnet/sixnet.c @@ -496,7 +496,7 @@ const uint sdram_table[] = /* ------------------------------------------------------------------------- */ -long int initdram(int board_type) +phys_size_t initdram(int board_type) { volatile immap_t *immap = (immap_t *)CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; diff --git a/board/sl8245/sl8245.c b/board/sl8245/sl8245.c index 593eb4ee80..86478871bc 100644 --- a/board/sl8245/sl8245.c +++ b/board/sl8245/sl8245.c @@ -34,7 +34,7 @@ int checkboard (void) return 0; } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { #ifndef CFG_RAMBOOT long size; diff --git a/board/smdk2400/Makefile b/board/smdk2400/Makefile index 57c76e5b30..90cb2b8f60 100644 --- a/board/smdk2400/Makefile +++ b/board/smdk2400/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/smdk2410/Makefile b/board/smdk2410/Makefile index 8617b27f6e..5d0cd722d0 100644 --- a/board/smdk2410/Makefile +++ b/board/smdk2410/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/snmc/qs850/qs850.c b/board/snmc/qs850/qs850.c index 637f1250e9..ba5a8fb0a1 100644 --- a/board/snmc/qs850/qs850.c +++ b/board/snmc/qs850/qs850.c @@ -143,7 +143,7 @@ int checkboard (void) #define REFRESH_INIT_LOOPS (0) -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *)CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; diff --git a/board/snmc/qs860t/qs860t.c b/board/snmc/qs860t/qs860t.c index a11d863010..17c9356217 100644 --- a/board/snmc/qs860t/qs860t.c +++ b/board/snmc/qs860t/qs860t.c @@ -115,7 +115,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *)CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; diff --git a/board/socrates/Makefile b/board/socrates/Makefile index 6453f2480f..a41fead8f4 100644 --- a/board/socrates/Makefile +++ b/board/socrates/Makefile @@ -28,7 +28,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).a # -COBJS := $(BOARD).o law.o tlb.o sdram.o +COBJS := $(BOARD).o law.o tlb.o sdram.o nand.o SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) @@ -41,7 +41,7 @@ clean: rm -f $(OBJS) $(SOBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/socrates/config.mk b/board/socrates/config.mk index 1cf5d380df..4f1729440a 100644 --- a/board/socrates/config.mk +++ b/board/socrates/config.mk @@ -25,6 +25,5 @@ # # socrates board # default CCARBAR is at 0xff700000 -# assume U-Boot is less than 256k # -TEXT_BASE = 0xfffc0000 +TEXT_BASE = 0xfffa0000 diff --git a/board/socrates/law.c b/board/socrates/law.c index 5f4b8ca4f9..35c4a900a9 100644 --- a/board/socrates/law.c +++ b/board/socrates/law.c @@ -33,13 +33,12 @@ /* * LAW(Local Access Window) configuration: * - * 0x0000_0000 0x7fff_ffff DDR 2G + * 0x0000_0000 0x2fff_ffff DDR 512M * 0x8000_0000 0x9fff_ffff PCI1 MEM 512M - * 0xc000_0000 0xdfff_ffff RapidIO 512M - * 0xe000_0000 0xe000_ffff CCSR 1M + * 0xc000_0000 0xc00f_ffff FPGA 1M + * 0xe000_0000 0xe00f_ffff CCSR 1M (mapped by CCSRBAR) * 0xe200_0000 0xe2ff_ffff PCI1 IO 16M - * 0xf800_0000 0xf80f_ffff BCSR 1M - * 0xfe00_0000 0xffff_ffff FLASH (boot bank) 32M + * 0xfc00_0000 0xffff_ffff FLASH 64M * * Notes: * CCSRBAR and L2-as-SRAM don't need a configured Local Access Window. @@ -47,11 +46,13 @@ */ struct law_entry law_table[] = { - SET_LAW_ENTRY(1, CFG_DDR_SDRAM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_DDR), - SET_LAW_ENTRY(2, CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), - SET_LAW_ENTRY(3, CFG_LBC_FLASH_BASE, LAW_SIZE_128M, LAW_TRGT_IF_LBC), - SET_LAW_ENTRY(4, CFG_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI), - SET_LAW_ENTRY(5, CFG_RIO_MEM_BASE, LAWAR_SIZE_512M, LAW_TRGT_IF_RIO), + SET_LAW(CFG_DDR_SDRAM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_DDR), + SET_LAW(CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), + SET_LAW(CFG_LBC_FLASH_BASE, LAW_SIZE_128M, LAW_TRGT_IF_LBC), + SET_LAW(CFG_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI), +#if defined(CFG_FPGA_BASE) + SET_LAW(CFG_FPGA_BASE, LAWAR_SIZE_1M, LAW_TRGT_IF_LBC), +#endif }; int num_law_entries = ARRAY_SIZE(law_table); diff --git a/board/socrates/nand.c b/board/socrates/nand.c new file mode 100644 index 0000000000..fc82ecbb73 --- /dev/null +++ b/board/socrates/nand.c @@ -0,0 +1,218 @@ +/* + * (C) Copyright 2008 + * Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> + +#if defined(CFG_NAND_BASE) +#include <nand.h> +#include <asm/errno.h> +#include <asm/io.h> + +static int state; +static void nand_write_byte(struct mtd_info *mtd, u_char byte); +static void nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len); +static void nand_write_word(struct mtd_info *mtd, u16 word); +static u_char nand_read_byte(struct mtd_info *mtd); +static u16 nand_read_word(struct mtd_info *mtd); +static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len); +static int nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len); +static int nand_device_ready(struct mtd_info *mtdinfo); +static void nand_hwcontrol(struct mtd_info *mtdinfo, int cmd); + +#define FPGA_NAND_CMD_MASK (0x7 << 28) +#define FPGA_NAND_CMD_COMMAND (0x0 << 28) +#define FPGA_NAND_CMD_ADDR (0x1 << 28) +#define FPGA_NAND_CMD_READ (0x2 << 28) +#define FPGA_NAND_CMD_WRITE (0x3 << 28) +#define FPGA_NAND_BUSY (0x1 << 15) +#define FPGA_NAND_ENABLE (0x1 << 31) +#define FPGA_NAND_DATA_SHIFT 16 + +/** + * nand_write_byte - write one byte to the chip + * @mtd: MTD device structure + * @byte: pointer to data byte to write + */ +static void nand_write_byte(struct mtd_info *mtd, u_char byte) +{ + nand_write_buf(mtd, (const uchar *)&byte, sizeof(byte)); +} + +/** + * nand_write_word - write one word to the chip + * @mtd: MTD device structure + * @word: data word to write + */ +static void nand_write_word(struct mtd_info *mtd, u16 word) +{ + nand_write_buf(mtd, (const uchar *)&word, sizeof(word)); +} + +/** + * nand_write_buf - write buffer to chip + * @mtd: MTD device structure + * @buf: data buffer + * @len: number of bytes to write + */ +static void nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len) +{ + int i; + struct nand_chip *this = mtd->priv; + long val; + + if ((state & FPGA_NAND_CMD_MASK) == FPGA_NAND_CMD_MASK) { + /* Write data */ + val = (state & FPGA_NAND_ENABLE) | FPGA_NAND_CMD_WRITE; + } else { + /* Write address or command */ + val = state; + } + + for (i = 0; i < len; i++) { + out_be32(this->IO_ADDR_W, val | (buf[i] << FPGA_NAND_DATA_SHIFT)); + } +} + + +/** + * nand_read_byte - read one byte from the chip + * @mtd: MTD device structure + */ +static u_char nand_read_byte(struct mtd_info *mtd) +{ + u8 byte; + nand_read_buf(mtd, (uchar *)&byte, sizeof(byte)); + return byte; +} + +/** + * nand_read_word - read one word from the chip + * @mtd: MTD device structure + */ +static u16 nand_read_word(struct mtd_info *mtd) +{ + u16 word; + nand_read_buf(mtd, (uchar *)&word, sizeof(word)); + return word; +} + +/** + * nand_read_buf - read chip data into buffer + * @mtd: MTD device structure + * @buf: buffer to store date + * @len: number of bytes to read + */ +static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len) +{ + int i; + struct nand_chip *this = mtd->priv; + int val; + + val = (state & FPGA_NAND_ENABLE) | FPGA_NAND_CMD_READ; + + out_be32(this->IO_ADDR_W, val); + for (i = 0; i < len; i++) { + buf[i] = (in_be32(this->IO_ADDR_R) >> FPGA_NAND_DATA_SHIFT) & 0xff; + } +} + +/** + * nand_verify_buf - Verify chip data against buffer + * @mtd: MTD device structure + * @buf: buffer containing the data to compare + * @len: number of bytes to compare + */ +static int nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len) +{ + int i; + + for (i = 0; i < len; i++) { + if (buf[i] != nand_read_byte(mtd)); + return -EFAULT; + } + return 0; +} + +/** + * nand_device_ready - Check the NAND device is ready for next command. + * @mtd: MTD device structure + */ +static int nand_device_ready(struct mtd_info *mtdinfo) +{ + struct nand_chip *this = mtdinfo->priv; + + if (in_be32(this->IO_ADDR_W) & FPGA_NAND_BUSY) + return 0; /* busy */ + return 1; +} + +/** + * nand_hwcontrol - NAND control functions wrapper. + * @mtd: MTD device structure + * @cmd: Command + */ +static void nand_hwcontrol(struct mtd_info *mtdinfo, int cmd) +{ + + switch(cmd) { + case NAND_CTL_CLRALE: + state |= FPGA_NAND_CMD_MASK; /* use all 1s to mark */ + break; + case NAND_CTL_CLRCLE: + state |= FPGA_NAND_CMD_MASK; /* use all 1s to mark */ + break; + case NAND_CTL_SETCLE: + state = (state & ~FPGA_NAND_CMD_MASK) | FPGA_NAND_CMD_COMMAND; + break; + case NAND_CTL_SETALE: + state = (state & ~FPGA_NAND_CMD_MASK) | FPGA_NAND_CMD_ADDR; + break; + case NAND_CTL_SETNCE: + state |= FPGA_NAND_ENABLE; + break; + case NAND_CTL_CLRNCE: + state &= ~FPGA_NAND_ENABLE; + break; + default: + printf("%s: unknown cmd %#x\n", __FUNCTION__, cmd); + break; + } +} + +int board_nand_init(struct nand_chip *nand) +{ + nand->hwcontrol = nand_hwcontrol; + nand->eccmode = NAND_ECC_SOFT; + nand->dev_ready = nand_device_ready; + nand->write_byte = nand_write_byte; + nand->read_byte = nand_read_byte; + nand->write_word = nand_write_word; + nand->read_word = nand_read_word; + nand->write_buf = nand_write_buf; + nand->read_buf = nand_read_buf; + nand->verify_buf = nand_verify_buf; + + return 0; +} + +#endif diff --git a/board/socrates/sdram.c b/board/socrates/sdram.c index 329eaccd5d..768fe05a24 100644 --- a/board/socrates/sdram.c +++ b/board/socrates/sdram.c @@ -76,7 +76,7 @@ long int sdram_setup(int casl) } #endif -long int initdram (int board_type) +phys_size_t initdram (int board_type) { long dram_size = 0; #if defined(CONFIG_SPD_EEPROM) diff --git a/board/socrates/socrates.c b/board/socrates/socrates.c index cb5899485a..d791f1135f 100644 --- a/board/socrates/socrates.c +++ b/board/socrates/socrates.c @@ -35,7 +35,11 @@ #include <flash.h> #include <libfdt.h> #include <fdt_support.h> +#include <asm/io.h> +#if defined(CFG_FPGA_BASE) +#include "upm_table.h" +#endif DECLARE_GLOBAL_DATA_PTR; extern flash_info_t flash_info[]; /* FLASH chips info */ @@ -45,6 +49,9 @@ ulong flash_get_size (ulong base, int banknum); int checkboard (void) { + volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR); + char *src; + int f; char *s = getenv("serial#"); puts("Board: Socrates"); @@ -55,8 +62,15 @@ int checkboard (void) putc('\n'); #ifdef CONFIG_PCI - printf ("PCI1: 32 bit, %d MHz (compiled)\n", - CONFIG_SYS_CLK_FREQ / 1000000); + /* Check the PCI_clk sel bit */ + if (in_be32(&gur->porpllsr) & (1<<15)) { + src = "SYSCLK"; + f = CONFIG_SYS_CLK_FREQ; + } else { + src = "PCI_CLK"; + f = CONFIG_PCI_CLK_FREQ; + } + printf ("PCI1: 32 bit, %d MHz (%s)\n", f/1000000, src); #else printf ("PCI1: disabled\n"); #endif @@ -65,7 +79,10 @@ int checkboard (void) * Initialize local bus. */ local_bus_init (); - +#if defined(CFG_FPGA_BASE) + /* Init UPMA for FPGA access */ + upmconfig(UPMA, (uint *)UPMTableA, sizeof(UPMTableA)/sizeof(int)); +#endif return 0; } @@ -207,5 +224,15 @@ ft_board_setup(void *blob, bd_t *bd) if (rc) printf("Unable to update property NOR mapping, err=%s\n", fdt_strerror(rc)); + +#if defined (CFG_FPGA_BASE) + memset(val, 0, sizeof(val)); + val[0] = CFG_FPGA_BASE; + rc = fdt_find_and_setprop(blob, "/localbus/fpga", "virtual-reg", + val, sizeof(val), 1); + if (rc) + printf("Unable to update property \"fpga\", err=%s\n", + fdt_strerror(rc)); +#endif } #endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */ diff --git a/board/socrates/tlb.c b/board/socrates/tlb.c index b80caea5e0..aea99ada20 100644 --- a/board/socrates/tlb.c +++ b/board/socrates/tlb.c @@ -46,16 +46,13 @@ struct fsl_e_tlb_entry tlb_table[] = { /* - * TLB 0, 1: 128M Non-cacheable, guarded - * 0xf8000000 128M FLASH + * TLB 0: 64M Non-cacheable, guarded + * 0xfc000000 64M FLASH * Out of reset this entry is only 4K. */ SET_TLB_ENTRY(1, CFG_FLASH_BASE, CFG_FLASH_BASE, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 1, BOOKE_PAGESZ_64M, 1), - SET_TLB_ENTRY(1, CFG_FLASH_BASE + 0x4000000, CFG_FLASH_BASE + 0x4000000, - MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, - 0, 0, BOOKE_PAGESZ_64M, 1), /* * TLB 2: 256M Non-cacheable, guarded @@ -73,21 +70,15 @@ struct fsl_e_tlb_entry tlb_table[] = { MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 3, BOOKE_PAGESZ_256M, 1), +#if defined(CFG_FPGA_BASE) /* - * TLB 4: 256M Non-cacheable, guarded - * 0xc0000000 256M Rapid IO MEM First half - */ - SET_TLB_ENTRY(1, CFG_RIO_MEM_BASE, CFG_RIO_MEM_BASE, - MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, - 0, 4, BOOKE_PAGESZ_256M, 1), - - /* - * TLB 5: 256M Non-cacheable, guarded - * 0xd0000000 256M Rapid IO MEM Second half + * TLB 4: 1M Non-cacheable, guarded + * 0xc0000000 1M FPGA and NAND */ - SET_TLB_ENTRY(1, CFG_RIO_MEM_BASE + 0x10000000, CFG_RIO_MEM_BASE + 0x10000000, + SET_TLB_ENTRY(1, CFG_FPGA_BASE, CFG_FPGA_BASE, MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, - 0, 5, BOOKE_PAGESZ_256M, 1), + 0, 4, BOOKE_PAGESZ_1M, 1), +#endif /* * TLB 6: 64M Non-cacheable, guarded diff --git a/board/socrates/upm_table.h b/board/socrates/upm_table.h new file mode 100644 index 0000000000..ea64a59a0c --- /dev/null +++ b/board/socrates/upm_table.h @@ -0,0 +1,55 @@ +/* + * (C) Copyright 2008 + * Sergei Poselenov, Emcraft Systems, sposelenov@emcraft.com. + * + * Copyright 2004, 2007 Freescale Semiconductor, Inc. + * (C) Copyright 2003 Motorola Inc. + * Xianghua Xiao, (X.Xiao@motorola.com) + * + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __UPM_TABLE_H +#define __UPM_TABLE_H + +/* UPM Table Configuration Code for FPGA access */ +static const unsigned int UPMTableA[] = +{ + 0x00fcfc00, 0x00fcfc00, 0x00fcfc00, 0x00fcfc00, /* Words 0 to 3 */ + 0x00fcfc00, 0x00fcfc00, 0x00fcfc00, 0x00fcfc05, /* Words 4 to 7 */ + 0x00fcfc00, 0x00fcfc00, 0x00fcfc04, 0x00fcfc04, /* Words 8 to 11 */ + 0x00fcfc04, 0x00fcfc04, 0x00fcfc04, 0x00fcfc04, /* Words 12 to 15 */ + 0x00fcfc04, 0x00fcfc04, 0x00fcfc00, 0xfffffc00, /* Words 16 to 19 */ + 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01, /* Words 20 to 23 */ + 0x0ffffc00, 0x0ffffc00, 0x0ffffc00, 0x00f3fc04, /* Words 24 to 27 */ + 0x0ffffc00, 0xfffffc01, 0xfffffc00, 0xfffffc01, /* Words 28 to 31 */ + 0x0ffffc00, 0x00f3fc04, 0x00f3fc04, 0x00f3fc04, /* Words 32 to 35 */ + 0x00f3fc04, 0x00f3fc04, 0x00f3fc04, 0x00f3fc04, /* Words 36 to 39 */ + 0x00f3fc04, 0x0ffffc00, 0xfffffc00, 0xfffffc00, /* Words 40 to 43 */ + 0xfffffc01, 0xfffffc00, 0xfffffc00, 0xfffffc01, /* Words 44 to 47 */ + 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, /* Words 48 to 51 */ + 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, /* Words 52 to 55 */ + 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01, /* Words 56 to 59 */ + 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01 /* Words 60 to 63 */ +}; + +#endif diff --git a/board/sorcery/Makefile b/board/sorcery/Makefile index e02916f708..434d348980 100644 --- a/board/sorcery/Makefile +++ b/board/sorcery/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/sorcery/sorcery.c b/board/sorcery/sorcery.c index 165e9e2999..2b789d4741 100644 --- a/board/sorcery/sorcery.c +++ b/board/sorcery/sorcery.c @@ -27,7 +27,7 @@ #include <asm/mmu.h> #include <pci.h> -long int initdram (int board_type) +phys_size_t initdram (int board_type) { ulong size; diff --git a/board/spc1920/spc1920.c b/board/spc1920/spc1920.c index 1f5dcb5d3e..a32aad0ee4 100644 --- a/board/spc1920/spc1920.c +++ b/board/spc1920/spc1920.c @@ -82,7 +82,7 @@ const uint sdram_table[] = { _NOT_USED_, _NOT_USED_, _NOT_USED_, }; -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immr = (immap_t *) CFG_IMMR; volatile memctl8xx_t *memctl = &immr->im_memctl; diff --git a/board/spd8xx/spd8xx.c b/board/spd8xx/spd8xx.c index c79b9b0dd5..6387f8a65c 100644 --- a/board/spd8xx/spd8xx.c +++ b/board/spd8xx/spd8xx.c @@ -143,7 +143,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; diff --git a/board/ssv/adnpesc1/Makefile b/board/ssv/adnpesc1/Makefile index 5b87b75e76..40f04b81f0 100644 --- a/board/ssv/adnpesc1/Makefile +++ b/board/ssv/adnpesc1/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/ssv/adnpesc1/adnpesc1.c b/board/ssv/adnpesc1/adnpesc1.c index 2ec3a728d7..71de20899e 100644 --- a/board/ssv/adnpesc1/adnpesc1.c +++ b/board/ssv/adnpesc1/adnpesc1.c @@ -57,7 +57,7 @@ int checkboard (void) return 0; } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { return (0); } @@ -69,25 +69,24 @@ long int initdram (int board_type) #define SPI_RTC_CS_MASK 0x00000001 -void spi_rtc_chipsel(int cs) +int spi_cs_is_valid(unsigned int bus, unsigned int cs) +{ + return bus == 0 && cs == 0; +} + +void spi_cs_activate(struct spi_slave *slave) { nios_spi_t *spi = (nios_spi_t *)CFG_NIOS_SPIBASE; - if (cs) - spi->slaveselect = SPI_RTC_CS_MASK; /* activate (1) */ - else - spi->slaveselect = 0; /* deactivate (0) */ + spi->slaveselect = SPI_RTC_CS_MASK; /* activate (1) */ } -/* - * The SPI command uses this table of functions for controlling the SPI - * chip selects: it calls the appropriate function to control the SPI - * chip selects. - */ -spi_chipsel_type spi_chipsel[] = { - spi_rtc_chipsel -}; -int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]); +void spi_cs_deactivate(struct spi_slave *slave) +{ + nios_spi_t *spi = (nios_spi_t *)CFG_NIOS_SPIBASE; + + spi->slaveselect = 0; /* deactivate (0) */ +} #endif diff --git a/board/stxgp3/Makefile b/board/stxgp3/Makefile index 28d6cb9976..325d6d5722 100644 --- a/board/stxgp3/Makefile +++ b/board/stxgp3/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(OBJS) $(SOBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/stxgp3/law.c b/board/stxgp3/law.c index 312b3c5571..a7e9ceb033 100644 --- a/board/stxgp3/law.c +++ b/board/stxgp3/law.c @@ -46,13 +46,13 @@ struct law_entry law_table[] = { #ifndef CONFIG_SPD_EEPROM - SET_LAW_ENTRY(1, CFG_DDR_SDRAM_BASE, LAW_SIZE_128M, LAW_TRGT_IF_DDR), + SET_LAW(CFG_DDR_SDRAM_BASE, LAW_SIZE_128M, LAW_TRGT_IF_DDR), #endif - SET_LAW_ENTRY(2, CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), + SET_LAW(CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), /* This is not so much the SDRAM map as it is the whole localbus map. */ - SET_LAW_ENTRY(3, CFG_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC), - SET_LAW_ENTRY(4, CFG_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI), - SET_LAW_ENTRY(5, CFG_RIO_MEM_BASE, LAWAR_SIZE_512M, LAW_TRGT_IF_RIO), + SET_LAW(CFG_LBC_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC), + SET_LAW(CFG_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI), + SET_LAW(CFG_RIO_MEM_BASE, LAWAR_SIZE_512M, LAW_TRGT_IF_RIO), }; int num_law_entries = ARRAY_SIZE(law_table); diff --git a/board/stxgp3/stxgp3.c b/board/stxgp3/stxgp3.c index f04ffa8046..218e8053f1 100644 --- a/board/stxgp3/stxgp3.c +++ b/board/stxgp3/stxgp3.c @@ -275,7 +275,7 @@ show_activity(int flag) next_led_update += (get_tbclk() / 4); } -long int +phys_size_t initdram (int board_type) { long dram_size = 0; diff --git a/board/stxssa/Makefile b/board/stxssa/Makefile index f1f5d0b1bf..e29cf95e3c 100644 --- a/board/stxssa/Makefile +++ b/board/stxssa/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(OBJS) $(SOBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/stxssa/law.c b/board/stxssa/law.c index 2b25292988..8730cdfc4e 100644 --- a/board/stxssa/law.c +++ b/board/stxssa/law.c @@ -47,14 +47,14 @@ struct law_entry law_table[] = { #ifndef CONFIG_SPD_EEPROM - SET_LAW_ENTRY(1, CFG_DDR_SDRAM_BASE, LAW_SIZE_128M, LAW_TRGT_IF_DDR), + SET_LAW(CFG_DDR_SDRAM_BASE, LAW_SIZE_128M, LAW_TRGT_IF_DDR), #endif - SET_LAW_ENTRY(2, CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_1), - SET_LAW_ENTRY(3, CFG_PCI2_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2), - SET_LAW_ENTRY(4, CFG_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI_1), - SET_LAW_ENTRY(5, CFG_PCI2_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI_2), + SET_LAW(CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_1), + SET_LAW(CFG_PCI2_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2), + SET_LAW(CFG_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI_1), + SET_LAW(CFG_PCI2_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI_2), /* Map the whole localbus, including flash and reset latch. */ - SET_LAW_ENTRY(6, CFG_LBC_OPTION_BASE, LAWAR_SIZE_256M, LAW_TRGT_IF_LBC), + SET_LAW(CFG_LBC_OPTION_BASE, LAWAR_SIZE_256M, LAW_TRGT_IF_LBC), }; int num_law_entries = ARRAY_SIZE(law_table); diff --git a/board/stxssa/stxssa.c b/board/stxssa/stxssa.c index 08177e1aec..2c4b54642a 100644 --- a/board/stxssa/stxssa.c +++ b/board/stxssa/stxssa.c @@ -291,7 +291,7 @@ show_activity(int flag) next_led_update += (get_tbclk() / 4); } -long int +phys_size_t initdram (int board_type) { long dram_size = 0; diff --git a/board/stxxtc/stxxtc.c b/board/stxxtc/stxxtc.c index 87a2022761..a750374393 100644 --- a/board/stxxtc/stxxtc.c +++ b/board/stxxtc/stxxtc.c @@ -399,7 +399,7 @@ void check_ram(unsigned int addr, unsigned int size) #define DO_LOOP do { for (;;) asm volatile ("nop" : : : "memory"); } while(0) -long int initdram(int board_type) +phys_size_t initdram(int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; diff --git a/board/svm_sc8xx/svm_sc8xx.c b/board/svm_sc8xx/svm_sc8xx.c index b900e6bd1b..06fb18b344 100644 --- a/board/svm_sc8xx/svm_sc8xx.c +++ b/board/svm_sc8xx/svm_sc8xx.c @@ -100,7 +100,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *)CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; diff --git a/board/sx1/Makefile b/board/sx1/Makefile index 609ca75c4d..4c11030ed6 100644 --- a/board/sx1/Makefile +++ b/board/sx1/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/tb0229/lowlevel_init.S b/board/tb0229/lowlevel_init.S index df318067b9..5fce8567d7 100644 --- a/board/tb0229/lowlevel_init.S +++ b/board/tb0229/lowlevel_init.S @@ -10,7 +10,6 @@ */ #include <config.h> -#include <version.h> #include <asm/regdef.h> diff --git a/board/tb0229/tb0229.c b/board/tb0229/tb0229.c index d08b422451..921bd3adcd 100644 --- a/board/tb0229/tb0229.c +++ b/board/tb0229/tb0229.c @@ -32,7 +32,7 @@ void pci_init_board (void) } #endif -long int initdram(int board_type) +phys_size_t initdram(int board_type) { return get_ram_size (CFG_SDRAM_BASE, 0x8000000); } diff --git a/board/tb0229/vr4131-pci.c b/board/tb0229/vr4131-pci.c index 0ee4bf30ea..4c9192341e 100644 --- a/board/tb0229/vr4131-pci.c +++ b/board/tb0229/vr4131-pci.c @@ -13,34 +13,34 @@ #include <pci.h> #include <asm/addrspace.h> -#define VR4131_PCIMMAW1REG (volatile unsigned int*)(KSEG1 + 0x0f000c00) -#define VR4131_PCIMMAW2REG (volatile unsigned int*)(KSEG1 + 0x0f000c04) -#define VR4131_PCITAW1REG (volatile unsigned int*)(KSEG1 + 0x0f000c08) -#define VR4131_PCITAW2REG (volatile unsigned int*)(KSEG1 + 0x0f000c0c) -#define VR4131_PCIMIOAWREG (volatile unsigned int*)(KSEG1 + 0x0f000c10) -#define VR4131_PCICONFDREG (volatile unsigned int*)(KSEG1 + 0x0f000c14) -#define VR4131_PCICONFAREG (volatile unsigned int*)(KSEG1 + 0x0f000c18) -#define VR4131_PCIMAILREG (volatile unsigned int*)(KSEG1 + 0x0f000c1c) -#define VR4131_BUSERRADREG (volatile unsigned int*)(KSEG1 + 0x0f000c24) -#define VR4131_INTCNTSTAREG (volatile unsigned int*)(KSEG1 + 0x0f000c28) -#define VR4131_PCIEXACCREG (volatile unsigned int*)(KSEG1 + 0x0f000c2c) -#define VR4131_PCIRECONTREG (volatile unsigned int*)(KSEG1 + 0x0f000c30) -#define VR4131_PCIENREG (volatile unsigned int*)(KSEG1 + 0x0f000c34) -#define VR4131_PCICLKSELREG (volatile unsigned int*)(KSEG1 + 0x0f000c38) -#define VR4131_PCITRDYREG (volatile unsigned int*)(KSEG1 + 0x0f000c3c) -#define VR4131_PCICLKRUNREG (volatile unsigned int*)(KSEG1 + 0x0f000c60) -#define VR4131_PCIHOSTCONFIG (volatile unsigned int*)(KSEG1 + 0x0f000d00) -#define VR4131_VENDORIDREG (volatile unsigned int*)(KSEG1 + 0x0f000d00) -#define VR4131_DEVICEIDREG (volatile unsigned int*)(KSEG1 + 0x0f000d00) -#define VR4131_COMMANDREG (volatile unsigned int*)(KSEG1 + 0x0f000d04) -#define VR4131_STATUSREG (volatile unsigned int*)(KSEG1 + 0x0f000d04) -#define VR4131_REVREG (volatile unsigned int*)(KSEG1 + 0x0f000d08) -#define VR4131_CLASSREG (volatile unsigned int*)(KSEG1 + 0x0f000d08) -#define VR4131_CACHELSREG (volatile unsigned int*)(KSEG1 + 0x0f000d0c) -#define VR4131_LATTIMERRG (volatile unsigned int*)(KSEG1 + 0x0f000d0c) -#define VR4131_MAILBAREG (volatile unsigned int*)(KSEG1 + 0x0f000d10) -#define VR4131_PCIMBA1REG (volatile unsigned int*)(KSEG1 + 0x0f000d14) -#define VR4131_PCIMBA2REG (volatile unsigned int*)(KSEG1 + 0x0f000d18) +#define VR4131_PCIMMAW1REG (volatile unsigned int *)(CKSEG1 + 0x0f000c00) +#define VR4131_PCIMMAW2REG (volatile unsigned int *)(CKSEG1 + 0x0f000c04) +#define VR4131_PCITAW1REG (volatile unsigned int *)(CKSEG1 + 0x0f000c08) +#define VR4131_PCITAW2REG (volatile unsigned int *)(CKSEG1 + 0x0f000c0c) +#define VR4131_PCIMIOAWREG (volatile unsigned int *)(CKSEG1 + 0x0f000c10) +#define VR4131_PCICONFDREG (volatile unsigned int *)(CKSEG1 + 0x0f000c14) +#define VR4131_PCICONFAREG (volatile unsigned int *)(CKSEG1 + 0x0f000c18) +#define VR4131_PCIMAILREG (volatile unsigned int *)(CKSEG1 + 0x0f000c1c) +#define VR4131_BUSERRADREG (volatile unsigned int *)(CKSEG1 + 0x0f000c24) +#define VR4131_INTCNTSTAREG (volatile unsigned int *)(CKSEG1 + 0x0f000c28) +#define VR4131_PCIEXACCREG (volatile unsigned int *)(CKSEG1 + 0x0f000c2c) +#define VR4131_PCIRECONTREG (volatile unsigned int *)(CKSEG1 + 0x0f000c30) +#define VR4131_PCIENREG (volatile unsigned int *)(CKSEG1 + 0x0f000c34) +#define VR4131_PCICLKSELREG (volatile unsigned int *)(CKSEG1 + 0x0f000c38) +#define VR4131_PCITRDYREG (volatile unsigned int *)(CKSEG1 + 0x0f000c3c) +#define VR4131_PCICLKRUNREG (volatile unsigned int *)(CKSEG1 + 0x0f000c60) +#define VR4131_PCIHOSTCONFIG (volatile unsigned int *)(CKSEG1 + 0x0f000d00) +#define VR4131_VENDORIDREG (volatile unsigned int *)(CKSEG1 + 0x0f000d00) +#define VR4131_DEVICEIDREG (volatile unsigned int *)(CKSEG1 + 0x0f000d00) +#define VR4131_COMMANDREG (volatile unsigned int *)(CKSEG1 + 0x0f000d04) +#define VR4131_STATUSREG (volatile unsigned int *)(CKSEG1 + 0x0f000d04) +#define VR4131_REVREG (volatile unsigned int *)(CKSEG1 + 0x0f000d08) +#define VR4131_CLASSREG (volatile unsigned int *)(CKSEG1 + 0x0f000d08) +#define VR4131_CACHELSREG (volatile unsigned int *)(CKSEG1 + 0x0f000d0c) +#define VR4131_LATTIMERRG (volatile unsigned int *)(CKSEG1 + 0x0f000d0c) +#define VR4131_MAILBAREG (volatile unsigned int *)(CKSEG1 + 0x0f000d10) +#define VR4131_PCIMBA1REG (volatile unsigned int *)(CKSEG1 + 0x0f000d14) +#define VR4131_PCIMBA2REG (volatile unsigned int *)(CKSEG1 + 0x0f000d18) /*#define VR41XX_PCIIRQ_OFFSET (VR41XX_IRQ_MAX + 1) */ /*#define VR41XX_PCIIRQ_MAX (VR41XX_IRQ_MAX + 12) */ diff --git a/board/total5200/Makefile b/board/total5200/Makefile index 10e5fc3406..a8abd7d781 100644 --- a/board/total5200/Makefile +++ b/board/total5200/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/total5200/total5200.c b/board/total5200/total5200.c index c8d4c67102..868ebd5f54 100644 --- a/board/total5200/total5200.c +++ b/board/total5200/total5200.c @@ -36,7 +36,7 @@ #include "mt48lc16m16a2-75.h" #endif -long int initdram (int board_type) +phys_size_t initdram (int board_type) { sdram_conf_t sdram_conf; diff --git a/board/tqm5200/Makefile b/board/tqc/tqm5200/Makefile index a5ce7bd46f..ce125e2b96 100644 --- a/board/tqm5200/Makefile +++ b/board/tqc/tqm5200/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend cam5200_flash.o: cam5200_flash.c $(CC) $(CFLAGS) -fno-strict-aliasing -c -o $@ $< diff --git a/board/tqm5200/cam5200_flash.c b/board/tqc/tqm5200/cam5200_flash.c index b3f095d807..b3f095d807 100644 --- a/board/tqm5200/cam5200_flash.c +++ b/board/tqc/tqm5200/cam5200_flash.c diff --git a/board/tqm5200/cmd_stk52xx.c b/board/tqc/tqm5200/cmd_stk52xx.c index 7472ca9e97..7472ca9e97 100644 --- a/board/tqm5200/cmd_stk52xx.c +++ b/board/tqc/tqm5200/cmd_stk52xx.c diff --git a/board/tqm5200/cmd_tb5200.c b/board/tqc/tqm5200/cmd_tb5200.c index 214dca65e5..214dca65e5 100644 --- a/board/tqm5200/cmd_tb5200.c +++ b/board/tqc/tqm5200/cmd_tb5200.c diff --git a/board/tqm5200/config.mk b/board/tqc/tqm5200/config.mk index d72dfe7481..d72dfe7481 100644 --- a/board/tqm5200/config.mk +++ b/board/tqc/tqm5200/config.mk diff --git a/board/tqm5200/mt48lc16m16a2-75.h b/board/tqc/tqm5200/mt48lc16m16a2-75.h index 3f1e1691bb..3f1e1691bb 100644 --- a/board/tqm5200/mt48lc16m16a2-75.h +++ b/board/tqc/tqm5200/mt48lc16m16a2-75.h diff --git a/board/tqm5200/tqm5200.c b/board/tqc/tqm5200/tqm5200.c index f9891dbb74..8b8e461374 100644 --- a/board/tqm5200/tqm5200.c +++ b/board/tqc/tqm5200/tqm5200.c @@ -104,7 +104,7 @@ static void sdram_start (int hi_addr) * is something else than 0x00000000. */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { ulong dramsize = 0; ulong dramsize2 = 0; diff --git a/board/tqm8260/Makefile b/board/tqc/tqm8260/Makefile index 61221fdca2..61221fdca2 100644 --- a/board/tqm8260/Makefile +++ b/board/tqc/tqm8260/Makefile diff --git a/board/tqm8260/config.mk b/board/tqc/tqm8260/config.mk index 1fe99524c6..1fe99524c6 100644 --- a/board/tqm8260/config.mk +++ b/board/tqc/tqm8260/config.mk diff --git a/board/tqm8260/flash.c b/board/tqc/tqm8260/flash.c index 056fe810b3..056fe810b3 100644 --- a/board/tqm8260/flash.c +++ b/board/tqc/tqm8260/flash.c diff --git a/board/tqm8260/tqm8260.c b/board/tqc/tqm8260/tqm8260.c index 736c410ede..f201045d95 100644 --- a/board/tqm8260/tqm8260.c +++ b/board/tqc/tqm8260/tqm8260.c @@ -283,7 +283,7 @@ static long int try_init (volatile memctl8260_t * memctl, ulong sdmr, return (size); } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8260_t *memctl = &immap->im_memctl; diff --git a/board/tqm8272/Makefile b/board/tqc/tqm8272/Makefile index 6730263512..6730263512 100644 --- a/board/tqm8272/Makefile +++ b/board/tqc/tqm8272/Makefile diff --git a/board/tqm8272/config.mk b/board/tqc/tqm8272/config.mk index af7a81e335..af7a81e335 100644 --- a/board/tqm8272/config.mk +++ b/board/tqc/tqm8272/config.mk diff --git a/board/tqm8272/tqm8272.c b/board/tqc/tqm8272/tqm8272.c index 7bd64012c4..29099f5ed1 100644 --- a/board/tqm8272/tqm8272.c +++ b/board/tqc/tqm8272/tqm8272.c @@ -30,10 +30,6 @@ #include <pci.h> #include <asm/m8260_pci.h> #endif -#if CONFIG_OF_FLAT_TREE -#include <ft_build.h> -#include <image.h> -#endif #if 0 #define deb_printf(fmt,arg...) \ @@ -559,7 +555,7 @@ static long int try_init (volatile memctl8260_t * memctl, ulong sdmr, return (size); } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8260_t *memctl = &immap->im_memctl; diff --git a/board/tqm834x/Makefile b/board/tqc/tqm834x/Makefile index 4c0d20417e..8889726aeb 100644 --- a/board/tqm834x/Makefile +++ b/board/tqc/tqm834x/Makefile @@ -40,7 +40,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/tqm834x/config.mk b/board/tqc/tqm834x/config.mk index f172c4ede0..f172c4ede0 100644 --- a/board/tqm834x/config.mk +++ b/board/tqc/tqm834x/config.mk diff --git a/board/tqm834x/pci.c b/board/tqc/tqm834x/pci.c index e3d0309d90..e3d0309d90 100644 --- a/board/tqm834x/pci.c +++ b/board/tqc/tqm834x/pci.c diff --git a/board/tqm834x/tqm834x.c b/board/tqc/tqm834x/tqm834x.c index aea985ccc6..278780dde5 100644 --- a/board/tqm834x/tqm834x.c +++ b/board/tqc/tqm834x/tqm834x.c @@ -85,7 +85,7 @@ int board_early_init_r (void) { /************************************************************************** * DRAM initalization and size detection */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { long bank_size; long size; diff --git a/board/tqm85xx/Makefile b/board/tqc/tqm85xx/Makefile index 52f5ef9454..adda9d45b7 100644 --- a/board/tqm85xx/Makefile +++ b/board/tqc/tqm85xx/Makefile @@ -25,8 +25,14 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).a -COBJS := $(BOARD).o sdram.o law.o tlb.o +COBJS-y += $(BOARD).o +COBJS-y += sdram.o +COBJS-y += law.o +COBJS-y += tlb.o +COBJS-$(CONFIG_NAND) += nand.o + +COBJS := $(COBJS-y) SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) SOBJS := $(addprefix $(obj),$(SOBJS)) @@ -38,7 +44,7 @@ clean: rm -f $(OBJS) $(SOBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/tqm85xx/config.mk b/board/tqc/tqm85xx/config.mk index 52e84ad772..52e84ad772 100644 --- a/board/tqm85xx/config.mk +++ b/board/tqc/tqm85xx/config.mk diff --git a/board/tqc/tqm85xx/law.c b/board/tqc/tqm85xx/law.c new file mode 100644 index 0000000000..de3ea00e38 --- /dev/null +++ b/board/tqc/tqm85xx/law.c @@ -0,0 +1,86 @@ +/* + * Copyright 2008 Freescale Semiconductor, Inc. + * + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/fsl_law.h> +#include <asm/mmu.h> + +/* + * LAW(Local Access Window) configuration: + * + * Standard mapping: + * + * 0x0000_0000 0x7fff_ffff DDR 2G + * 0x8000_0000 0x9fff_ffff PCI1 MEM 512M + * 0xc000_0000 0xdfff_ffff RapidIO or PCI express 512M + * 0xe000_0000 0xe000_ffff CCSR 1M + * 0xe200_0000 0xe2ff_ffff PCI1 IO 16M + * 0xe300_0000 0xe3ff_ffff CAN and NAND Flash 16M + * 0xef00_0000 0xefff_ffff PCI express IO 16M + * 0xfc00_0000 0xffff_ffff FLASH (boot bank) 128M + * + * Big FLASH mapping: + * + * 0x0000_0000 0x7fff_ffff DDR 2G + * 0x8000_0000 0x9fff_ffff PCI1 MEM 512M + * 0xa000_0000 0xa000_ffff CCSR 1M + * 0xa200_0000 0xa2ff_ffff PCI1 IO 16M + * 0xa300_0000 0xa3ff_ffff CAN and NAND Flash 16M + * 0xaf00_0000 0xafff_ffff PCI express IO 16M + * 0xb000_0000 0xbfff_ffff RapidIO or PCI express 256M + * 0xc000_0000 0xffff_ffff FLASH (boot bank) 1G + * + * Notes: + * CCSRBAR and L2-as-SRAM don't need a configured Local Access Window. + * If flash is 8M at default position (last 8M), no LAW needed. + */ + +#ifdef CONFIG_TQM_BIGFLASH +#define LAW_3_SIZE LAW_SIZE_1G +#define LAW_5_SIZE LAW_SIZE_256M +#else +#define LAW_3_SIZE LAW_SIZE_128M +#define LAW_5_SIZE LAW_SIZE_512M +#endif + +struct law_entry law_table[] = { + SET_LAW(CFG_DDR_SDRAM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_DDR), + SET_LAW(CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), + SET_LAW(CFG_LBC_FLASH_BASE, LAW_3_SIZE, LAW_TRGT_IF_LBC), + SET_LAW(CFG_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI), +#ifdef CONFIG_PCIE1 + SET_LAW(CFG_PCIE1_MEM_BASE, LAW_5_SIZE, LAW_TRGT_IF_PCIE_1), +#else /* !CONFIG_PCIE1 */ + SET_LAW(CFG_RIO_MEM_BASE, LAW_5_SIZE, LAW_TRGT_IF_RIO), +#endif /* CONFIG_PCIE1 */ +#if defined(CONFIG_CAN_DRIVER) || defined(CONFIG_NAND) + SET_LAW(CFG_CAN_BASE, LAW_SIZE_16M, LAW_TRGT_IF_LBC), +#endif /* CONFIG_CAN_DRIVER || CONFIG_NAND */ +#ifdef CONFIG_PCIE1 + SET_LAW(CFG_PCIE1_IO_BASE, LAW_SIZE_16M, LAW_TRGT_IF_PCIE_1), +#endif /* CONFIG_PCIE */ +}; + +int num_law_entries = ARRAY_SIZE (law_table); diff --git a/board/tqc/tqm85xx/nand.c b/board/tqc/tqm85xx/nand.c new file mode 100644 index 0000000000..9c5c12c844 --- /dev/null +++ b/board/tqc/tqm85xx/nand.c @@ -0,0 +1,469 @@ +/* + * (C) Copyright 2008 Wolfgang Grandegger <wg@denx.de> + * + * (C) Copyright 2006 + * Thomas Waehner, TQ-System GmbH, thomas.waehner@tqs.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/processor.h> +#include <asm/immap_85xx.h> +#include <asm/processor.h> +#include <asm/mmu.h> +#include <asm/io.h> +#include <asm/errno.h> +#include <linux/mtd/mtd.h> +#include <linux/mtd/fsl_upm.h> +#include <ioports.h> + +#include <nand.h> + +DECLARE_GLOBAL_DATA_PTR; + +extern uint get_lbc_clock (void); + +/* index of UPM RAM array run pattern for NAND command cycle */ +#define CFG_NAN_UPM_WRITE_CMD_OFS 0x08 + +/* index of UPM RAM array run pattern for NAND address cycle */ +#define CFG_NAND_UPM_WRITE_ADDR_OFS 0x10 + +/* Structure for table with supported UPM timings */ +struct upm_freq { + ulong freq; + const u32 *upm_patt; + uchar gpl4_disable; + uchar ehtr; + uchar ead; +}; + +/* NAND-FLASH UPM tables for TQM85XX according to TQM8548.pq.timing.101.doc */ + +/* UPM pattern for bus clock = 25 MHz */ +static const u32 upm_patt_25[] = { + /* Offset */ /* UPM Read Single RAM array entry -> NAND Read Data */ + /* 0x00 */ 0x0ff32000, 0x0fa32000, 0x3fb32005, 0xfffffc00, + /* 0x04 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + + /* UPM Read Burst RAM array entry -> NAND Write CMD */ + /* 0x08 */ 0x00ff2c30, 0x00ff2c30, 0x0fff2c35, 0xfffffc00, + /* 0x0C */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + + /* UPM Read Burst RAM array entry -> NAND Write ADDR */ + /* 0x10 */ 0x00f3ec30, 0x00f3ec30, 0x0ff3ec35, 0xfffffc00, + /* 0x14 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + + /* UPM Write Single RAM array entry -> NAND Write Data */ + /* 0x18 */ 0x00f32c00, 0x00f32c00, 0x0ff32c05, 0xfffffc00, + /* 0x1C */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + + /* UPM Write Burst RAM array entry -> unused */ + /* 0x20 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x24 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x28 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x2C */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01, + + /* UPM Refresh Timer RAM array entry -> unused */ + /* 0x30 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x34 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x38 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01, + + /* UPM Exception RAM array entry -> unsused */ + /* 0x3C */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01, +}; + +/* UPM pattern for bus clock = 33.3 MHz */ +static const u32 upm_patt_33[] = { + /* Offset */ /* UPM Read Single RAM array entry -> NAND Read Data */ + /* 0x00 */ 0x0ff32000, 0x0fa32100, 0x3fb32005, 0xfffffc00, + /* 0x04 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + + /* UPM Read Burst RAM array entry -> NAND Write CMD */ + /* 0x08 */ 0x00ff2c30, 0x00ff2c30, 0x0fff2c35, 0xfffffc00, + /* 0x0C */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + + /* UPM Read Burst RAM array entry -> NAND Write ADDR */ + /* 0x10 */ 0x00f3ec30, 0x00f3ec30, 0x0ff3ec35, 0xfffffc00, + /* 0x14 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + + /* UPM Write Single RAM array entry -> NAND Write Data */ + /* 0x18 */ 0x00f32c00, 0x00f32c00, 0x0ff32c05, 0xfffffc00, + /* 0x1C */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + + /* UPM Write Burst RAM array entry -> unused */ + /* 0x20 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x24 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x28 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x2C */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01, + + /* UPM Refresh Timer RAM array entry -> unused */ + /* 0x30 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x34 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x38 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01, + + /* UPM Exception RAM array entry -> unsused */ + /* 0x3C */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01, +}; + +/* UPM pattern for bus clock = 41.7 MHz */ +static const u32 upm_patt_42[] = { + /* Offset */ /* UPM Read Single RAM array entry -> NAND Read Data */ + /* 0x00 */ 0x0ff32000, 0x0fa32100, 0x3fb32005, 0xfffffc00, + /* 0x04 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + + /* UPM Read Burst RAM array entry -> NAND Write CMD */ + /* 0x08 */ 0x00ff2c30, 0x00ff2c30, 0x0fff2c35, 0xfffffc00, + /* 0x0C */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + + /* UPM Read Burst RAM array entry -> NAND Write ADDR */ + /* 0x10 */ 0x00f3ec30, 0x00f3ec30, 0x0ff3ec35, 0xfffffc00, + /* 0x14 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + + /* UPM Write Single RAM array entry -> NAND Write Data */ + /* 0x18 */ 0x00f32c00, 0x00f32c00, 0x0ff32c05, 0xfffffc00, + /* 0x1C */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + + /* UPM Write Burst RAM array entry -> unused */ + /* 0x20 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x24 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x28 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x2C */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01, + + /* UPM Refresh Timer RAM array entry -> unused */ + /* 0x30 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x34 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x38 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01, + + /* UPM Exception RAM array entry -> unsused */ + /* 0x3C */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01, +}; + +/* UPM pattern for bus clock = 50 MHz */ +static const u32 upm_patt_50[] = { + /* Offset */ /* UPM Read Single RAM array entry -> NAND Read Data */ + /* 0x00 */ 0x0ff33000, 0x0fa33100, 0x0fa33005, 0xfffffc00, + /* 0x04 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + + /* UPM Read Burst RAM array entry -> NAND Write CMD */ + /* 0x08 */ 0x00ff3d30, 0x00ff3c30, 0x0fff3c35, 0xfffffc00, + /* 0x0C */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + + /* UPM Read Burst RAM array entry -> NAND Write ADDR */ + /* 0x10 */ 0x00f3fd30, 0x00f3fc30, 0x0ff3fc35, 0xfffffc00, + /* 0x14 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + + /* UPM Write Single RAM array entry -> NAND Write Data */ + /* 0x18 */ 0x00f33d00, 0x00f33c00, 0x0ff33c05, 0xfffffc00, + /* 0x1C */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + + /* UPM Write Burst RAM array entry -> unused */ + /* 0x20 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x24 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x28 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x2C */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01, + + /* UPM Refresh Timer RAM array entry -> unused */ + /* 0x30 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x34 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x38 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01, + + /* UPM Exception RAM array entry -> unsused */ + /* 0x3C */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01, +}; + +/* UPM pattern for bus clock = 66.7 MHz */ +static const u32 upm_patt_67[] = { + /* Offset */ /* UPM Read Single RAM array entry -> NAND Read Data */ + /* 0x00 */ 0x0ff33000, 0x0fe33000, 0x0fa33100, 0x0fa33000, + /* 0x04 */ 0x0fa33005, 0xfffffc00, 0xfffffc00, 0xfffffc00, + + /* UPM Read Burst RAM array entry -> NAND Write CMD */ + /* 0x08 */ 0x00ff3d30, 0x00ff3c30, 0x0fff3c30, 0x0fff3c35, + /* 0x0C */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + + /* UPM Read Burst RAM array entry -> NAND Write ADDR */ + /* 0x10 */ 0x00f3fd30, 0x00f3fc30, 0x0ff3fc30, 0x0ff3fc35, + /* 0x14 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + + /* UPM Write Single RAM array entry -> NAND Write Data */ + /* 0x18 */ 0x00f33d00, 0x00f33c00, 0x0ff33c00, 0x0ff33c05, + /* 0x1C */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + + /* UPM Write Burst RAM array entry -> unused */ + /* 0x20 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x24 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x28 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x2C */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01, + + /* UPM Refresh Timer RAM array entry -> unused */ + /* 0x30 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x34 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x38 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01, + + /* UPM Exception RAM array entry -> unsused */ + /* 0x3C */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01, +}; + +/* UPM pattern for bus clock = 83.3 MHz */ +static const u32 upm_patt_83[] = { + /* Offset */ /* UPM Read Single RAM array entry -> NAND Read Data */ + /* 0x00 */ 0x0ff33000, 0x0fe33000, 0x0fa33100, 0x0fa33000, + /* 0x04 */ 0x0fa33005, 0xfffffc00, 0xfffffc00, 0xfffffc00, + + /* UPM Read Burst RAM array entry -> NAND Write CMD */ + /* 0x08 */ 0x00ff3e30, 0x00ff3c30, 0x0fff3c30, 0x0fff3c35, + /* 0x0C */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + + /* UPM Read Burst RAM array entry -> NAND Write ADDR */ + /* 0x10 */ 0x00f3fe30, 0x00f3fc30, 0x0ff3fc30, 0x0ff3fc35, + /* 0x14 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + + /* UPM Write Single RAM array entry -> NAND Write Data */ + /* 0x18 */ 0x00f33e00, 0x00f33c00, 0x0ff33c00, 0x0ff33c05, + /* 0x1C */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + + /* UPM Write Burst RAM array entry -> unused */ + /* 0x20 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x24 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x28 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x2C */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01, + + /* UPM Refresh Timer RAM array entry -> unused */ + /* 0x30 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x34 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x38 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01, + + /* UPM Exception RAM array entry -> unsused */ + /* 0x3C */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01, +}; + +/* UPM pattern for bus clock = 100 MHz */ +static const u32 upm_patt_100[] = { + /* Offset */ /* UPM Read Single RAM array entry -> NAND Read Data */ + /* 0x00 */ 0x0ff33100, 0x0fe33000, 0x0fa33200, 0x0fa33000, + /* 0x04 */ 0x0fa33005, 0xfffffc00, 0xfffffc00, 0xfffffc00, + + /* UPM Read Burst RAM array entry -> NAND Write CMD */ + /* 0x08 */ 0x00ff3f30, 0x00ff3c30, 0x0fff3c30, 0x0fff3c35, + /* 0x0C */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + + /* UPM Read Burst RAM array entry -> NAND Write ADDR */ + /* 0x10 */ 0x00f3ff30, 0x00f3fc30, 0x0ff3fc30, 0x0ff3fc35, + /* 0x14 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + + /* UPM Write Single RAM array entry -> NAND Write Data */ + /* 0x18 */ 0x00f33f00, 0x00f33c00, 0x0ff33c00, 0x0ff33c05, + /* 0x1C */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + + /* UPM Write Burst RAM array entry -> unused */ + /* 0x20 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x24 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x28 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x2C */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01, + + /* UPM Refresh Timer RAM array entry -> unused */ + /* 0x30 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x34 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x38 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01, + + /* UPM Exception RAM array entry -> unsused */ + /* 0x3C */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01, +}; + +/* UPM pattern for bus clock = 133.3 MHz */ +static const u32 upm_patt_133[] = { + /* Offset */ /* UPM Read Single RAM array entry -> NAND Read Data */ + /* 0x00 */ 0x0ff33100, 0x0fe33000, 0x0fa33300, 0x0fa33000, + /* 0x04 */ 0x0fa33000, 0x0fa33005, 0xfffffc00, 0xfffffc00, + + /* UPM Read Burst RAM array entry -> NAND Write CMD */ + /* 0x08 */ 0x00ff3f30, 0x00ff3d30, 0x0fff3d30, 0x0fff3c35, + /* 0x0C */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + + /* UPM Read Burst RAM array entry -> NAND Write ADDR */ + /* 0x10 */ 0x00f3ff30, 0x00f3fd30, 0x0ff3fd30, 0x0ff3fc35, + /* 0x14 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + + /* UPM Write Single RAM array entry -> NAND Write Data */ + /* 0x18 */ 0x00f33f00, 0x00f33d00, 0x0ff33d00, 0x0ff33c05, + /* 0x1C */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + + /* UPM Write Burst RAM array entry -> unused */ + /* 0x20 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x24 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x28 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x2C */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01, + + /* UPM Refresh Timer RAM array entry -> unused */ + /* 0x30 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x34 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x38 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01, + + /* UPM Exception RAM array entry -> unsused */ + /* 0x3C */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01, +}; + +/* UPM pattern for bus clock = 166.7 MHz */ +static const u32 upm_patt_167[] = { + /* Offset */ /* UPM Read Single RAM array entry -> NAND Read Data */ + /* 0x00 */ 0x0ff33200, 0x0fe33000, 0x0fa33300, 0x0fa33300, + /* 0x04 */ 0x0fa33005, 0xfffffc00, 0xfffffc00, 0xfffffc00, + + /* UPM Read Burst RAM array entry -> NAND Write CMD */ + /* 0x08 */ 0x00ff3f30, 0x00ff3f30, 0x0fff3e30, 0xffff3c35, + /* 0x0C */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + + /* UPM Read Burst RAM array entry -> NAND Write ADDR */ + /* 0x10 */ 0x00f3ff30, 0x00f3ff30, 0x0ff3fe30, 0x0ff3fc35, + /* 0x14 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + + /* UPM Write Single RAM array entry -> NAND Write Data */ + /* 0x18 */ 0x00f33f00, 0x00f33f00, 0x0ff33e00, 0x0ff33c05, + /* 0x1C */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + + /* UPM Write Burst RAM array entry -> unused */ + /* 0x20 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x24 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x28 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x2C */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01, + + /* UPM Refresh Timer RAM array entry -> unused */ + /* 0x30 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x34 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00, + /* 0x38 */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01, + + /* UPM Exception RAM array entry -> unsused */ + /* 0x3C */ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01, +}; + +/* Supported UPM timings */ +struct upm_freq upm_freq_table[] = { + /* nominal freq. | ptr to table | GPL4 dis. | EHTR | EAD */ + {25000000, upm_patt_25, 1, 0, 0}, + {33333333, upm_patt_33, 1, 0, 0}, + {41666666, upm_patt_42, 1, 0, 0}, + {50000000, upm_patt_50, 0, 0, 0}, + {66666666, upm_patt_67, 0, 0, 0}, + {83333333, upm_patt_83, 0, 0, 0}, + {100000000, upm_patt_100, 0, 1, 1}, + {133333333, upm_patt_133, 0, 1, 1}, + {166666666, upm_patt_167, 0, 1, 1}, +}; + +#define UPM_FREQS (sizeof(upm_freq_table) / sizeof(struct upm_freq)) + +volatile const u32 *nand_upm_patt; + +/* + * write into UPMB ram + */ +static void upmb_write (u_char addr, ulong val) +{ + volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR); + + out_be32 (&lbc->mdr, val); + + clrsetbits_be32(&lbc->mbmr, MxMR_MAD_MSK, + MxMR_OP_WARR | (addr & MxMR_MAD_MSK)); + + /* dummy access to perform write */ + out_8 ((void __iomem *)CFG_NAND0_BASE, 0); + + clrbits_be32(&lbc->mbmr, MxMR_OP_WARR); +} + +/* + * Initialize UPM for NAND flash access. + */ +static void nand_upm_setup (volatile ccsr_lbc_t *lbc) +{ + uint i; + uint or3 = CFG_OR3_PRELIM; + uint clock = get_lbc_clock (); + + out_be32 (&lbc->br3, 0); /* disable bank and reset all bits */ + out_be32 (&lbc->br3, CFG_BR3_PRELIM); + + /* + * Search appropriate UPM table for bus clock. + * If the bus clock exceeds a tolerated value, take the UPM timing for + * the next higher supported frequency to ensure that access works + * (even the access may be slower then). + */ + for (i = 0; (i < UPM_FREQS) && (clock > upm_freq_table[i].freq); i++) + ; + + if (i >= UPM_FREQS) + /* no valid entry found */ + /* take last entry with configuration for max. bus clock */ + i--; + + if (upm_freq_table[i].ehtr) { + /* EHTR must be set due to TQM8548 timing specification */ + or3 |= OR_UPM_EHTR; + } + if (upm_freq_table[i].ead) + /* EAD must be set due to TQM8548 timing specification */ + or3 |= OR_UPM_EAD; + + out_be32 (&lbc->or3, or3); + + /* Assign address of table */ + nand_upm_patt = upm_freq_table[i].upm_patt; + + for (i = 0; i < 64; i++) { + upmb_write (i, *nand_upm_patt); + nand_upm_patt++; + } + + /* Put UPM back to normal operation mode */ + if (upm_freq_table[i].gpl4_disable) + /* GPL4 must be disabled according to timing specification */ + out_be32 (&lbc->mbmr, MxMR_OP_NORM | MxMR_GPL_x4DIS); + + return; +} + +static struct fsl_upm_nand fun = { + .width = 8, + .upm_cmd_offset = 0x08, + .upm_addr_offset = 0x10, + .chip_delay = NAND_BIG_DELAY_US, +}; + +void board_nand_select_device (struct nand_chip *nand, int chip) +{ +} + +int board_nand_init (struct nand_chip *nand) +{ + volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR); + + if (!nand_upm_patt) + nand_upm_setup (lbc); + + fun.upm.io_addr = nand->IO_ADDR_R; + fun.upm.mxmr = (void __iomem *)&lbc->mbmr; + fun.upm.mdr = (void __iomem *)&lbc->mdr; + fun.upm.mar = (void __iomem *)&lbc->mar; + + return fsl_upm_nand_init (nand, &fun); +} diff --git a/board/tqc/tqm85xx/sdram.c b/board/tqc/tqm85xx/sdram.c new file mode 100644 index 0000000000..33bc4077e5 --- /dev/null +++ b/board/tqc/tqm85xx/sdram.c @@ -0,0 +1,371 @@ +/* + * (C) Copyright 2005 + * Stefan Roese, DENX Software Engineering, sr@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/processor.h> +#include <asm/immap_85xx.h> +#include <asm/processor.h> +#include <asm/mmu.h> + +struct sdram_conf_s { + unsigned long size; + unsigned long reg; +#ifdef CONFIG_TQM8548 + unsigned long refresh; +#endif /* CONFIG_TQM8548 */ +}; + +typedef struct sdram_conf_s sdram_conf_t; + +#ifdef CONFIG_TQM8548 +sdram_conf_t ddr_cs_conf[] = { + {(512 << 20), 0x80044102, 0x0001A000}, /* 512MB, 13x10(4) */ + {(256 << 20), 0x80040102, 0x00014000}, /* 256MB, 13x10(4) */ + {(128 << 20), 0x80040101, 0x0000C000}, /* 128MB, 13x9(4) */ +}; +#else /* !CONFIG_TQM8548 */ +sdram_conf_t ddr_cs_conf[] = { + {(512 << 20), 0x80000202}, /* 512MB, 14x10(4) */ + {(256 << 20), 0x80000102}, /* 256MB, 13x10(4) */ + {(128 << 20), 0x80000101}, /* 128MB, 13x9(4) */ + {( 64 << 20), 0x80000001}, /* 64MB, 12x9(4) */ +}; +#endif /* CONFIG_TQM8548 */ + +#define N_DDR_CS_CONF (sizeof(ddr_cs_conf) / sizeof(ddr_cs_conf[0])) + +int cas_latency (void); + +/* + * Autodetect onboard DDR SDRAM on 85xx platforms + * + * NOTE: Some of the hardcoded values are hardware dependant, + * so this should be extended for other future boards + * using this routine! + */ +long int sdram_setup (int casl) +{ + int i; + volatile ccsr_ddr_t *ddr = (void *)(CFG_MPC85xx_DDR_ADDR); +#ifdef CONFIG_TQM8548 + volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR); +#else /* !CONFIG_TQM8548 */ + unsigned long cfg_ddr_timing1; + unsigned long cfg_ddr_mode; +#endif /* CONFIG_TQM8548 */ + + /* + * Disable memory controller. + */ + ddr->cs0_config = 0; + ddr->sdram_cfg = 0; + +#ifdef CONFIG_TQM8548 + ddr->cs0_bnds = (ddr_cs_conf[0].size - 1) >> 24; + ddr->cs0_config = ddr_cs_conf[0].reg; + ddr->timing_cfg_3 = 0x00010000; + + /* TIMING CFG 1, 533MHz + * PRETOACT: 4 Clocks + * ACTTOPRE: 12 Clocks + * ACTTORW: 4 Clocks + * CASLAT: 4 Clocks + * REFREC: 34 Clocks + * WRREC: 4 Clocks + * ACTTOACT: 3 Clocks + * WRTORD: 2 Clocks + */ + ddr->timing_cfg_1 = 0x4C47A432; + + /* TIMING CFG 2, 533MHz + * ADD_LAT: 3 Clocks + * CPO: READLAT + 1 + * WR_LAT: 3 Clocks + * RD_TO_PRE: 2 Clocks + * WR_DATA_DELAY: 1/2 Clock + * CKE_PLS: 1 Clock + * FOUR_ACT: 13 Clocks + */ + ddr->timing_cfg_2 = 0x3318484D; + + /* DDR SDRAM Mode, 533MHz + * MRS: Extended Mode Register + * OUT: Outputs enabled + * RDQS: no + * DQS: enabled + * OCD: default state + * RTT: 75 Ohms + * Posted CAS: 3 Clocks + * ODS: reduced strength + * DLL: enabled + * MR: Mode Register + * PD: fast exit + * WR: 4 Clocks + * DLL: no DLL reset + * TM: normal + * CAS latency: 4 Clocks + * BT: sequential + * Burst length: 4 + */ + ddr->sdram_mode = 0x439E0642; + + /* DDR SDRAM Interval, 533MHz + * REFINT: 1040 Clocks + * BSTOPRE: 256 + */ + ddr->sdram_interval = (1040 << 16) | 0x100; + + /* + * workaround for erratum DD10 of MPC8458 family below rev. 2.0: + * DDR IO receiver must be set to an acceptable bias point by modifying + * a hidden register. + */ + if (SVR_REV (get_svr ()) < 0x20) { + gur->ddrioovcr = 0x90000000; /* enable, VSEL 1.8V */ + } + + /* DDR SDRAM CFG 2 + * FRC_SR: normal mode + * SR_IE: no self-refresh interrupt + * DLL_RST_DIS: don't care, leave at reset value + * DQS_CFG: differential DQS signals + * ODT_CFG: assert ODT to internal IOs only during reads to DRAM + * LVWx_CFG: don't care, leave at reset value + * NUM_PR: 1 refresh will be issued at a time + * DM_CFG: don't care, leave at reset value + * D_INIT: no data initialization + */ + ddr->sdram_cfg_2 = 0x04401000; + + /* DDR SDRAM MODE 2 + * MRS: Extended Mode Register 2 + */ + ddr->sdram_mode_2 = 0x8000C000; + + /* DDR SDRAM CLK CNTL + * CLK_ADJUST: 1/2 Clock 0x02000000 + * CLK_ADJUST: 5/8 Clock 0x02800000 + */ + ddr->sdram_clk_cntl = 0x02800000; + + /* wait for clock stabilization */ + asm ("sync;isync;msync"); + udelay(1000); + + /* DDR SDRAM CLK CNTL + * MEM_EN: enabled + * SREN: don't care, leave at reset value + * ECC_EN: no error report + * RD_EN: no register DIMMs + * SDRAM_TYPE: DDR2 + * DYN_PWR: no power management + * 32_BE: don't care, leave at reset value + * 8_BE: 4 beat burst + * NCAP: don't care, leave at reset value + * 2T_EN: 1T Timing + * BA_INTLV_CTL: no interleaving + * x32_EN: x16 organization + * PCHB8: MA[10] for auto-precharge + * HSE: half strength for single and 2-layer stacks + * (full strength for 3- and 4-layer stacks no yet considered) + * MEM_HALT: no halt + * BI: automatic initialization + */ + ddr->sdram_cfg = 0x83000008; + asm ("sync; isync; msync"); + udelay(1000); + +#else /* !CONFIG_TQM8548 */ + switch (casl) { + case 20: + cfg_ddr_timing1 = 0x47405331 | (3 << 16); + cfg_ddr_mode = 0x40020002 | (2 << 4); + break; + + case 25: + cfg_ddr_timing1 = 0x47405331 | (4 << 16); + cfg_ddr_mode = 0x40020002 | (6 << 4); + break; + + case 30: + default: + cfg_ddr_timing1 = 0x47405331 | (5 << 16); + cfg_ddr_mode = 0x40020002 | (3 << 4); + break; + } + + ddr->cs0_bnds = (ddr_cs_conf[0].size - 1) >> 24; + ddr->cs0_config = ddr_cs_conf[0].reg; + ddr->timing_cfg_1 = cfg_ddr_timing1; + ddr->timing_cfg_2 = 0x00000800; /* P9-45,may need tuning */ + ddr->sdram_mode = cfg_ddr_mode; + ddr->sdram_interval = 0x05160100; /* autocharge,no open page */ + ddr->err_disable = 0x0000000D; + + asm ("sync; isync; msync"); + udelay (1000); + + ddr->sdram_cfg = 0xc2000000; /* unbuffered,no DYN_PWR */ + asm ("sync; isync; msync"); + udelay (1000); +#endif /* CONFIG_TQM8548 */ + + for (i = 0; i < N_DDR_CS_CONF; i++) { + ddr->cs0_config = ddr_cs_conf[i].reg; + + if (get_ram_size (0, ddr_cs_conf[i].size) == + ddr_cs_conf[i].size) { + /* + * size detected -> set Chip Select Bounds Register + */ + ddr->cs0_bnds = (ddr_cs_conf[i].size - 1) >> 24; + + break; + } + } + +#ifdef CONFIG_TQM8548 + if (i < N_DDR_CS_CONF) { + /* Adjust refresh rate for DDR2 */ + + ddr->timing_cfg_3 = ddr_cs_conf[i].refresh & 0x00070000; + + ddr->timing_cfg_1 = (ddr->timing_cfg_1 & 0xFFFF0FFF) | + (ddr_cs_conf[i].refresh & 0x0000F000); + + return ddr_cs_conf[i].size; + } +#endif /* CONFIG_TQM8548 */ + + /* return size if detected, else return 0 */ + return (i < N_DDR_CS_CONF) ? ddr_cs_conf[i].size : 0; +} + +void board_add_ram_info (int use_default) +{ + int casl; + + if (use_default) + casl = CONFIG_DDR_DEFAULT_CL; + else + casl = cas_latency (); + + puts (" (CL="); + switch (casl) { + case 20: + puts ("2)"); + break; + + case 25: + puts ("2.5)"); + break; + + case 30: + puts ("3)"); + break; + } +} + +phys_size_t initdram (int board_type) +{ + long dram_size = 0; + int casl; + +#if defined(CONFIG_DDR_DLL) + /* + * This DLL-Override only used on TQM8540 and TQM8560 + */ + { + volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR); + int i, x; + + x = 10; + + /* + * Work around to stabilize DDR DLL + */ + gur->ddrdllcr = 0x81000000; + asm ("sync; isync; msync"); + udelay (200); + while (gur->ddrdllcr != 0x81000100) { + gur->devdisr = gur->devdisr | 0x00010000; + asm ("sync; isync; msync"); + for (i = 0; i < x; i++) + ; + gur->devdisr = gur->devdisr & 0xfff7ffff; + asm ("sync; isync; msync"); + x++; + } + } +#endif + + casl = cas_latency (); + dram_size = sdram_setup (casl); + if ((dram_size == 0) && (casl != CONFIG_DDR_DEFAULT_CL)) { + /* + * Try again with default CAS latency + */ + puts ("Problem with CAS lantency"); + board_add_ram_info (1); + puts (", using default CL!\n"); + casl = CONFIG_DDR_DEFAULT_CL; + dram_size = sdram_setup (casl); + puts (" "); + } + + return dram_size; +} + +#if defined(CFG_DRAM_TEST) +int testdram (void) +{ + uint *pstart = (uint *) CFG_MEMTEST_START; + uint *pend = (uint *) CFG_MEMTEST_END; + uint *p; + + printf ("SDRAM test phase 1:\n"); + for (p = pstart; p < pend; p++) + *p = 0xaaaaaaaa; + + for (p = pstart; p < pend; p++) { + if (*p != 0xaaaaaaaa) { + printf ("SDRAM test fails at: %08x\n", (uint) p); + return 1; + } + } + + printf ("SDRAM test phase 2:\n"); + for (p = pstart; p < pend; p++) + *p = 0x55555555; + + for (p = pstart; p < pend; p++) { + if (*p != 0x55555555) { + printf ("SDRAM test fails at: %08x\n", (uint) p); + return 1; + } + } + + printf ("SDRAM test passed.\n"); + return 0; +} +#endif diff --git a/board/tqc/tqm85xx/tlb.c b/board/tqc/tqm85xx/tlb.c new file mode 100644 index 0000000000..380448a4f5 --- /dev/null +++ b/board/tqc/tqm85xx/tlb.c @@ -0,0 +1,248 @@ +/* + * Copyright 2008 Freescale Semiconductor, Inc. + * + * (C) Copyright 2000 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/mmu.h> + +struct fsl_e_tlb_entry tlb_table[] = { + /* TLB 0 - for temp stack in cache */ + SET_TLB_ENTRY (0, CFG_INIT_RAM_ADDR, CFG_INIT_RAM_ADDR, + MAS3_SX | MAS3_SW | MAS3_SR, 0, + 0, 0, BOOKE_PAGESZ_4K, 0), + SET_TLB_ENTRY (0, CFG_INIT_RAM_ADDR + 4 * 1024, + CFG_INIT_RAM_ADDR + 4 * 1024, + MAS3_SX | MAS3_SW | MAS3_SR, 0, + 0, 0, BOOKE_PAGESZ_4K, 0), + SET_TLB_ENTRY (0, CFG_INIT_RAM_ADDR + 8 * 1024, + CFG_INIT_RAM_ADDR + 8 * 1024, + MAS3_SX | MAS3_SW | MAS3_SR, 0, + 0, 0, BOOKE_PAGESZ_4K, 0), + SET_TLB_ENTRY (0, CFG_INIT_RAM_ADDR + 12 * 1024, + CFG_INIT_RAM_ADDR + 12 * 1024, + MAS3_SX | MAS3_SW | MAS3_SR, 0, + 0, 0, BOOKE_PAGESZ_4K, 0), + +#ifndef CONFIG_TQM_BIGFLASH + /* + * TLB 0, 1: 128M Non-cacheable, guarded + * 0xf8000000 128M FLASH + * Out of reset this entry is only 4K. + */ + SET_TLB_ENTRY (1, CFG_FLASH_BASE, CFG_FLASH_BASE, + MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G, + 0, 1, BOOKE_PAGESZ_64M, 1), + SET_TLB_ENTRY (1, CFG_FLASH_BASE + 0x4000000, + CFG_FLASH_BASE + 0x4000000, + MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G, + 0, 0, BOOKE_PAGESZ_64M, 1), + + /* + * TLB 2: 256M Non-cacheable, guarded + * 0x80000000 256M PCI1 MEM First half + */ + SET_TLB_ENTRY (1, CFG_PCI1_MEM_PHYS, CFG_PCI1_MEM_PHYS, + MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G, + 0, 2, BOOKE_PAGESZ_256M, 1), + + /* + * TLB 3: 256M Non-cacheable, guarded + * 0x90000000 256M PCI1 MEM Second half + */ + SET_TLB_ENTRY (1, CFG_PCI1_MEM_PHYS + 0x10000000, + CFG_PCI1_MEM_PHYS + 0x10000000, + MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G, + 0, 3, BOOKE_PAGESZ_256M, 1), + +#ifdef CONFIG_PCIE1 + /* + * TLB 4: 256M Non-cacheable, guarded + * 0xc0000000 256M PCI express MEM First half + */ + SET_TLB_ENTRY (1, CFG_PCIE1_MEM_BASE, CFG_PCIE1_MEM_BASE, + MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G, + 0, 4, BOOKE_PAGESZ_256M, 1), + + /* + * TLB 5: 256M Non-cacheable, guarded + * 0xd0000000 256M PCI express MEM Second half + */ + SET_TLB_ENTRY (1, CFG_PCIE1_MEM_BASE + 0x10000000, + CFG_PCIE1_MEM_BASE + 0x10000000, + MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G, + 0, 5, BOOKE_PAGESZ_256M, 1), +#else /* !CONFIG_PCIE */ + /* + * TLB 4: 256M Non-cacheable, guarded + * 0xc0000000 256M Rapid IO MEM First half + */ + SET_TLB_ENTRY (1, CFG_RIO_MEM_BASE, CFG_RIO_MEM_BASE, + MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G, + 0, 4, BOOKE_PAGESZ_256M, 1), + + /* + * TLB 5: 256M Non-cacheable, guarded + * 0xd0000000 256M Rapid IO MEM Second half + */ + SET_TLB_ENTRY (1, CFG_RIO_MEM_BASE + 0x10000000, + CFG_RIO_MEM_BASE + 0x10000000, + MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G, + 0, 5, BOOKE_PAGESZ_256M, 1), +#endif /* CONFIG_PCIE */ + + /* + * TLB 6: 64M Non-cacheable, guarded + * 0xe0000000 1M CCSRBAR + * 0xe2000000 16M PCI1 IO + * 0xe3000000 16M CAN and NAND Flash + */ + SET_TLB_ENTRY (1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS, + MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G, + 0, 6, BOOKE_PAGESZ_64M, 1), + + /* + * TLB 7+8: 512M DDR, cache disabled (needed for memory test) + * 0x00000000 512M DDR System memory + * Without SPD EEPROM configured DDR, this must be setup manually. + * Make sure the TLB count at the top of this table is correct. + * Likely it needs to be increased by two for these entries. + */ + SET_TLB_ENTRY (1, CFG_DDR_SDRAM_BASE, CFG_DDR_SDRAM_BASE, + MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G, + 0, 7, BOOKE_PAGESZ_256M, 1), + + SET_TLB_ENTRY (1, CFG_DDR_SDRAM_BASE + 0x10000000, + CFG_DDR_SDRAM_BASE + 0x10000000, + MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G, + 0, 8, BOOKE_PAGESZ_256M, 1), + +#ifdef CONFIG_PCIE1 + /* + * TLB 9: 16M Non-cacheable, guarded + * 0xef000000 16M PCI express IO + */ + SET_TLB_ENTRY (1, CFG_PCIE1_IO_BASE, CFG_PCIE1_IO_BASE, + MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G, + 0, 9, BOOKE_PAGESZ_16M, 1), +#endif /* CONFIG_PCIE */ + +#else /* CONFIG_TQM_BIGFLASH */ + + /* + * TLB 0,1,2,3: 1G Non-cacheable, guarded + * 0xc0000000 1G FLASH + * Out of reset this entry is only 4K. + */ + SET_TLB_ENTRY (1, CFG_FLASH_BASE, CFG_FLASH_BASE, + MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G, + 0, 3, BOOKE_PAGESZ_256M, 1), + SET_TLB_ENTRY (1, CFG_FLASH_BASE + 0x10000000, + CFG_FLASH_BASE + 0x10000000, + MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G, + 0, 2, BOOKE_PAGESZ_256M, 1), + SET_TLB_ENTRY (1, CFG_FLASH_BASE + 0x20000000, + CFG_FLASH_BASE + 0x20000000, + MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G, + 0, 1, BOOKE_PAGESZ_256M, 1), + SET_TLB_ENTRY (1, CFG_FLASH_BASE + 0x30000000, + CFG_FLASH_BASE + 0x30000000, + MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G, + 0, 0, BOOKE_PAGESZ_256M, 1), + + /* + * TLB 4: 256M Non-cacheable, guarded + * 0x80000000 256M PCI1 MEM First half + */ + SET_TLB_ENTRY (1, CFG_PCI1_MEM_PHYS, CFG_PCI1_MEM_PHYS, + MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G, + 0, 4, BOOKE_PAGESZ_256M, 1), + + /* + * TLB 5: 256M Non-cacheable, guarded + * 0x90000000 256M PCI1 MEM Second half + */ + SET_TLB_ENTRY (1, CFG_PCI1_MEM_PHYS + 0x10000000, + CFG_PCI1_MEM_PHYS + 0x10000000, + MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G, + 0, 5, BOOKE_PAGESZ_256M, 1), + +#ifdef CONFIG_PCIE1 + /* + * TLB 6: 256M Non-cacheable, guarded + * 0xc0000000 256M PCI express MEM First half + */ + SET_TLB_ENTRY (1, CFG_PCIE1_MEM_BASE, CFG_PCIE1_MEM_BASE, + MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G, + 0, 6, BOOKE_PAGESZ_256M, 1), +#else /* !CONFIG_PCIE */ + /* + * TLB 6: 256M Non-cacheable, guarded + * 0xb0000000 256M Rapid IO MEM First half + */ + SET_TLB_ENTRY (1, CFG_RIO_MEM_BASE, CFG_RIO_MEM_BASE, + MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G, + 0, 6, BOOKE_PAGESZ_256M, 1), + +#endif /* CONFIG_PCIE */ + + /* + * TLB 7: 64M Non-cacheable, guarded + * 0xa0000000 1M CCSRBAR + * 0xa2000000 16M PCI1 IO + * 0xa3000000 16M CAN and NAND Flash + */ + SET_TLB_ENTRY (1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS, + MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G, + 0, 7, BOOKE_PAGESZ_64M, 1), + + /* + * TLB 8+9: 512M DDR, cache disabled (needed for memory test) + * 0x00000000 512M DDR System memory + * Without SPD EEPROM configured DDR, this must be setup manually. + * Make sure the TLB count at the top of this table is correct. + * Likely it needs to be increased by two for these entries. + */ + SET_TLB_ENTRY (1, CFG_DDR_SDRAM_BASE, CFG_DDR_SDRAM_BASE, + MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G, + 0, 8, BOOKE_PAGESZ_256M, 1), + + SET_TLB_ENTRY (1, CFG_DDR_SDRAM_BASE + 0x10000000, + CFG_DDR_SDRAM_BASE + 0x10000000, + MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G, + 0, 9, BOOKE_PAGESZ_256M, 1), + +#ifdef CONFIG_PCIE1 + /* + * TLB 10: 16M Non-cacheable, guarded + * 0xaf000000 16M PCI express IO + */ + SET_TLB_ENTRY (1, CFG_PCIE1_IO_BASE, CFG_PCIE1_IO_BASE, + MAS3_SX | MAS3_SW | MAS3_SR, MAS2_I | MAS2_G, + 0, 10, BOOKE_PAGESZ_16M, 1), +#endif /* CONFIG_PCIE */ + +#endif /* CONFIG_TQM_BIGFLASH */ +}; + +int num_tlb_entries = ARRAY_SIZE (tlb_table); diff --git a/board/tqc/tqm85xx/tqm85xx.c b/board/tqc/tqm85xx/tqm85xx.c new file mode 100644 index 0000000000..f1c2e58edd --- /dev/null +++ b/board/tqc/tqm85xx/tqm85xx.c @@ -0,0 +1,744 @@ +/* + * (C) Copyright 2008 Wolfgang Grandegger <wg@denx.de> + * + * (C) Copyright 2006 + * Thomas Waehner, TQ-Systems GmbH, thomas.waehner@tqs.de. + * + * (C) Copyright 2005 + * Stefan Roese, DENX Software Engineering, sr@denx.de. + * + * Copyright 2004 Freescale Semiconductor. + * (C) Copyright 2002,2003, Motorola Inc. + * Xianghua Xiao, (X.Xiao@motorola.com) + * + * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <pci.h> +#include <asm/processor.h> +#include <asm/immap_85xx.h> +#include <asm/immap_fsl_pci.h> +#include <asm/io.h> +#include <ioports.h> +#include <flash.h> +#include <libfdt.h> +#include <fdt_support.h> + +DECLARE_GLOBAL_DATA_PTR; + +extern flash_info_t flash_info[]; /* FLASH chips info */ + +void local_bus_init (void); +ulong flash_get_size (ulong base, int banknum); + +#ifdef CONFIG_PS2MULT +void ps2mult_early_init (void); +#endif + +#ifdef CONFIG_CPM2 +/* + * I/O Port configuration table + * + * if conf is 1, then that port pin will be configured at boot time + * according to the five values podr/pdir/ppar/psor/pdat for that entry + */ + +const iop_conf_t iop_conf_tab[4][32] = { + + /* Port A: conf, ppar, psor, pdir, podr, pdat */ + { + {1, 1, 1, 0, 0, 0}, /* PA31: FCC1 MII COL */ + {1, 1, 1, 0, 0, 0}, /* PA30: FCC1 MII CRS */ + {1, 1, 1, 1, 0, 0}, /* PA29: FCC1 MII TX_ER */ + {1, 1, 1, 1, 0, 0}, /* PA28: FCC1 MII TX_EN */ + {1, 1, 1, 0, 0, 0}, /* PA27: FCC1 MII RX_DV */ + {1, 1, 1, 0, 0, 0}, /* PA26: FCC1 MII RX_ER */ + {0, 1, 0, 1, 0, 0}, /* PA25: FCC1 ATMTXD[0] */ + {0, 1, 0, 1, 0, 0}, /* PA24: FCC1 ATMTXD[1] */ + {0, 1, 0, 1, 0, 0}, /* PA23: FCC1 ATMTXD[2] */ + {0, 1, 0, 1, 0, 0}, /* PA22: FCC1 ATMTXD[3] */ + {1, 1, 0, 1, 0, 0}, /* PA21: FCC1 MII TxD[3] */ + {1, 1, 0, 1, 0, 0}, /* PA20: FCC1 MII TxD[2] */ + {1, 1, 0, 1, 0, 0}, /* PA19: FCC1 MII TxD[1] */ + {1, 1, 0, 1, 0, 0}, /* PA18: FCC1 MII TxD[0] */ + {1, 1, 0, 0, 0, 0}, /* PA17: FCC1 MII RxD[0] */ + {1, 1, 0, 0, 0, 0}, /* PA16: FCC1 MII RxD[1] */ + {1, 1, 0, 0, 0, 0}, /* PA15: FCC1 MII RxD[2] */ + {1, 1, 0, 0, 0, 0}, /* PA14: FCC1 MII RxD[3] */ + {0, 1, 0, 0, 0, 0}, /* PA13: FCC1 ATMRXD[3] */ + {0, 1, 0, 0, 0, 0}, /* PA12: FCC1 ATMRXD[2] */ + {0, 1, 0, 0, 0, 0}, /* PA11: FCC1 ATMRXD[1] */ + {0, 1, 0, 0, 0, 0}, /* PA10: FCC1 ATMRXD[0] */ + {0, 1, 1, 1, 0, 0}, /* PA9 : FCC1 L1TXD */ + {0, 1, 1, 0, 0, 0}, /* PA8 : FCC1 L1RXD */ + {0, 0, 0, 1, 0, 0}, /* PA7 : PA7 */ + {0, 1, 1, 1, 0, 0}, /* PA6 : TDM A1 L1RSYNC */ + {0, 0, 0, 1, 0, 0}, /* PA5 : PA5 */ + {0, 0, 0, 1, 0, 0}, /* PA4 : PA4 */ + {0, 0, 0, 1, 0, 0}, /* PA3 : PA3 */ + {0, 0, 0, 1, 0, 0}, /* PA2 : PA2 */ + {0, 0, 0, 0, 0, 0}, /* PA1 : FREERUN */ + {0, 0, 0, 1, 0, 0} /* PA0 : PA0 */ + }, + + /* Port B: conf, ppar, psor, pdir, podr, pdat */ + { + {1, 1, 0, 1, 0, 0}, /* PB31: FCC2 MII TX_ER */ + {1, 1, 0, 0, 0, 0}, /* PB30: FCC2 MII RX_DV */ + {1, 1, 1, 1, 0, 0}, /* PB29: FCC2 MII TX_EN */ + {1, 1, 0, 0, 0, 0}, /* PB28: FCC2 MII RX_ER */ + {1, 1, 0, 0, 0, 0}, /* PB27: FCC2 MII COL */ + {1, 1, 0, 0, 0, 0}, /* PB26: FCC2 MII CRS */ + {1, 1, 0, 1, 0, 0}, /* PB25: FCC2 MII TxD[3] */ + {1, 1, 0, 1, 0, 0}, /* PB24: FCC2 MII TxD[2] */ + {1, 1, 0, 1, 0, 0}, /* PB23: FCC2 MII TxD[1] */ + {1, 1, 0, 1, 0, 0}, /* PB22: FCC2 MII TxD[0] */ + {1, 1, 0, 0, 0, 0}, /* PB21: FCC2 MII RxD[0] */ + {1, 1, 0, 0, 0, 0}, /* PB20: FCC2 MII RxD[1] */ + {1, 1, 0, 0, 0, 0}, /* PB19: FCC2 MII RxD[2] */ + {1, 1, 0, 0, 0, 0}, /* PB18: FCC2 MII RxD[3] */ + {1, 1, 0, 0, 0, 0}, /* PB17: FCC3:RX_DIV */ + {1, 1, 0, 0, 0, 0}, /* PB16: FCC3:RX_ERR */ + {1, 1, 0, 1, 0, 0}, /* PB15: FCC3:TX_ERR */ + {1, 1, 0, 1, 0, 0}, /* PB14: FCC3:TX_EN */ + {1, 1, 0, 0, 0, 0}, /* PB13: FCC3:COL */ + {1, 1, 0, 0, 0, 0}, /* PB12: FCC3:CRS */ + {1, 1, 0, 0, 0, 0}, /* PB11: FCC3:RXD */ + {1, 1, 0, 0, 0, 0}, /* PB10: FCC3:RXD */ + {1, 1, 0, 0, 0, 0}, /* PB9 : FCC3:RXD */ + {1, 1, 0, 0, 0, 0}, /* PB8 : FCC3:RXD */ + {1, 1, 0, 1, 0, 0}, /* PB7 : FCC3:TXD */ + {1, 1, 0, 1, 0, 0}, /* PB6 : FCC3:TXD */ + {1, 1, 0, 1, 0, 0}, /* PB5 : FCC3:TXD */ + {1, 1, 0, 1, 0, 0}, /* PB4 : FCC3:TXD */ + {0, 0, 0, 0, 0, 0}, /* PB3 : pin doesn't exist */ + {0, 0, 0, 0, 0, 0}, /* PB2 : pin doesn't exist */ + {0, 0, 0, 0, 0, 0}, /* PB1 : pin doesn't exist */ + {0, 0, 0, 0, 0, 0} /* PB0 : pin doesn't exist */ + }, + + /* Port C: conf, ppar, psor, pdir, podr, pdat */ + { + {0, 0, 0, 1, 0, 0}, /* PC31: PC31 */ + {0, 0, 0, 1, 0, 0}, /* PC30: PC30 */ + {0, 1, 1, 0, 0, 0}, /* PC29: SCC1 EN *CLSN */ + {0, 0, 0, 1, 0, 0}, /* PC28: PC28 */ + {0, 0, 0, 1, 0, 0}, /* PC27: UART Clock in */ + {0, 0, 0, 1, 0, 0}, /* PC26: PC26 */ + {0, 0, 0, 1, 0, 0}, /* PC25: PC25 */ + {0, 0, 0, 1, 0, 0}, /* PC24: PC24 */ + {0, 1, 0, 1, 0, 0}, /* PC23: ATMTFCLK */ + {0, 1, 0, 0, 0, 0}, /* PC22: ATMRFCLK */ + {1, 1, 0, 0, 0, 0}, /* PC21: SCC1 EN RXCLK */ + {1, 1, 0, 0, 0, 0}, /* PC20: SCC1 EN TXCLK */ + {1, 1, 0, 0, 0, 0}, /* PC19: FCC2 MII RX_CLK CLK13 */ + {1, 1, 0, 0, 0, 0}, /* PC18: FCC Tx Clock (CLK14) */ + {1, 1, 0, 0, 0, 0}, /* PC17: PC17 */ + {1, 1, 0, 0, 0, 0}, /* PC16: FCC Tx Clock (CLK16) */ + {0, 1, 0, 0, 0, 0}, /* PC15: PC15 */ + {0, 1, 0, 0, 0, 0}, /* PC14: SCC1 EN *CD */ + {0, 1, 0, 0, 0, 0}, /* PC13: PC13 */ + {0, 1, 0, 1, 0, 0}, /* PC12: PC12 */ + {0, 0, 0, 1, 0, 0}, /* PC11: LXT971 transmit control */ + {0, 0, 0, 1, 0, 0}, /* PC10: FETHMDC */ + {0, 0, 0, 0, 0, 0}, /* PC9 : FETHMDIO */ + {0, 0, 0, 1, 0, 0}, /* PC8 : PC8 */ + {0, 0, 0, 1, 0, 0}, /* PC7 : PC7 */ + {0, 0, 0, 1, 0, 0}, /* PC6 : PC6 */ + {0, 0, 0, 1, 0, 0}, /* PC5 : PC5 */ + {0, 0, 0, 1, 0, 0}, /* PC4 : PC4 */ + {0, 0, 0, 1, 0, 0}, /* PC3 : PC3 */ + {0, 0, 0, 1, 0, 1}, /* PC2 : ENET FDE */ + {0, 0, 0, 1, 0, 0}, /* PC1 : ENET DSQE */ + {0, 0, 0, 1, 0, 0}, /* PC0 : ENET LBK */ + }, + + /* Port D: conf, ppar, psor, pdir, podr, pdat */ + { +#ifdef CONFIG_TQM8560 + {1, 1, 0, 0, 0, 0}, /* PD31: SCC1 EN RxD */ + {1, 1, 1, 1, 0, 0}, /* PD30: SCC1 EN TxD */ + {1, 1, 0, 1, 0, 0}, /* PD29: SCC1 EN TENA */ +#else /* !CONFIG_TQM8560 */ + {0, 0, 0, 0, 0, 0}, /* PD31: PD31 */ + {0, 0, 0, 0, 0, 0}, /* PD30: PD30 */ + {0, 0, 0, 0, 0, 0}, /* PD29: PD29 */ +#endif /* CONFIG_TQM8560 */ + {1, 1, 0, 0, 0, 0}, /* PD28: PD28 */ + {1, 1, 0, 1, 0, 0}, /* PD27: PD27 */ + {1, 1, 0, 1, 0, 0}, /* PD26: PD26 */ + {0, 0, 0, 1, 0, 0}, /* PD25: PD25 */ + {0, 0, 0, 1, 0, 0}, /* PD24: PD24 */ + {0, 0, 0, 1, 0, 0}, /* PD23: PD23 */ + {0, 0, 0, 1, 0, 0}, /* PD22: PD22 */ + {0, 0, 0, 1, 0, 0}, /* PD21: PD21 */ + {0, 0, 0, 1, 0, 0}, /* PD20: PD20 */ + {0, 0, 0, 1, 0, 0}, /* PD19: PD19 */ + {0, 0, 0, 1, 0, 0}, /* PD18: PD18 */ + {0, 1, 0, 0, 0, 0}, /* PD17: FCC1 ATMRXPRTY */ + {0, 1, 0, 1, 0, 0}, /* PD16: FCC1 ATMTXPRTY */ + {0, 1, 1, 0, 1, 0}, /* PD15: I2C SDA */ + {0, 0, 0, 1, 0, 0}, /* PD14: LED */ + {0, 0, 0, 0, 0, 0}, /* PD13: PD13 */ + {0, 0, 0, 0, 0, 0}, /* PD12: PD12 */ + {0, 0, 0, 0, 0, 0}, /* PD11: PD11 */ + {0, 0, 0, 0, 0, 0}, /* PD10: PD10 */ + {0, 1, 0, 1, 0, 0}, /* PD9 : SMC1 TXD */ + {0, 1, 0, 0, 0, 0}, /* PD8 : SMC1 RXD */ + {0, 0, 0, 1, 0, 1}, /* PD7 : PD7 */ + {0, 0, 0, 1, 0, 1}, /* PD6 : PD6 */ + {0, 0, 0, 1, 0, 1}, /* PD5 : PD5 */ + {0, 0, 0, 1, 0, 1}, /* PD4 : PD4 */ + {0, 0, 0, 0, 0, 0}, /* PD3 : pin doesn't exist */ + {0, 0, 0, 0, 0, 0}, /* PD2 : pin doesn't exist */ + {0, 0, 0, 0, 0, 0}, /* PD1 : pin doesn't exist */ + {0, 0, 0, 0, 0, 0} /* PD0 : pin doesn't exist */ + } +}; +#endif /* CONFIG_CPM2 */ + +#define CASL_STRING1 "casl=xx" +#define CASL_STRING2 "casl=" + +static const int casl_table[] = { 20, 25, 30 }; +#define N_CASL (sizeof(casl_table) / sizeof(casl_table[0])) + +int cas_latency (void) +{ + char *s = getenv ("serial#"); + int casl; + int val; + int i; + + casl = CONFIG_DDR_DEFAULT_CL; + + if (s != NULL) { + if (strncmp(s + strlen (s) - strlen (CASL_STRING1), + CASL_STRING2, strlen (CASL_STRING2)) == 0) { + val = simple_strtoul (s + strlen (s) - 2, NULL, 10); + + for (i = 0; i < N_CASL; ++i) { + if (val == casl_table[i]) { + return val; + } + } + } + } + + return casl; +} + +int checkboard (void) +{ + char *s = getenv ("serial#"); + + printf ("Board: %s", CONFIG_BOARDNAME); + if (s != NULL) { + puts (", serial# "); + puts (s); + } + putc ('\n'); + + /* + * Initialize local bus. + */ + local_bus_init (); + + return 0; +} + +int misc_init_r (void) +{ + volatile ccsr_lbc_t *memctl = (void *)(CFG_MPC85xx_LBC_ADDR); + + /* + * Adjust flash start and offset to detected values + */ + gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize; + gd->bd->bi_flashoffset = 0; + + /* + * Recalculate CS configuration if second FLASH bank is available + */ + if (flash_info[0].size > 0) { + memctl->or1 = ((-flash_info[0].size) & 0xffff8000) | + (CFG_OR1_PRELIM & 0x00007fff); + memctl->br1 = gd->bd->bi_flashstart | + (CFG_BR1_PRELIM & 0x00007fff); + /* + * Re-check to get correct base address for bank 1 + */ + flash_get_size (gd->bd->bi_flashstart, 0); + } else { + memctl->or1 = 0; + memctl->br1 = 0; + } + + /* + * If bank 1 is equipped, bank 0 is mapped after bank 1 + */ + memctl->or0 = ((-flash_info[1].size) & 0xffff8000) | + (CFG_OR0_PRELIM & 0x00007fff); + memctl->br0 = (gd->bd->bi_flashstart + flash_info[0].size) | + (CFG_BR0_PRELIM & 0x00007fff); + /* + * Re-check to get correct base address for bank 0 + */ + flash_get_size (gd->bd->bi_flashstart + flash_info[0].size, 1); + + /* + * Re-do flash protection upon new addresses + */ + flash_protect (FLAG_PROTECT_CLEAR, + gd->bd->bi_flashstart, 0xffffffff, + &flash_info[CFG_MAX_FLASH_BANKS - 1]); + + /* Monitor protection ON by default */ + flash_protect (FLAG_PROTECT_SET, + CFG_MONITOR_BASE, + CFG_MONITOR_BASE + monitor_flash_len - 1, + &flash_info[CFG_MAX_FLASH_BANKS - 1]); + + /* Environment protection ON by default */ + flash_protect (FLAG_PROTECT_SET, + CFG_ENV_ADDR, + CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1, + &flash_info[CFG_MAX_FLASH_BANKS - 1]); + +#ifdef CFG_ENV_ADDR_REDUND + /* Redundant environment protection ON by default */ + flash_protect (FLAG_PROTECT_SET, + CFG_ENV_ADDR_REDUND, + CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1, + &flash_info[CFG_MAX_FLASH_BANKS - 1]); +#endif + + return 0; +} + +#ifdef CONFIG_CAN_DRIVER +/* + * Initialize UPMC RAM + */ +static void upmc_write (u_char addr, uint val) +{ + volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR); + + out_be32 (&lbc->mdr, val); + + clrsetbits_be32(&lbc->mcmr, MxMR_MAD_MSK, + MxMR_OP_WARR | (addr & MxMR_MAD_MSK)); + + /* dummy access to perform write */ + out_8 ((void __iomem *)CFG_CAN_BASE, 0); + + /* normal operation */ + clrbits_be32(&lbc->mcmr, MxMR_OP_WARR); +} +#endif /* CONFIG_CAN_DRIVER */ + +uint get_lbc_clock (void) +{ + volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR); + sys_info_t sys_info; + ulong clkdiv = lbc->lcrr & 0x0f; + + get_sys_info (&sys_info); + + if (clkdiv == 2 || clkdiv == 4 || clkdiv == 8) { +#ifdef CONFIG_MPC8548 + /* + * Yes, the entire PQ38 family use the same + * bit-representation for twice the clock divider value. + */ + clkdiv *= 2; +#endif + return sys_info.freqSystemBus / clkdiv; + } + + puts("Invalid clock divider value in CFG_LBC_LCRR\n"); + + return 0; +} + +/* + * Initialize Local Bus + */ +void local_bus_init (void) +{ + volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR); + volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR); + uint lbc_mhz = get_lbc_clock () / 1000000; + +#ifdef CONFIG_MPC8548 + uint svr = get_svr (); + uint lcrr; + + /* + * MPC revision < 2.0 + * According to MPC8548E_Device_Errata Rev. L, Erratum LBIU1: + * Modify engineering use only register at address 0xE_0F20. + * "1. Read register at offset 0xE_0F20 + * 2. And value with 0x0000_FFFF + * 3. OR result with 0x0000_0004 + * 4. Write result back to offset 0xE_0F20." + * + * According to MPC8548E_Device_Errata Rev. L, Erratum LBIU2: + * Modify engineering use only register at address 0xE_0F20. + * "1. Read register at offset 0xE_0F20 + * 2. And value with 0xFFFF_FFDF + * 3. Write result back to offset 0xE_0F20." + * + * Since it is the same register, we do the modification in one step. + */ + if (SVR_MAJ (svr) < 2) { + uint dummy = gur->lbiuiplldcr1; + dummy &= 0x0000FFDF; + dummy |= 0x00000004; + gur->lbiuiplldcr1 = dummy; + } + + lcrr = CFG_LBC_LCRR; + + /* + * Local Bus Clock > 83.3 MHz. According to timing + * specifications set LCRR[EADC] to 2 delay cycles. + */ + if (lbc_mhz > 83) { + lcrr &= ~LCRR_EADC; + lcrr |= LCRR_EADC_2; + } + + /* + * According to MPC8548ERMAD Rev. 1.3, 13.3.1.16, 13-30 + * disable PLL bypass for Local Bus Clock > 83 MHz. + */ + if (lbc_mhz >= 66) + lcrr &= (~LCRR_DBYP); /* DLL Enabled */ + + else + lcrr |= LCRR_DBYP; /* DLL Bypass */ + + lbc->lcrr = lcrr; + asm ("sync;isync;msync"); + + /* + * According to MPC8548ERMAD Rev.1.3 read back LCRR + * and terminate with isync + */ + lcrr = lbc->lcrr; + asm ("isync;"); + + /* let DLL stabilize */ + udelay (500); + +#else /* !CONFIG_MPC8548 */ + + /* + * Errata LBC11. + * Fix Local Bus clock glitch when DLL is enabled. + * + * If localbus freq is < 66Mhz, DLL bypass mode must be used. + * If localbus freq is > 133Mhz, DLL can be safely enabled. + * Between 66 and 133, the DLL is enabled with an override workaround. + */ + + if (lbc_mhz < 66) { + lbc->lcrr = CFG_LBC_LCRR | LCRR_DBYP; /* DLL Bypass */ + lbc->ltedr = 0xa4c80000; /* DK: !!! */ + + } else if (lbc_mhz >= 133) { + lbc->lcrr = CFG_LBC_LCRR & (~LCRR_DBYP); /* DLL Enabled */ + + } else { + /* + * On REV1 boards, need to change CLKDIV before enable DLL. + * Default CLKDIV is 8, change it to 4 temporarily. + */ + uint pvr = get_pvr (); + uint temp_lbcdll = 0; + + if (pvr == PVR_85xx_REV1) { + /* FIXME: Justify the high bit here. */ + lbc->lcrr = 0x10000004; + } + + lbc->lcrr = CFG_LBC_LCRR & (~LCRR_DBYP); /* DLL Enabled */ + udelay (200); + + /* + * Sample LBC DLL ctrl reg, upshift it to set the + * override bits. + */ + temp_lbcdll = gur->lbcdllcr; + gur->lbcdllcr = (((temp_lbcdll & 0xff) << 16) | 0x80000000); + asm ("sync;isync;msync"); + } +#endif /* !CONFIG_MPC8548 */ + +#ifdef CONFIG_CAN_DRIVER + /* + * According to timing specifications EAD must be + * set if Local Bus Clock is > 83 MHz. + */ + if (lbc_mhz > 83) + out_be32 (&lbc->or2, CFG_OR2_CAN | OR_UPM_EAD); + else + out_be32 (&lbc->or2, CFG_OR2_CAN); + out_be32 (&lbc->br2, CFG_BR2_CAN); + + /* LGPL4 is UPWAIT */ + out_be32(&lbc->mcmr, MxMR_DSx_3_CYCL | MxMR_GPL_x4DIS | MxMR_WLFx_3X); + + /* Initialize UPMC for CAN: single read */ + upmc_write (0x00, 0xFFFFED00); + upmc_write (0x01, 0xCCFFCC00); + upmc_write (0x02, 0x00FFCF00); + upmc_write (0x03, 0x00FFCF00); + upmc_write (0x04, 0x00FFDC00); + upmc_write (0x05, 0x00FFCF00); + upmc_write (0x06, 0x00FFED00); + upmc_write (0x07, 0x3FFFCC07); + + /* Initialize UPMC for CAN: single write */ + upmc_write (0x18, 0xFFFFED00); + upmc_write (0x19, 0xCCFFEC00); + upmc_write (0x1A, 0x00FFED80); + upmc_write (0x1B, 0x00FFED80); + upmc_write (0x1C, 0x00FFFC00); + upmc_write (0x1D, 0x0FFFEC00); + upmc_write (0x1E, 0x0FFFEF00); + upmc_write (0x1F, 0x3FFFEC05); +#endif /* CONFIG_CAN_DRIVER */ +} + +/* + * Initialize PCI Devices, report devices found. + */ +static int first_free_busno; + +#if defined(CONFIG_PCI) || defined(CONFIG_PCI1) +static struct pci_controller pci1_hose; +#endif /* CONFIG_PCI || CONFIG_PCI1 */ + +#ifdef CONFIG_PCIE1 +static struct pci_controller pcie1_hose; +#endif /* CONFIG_PCIE1 */ + +static inline void init_pci1(void) +{ + volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR); +#if defined(CONFIG_PCI) || defined(CONFIG_PCI1) + uint host_agent = (gur->porbmsr & MPC85xx_PORBMSR_HA) >> 16; + volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *)CFG_PCI1_ADDR; + extern void fsl_pci_init(struct pci_controller *hose); + struct pci_controller *hose = &pci1_hose; + + /* PORDEVSR[15] */ + uint pci_32 = gur->pordevsr & MPC85xx_PORDEVSR_PCI1_PCI32; + /* PORDEVSR[14] */ + uint pci_arb = gur->pordevsr & MPC85xx_PORDEVSR_PCI1_ARB; + /* PORPLLSR[16] */ + uint pci_clk_sel = gur->porpllsr & MPC85xx_PORDEVSR_PCI1_SPD; + + uint pci_agent = (host_agent == 3) || (host_agent == 4 ) || + (host_agent == 6); + + uint pci_speed = CONFIG_SYS_CLK_FREQ; /* PCI PSPEED in [4:5] */ + + if (!(gur->devdisr & MPC85xx_DEVDISR_PCI1)) { + printf ("PCI1: %d bit, %s MHz, %s, %s, %s\n", + (pci_32) ? 32 : 64, + (pci_speed == 33333333) ? "33" : + (pci_speed == 66666666) ? "66" : "unknown", + pci_clk_sel ? "sync" : "async", + pci_agent ? "agent" : "host", + pci_arb ? "arbiter" : "external-arbiter"); + + + /* inbound */ + pci_set_region (hose->regions + 0, + CFG_PCI_MEMORY_BUS, + CFG_PCI_MEMORY_PHYS, + CFG_PCI_MEMORY_SIZE, + PCI_REGION_MEM | PCI_REGION_MEMORY); + + + /* outbound memory */ + pci_set_region (hose->regions + 1, + CFG_PCI1_MEM_BASE, + CFG_PCI1_MEM_PHYS, + CFG_PCI1_MEM_SIZE, + PCI_REGION_MEM); + + /* outbound io */ + pci_set_region (hose->regions + 2, + CFG_PCI1_IO_BASE, + CFG_PCI1_IO_PHYS, + CFG_PCI1_IO_SIZE, + PCI_REGION_IO); + + hose->region_count = 3; + + hose->first_busno = first_free_busno; + pci_setup_indirect (hose, (int)&pci->cfg_addr, + (int)&pci->cfg_data); + + fsl_pci_init (hose); + + printf (" PCI on bus %02x..%02x\n", + hose->first_busno, hose->last_busno); + + first_free_busno = hose->last_busno + 1; +#ifdef CONFIG_PCIX_CHECK + if (!(gur->pordevsr & PORDEVSR_PCI)) { + ushort reg16 = + PCI_X_CMD_MAX_SPLIT | PCI_X_CMD_MAX_READ | + PCI_X_CMD_ERO | PCI_X_CMD_DPERR_E; + uint dev = PCI_BDF(hose->first_busno, 0, 0); + + /* PCI-X init */ + if (CONFIG_SYS_CLK_FREQ < 66000000) + puts ("PCI-X will only work at 66 MHz\n"); + + pci_hose_write_config_word (hose, dev, PCIX_COMMAND, + reg16); + } +#endif + } else { + puts ("PCI1: disabled\n"); + } +#else /* !(CONFIG_PCI || CONFIG_PCI1) */ + gur->devdisr |= MPC85xx_DEVDISR_PCI1; /* disable */ +#endif /* CONFIG_PCI || CONFIG_PCI1) */ +} + +static inline void init_pcie1(void) +{ + volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR); +#ifdef CONFIG_PCIE1 + uint io_sel = (gur->pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 19; + uint host_agent = (gur->porbmsr & MPC85xx_PORBMSR_HA) >> 16; + volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *)CFG_PCIE1_ADDR; + extern void fsl_pci_init(struct pci_controller *hose); + struct pci_controller *hose = &pcie1_hose; + int pcie_ep = (host_agent == 0) || (host_agent == 2 ) || + (host_agent == 3); + + int pcie_configured = io_sel >= 1; + + if (pcie_configured && !(gur->devdisr & MPC85xx_DEVDISR_PCIE)){ + printf ("PCIe: %s, base address %x", + pcie_ep ? "End point" : "Root complex", (uint)pci); + + if (pci->pme_msg_det) { + pci->pme_msg_det = 0xffffffff; + debug (", with errors. Clearing. Now 0x%08x", + pci->pme_msg_det); + } + puts ("\n"); + + /* inbound */ + pci_set_region (hose->regions + 0, + CFG_PCI_MEMORY_BUS, + CFG_PCI_MEMORY_PHYS, + CFG_PCI_MEMORY_SIZE, + PCI_REGION_MEM | PCI_REGION_MEMORY); + + /* outbound memory */ + pci_set_region (hose->regions + 1, + CFG_PCIE1_MEM_BASE, + CFG_PCIE1_MEM_PHYS, + CFG_PCIE1_MEM_SIZE, + PCI_REGION_MEM); + + /* outbound io */ + pci_set_region (hose->regions + 2, + CFG_PCIE1_IO_BASE, + CFG_PCIE1_IO_PHYS, + CFG_PCIE1_IO_SIZE, + PCI_REGION_IO); + + hose->region_count = 3; + + hose->first_busno = first_free_busno; + pci_setup_indirect(hose, (int)&pci->cfg_addr, + (int)&pci->cfg_data); + + fsl_pci_init (hose); + printf (" PCIe on bus %02x..%02x\n", + hose->first_busno, hose->last_busno); + + first_free_busno = hose->last_busno + 1; + + } else { + printf ("PCIe: disabled\n"); + } +#else /* !CONFIG_PCIE1 */ + gur->devdisr |= MPC85xx_DEVDISR_PCIE; /* disable */ +#endif /* CONFIG_PCIE1 */ +} + +void pci_init_board (void) +{ + init_pci1(); + init_pcie1(); +} + +#ifdef CONFIG_OF_BOARD_SETUP +void ft_board_setup (void *blob, bd_t *bd) +{ + int node, tmp[2]; + const char *path; + + ft_cpu_setup (blob, bd); + + node = fdt_path_offset (blob, "/aliases"); + tmp[0] = 0; + if (node >= 0) { +#if defined(CONFIG_PCI) || defined(CONFIG_PCI1) + path = fdt_getprop (blob, node, "pci0", NULL); + if (path) { + tmp[1] = pci1_hose.last_busno - pci1_hose.first_busno; + do_fixup_by_path (blob, path, "bus-range", &tmp, 8, 1); + } +#endif /* CONFIG_PCI || CONFIG_PCI1 */ +#ifdef CONFIG_PCIE1 + path = fdt_getprop (blob, node, "pci1", NULL); + if (path) { + tmp[1] = pcie1_hose.last_busno - pcie1_hose.first_busno; + do_fixup_by_path (blob, path, "bus-range", &tmp, 8, 1); + } +#endif /* CONFIG_PCIE1 */ + } +} +#endif /* CONFIG_OF_BOARD_SETUP */ + +#ifdef CONFIG_BOARD_EARLY_INIT_R +int board_early_init_r (void) +{ +#ifdef CONFIG_PS2MULT + ps2mult_early_init (); +#endif /* CONFIG_PS2MULT */ + return (0); +} +#endif /* CONFIG_BOARD_EARLY_INIT_R */ diff --git a/board/tqm85xx/u-boot.lds b/board/tqc/tqm85xx/u-boot.lds index 8cb551ae4b..8cb551ae4b 100644 --- a/board/tqm85xx/u-boot.lds +++ b/board/tqc/tqm85xx/u-boot.lds diff --git a/board/tqm8xx/Makefile b/board/tqc/tqm8xx/Makefile index b48934b429..b48934b429 100644 --- a/board/tqm8xx/Makefile +++ b/board/tqc/tqm8xx/Makefile diff --git a/board/tqm8xx/config.mk b/board/tqc/tqm8xx/config.mk index 9d6080b84a..9d6080b84a 100644 --- a/board/tqm8xx/config.mk +++ b/board/tqc/tqm8xx/config.mk diff --git a/board/tqm8xx/flash.c b/board/tqc/tqm8xx/flash.c index 4342ebc841..4342ebc841 100644 --- a/board/tqm8xx/flash.c +++ b/board/tqc/tqm8xx/flash.c diff --git a/board/tqm8xx/load_sernum_ethaddr.c b/board/tqc/tqm8xx/load_sernum_ethaddr.c index 143f36801d..143f36801d 100644 --- a/board/tqm8xx/load_sernum_ethaddr.c +++ b/board/tqc/tqm8xx/load_sernum_ethaddr.c diff --git a/board/tqm8xx/tqm8xx.c b/board/tqc/tqm8xx/tqm8xx.c index 18bf2a8302..96b6103fc7 100644 --- a/board/tqm8xx/tqm8xx.c +++ b/board/tqc/tqm8xx/tqm8xx.c @@ -139,7 +139,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; diff --git a/board/tqm8xx/u-boot.lds b/board/tqc/tqm8xx/u-boot.lds index 8c46e4677f..8c46e4677f 100644 --- a/board/tqm8xx/u-boot.lds +++ b/board/tqc/tqm8xx/u-boot.lds diff --git a/board/tqm8xx/u-boot.lds.debug b/board/tqc/tqm8xx/u-boot.lds.debug index c33581d250..c33581d250 100644 --- a/board/tqm8xx/u-boot.lds.debug +++ b/board/tqc/tqm8xx/u-boot.lds.debug diff --git a/board/tqm85xx/law.c b/board/tqm85xx/law.c deleted file mode 100644 index 224af6ca77..0000000000 --- a/board/tqm85xx/law.c +++ /dev/null @@ -1,54 +0,0 @@ -/* - * Copyright 2008 Freescale Semiconductor, Inc. - * - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <asm/fsl_law.h> -#include <asm/mmu.h> - -/* - * LAW(Local Access Window) configuration: - * - * 0x0000_0000 0x7fff_ffff DDR 2G - * 0x8000_0000 0x9fff_ffff PCI1 MEM 512M - * 0xc000_0000 0xdfff_ffff RapidIO 512M - * 0xe000_0000 0xe000_ffff CCSR 1M - * 0xe200_0000 0xe2ff_ffff PCI1 IO 16M - * 0xf800_0000 0xf80f_ffff BCSR 1M - * 0xfe00_0000 0xffff_ffff FLASH (boot bank) 32M - * - * Notes: - * CCSRBAR and L2-as-SRAM don't need a configured Local Access Window. - * If flash is 8M at default position (last 8M), no LAW needed. - */ - -struct law_entry law_table[] = { - SET_LAW_ENTRY(1, CFG_DDR_SDRAM_BASE, LAW_SIZE_512M, LAW_TRGT_IF_DDR), - SET_LAW_ENTRY(2, CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), - SET_LAW_ENTRY(3, CFG_LBC_FLASH_BASE, LAW_SIZE_128M, LAW_TRGT_IF_LBC), - SET_LAW_ENTRY(4, CFG_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI), - SET_LAW_ENTRY(5, CFG_RIO_MEM_BASE, LAWAR_SIZE_512M, LAW_TRGT_IF_RIO), -}; - -int num_law_entries = ARRAY_SIZE(law_table); diff --git a/board/tqm85xx/sdram.c b/board/tqm85xx/sdram.c deleted file mode 100644 index 788a48cd13..0000000000 --- a/board/tqm85xx/sdram.c +++ /dev/null @@ -1,223 +0,0 @@ -/* - * (C) Copyright 2005 - * Stefan Roese, DENX Software Engineering, sr@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - - -#include <common.h> -#include <asm/processor.h> -#include <asm/immap_85xx.h> -#include <asm/processor.h> -#include <asm/mmu.h> - -struct sdram_conf_s { - unsigned long size; - unsigned long reg; -}; - -typedef struct sdram_conf_s sdram_conf_t; - -sdram_conf_t ddr_cs_conf[] = { - {(512 << 20), 0x80000202}, /* 512MB, 14x10(4) */ - {(256 << 20), 0x80000102}, /* 256MB, 13x10(4) */ - {(128 << 20), 0x80000101}, /* 128MB, 13x9(4) */ - {(64 << 20), 0x80000001}, /* 64MB, 12x9(4) */ -}; - -#define N_DDR_CS_CONF (sizeof(ddr_cs_conf) / sizeof(ddr_cs_conf[0])) - -int cas_latency(void); - -/* - * Autodetect onboard DDR SDRAM on 85xx platforms - * - * NOTE: Some of the hardcoded values are hardware dependant, - * so this should be extended for other future boards - * using this routine! - */ -long int sdram_setup(int casl) -{ - int i; - volatile ccsr_ddr_t *ddr = (void *)(CFG_MPC85xx_DDR_ADDR); - unsigned long cfg_ddr_timing1; - unsigned long cfg_ddr_mode; - - /* - * Disable memory controller. - */ - ddr->cs0_config = 0; - ddr->sdram_cfg = 0; - - switch (casl) { - case 20: - cfg_ddr_timing1 = 0x47405331 | (3 << 16); - cfg_ddr_mode = 0x40020002 | (2 << 4); - break; - - case 25: - cfg_ddr_timing1 = 0x47405331 | (4 << 16); - cfg_ddr_mode = 0x40020002 | (6 << 4); - break; - - case 30: - default: - cfg_ddr_timing1 = 0x47405331 | (5 << 16); - cfg_ddr_mode = 0x40020002 | (3 << 4); - break; - } - - ddr->cs0_bnds = (ddr_cs_conf[0].size - 1) >> 24; - ddr->cs0_config = ddr_cs_conf[0].reg; - ddr->timing_cfg_1 = cfg_ddr_timing1; - ddr->timing_cfg_2 = 0x00000800; /* P9-45,may need tuning */ - ddr->sdram_mode = cfg_ddr_mode; - ddr->sdram_interval = 0x05160100; /* autocharge,no open page */ - ddr->err_disable = 0x0000000D; - - asm ("sync;isync;msync"); - udelay(1000); - - ddr->sdram_cfg = 0xc2000000; /* unbuffered,no DYN_PWR */ - asm ("sync; isync; msync"); - udelay(1000); - - for (i=0; i<N_DDR_CS_CONF; i++) { - ddr->cs0_config = ddr_cs_conf[i].reg; - - if (get_ram_size(0, ddr_cs_conf[i].size) == ddr_cs_conf[i].size) { - /* - * OK, size detected -> all done - */ - return ddr_cs_conf[i].size; - } - } - - return 0; /* nothing found ! */ -} - -void board_add_ram_info(int use_default) -{ - int casl; - - if (use_default) - casl = CONFIG_DDR_DEFAULT_CL; - else - casl = cas_latency(); - - puts(" (CL="); - switch (casl) { - case 20: - puts("2)"); - break; - - case 25: - puts("2.5)"); - break; - - case 30: - puts("3)"); - break; - } -} - -long int initdram (int board_type) -{ - long dram_size = 0; - int casl; - -#if defined(CONFIG_DDR_DLL) - /* - * This DLL-Override only used on TQM8540 and TQM8560 - */ - { - volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR); - int i,x; - - x = 10; - - /* - * Work around to stabilize DDR DLL - */ - gur->ddrdllcr = 0x81000000; - asm("sync;isync;msync"); - udelay (200); - while (gur->ddrdllcr != 0x81000100) { - gur->devdisr = gur->devdisr | 0x00010000; - asm("sync;isync;msync"); - for (i=0; i<x; i++) - ; - gur->devdisr = gur->devdisr & 0xfff7ffff; - asm("sync;isync;msync"); - x++; - } - } -#endif - - casl = cas_latency(); - dram_size = sdram_setup(casl); - if ((dram_size == 0) && (casl != CONFIG_DDR_DEFAULT_CL)) { - /* - * Try again with default CAS latency - */ - puts("Problem with CAS lantency"); - board_add_ram_info(1); - puts(", using default CL!\n"); - casl = CONFIG_DDR_DEFAULT_CL; - dram_size = sdram_setup(casl); - puts(" "); - } - - return dram_size; -} - -#if defined(CFG_DRAM_TEST) -int testdram (void) -{ - uint *pstart = (uint *) CFG_MEMTEST_START; - uint *pend = (uint *) CFG_MEMTEST_END; - uint *p; - - printf ("SDRAM test phase 1:\n"); - for (p = pstart; p < pend; p++) - *p = 0xaaaaaaaa; - - for (p = pstart; p < pend; p++) { - if (*p != 0xaaaaaaaa) { - printf ("SDRAM test fails at: %08x\n", (uint) p); - return 1; - } - } - - printf ("SDRAM test phase 2:\n"); - for (p = pstart; p < pend; p++) - *p = 0x55555555; - - for (p = pstart; p < pend; p++) { - if (*p != 0x55555555) { - printf ("SDRAM test fails at: %08x\n", (uint) p); - return 1; - } - } - - printf ("SDRAM test passed.\n"); - return 0; -} -#endif diff --git a/board/tqm85xx/tlb.c b/board/tqm85xx/tlb.c deleted file mode 100644 index ad26caeea2..0000000000 --- a/board/tqm85xx/tlb.c +++ /dev/null @@ -1,114 +0,0 @@ -/* - * Copyright 2008 Freescale Semiconductor, Inc. - * - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <asm/mmu.h> - -struct fsl_e_tlb_entry tlb_table[] = { - /* TLB 0 - for temp stack in cache */ - SET_TLB_ENTRY(0, CFG_INIT_RAM_ADDR, CFG_INIT_RAM_ADDR, - MAS3_SX|MAS3_SW|MAS3_SR, 0, - 0, 0, BOOKE_PAGESZ_4K, 0), - SET_TLB_ENTRY(0, CFG_INIT_RAM_ADDR + 4 * 1024 , CFG_INIT_RAM_ADDR + 4 * 1024, - MAS3_SX|MAS3_SW|MAS3_SR, 0, - 0, 0, BOOKE_PAGESZ_4K, 0), - SET_TLB_ENTRY(0, CFG_INIT_RAM_ADDR + 8 * 1024 , CFG_INIT_RAM_ADDR + 8 * 1024, - MAS3_SX|MAS3_SW|MAS3_SR, 0, - 0, 0, BOOKE_PAGESZ_4K, 0), - SET_TLB_ENTRY(0, CFG_INIT_RAM_ADDR + 12 * 1024 , CFG_INIT_RAM_ADDR + 12 * 1024, - MAS3_SX|MAS3_SW|MAS3_SR, 0, - 0, 0, BOOKE_PAGESZ_4K, 0), - - - /* - * TLB 0, 1: 128M Non-cacheable, guarded - * 0xf8000000 128M FLASH - * Out of reset this entry is only 4K. - */ - SET_TLB_ENTRY(1, CFG_FLASH_BASE, CFG_FLASH_BASE, - MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, - 0, 1, BOOKE_PAGESZ_64M, 1), - SET_TLB_ENTRY(1, CFG_FLASH_BASE + 0x4000000, CFG_FLASH_BASE + 0x4000000, - MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, - 0, 0, BOOKE_PAGESZ_64M, 1), - - /* - * TLB 2: 256M Non-cacheable, guarded - * 0x80000000 256M PCI1 MEM First half - */ - SET_TLB_ENTRY(1, CFG_PCI1_MEM_PHYS, CFG_PCI1_MEM_PHYS, - MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, - 0, 2, BOOKE_PAGESZ_256M, 1), - - /* - * TLB 3: 256M Non-cacheable, guarded - * 0x90000000 256M PCI1 MEM Second half - */ - SET_TLB_ENTRY(1, CFG_PCI1_MEM_PHYS + 0x10000000, CFG_PCI1_MEM_PHYS + 0x10000000, - MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, - 0, 3, BOOKE_PAGESZ_256M, 1), - - /* - * TLB 4: 256M Non-cacheable, guarded - * 0xc0000000 256M Rapid IO MEM First half - */ - SET_TLB_ENTRY(1, CFG_RIO_MEM_BASE, CFG_RIO_MEM_BASE, - MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, - 0, 4, BOOKE_PAGESZ_256M, 1), - - /* - * TLB 5: 256M Non-cacheable, guarded - * 0xd0000000 256M Rapid IO MEM Second half - */ - SET_TLB_ENTRY(1, CFG_RIO_MEM_BASE + 0x10000000, CFG_RIO_MEM_BASE + 0x10000000, - MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, - 0, 5, BOOKE_PAGESZ_256M, 1), - - /* - * TLB 6: 64M Non-cacheable, guarded - * 0xe000_0000 1M CCSRBAR - * 0xe200_0000 16M PCI1 IO - */ - SET_TLB_ENTRY(1, CFG_CCSRBAR, CFG_CCSRBAR_PHYS, - MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, - 0, 6, BOOKE_PAGESZ_64M, 1), - - /* - * TLB 7+8: 512M DDR, cache disabled (needed for memory test) - * 0x00000000 512M DDR System memory - * Without SPD EEPROM configured DDR, this must be setup manually. - * Make sure the TLB count at the top of this table is correct. - * Likely it needs to be increased by two for these entries. - */ - SET_TLB_ENTRY(1, CFG_DDR_SDRAM_BASE, CFG_DDR_SDRAM_BASE, - MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, - 0, 7, BOOKE_PAGESZ_256M, 1), - - SET_TLB_ENTRY(1, CFG_DDR_SDRAM_BASE + 0x10000000, CFG_DDR_SDRAM_BASE + 0x10000000, - MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, - 0, 8, BOOKE_PAGESZ_256M, 1), -}; - -int num_tlb_entries = ARRAY_SIZE(tlb_table); diff --git a/board/tqm85xx/tqm85xx.c b/board/tqm85xx/tqm85xx.c deleted file mode 100644 index 8fa0162d83..0000000000 --- a/board/tqm85xx/tqm85xx.c +++ /dev/null @@ -1,419 +0,0 @@ -/* - * (C) Copyright 2005 - * Stefan Roese, DENX Software Engineering, sr@denx.de. - * - * Copyright 2004 Freescale Semiconductor. - * (C) Copyright 2002,2003, Motorola Inc. - * Xianghua Xiao, (X.Xiao@motorola.com) - * - * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <pci.h> -#include <asm/processor.h> -#include <asm/immap_85xx.h> -#include <ioports.h> -#include <flash.h> - -DECLARE_GLOBAL_DATA_PTR; - -extern flash_info_t flash_info[]; /* FLASH chips info */ - -void local_bus_init (void); -ulong flash_get_size (ulong base, int banknum); - -#ifdef CONFIG_PS2MULT -void ps2mult_early_init(void); -#endif - -#ifdef CONFIG_CPM2 -/* - * I/O Port configuration table - * - * if conf is 1, then that port pin will be configured at boot time - * according to the five values podr/pdir/ppar/psor/pdat for that entry - */ - -const iop_conf_t iop_conf_tab[4][32] = { - - /* Port A configuration */ - { /* conf ppar psor pdir podr pdat */ - /* PA31 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 MII COL */ - /* PA30 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 MII CRS */ - /* PA29 */ { 1, 1, 1, 1, 0, 0 }, /* FCC1 MII TX_ER */ - /* PA28 */ { 1, 1, 1, 1, 0, 0 }, /* FCC1 MII TX_EN */ - /* PA27 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 MII RX_DV */ - /* PA26 */ { 1, 1, 1, 0, 0, 0 }, /* FCC1 MII RX_ER */ - /* PA25 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[0] */ - /* PA24 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[1] */ - /* PA23 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[2] */ - /* PA22 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[3] */ - /* PA21 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 MII TxD[3] */ - /* PA20 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 MII TxD[2] */ - /* PA19 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 MII TxD[1] */ - /* PA18 */ { 1, 1, 0, 1, 0, 0 }, /* FCC1 MII TxD[0] */ - /* PA17 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 MII RxD[0] */ - /* PA16 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 MII RxD[1] */ - /* PA15 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 MII RxD[2] */ - /* PA14 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 MII RxD[3] */ - /* PA13 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[3] */ - /* PA12 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[2] */ - /* PA11 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[1] */ - /* PA10 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[0] */ - /* PA9 */ { 0, 1, 1, 1, 0, 0 }, /* FCC1 L1TXD */ - /* PA8 */ { 0, 1, 1, 0, 0, 0 }, /* FCC1 L1RXD */ - /* PA7 */ { 0, 0, 0, 1, 0, 0 }, /* PA7 */ - /* PA6 */ { 0, 1, 1, 1, 0, 0 }, /* TDM A1 L1RSYNC */ - /* PA5 */ { 0, 0, 0, 1, 0, 0 }, /* PA5 */ - /* PA4 */ { 0, 0, 0, 1, 0, 0 }, /* PA4 */ - /* PA3 */ { 0, 0, 0, 1, 0, 0 }, /* PA3 */ - /* PA2 */ { 0, 0, 0, 1, 0, 0 }, /* PA2 */ - /* PA1 */ { 0, 0, 0, 0, 0, 0 }, /* FREERUN */ - /* PA0 */ { 0, 0, 0, 1, 0, 0 } /* PA0 */ - }, - - /* Port B configuration */ - { /* conf ppar psor pdir podr pdat */ - /* PB31 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TX_ER */ - /* PB30 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_DV */ - /* PB29 */ { 1, 1, 1, 1, 0, 0 }, /* FCC2 MII TX_EN */ - /* PB28 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_ER */ - /* PB27 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII COL */ - /* PB26 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII CRS */ - /* PB25 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[3] */ - /* PB24 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[2] */ - /* PB23 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[1] */ - /* PB22 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[0] */ - /* PB21 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[0] */ - /* PB20 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[1] */ - /* PB19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[2] */ - /* PB18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[3] */ - /* PB17 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3:RX_DIV */ - /* PB16 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3:RX_ERR */ - /* PB15 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3:TX_ERR */ - /* PB14 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3:TX_EN */ - /* PB13 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3:COL */ - /* PB12 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3:CRS */ - /* PB11 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3:RXD */ - /* PB10 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3:RXD */ - /* PB9 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3:RXD */ - /* PB8 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3:RXD */ - /* PB7 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3:TXD */ - /* PB6 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3:TXD */ - /* PB5 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3:TXD */ - /* PB4 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3:TXD */ - /* PB3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ - /* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ - /* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ - /* PB0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */ - }, - - /* Port C */ - { /* conf ppar psor pdir podr pdat */ - /* PC31 */ { 0, 0, 0, 1, 0, 0 }, /* PC31 */ - /* PC30 */ { 0, 0, 0, 1, 0, 0 }, /* PC30 */ - /* PC29 */ { 0, 1, 1, 0, 0, 0 }, /* SCC1 EN *CLSN */ - /* PC28 */ { 0, 0, 0, 1, 0, 0 }, /* PC28 */ - /* PC27 */ { 0, 0, 0, 1, 0, 0 }, /* UART Clock in */ - /* PC26 */ { 0, 0, 0, 1, 0, 0 }, /* PC26 */ - /* PC25 */ { 0, 0, 0, 1, 0, 0 }, /* PC25 */ - /* PC24 */ { 0, 0, 0, 1, 0, 0 }, /* PC24 */ - /* PC23 */ { 0, 1, 0, 1, 0, 0 }, /* ATMTFCLK */ - /* PC22 */ { 0, 1, 0, 0, 0, 0 }, /* ATMRFCLK */ - /* PC21 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 EN RXCLK */ - /* PC20 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 EN TXCLK */ - /* PC19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_CLK CLK13 */ - /* PC18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC Tx Clock (CLK14) */ - /* PC17 */ { 1, 1, 0, 0, 0, 0 }, /* PC17 */ - /* PC16 */ { 1, 1, 0, 0, 0, 0 }, /* FCC Tx Clock (CLK16) */ - /* PC15 */ { 0, 1, 0, 0, 0, 0 }, /* PC15 */ - /* PC14 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN *CD */ - /* PC13 */ { 0, 1, 0, 0, 0, 0 }, /* PC13 */ - /* PC12 */ { 0, 1, 0, 1, 0, 0 }, /* PC12 */ - /* PC11 */ { 0, 0, 0, 1, 0, 0 }, /* LXT971 transmit control */ - /* PC10 */ { 0, 0, 0, 1, 0, 0 }, /* FETHMDC */ - /* PC9 */ { 0, 0, 0, 0, 0, 0 }, /* FETHMDIO */ - /* PC8 */ { 0, 0, 0, 1, 0, 0 }, /* PC8 */ - /* PC7 */ { 0, 0, 0, 1, 0, 0 }, /* PC7 */ - /* PC6 */ { 0, 0, 0, 1, 0, 0 }, /* PC6 */ - /* PC5 */ { 0, 0, 0, 1, 0, 0 }, /* PC5 */ - /* PC4 */ { 0, 0, 0, 1, 0, 0 }, /* PC4 */ - /* PC3 */ { 0, 0, 0, 1, 0, 0 }, /* PC3 */ - /* PC2 */ { 0, 0, 0, 1, 0, 1 }, /* ENET FDE */ - /* PC1 */ { 0, 0, 0, 1, 0, 0 }, /* ENET DSQE */ - /* PC0 */ { 0, 0, 0, 1, 0, 0 }, /* ENET LBK */ - }, - - /* Port D */ - { /* conf ppar psor pdir podr pdat */ - /* PD31 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 EN RxD */ - /* PD30 */ { 1, 1, 1, 1, 0, 0 }, /* SCC1 EN TxD */ - /* PD29 */ { 1, 1, 0, 1, 0, 0 }, /* SCC1 EN TENA */ - /* PD28 */ { 1, 1, 0, 0, 0, 0 }, /* PD28 */ - /* PD27 */ { 1, 1, 0, 1, 0, 0 }, /* PD27 */ - /* PD26 */ { 1, 1, 0, 1, 0, 0 }, /* PD26 */ - /* PD25 */ { 0, 0, 0, 1, 0, 0 }, /* PD25 */ - /* PD24 */ { 0, 0, 0, 1, 0, 0 }, /* PD24 */ - /* PD23 */ { 0, 0, 0, 1, 0, 0 }, /* PD23 */ - /* PD22 */ { 0, 0, 0, 1, 0, 0 }, /* PD22 */ - /* PD21 */ { 0, 0, 0, 1, 0, 0 }, /* PD21 */ - /* PD20 */ { 0, 0, 0, 1, 0, 0 }, /* PD20 */ - /* PD19 */ { 0, 0, 0, 1, 0, 0 }, /* PD19 */ - /* PD18 */ { 0, 0, 0, 1, 0, 0 }, /* PD18 */ - /* PD17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXPRTY */ - /* PD16 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXPRTY */ - /* PD15 */ { 0, 1, 1, 0, 1, 0 }, /* I2C SDA */ - /* PD14 */ { 0, 0, 0, 1, 0, 0 }, /* LED */ - /* PD13 */ { 0, 0, 0, 0, 0, 0 }, /* PD13 */ - /* PD12 */ { 0, 0, 0, 0, 0, 0 }, /* PD12 */ - /* PD11 */ { 0, 0, 0, 0, 0, 0 }, /* PD11 */ - /* PD10 */ { 0, 0, 0, 0, 0, 0 }, /* PD10 */ - /* PD9 */ { 0, 1, 0, 1, 0, 0 }, /* SMC1 TXD */ - /* PD8 */ { 0, 1, 0, 0, 0, 0 }, /* SMC1 RXD */ - /* PD7 */ { 0, 0, 0, 1, 0, 1 }, /* PD7 */ - /* PD6 */ { 0, 0, 0, 1, 0, 1 }, /* PD6 */ - /* PD5 */ { 0, 0, 0, 1, 0, 1 }, /* PD5 */ - /* PD4 */ { 0, 0, 0, 1, 0, 1 }, /* PD4 */ - /* PD3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ - /* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ - /* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ - /* PD0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */ - } -}; -#endif /* CONFIG_CPM2 */ - -#define CASL_STRING1 "casl=xx" -#define CASL_STRING2 "casl=" - -static const int casl_table[] = { 20, 25, 30 }; -#define N_CASL (sizeof(casl_table) / sizeof(casl_table[0])) - -int cas_latency(void) -{ - char *s = getenv("serial#"); - int casl; - int val; - int i; - - casl = CONFIG_DDR_DEFAULT_CL; - - if (s != NULL) { - if (strncmp(s + strlen(s) - strlen(CASL_STRING1), CASL_STRING2, - strlen(CASL_STRING2)) == 0) { - val = simple_strtoul(s + strlen(s) - 2, NULL, 10); - - for (i=0; i<N_CASL; ++i) { - if (val == casl_table[i]) { - return val; - } - } - } - } - - return casl; -} - -int checkboard (void) -{ - char *s = getenv("serial#"); - - printf("Board: %s", CONFIG_BOARDNAME); - if (s != NULL) { - puts(", serial# "); - puts(s); - } - putc('\n'); - -#ifdef CONFIG_PCI - printf ("PCI1: 32 bit, %d MHz (compiled)\n", - CONFIG_SYS_CLK_FREQ / 1000000); -#else - printf ("PCI1: disabled\n"); -#endif - - /* - * Initialize local bus. - */ - local_bus_init (); - - return 0; -} - -int misc_init_r (void) -{ - volatile ccsr_lbc_t *memctl = (void *)(CFG_MPC85xx_LBC_ADDR); - - /* - * Adjust flash start and offset to detected values - */ - gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize; - gd->bd->bi_flashoffset = 0; - - /* - * Check if boot FLASH isn't max size - */ - if (gd->bd->bi_flashsize < (0 - CFG_FLASH0)) { - memctl->or0 = gd->bd->bi_flashstart | (CFG_OR0_PRELIM & 0x00007fff); - memctl->br0 = gd->bd->bi_flashstart | (CFG_BR0_PRELIM & 0x00007fff); - - /* - * Re-check to get correct base address - */ - flash_get_size(gd->bd->bi_flashstart, CFG_MAX_FLASH_BANKS - 1); - } - - /* - * Check if only one FLASH bank is available - */ - if (gd->bd->bi_flashsize != CFG_MAX_FLASH_BANKS * (0 - CFG_FLASH0)) { - memctl->or1 = 0; - memctl->br1 = 0; - - /* - * Re-do flash protection upon new addresses - */ - flash_protect (FLAG_PROTECT_CLEAR, - gd->bd->bi_flashstart, 0xffffffff, - &flash_info[CFG_MAX_FLASH_BANKS - 1]); - - /* Monitor protection ON by default */ - flash_protect (FLAG_PROTECT_SET, - CFG_MONITOR_BASE, CFG_MONITOR_BASE + monitor_flash_len - 1, - &flash_info[CFG_MAX_FLASH_BANKS - 1]); - - /* Environment protection ON by default */ - flash_protect (FLAG_PROTECT_SET, - CFG_ENV_ADDR, - CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1, - &flash_info[CFG_MAX_FLASH_BANKS - 1]); - - /* Redundant environment protection ON by default */ - flash_protect (FLAG_PROTECT_SET, - CFG_ENV_ADDR_REDUND, - CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1, - &flash_info[CFG_MAX_FLASH_BANKS - 1]); - } - - return 0; -} - -/* - * Initialize Local Bus - */ -void local_bus_init (void) -{ - volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR); - volatile ccsr_lbc_t *lbc = (void *)(CFG_MPC85xx_LBC_ADDR); - - uint clkdiv; - uint lbc_hz; - sys_info_t sysinfo; - - /* - * Errata LBC11. - * Fix Local Bus clock glitch when DLL is enabled. - * - * If localbus freq is < 66Mhz, DLL bypass mode must be used. - * If localbus freq is > 133Mhz, DLL can be safely enabled. - * Between 66 and 133, the DLL is enabled with an override workaround. - */ - - get_sys_info (&sysinfo); - clkdiv = lbc->lcrr & 0x0f; - lbc_hz = sysinfo.freqSystemBus / 1000000 / clkdiv; - - if (lbc_hz < 66) { - lbc->lcrr = CFG_LBC_LCRR | 0x80000000; /* DLL Bypass */ - lbc->ltedr = 0xa4c80000; /* DK: !!! */ - - } else if (lbc_hz >= 133) { - lbc->lcrr = CFG_LBC_LCRR & (~0x80000000); /* DLL Enabled */ - - } else { - /* - * On REV1 boards, need to change CLKDIV before enable DLL. - * Default CLKDIV is 8, change it to 4 temporarily. - */ - uint pvr = get_pvr (); - uint temp_lbcdll = 0; - - if (pvr == PVR_85xx_REV1) { - /* FIXME: Justify the high bit here. */ - lbc->lcrr = 0x10000004; - } - - lbc->lcrr = CFG_LBC_LCRR & (~0x80000000); /* DLL Enabled */ - udelay (200); - - /* - * Sample LBC DLL ctrl reg, upshift it to set the - * override bits. - */ - temp_lbcdll = gur->lbcdllcr; - gur->lbcdllcr = (((temp_lbcdll & 0xff) << 16) | 0x80000000); - asm ("sync;isync;msync"); - } -} - -#if defined(CONFIG_PCI) -/* - * Initialize PCI Devices, report devices found. - */ - -#ifndef CONFIG_PCI_PNP -static struct pci_config_table pci_mpc85xxads_config_table[] = { - {PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, - PCI_IDSEL_NUMBER, PCI_ANY_ID, - pci_cfgfunc_config_device, {PCI_ENET0_IOADDR, - PCI_ENET0_MEMADDR, - PCI_COMMAND_MEMORY | - PCI_COMMAND_MASTER}}, - {} -}; -#endif - - -static struct pci_controller hose = { -#ifndef CONFIG_PCI_PNP - config_table:pci_mpc85xxads_config_table, -#endif -}; - -#endif /* CONFIG_PCI */ - - -void pci_init_board (void) -{ -#ifdef CONFIG_PCI - pci_mpc85xx_init (&hose); -#endif /* CONFIG_PCI */ -} - -#ifdef CONFIG_BOARD_EARLY_INIT_R -int board_early_init_r (void) -{ -#ifdef CONFIG_PS2MULT - ps2mult_early_init(); -#endif /* CONFIG_PS2MULT */ - return (0); -} -#endif /* CONFIG_BOARD_EARLY_INIT_R */ diff --git a/board/trab/Makefile b/board/trab/Makefile index fbe1c3640f..2402577a50 100644 --- a/board/trab/Makefile +++ b/board/trab/Makefile @@ -60,7 +60,7 @@ clean: rm -f $(SOBJS) $(OBJS) $(OBJS_FKT) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/trab/memory.c b/board/trab/memory.c index 8614be7bad..052432e9d9 100644 --- a/board/trab/memory.c +++ b/board/trab/memory.c @@ -460,7 +460,7 @@ int memory_post_test (int flags) { int ret = 0; bd_t *bd = gd->bd; - unsigned long memsize = (bd->bi_memsize >= 256 << 20 ? + phys_size_t memsize = (bd->bi_memsize >= 256 << 20 ? 256 << 20 : bd->bi_memsize) - (1 << 20); diff --git a/board/trizepsiv/Makefile b/board/trizepsiv/Makefile index 115e17ded9..44c0d495ef 100644 --- a/board/trizepsiv/Makefile +++ b/board/trizepsiv/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/uc100/uc100.c b/board/uc100/uc100.c index a5dd95d78e..896f9693e3 100644 --- a/board/uc100/uc100.c +++ b/board/uc100/uc100.c @@ -169,7 +169,7 @@ int checkboard (void) /* * Initialize SDRAM */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; diff --git a/board/uc101/Makefile b/board/uc101/Makefile index ddfd2ef8af..442e2d0df2 100644 --- a/board/uc101/Makefile +++ b/board/uc101/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/uc101/uc101.c b/board/uc101/uc101.c index f726513965..69ba5078d4 100644 --- a/board/uc101/uc101.c +++ b/board/uc101/uc101.c @@ -146,7 +146,7 @@ static void sdram_start (int hi_addr) * is something else than 0x00000000. */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { ulong dramsize = 0; #ifndef CFG_RAMBOOT diff --git a/board/utx8245/utx8245.c b/board/utx8245/utx8245.c index 834fd84079..e2a961a3a3 100644 --- a/board/utx8245/utx8245.c +++ b/board/utx8245/utx8245.c @@ -46,7 +46,7 @@ int checkboard(void) } -long int initdram(int board_type) +phys_size_t initdram(int board_type) { long size; long new_bank0_end; diff --git a/board/v37/v37.c b/board/v37/v37.c index 2e47573024..2067fedfca 100644 --- a/board/v37/v37.c +++ b/board/v37/v37.c @@ -90,7 +90,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *)CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; diff --git a/board/v38b/Makefile b/board/v38b/Makefile index b21bd6f6c5..0b227dac0f 100644 --- a/board/v38b/Makefile +++ b/board/v38b/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/v38b/v38b.c b/board/v38b/v38b.c index ec032eef8d..8815a0cb4a 100644 --- a/board/v38b/v38b.c +++ b/board/v38b/v38b.c @@ -71,7 +71,7 @@ static void sdram_start(int hi_addr) #endif /* !CFG_RAMBOOT */ -long int initdram(int board_type) +phys_size_t initdram(int board_type) { ulong dramsize = 0; ulong dramsize2 = 0; diff --git a/board/versatile/Makefile b/board/versatile/Makefile index 1fad0a7ee3..044a429899 100644 --- a/board/versatile/Makefile +++ b/board/versatile/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/voiceblue/Makefile b/board/voiceblue/Makefile index 9386bb0e7a..e7c1cbb312 100644 --- a/board/voiceblue/Makefile +++ b/board/voiceblue/Makefile @@ -62,7 +62,7 @@ clean: distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/w7o/Makefile b/board/w7o/Makefile index 46b8c8923a..e481bb2880 100644 --- a/board/w7o/Makefile +++ b/board/w7o/Makefile @@ -43,7 +43,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/w7o/w7o.c b/board/w7o/w7o.c index c56c269dae..0e3b84c613 100644 --- a/board/w7o/w7o.c +++ b/board/w7o/w7o.c @@ -31,6 +31,7 @@ #include <watchdog.h> unsigned long get_dram_size (void); +void sdram_init(void); /* * Macros to transform values @@ -151,8 +152,15 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { + /* + * ToDo: Move the asm init routine sdram_init() to this C file, + * or even better use some common ppc4xx code available + * in cpu/ppc4xx + */ + sdram_init(); + return get_dram_size (); } diff --git a/board/wepep250/Makefile b/board/wepep250/Makefile index 58a70ccd75..0669b0ebba 100644 --- a/board/wepep250/Makefile +++ b/board/wepep250/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/westel/amx860/amx860.c b/board/westel/amx860/amx860.c index 8826667cdc..4742aafc5e 100644 --- a/board/westel/amx860/amx860.c +++ b/board/westel/amx860/amx860.c @@ -61,7 +61,7 @@ int checkboard (void) /* ------------------------------------------------------------------------- */ -long int initdram (int board_type) +phys_size_t initdram (int board_type) { volatile immap_t *immap = (immap_t *)CFG_IMMR; diff --git a/board/xaeniax/Makefile b/board/xaeniax/Makefile index 9a79f7d981..7dd2ea04a6 100644 --- a/board/xaeniax/Makefile +++ b/board/xaeniax/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/xilinx/ml300/Makefile b/board/xilinx/ml300/Makefile index 05ad23524f..9215d77bb0 100644 --- a/board/xilinx/ml300/Makefile +++ b/board/xilinx/ml300/Makefile @@ -58,7 +58,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/xilinx/ml300/init.S b/board/xilinx/ml300/init.S index f753df851a..a282c9ae22 100644 --- a/board/xilinx/ml300/init.S +++ b/board/xilinx/ml300/init.S @@ -42,7 +42,3 @@ .globl ext_bus_cntlr_init ext_bus_cntlr_init: blr - - .globl sdram_init -sdram_init: - blr diff --git a/board/xilinx/ml300/ml300.c b/board/xilinx/ml300/ml300.c index 58bfac0716..5d493eeb73 100644 --- a/board/xilinx/ml300/ml300.c +++ b/board/xilinx/ml300/ml300.c @@ -79,7 +79,7 @@ checkboard(void) return (0); } -long int +phys_size_t initdram(int board_type) { return 128 * 1024 * 1024; diff --git a/board/xilinx/ml300/serial.c b/board/xilinx/ml300/serial.c index ba41f856e4..993dfa30f6 100644 --- a/board/xilinx/ml300/serial.c +++ b/board/xilinx/ml300/serial.c @@ -36,9 +36,9 @@ * */ +#include <common.h> #include <asm/u-boot.h> #include <asm/processor.h> -#include <common.h> #include <command.h> #include <config.h> diff --git a/board/xilinx/ml401/Makefile b/board/xilinx/ml401/Makefile index ee9b6d5d29..10b47b2ae5 100644 --- a/board/xilinx/ml401/Makefile +++ b/board/xilinx/ml401/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/xilinx/xupv2p/Makefile b/board/xilinx/xupv2p/Makefile index ee9b6d5d29..10b47b2ae5 100644 --- a/board/xilinx/xupv2p/Makefile +++ b/board/xilinx/xupv2p/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/xm250/Makefile b/board/xm250/Makefile index 0a6eb320ac..a174f66199 100644 --- a/board/xm250/Makefile +++ b/board/xm250/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/xpedite1k/Makefile b/board/xpedite1k/Makefile index 5da96e9e1c..6ab1a26b15 100644 --- a/board/xpedite1k/Makefile +++ b/board/xpedite1k/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/xpedite1k/xpedite1k.c b/board/xpedite1k/xpedite1k.c index 8411cf06f7..bc7e3bd17c 100644 --- a/board/xpedite1k/xpedite1k.c +++ b/board/xpedite1k/xpedite1k.c @@ -104,7 +104,7 @@ int checkboard (void) } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { long dram_size = 0; diff --git a/board/xsengine/Makefile b/board/xsengine/Makefile index 3f80a1d515..fc239358b2 100644 --- a/board/xsengine/Makefile +++ b/board/xsengine/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/zeus/Makefile b/board/zeus/Makefile index f0d4e9f3f4..55fb4c4343 100644 --- a/board/zeus/Makefile +++ b/board/zeus/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/zeus/zeus.c b/board/zeus/zeus.c index 4ab853f8f5..0113d4845e 100644 --- a/board/zeus/zeus.c +++ b/board/zeus/zeus.c @@ -208,56 +208,11 @@ static u32 detect_sdram_size(void) return size; } -long int initdram (int board_type) +phys_size_t initdram (int board_type) { return detect_sdram_size(); } -#if defined(CFG_DRAM_TEST) -int testdram(void) -{ - unsigned long *mem = (unsigned long *)0; - const unsigned long kend = (1024 / sizeof(unsigned long)); - unsigned long k, n; - unsigned long msr; - unsigned long total_kbytes; - - total_kbytes = detect_sdram_size(); - - msr = mfmsr(); - mtmsr(msr & ~(MSR_EE)); - - for (k = 0; k < total_kbytes ; - ++k, mem += (1024 / sizeof(unsigned long))) { - if ((k & 1023) == 0) { - printf("%3d MB\r", k / 1024); - } - - memset(mem, 0xaaaaaaaa, 1024); - for (n = 0; n < kend; ++n) { - if (mem[n] != 0xaaaaaaaa) { - printf("SDRAM test fails at: %08x\n", - (uint) & mem[n]); - return 1; - } - } - - memset(mem, 0x55555555, 1024); - for (n = 0; n < kend; ++n) { - if (mem[n] != 0x55555555) { - printf("SDRAM test fails at: %08x\n", - (uint) & mem[n]); - return 1; - } - } - } - printf("SDRAM test passes\n"); - mtmsr(msr); - - return 0; -} -#endif - static int default_env_var(char *buf, char *var) { char *ptr; diff --git a/board/zpc1900/Makefile b/board/zpc1900/Makefile index be7e213a9b..dc40d9b94a 100644 --- a/board/zpc1900/Makefile +++ b/board/zpc1900/Makefile @@ -38,7 +38,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### diff --git a/board/zpc1900/zpc1900.c b/board/zpc1900/zpc1900.c index 7db535e8a4..103ef714fd 100644 --- a/board/zpc1900/zpc1900.c +++ b/board/zpc1900/zpc1900.c @@ -220,7 +220,7 @@ void nvram_write(long dest, const void *src, size_t count) } #endif /* CFG_NVRAM_ACCESS_ROUTINE */ -long int initdram(int board_type) +phys_size_t initdram(int board_type) { vu_char *bcsr = (vu_char *)CFG_BCSR; volatile immap_t *immap = (immap_t *)CFG_IMMR; diff --git a/board/zylonite/Makefile b/board/zylonite/Makefile index d72dc98f01..89542356b7 100644 --- a/board/zylonite/Makefile +++ b/board/zylonite/Makefile @@ -39,7 +39,7 @@ clean: rm -f $(SOBJS) $(OBJS) distclean: clean - rm -f $(LIB) core *.bak .depend + rm -f $(LIB) core *.bak $(obj).depend ######################################################################### |
