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authorAlbert ARIBAUD <albert.u.boot@aribaud.net>2014-06-25 10:39:58 +0200
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2014-06-25 10:39:58 +0200
commited1d98d801dfb6384d0f2fff45ce1ebf884944ca (patch)
tree5a9487c67b75606d3a723b7acb9eda8da200c871 /board/freescale/p1023rds
parent754466ac95e92ebf40e25c6af6f13ab9b4d7c87b (diff)
parentba9b42c81b0734d53edfbb1fe4a6ded7de78c5ab (diff)
downloadblackbird-obmc-uboot-ed1d98d801dfb6384d0f2fff45ce1ebf884944ca.tar.gz
blackbird-obmc-uboot-ed1d98d801dfb6384d0f2fff45ce1ebf884944ca.zip
Merge branch 'u-boot/master' into 'u-boot-arm/master'
Diffstat (limited to 'board/freescale/p1023rds')
-rw-r--r--board/freescale/p1023rds/p1023rds.c5
-rw-r--r--board/freescale/p1023rds/tlb.c2
2 files changed, 0 insertions, 7 deletions
diff --git a/board/freescale/p1023rds/p1023rds.c b/board/freescale/p1023rds/p1023rds.c
index d8c87458e8..2b883c719e 100644
--- a/board/freescale/p1023rds/p1023rds.c
+++ b/board/freescale/p1023rds/p1023rds.c
@@ -182,11 +182,6 @@ void ft_board_setup(void *blob, bd_t *bd)
fdt_fixup_memory(blob, (u64)base, (u64)size);
- /* By default NOR is on, and NAND is disabled */
-#ifdef CONFIG_NAND_U_BOOT
- do_fixup_by_path_string(blob, "nor_flash", "status", "disabled");
- do_fixup_by_path_string(blob, "nand_flash", "status", "okay");
-#endif
#ifdef CONFIG_HAS_FSL_DR_USB
fdt_fixup_dr_usb(blob, bd);
#endif
diff --git a/board/freescale/p1023rds/tlb.c b/board/freescale/p1023rds/tlb.c
index 8b2bf50799..3c92c14ae3 100644
--- a/board/freescale/p1023rds/tlb.c
+++ b/board/freescale/p1023rds/tlb.c
@@ -36,7 +36,6 @@ struct fsl_e_tlb_entry tlb_table[] = {
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 1, BOOKE_PAGESZ_4M, 1),
-#ifndef CONFIG_NAND_SPL
/* *W*G* - BCSR and NOR flash on local bus*/
/* This will be changed to *I*G* after relocation to RAM. */
SET_TLB_ENTRY(1, CONFIG_SYS_BCSR_BASE, CONFIG_SYS_BCSR_BASE_PHYS,
@@ -79,7 +78,6 @@ struct fsl_e_tlb_entry tlb_table[] = {
CONFIG_SYS_QMAN_MEM_PHYS + 0x00100000,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, 10, BOOKE_PAGESZ_1M, 1),
-#endif
/* *I*G - NAND */
SET_TLB_ENTRY(1, CONFIG_SYS_NAND_BASE, CONFIG_SYS_NAND_BASE_PHYS,
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