diff options
| author | Alison Wang <b18965@freescale.com> | 2014-12-03 15:00:47 +0800 |
|---|---|---|
| committer | York Sun <yorksun@freescale.com> | 2014-12-11 09:39:22 -0800 |
| commit | 86949c2b7c94542c20767c405fc458346bd3975b (patch) | |
| tree | 7ab36213ccc4ae4e92b5df1624cc4a10e0bbc7c0 /board/freescale/ls1021aqds/ls1021aqds.c | |
| parent | 2565d18de0c57d95b32686f11aa98fd40d8a7e26 (diff) | |
| download | blackbird-obmc-uboot-86949c2b7c94542c20767c405fc458346bd3975b.tar.gz blackbird-obmc-uboot-86949c2b7c94542c20767c405fc458346bd3975b.zip | |
arm: ls102xa: Add SD boot support for LS1021AQDS board
This patch adds SD boot support for LS1021AQDS board. SPL
framework is used. PBL initialize the internal RAM and copy
SPL to it, then SPL initialize DDR using SPD and copy u-boot
from SD card to DDR, finally SPL transfer control to u-boot.
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Jason Jin <jason.jin@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'board/freescale/ls1021aqds/ls1021aqds.c')
| -rw-r--r-- | board/freescale/ls1021aqds/ls1021aqds.c | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c index bf22fced9c..9eab42d6c7 100644 --- a/board/freescale/ls1021aqds/ls1021aqds.c +++ b/board/freescale/ls1021aqds/ls1021aqds.c @@ -15,6 +15,7 @@ #include <fsl_esdhc.h> #include <fsl_ifc.h> #include <fsl_sec.h> +#include <spl.h> #include "../common/qixis.h" #include "ls1021aqds_qixis.h" @@ -34,10 +35,17 @@ enum { int checkboard(void) { char buf[64]; +#if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_QSPI_BOOT) u8 sw; +#endif puts("Board: LS1021AQDS\n"); +#ifdef CONFIG_SD_BOOT + puts("SD\n"); +#elif CONFIG_QSPI_BOOT + puts("QSPI\n"); +#else sw = QIXIS_READ(brdcfg[0]); sw = (sw & QIXIS_LBMAP_MASK) >> QIXIS_LBMAP_SHIFT; @@ -51,6 +59,7 @@ int checkboard(void) printf("IFCCard\n"); else printf("invalid setting of SW%u\n", QIXIS_LBMAP_SWITCH); +#endif printf("Sys ID:0x%02x, Sys Ver: 0x%02x\n", QIXIS_READ(id), QIXIS_READ(arch)); @@ -165,6 +174,36 @@ int board_early_init_f(void) return 0; } +#ifdef CONFIG_SPL_BUILD +void board_init_f(ulong dummy) +{ + struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR; + + /* Set global data pointer */ + gd = &gdata; + + /* Clear the BSS */ + memset(__bss_start, 0, __bss_end - __bss_start); + +#ifdef CONFIG_FSL_IFC + init_early_memctl_regs(); +#endif + + get_clocks(); + + preloader_console_init(); + +#ifdef CONFIG_SPL_I2C_SUPPORT + i2c_init_all(); +#endif + out_le32(&cci->ctrl_ord, CCI400_CTRLORD_TERM_BARRIER); + + dram_init(); + + board_init_r(NULL, 0); +} +#endif + int config_board_mux(int ctrl_type) { u8 reg12; |
