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| author | Wolfgang Denk <wd@denx.de> | 2011-04-05 12:24:20 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2011-04-05 12:24:20 +0200 |
| commit | 4db2fa7f9446d0f2fe8db3d62184b1212fe22707 (patch) | |
| tree | bc62cbfc14296551caebda626db7a90fef9ae844 /arch/powerpc/cpu/mpc85xx/cpu_init.c | |
| parent | 75df0d594990875419121c6f8687472ac9f4ae7a (diff) | |
| parent | 7d3053fbf16caad4745f42f7ae3e38e9d3e964b5 (diff) | |
| download | blackbird-obmc-uboot-4db2fa7f9446d0f2fe8db3d62184b1212fe22707.tar.gz blackbird-obmc-uboot-4db2fa7f9446d0f2fe8db3d62184b1212fe22707.zip | |
Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx
Conflicts:
drivers/usb/host/ehci-pci.c
Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'arch/powerpc/cpu/mpc85xx/cpu_init.c')
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/cpu_init.c | 32 |
1 files changed, 26 insertions, 6 deletions
diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index 8ece970097..5642cd7b05 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -37,6 +37,10 @@ #include <asm/fsl_law.h> #include <asm/fsl_serdes.h> #include "mp.h" +#ifdef CONFIG_SYS_QE_FW_IN_NAND +#include <nand.h> +#include <errno.h> +#endif DECLARE_GLOBAL_DATA_PTR; @@ -384,12 +388,6 @@ int cpu_init_r(void) enable_cpc(); -#ifdef CONFIG_QE - uint qe_base = CONFIG_SYS_IMMR + 0x00080000; /* QE immr base */ - qe_init(qe_base); - qe_reset(); -#endif - /* needs to be in ram since code uses global static vars */ fsl_serdes_init(); @@ -449,3 +447,25 @@ int sata_initialize(void) return 1; } #endif + +void cpu_secondary_init_r(void) +{ +#ifdef CONFIG_QE + uint qe_base = CONFIG_SYS_IMMR + 0x00080000; /* QE immr base */ +#ifdef CONFIG_SYS_QE_FW_IN_NAND + int ret; + size_t fw_length = CONFIG_SYS_QE_FW_LENGTH; + + /* load QE firmware from NAND flash to DDR first */ + ret = nand_read(&nand_info[0], (loff_t)CONFIG_SYS_QE_FW_IN_NAND, + &fw_length, (u_char *)CONFIG_SYS_QE_FW_ADDR); + + if (ret && ret == -EUCLEAN) { + printf ("NAND read for QE firmware at offset %x failed %d\n", + CONFIG_SYS_QE_FW_IN_NAND, ret); + } +#endif + qe_init(qe_base); + qe_reset(); +#endif +} |
