Merge branch 'master' of git://git.denx.de/u-boot-arm

* 'master' of git://git.denx.de/u-boot-arm:
  ARM: MX5: Fix broken leftover TO-2 errata workaround
  MX31: Cleanup clock function
  scb9328: Add ARM relocation support
  am3517evm: change console device from ttyS2 to ttyO2
  Remove volatile qualifier in get_ram_size() calls
  TI: TNETV107X Fix Build Error
  ARM: add missing CONFIG_SKIP_LOWLEVEL_INIT for armv7
  arm: add CONFIG_MACH_TYPE setting and documentation
  arm: add __ilog2 function
  Timer: Fix misuse of ARM *timer_masked() functions outside arch/arm
  EfikaMX: Enable EXT2 booting
  EfikaMX: Add missing CONFIG_SYS_TEXT_BASE
  EfikaMX: Use correct imximage.cfg
  MX27: Update to autogenerated asm-offsets.h
  MX5: Update to autogenerated asm-offsets.h
  imx: Add support for zmx25 board
  imx: Make imx25 compatible to mxc_gpio driver and fix in tx25
  imx: Add auto generation of asm-offsets.h for imx25
  imx: Add support for USB EHCI on imx25
  imx: Use correct imx25 reset.c
  imx: Add get_tbclk() function for imx25
  ARM: Update maintainer of board scb9328
  mx27: Make the UART port number explicit
  build: Add targets for auto gen of asm-offsets.h and use it in imx35
  mx31pdk: cosmetic: Fix line over 80 characters

7 files changed, 126 insertions, 7 deletions

diff --git a/arch/arm/cpu/arm926ejs/mx25/Makefile b/arch/arm/cpu/arm926ejs/mx25/Makefile
index 38d7f03ab2..9219c062b0 100644
--- a/arch/arm/cpu/arm926ejs/mx25/Makefile
+++ b/arch/arm/cpu/arm926ejs/mx25/Makefile
@@ -24,18 +24,18 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(SOC).o
 
-COBJS	= generic.o timer.o
-MX27OBJS = reset.o
+COBJS	= generic.o timer.o reset.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
-SRCS	+= $(addprefix $(SRCTREE)/arch/arm/cpu/arm926ejs/mx27/,$(MX27OBJS:.o=.c))
-OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS) $(MX27OBJS))
+OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
 
 all:	$(obj).depend $(LIB)
 
 $(LIB):	$(OBJS)
 	$(call cmd_link_o_target, $(OBJS))
 
+$(OBJS) : $(TOPDIR)/include/asm/arch/asm-offsets.h
+
 #########################################################################
 
 # defines $(obj).depend target
diff --git a/arch/arm/cpu/arm926ejs/mx25/asm-offsets.c b/arch/arm/cpu/arm926ejs/mx25/asm-offsets.c
new file mode 100644
index 0000000000..ba8dfd4228
--- /dev/null
+++ b/arch/arm/cpu/arm926ejs/mx25/asm-offsets.c
@@ -0,0 +1,60 @@
+/*
+ * Adapted from Linux v2.6.36 kernel: arch/powerpc/kernel/asm-offsets.c
+ *
+ * This program is used to generate definitions needed by
+ * assembly language modules.
+ *
+ * We use the technique used in the OSF Mach kernel code:
+ * generate asm statements containing #defines,
+ * compile this file to assembler, and then extract the
+ * #defines from the assembly-language output.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <common.h>
+#include <asm/arch/imx-regs.h>
+
+#include <linux/kbuild.h>
+
+int main(void)
+{
+	/* Clock Control Module */
+	DEFINE(CCM_CCTL, offsetof(struct ccm_regs, cctl));
+	DEFINE(CCM_CGCR0, offsetof(struct ccm_regs, cgr0));
+	DEFINE(CCM_CGCR1, offsetof(struct ccm_regs, cgr1));
+	DEFINE(CCM_CGCR2, offsetof(struct ccm_regs, cgr2));
+	DEFINE(CCM_PCDR2, offsetof(struct ccm_regs, pcdr[2]));
+	DEFINE(CCM_MCR, offsetof(struct ccm_regs, mcr));
+
+	/* Enhanced SDRAM Controller */
+	DEFINE(ESDRAMC_ESDCTL0, offsetof(struct esdramc_regs, ctl0));
+	DEFINE(ESDRAMC_ESDCFG0, offsetof(struct esdramc_regs, cfg0));
+	DEFINE(ESDRAMC_ESDMISC, offsetof(struct esdramc_regs, misc));
+
+	/* Multi-Layer AHB Crossbar Switch */
+	DEFINE(MAX_MPR0, offsetof(struct max_regs, mpr0));
+	DEFINE(MAX_SGPCR0, offsetof(struct max_regs, sgpcr0));
+	DEFINE(MAX_MPR1, offsetof(struct max_regs, mpr1));
+	DEFINE(MAX_SGPCR1, offsetof(struct max_regs, sgpcr1));
+	DEFINE(MAX_MPR2, offsetof(struct max_regs, mpr2));
+	DEFINE(MAX_SGPCR2, offsetof(struct max_regs, sgpcr2));
+	DEFINE(MAX_MPR3, offsetof(struct max_regs, mpr3));
+	DEFINE(MAX_SGPCR3, offsetof(struct max_regs, sgpcr3));
+	DEFINE(MAX_MPR4, offsetof(struct max_regs, mpr4));
+	DEFINE(MAX_SGPCR4, offsetof(struct max_regs, sgpcr4));
+	DEFINE(MAX_MGPCR0, offsetof(struct max_regs, mgpcr0));
+	DEFINE(MAX_MGPCR1, offsetof(struct max_regs, mgpcr1));
+	DEFINE(MAX_MGPCR2, offsetof(struct max_regs, mgpcr2));
+	DEFINE(MAX_MGPCR3, offsetof(struct max_regs, mgpcr3));
+	DEFINE(MAX_MGPCR4, offsetof(struct max_regs, mgpcr4));
+
+	/* AHB <-> IP-Bus Interface */
+	DEFINE(AIPS_MPR_0_7, offsetof(struct aips_regs, mpr_0_7));
+	DEFINE(AIPS_MPR_8_15, offsetof(struct aips_regs, mpr_8_15));
+
+	return 0;
+}
diff --git a/arch/arm/cpu/arm926ejs/mx25/timer.c b/arch/arm/cpu/arm926ejs/mx25/timer.c
index 14f0c2dc73..7c8a71b9d3 100644
--- a/arch/arm/cpu/arm926ejs/mx25/timer.c
+++ b/arch/arm/cpu/arm926ejs/mx25/timer.c
@@ -187,3 +187,15 @@ void __udelay (unsigned long usec)
 	while (get_ticks() < tmp)	/* loop till event */
 		 /*NOP*/;
 }
+
+/*
+ * This function is derived from PowerPC code (timebase clock frequency).
+ * On ARM it returns the number of timer ticks per second.
+ */
+ulong get_tbclk(void)
+{
+	ulong tbclk;
+
+	tbclk = CONFIG_MX25_CLK32;
+	return tbclk;
+}
diff --git a/arch/arm/cpu/arm926ejs/mx27/Makefile b/arch/arm/cpu/arm926ejs/mx27/Makefile
index 0e112b34f4..7ac1a21406 100644
--- a/arch/arm/cpu/arm926ejs/mx27/Makefile
+++ b/arch/arm/cpu/arm926ejs/mx27/Makefile
@@ -34,6 +34,8 @@ all:	$(obj).depend $(LIB)
 $(LIB):	$(OBJS)
 	$(call cmd_link_o_target, $(OBJS))
 
+$(OBJS) : $(TOPDIR)/include/asm/arch/asm-offsets.h
+
 #########################################################################
 
 # defines $(obj).depend target
diff --git a/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c b/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
new file mode 100644
index 0000000000..f3a8d7bd69
--- /dev/null
+++ b/arch/arm/cpu/arm926ejs/mx27/asm-offsets.c
@@ -0,0 +1,45 @@
+/*
+ * Adapted from Linux v2.6.36 kernel: arch/powerpc/kernel/asm-offsets.c
+ *
+ * This program is used to generate definitions needed by
+ * assembly language modules.
+ *
+ * We use the technique used in the OSF Mach kernel code:
+ * generate asm statements containing #defines,
+ * compile this file to assembler, and then extract the
+ * #defines from the assembly-language output.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <common.h>
+#include <asm/arch/imx-regs.h>
+
+#include <linux/kbuild.h>
+
+int main(void)
+{
+	DEFINE(AIPI1_PSR0, IMX_AIPI1_BASE + offsetof(struct aipi_regs, psr0));
+	DEFINE(AIPI1_PSR1, IMX_AIPI1_BASE + offsetof(struct aipi_regs, psr1));
+	DEFINE(AIPI2_PSR0, IMX_AIPI2_BASE + offsetof(struct aipi_regs, psr0));
+	DEFINE(AIPI2_PSR1, IMX_AIPI2_BASE + offsetof(struct aipi_regs, psr1));
+
+	DEFINE(CSCR, IMX_PLL_BASE + offsetof(struct pll_regs, cscr));
+	DEFINE(MPCTL0, IMX_PLL_BASE + offsetof(struct pll_regs, mpctl0));
+	DEFINE(SPCTL0, IMX_PLL_BASE + offsetof(struct pll_regs, spctl0));
+	DEFINE(PCDR0, IMX_PLL_BASE + offsetof(struct pll_regs, pcdr0));
+	DEFINE(PCDR1, IMX_PLL_BASE + offsetof(struct pll_regs, pcdr1));
+	DEFINE(PCCR0, IMX_PLL_BASE + offsetof(struct pll_regs, pccr0));
+	DEFINE(PCCR1, IMX_PLL_BASE + offsetof(struct pll_regs, pccr1));
+
+	DEFINE(ESDCTL0_ROF, offsetof(struct esdramc_regs, esdctl0));
+	DEFINE(ESDCFG0_ROF, offsetof(struct esdramc_regs, esdcfg0));
+	DEFINE(ESDCTL1_ROF, offsetof(struct esdramc_regs, esdctl1));
+	DEFINE(ESDCFG1_ROF, offsetof(struct esdramc_regs, esdcfg1));
+	DEFINE(ESDMISC_ROF, offsetof(struct esdramc_regs, esdmisc));
+
+	return 0;
+}
diff --git a/arch/arm/cpu/arm926ejs/mx27/generic.c b/arch/arm/cpu/arm926ejs/mx27/generic.c
index 27642bfe7d..222a8e95ea 100644
--- a/arch/arm/cpu/arm926ejs/mx27/generic.c
+++ b/arch/arm/cpu/arm926ejs/mx27/generic.c
@@ -271,7 +271,7 @@ void imx_gpio_mode(int gpio_mode)
 }
 
 #ifdef CONFIG_MXC_UART
-void mx27_uart_init_pins(void)
+void mx27_uart1_init_pins(void)
 {
 	int i;
 	unsigned int mode[] = {
diff --git a/arch/arm/cpu/arm926ejs/orion5x/dram.c b/arch/arm/cpu/arm926ejs/orion5x/dram.c
index 3e1ff7d8ea..5cc31a99f1 100644
--- a/arch/arm/cpu/arm926ejs/orion5x/dram.c
+++ b/arch/arm/cpu/arm926ejs/orion5x/dram.c
@@ -53,7 +53,7 @@ int dram_init (void)
 {
 	/* dram_init must store complete ramsize in gd->ram_size */
 	gd->ram_size = get_ram_size(
-			(volatile long *) orion5x_sdram_bar(0),
+			(long *) orion5x_sdram_bar(0),
 			CONFIG_MAX_RAM_BANK_SIZE);
 	return 0;
 }
@@ -65,7 +65,7 @@ void dram_init_banksize (void)
 	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
 		gd->bd->bi_dram[i].start = orion5x_sdram_bar(i);
 		gd->bd->bi_dram[i].size = get_ram_size(
-			(volatile long *) (gd->bd->bi_dram[i].start),
+			(long *) (gd->bd->bi_dram[i].start),
 			CONFIG_MAX_RAM_BANK_SIZE);
 	}
 }