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authorTom Rini <trini@konsulko.com>2016-01-08 14:19:24 -0500
committerTom Rini <trini@konsulko.com>2016-01-08 14:19:24 -0500
commitd77a092dd3619ca747fb8290ae8f255e9799aaa6 (patch)
tree04430b8b5146a6d1dadf373385378ee538be6ae6
parentb685c7348c521b14591a49ec6b78a2ad28a176e0 (diff)
parentdd8e42900b8a087fb3b97898fb5a42ef2a0597df (diff)
downloadblackbird-obmc-uboot-d77a092dd3619ca747fb8290ae8f255e9799aaa6.tar.gz
blackbird-obmc-uboot-d77a092dd3619ca747fb8290ae8f255e9799aaa6.zip
Merge git://git.denx.de/u-boot-rockchip
-rw-r--r--configs/chromebook_jerry_defconfig4
-rw-r--r--doc/README.rockchip7
-rw-r--r--include/configs/chromebook_jerry.h1
-rw-r--r--tools/Makefile2
-rw-r--r--tools/rkspi.c2
5 files changed, 11 insertions, 5 deletions
diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig
index da4770771f..a515d8d580 100644
--- a/configs/chromebook_jerry_defconfig
+++ b/configs/chromebook_jerry_defconfig
@@ -27,7 +27,9 @@ CONFIG_RESET=y
CONFIG_DM_MMC=y
CONFIG_ROCKCHIP_DWMMC=y
CONFIG_PINCTRL=y
+# CONFIG_PINCTRL_FULL is not set
CONFIG_SPL_PINCTRL=y
+# CONFIG_SPL_PINCTRL_FULL is not set
CONFIG_ROCKCHIP_PINCTRL=y
CONFIG_DM_PMIC=y
CONFIG_PMIC_ACT8846=y
@@ -41,5 +43,7 @@ CONFIG_DEBUG_UART_CLOCK=24000000
CONFIG_DEBUG_UART_SHIFT=2
CONFIG_SYS_NS16550=y
CONFIG_USE_PRIVATE_LIBGCC=y
+CONFIG_USE_TINY_PRINTF=y
CONFIG_CMD_DHRYSTONE=y
CONFIG_ERRNO_STR=y
+CONFIG_ROCKCHIP_SPI=y
diff --git a/doc/README.rockchip b/doc/README.rockchip
index b455f6fee7..9a2ebca95d 100644
--- a/doc/README.rockchip
+++ b/doc/README.rockchip
@@ -135,9 +135,10 @@ Booting from SPI
To write an image that boots from SPI flash (e.g. for the Haier Chromebook):
- ./chromebook_jerry/tools/mkimage -n rk3036 -T rkspi -d chromebook_jerry/spl/u-boot-spl-dtb.bin out
- dd if=spl.bin of=out.bin bs=128K conv=sync
- cat chromebook_jerry/u-boot-dtb.img out.bin
+ ./chromebook_jerry/tools/mkimage -n rk3288 -T rkspi \
+ -d chromebook_jerry/spl/u-boot-spl-dtb.bin spl.bin && \
+ dd if=spl.bin of=spl-out.bin bs=128K conv=sync && \
+ cat spl-out.bin chromebook_jerry/u-boot-dtb.img >out.bin && \
dd if=out.bin of=out.bin.pad bs=4M conv=sync
This converts the SPL image to the required SPI format by adding the Rockchip
diff --git a/include/configs/chromebook_jerry.h b/include/configs/chromebook_jerry.h
index 058325c0b4..e29d77695b 100644
--- a/include/configs/chromebook_jerry.h
+++ b/include/configs/chromebook_jerry.h
@@ -13,5 +13,6 @@
#define CONFIG_SPL_SPI_SUPPORT
#define CONFIG_SPL_SPI_FLASH_SUPPORT
#define CONFIG_SPL_SPI_LOAD
+#define CONFIG_SPI_FLASH_GIGADEVICE
#endif
diff --git a/tools/Makefile b/tools/Makefile
index 9cfd80b670..d49e40dd56 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -64,7 +64,7 @@ RSA_OBJS-$(CONFIG_FIT_SIGNATURE) := $(addprefix lib/rsa/, \
rsa-sign.o rsa-verify.o rsa-checksum.o \
rsa-mod-exp.o)
-ROCKCHIP_OBS = lib/rc4.o rkcommon.o rkimage.o rksd.o
+ROCKCHIP_OBS = lib/rc4.o rkcommon.o rkimage.o rksd.o rkspi.o
# common objs for dumpimage and mkimage
dumpimage-mkimage-objs := aisimage.o \
diff --git a/tools/rkspi.c b/tools/rkspi.c
index 800e235168..a0b0051d38 100644
--- a/tools/rkspi.c
+++ b/tools/rkspi.c
@@ -54,7 +54,7 @@ static void rkspi_set_header(void *buf, struct stat *sbuf, int ifd,
* boot ROM. Its rationale is unknown.
*/
for (sector = size / RKSPI_SECT_LEN - 1; sector >= 0; sector--) {
- printf("sector %u\n", sector);
+ debug("sector %u\n", sector);
memmove(buf + sector * RKSPI_SECT_LEN * 2,
buf + sector * RKSPI_SECT_LEN,
RKSPI_SECT_LEN);
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