diff options
| author | Simon Glass <sjg@chromium.org> | 2015-12-29 05:22:45 -0700 |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2016-01-08 07:59:07 -0700 |
| commit | dd8e42900b8a087fb3b97898fb5a42ef2a0597df (patch) | |
| tree | 3247ad8735fb1db3652f98e1fa1d803946128c2b | |
| parent | 25525ebe3165e9057741da2282d103f39e2221b5 (diff) | |
| download | blackbird-obmc-uboot-dd8e42900b8a087fb3b97898fb5a42ef2a0597df.tar.gz blackbird-obmc-uboot-dd8e42900b8a087fb3b97898fb5a42ef2a0597df.zip | |
rockchip: Fix the configuration for chromebook_jerry
Various updates did not make it through to this board. Also the instructions
for building a SPI image are no-longer correct. Fix these so that Jerry can
boot to a prompt again.
Signed-off-by: Simon Glass <sjg@chromium.org>
| -rw-r--r-- | configs/chromebook_jerry_defconfig | 4 | ||||
| -rw-r--r-- | doc/README.rockchip | 7 | ||||
| -rw-r--r-- | include/configs/chromebook_jerry.h | 1 |
3 files changed, 9 insertions, 3 deletions
diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig index da4770771f..a515d8d580 100644 --- a/configs/chromebook_jerry_defconfig +++ b/configs/chromebook_jerry_defconfig @@ -27,7 +27,9 @@ CONFIG_RESET=y CONFIG_DM_MMC=y CONFIG_ROCKCHIP_DWMMC=y CONFIG_PINCTRL=y +# CONFIG_PINCTRL_FULL is not set CONFIG_SPL_PINCTRL=y +# CONFIG_SPL_PINCTRL_FULL is not set CONFIG_ROCKCHIP_PINCTRL=y CONFIG_DM_PMIC=y CONFIG_PMIC_ACT8846=y @@ -41,5 +43,7 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550=y CONFIG_USE_PRIVATE_LIBGCC=y +CONFIG_USE_TINY_PRINTF=y CONFIG_CMD_DHRYSTONE=y CONFIG_ERRNO_STR=y +CONFIG_ROCKCHIP_SPI=y diff --git a/doc/README.rockchip b/doc/README.rockchip index b455f6fee7..9a2ebca95d 100644 --- a/doc/README.rockchip +++ b/doc/README.rockchip @@ -135,9 +135,10 @@ Booting from SPI To write an image that boots from SPI flash (e.g. for the Haier Chromebook): - ./chromebook_jerry/tools/mkimage -n rk3036 -T rkspi -d chromebook_jerry/spl/u-boot-spl-dtb.bin out - dd if=spl.bin of=out.bin bs=128K conv=sync - cat chromebook_jerry/u-boot-dtb.img out.bin + ./chromebook_jerry/tools/mkimage -n rk3288 -T rkspi \ + -d chromebook_jerry/spl/u-boot-spl-dtb.bin spl.bin && \ + dd if=spl.bin of=spl-out.bin bs=128K conv=sync && \ + cat spl-out.bin chromebook_jerry/u-boot-dtb.img >out.bin && \ dd if=out.bin of=out.bin.pad bs=4M conv=sync This converts the SPL image to the required SPI format by adding the Rockchip diff --git a/include/configs/chromebook_jerry.h b/include/configs/chromebook_jerry.h index 058325c0b4..e29d77695b 100644 --- a/include/configs/chromebook_jerry.h +++ b/include/configs/chromebook_jerry.h @@ -13,5 +13,6 @@ #define CONFIG_SPL_SPI_SUPPORT #define CONFIG_SPL_SPI_FLASH_SUPPORT #define CONFIG_SPL_SPI_LOAD +#define CONFIG_SPI_FLASH_GIGADEVICE #endif |
