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path: root/drivers/clk/sunxi-ng/ccu-sun50i-a64.c
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* clk: sunxi-ng: a64: Allow parent change for VE clockJernej Skrabec2018-12-101-1/+1
* clk: sunxi-ng: sun50i: a64: Use sigma-delta modulation for audio PLLChen-Yu Tsai2018-11-231-13/+24
* clk: sunxi-ng: a64: Fix gate bit of DSI DPHYJagan Teki2018-11-131-1/+1
* clk: sunxi-ng: enable so-said LDOs for A64 SoC's pll-mipi clockIcenowy Zheng2018-11-051-1/+6
* clk: sunxi-ng: a64: Add max. rate constraint to video PLLsIcenowy Zheng2018-09-051-24/+26
* clk: sunxi-ng: a64: Add minimal rate for video PLLsJagan Teki2018-09-051-22/+24
* clk: sunxi-ng: sun50i: a64: Add 2x fixed post-divider to MMC module clocksChen-Yu Tsai2017-12-071-20/+37
* clk: sunxi-ng: Support multiple variable pre-dividersChen-Yu Tsai2017-06-071-5/+5
* clk: sunxi-ng: Fix div/mult settings for osc12M on A64Philipp Tomsich2017-03-201-1/+1
* clk: sunxi-ng: Mark structs static and cleanup spacesStephen Boyd2016-11-161-6/+6
* clk: sunxi-ng: Add A64 clocksMaxime Ripard2016-11-031-0/+915
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