summaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-imx/clk-imx51-imx53.c
Commit message (Collapse)AuthorAgeFilesLines
* ARM: imx: move clock drivers into drivers/clkShawn Guo2015-06-031-570/+0
| | | | | | | | After the cleanup on clock drivers, they are now ready to be moved into drivers/clk. Let's move them into drivers/clk/imx folder. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Stephen Boyd <sboyd@codeaurora.org>
* ARM: imx: remove inclusions of platform headersShawn Guo2015-06-031-2/+1
| | | | | | | | With the cleanup done before, we now can simply define base address and irq as needed in clock driver, to get those platform header inclusions removed. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: imx5: let pm code map CCM block on its ownShawn Guo2015-06-031-2/+0
| | | | | | | | We are about to move imx5 clock driver into drivers/clk, so let's get imx5 pm code map CCM block on its own rather than relying on clock driver to do the mapping. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: imx53: clk: add ARM clockLucas Stach2014-11-231-0/+5
| | | | | | | | | The ARM clock is a virtual clock feeding the ARM partition of the SoC. It controls multiple other clocks to ensure the right sequencing when cpufreq changes the CPU clock rate. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: add step clock, used when reprogramming PLL1Lucas Stach2014-11-231-1/+8
| | | | | | | | | This is the bypass clock used to feed the ARM partition while we reprogram PLL1 to another rate. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: i.MX: Use CLOCKSOURCE_OF_DECLARE() for DT targetsAlexander Shiyan2014-07-181-7/+0
| | | | | | | This patch uses clocksource_of_init() call for DT targets. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: clk-imx51-imx53: Remove clk_register_clkdev()Fabio Estevam2014-07-181-76/+0
| | | | | | | | | | | | mx51 and mx53 are device tree only platforms, so we no longer need all these calls to clk_register_clkdev(). Only keep cpu0 and gpc_dvfs clk_register_clkdev() calls. Tested on imx51-babbage and imx53-qsb boards. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: i.MX clk: Move clock check function in common locationAlexander Shiyan2014-07-181-28/+9
| | | | | | | | This patch moves clock check function in common i.MX location and switch i.MX clk drivers to use this new function. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: i.MX: Use of_clk_get_by_name() for timer clocks for DT case.Alexander Shiyan2014-07-181-2/+0
| | | | | | | | | Use of_clk_get_by_name() for timer clocks for DT case. This patch eliminates a lot of unneeded clk_register_clkdev() calls for GPT. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: reuse clock CCM mapping in pm codeShawn Guo2014-07-181-0/+2
| | | | | | | | The imx5 pm code needs to access CCM registers. Let's remove the use of CCM static mapping in pm code by reusing the dynamic mapping created in clock code. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: use dynamic mapping for DPLL blockShawn Guo2014-07-181-17/+48
| | | | | | | | | | | Replace the static mapping of DPLL block with dynamic mapping by calling ioremap(). Ideally, this should be done by calling of_iomap(), so that the physical address of DPLL can also be retrieved from device tree. But unfortunately, DPLL blocks are not defined in DT in the first place. So to maintain the compatibility of existing DTB, we use ioremap() with physical address defines in the code. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: use dynamic mapping for CCM blockShawn Guo2014-07-181-39/+51
| | | | | | | | | Replace the static mapping of CCM block with dynamic mapping and retrieve CCM base address from device tree. Though it's not nice to encode the variable ccm_base in macros, it helps to avoid a massive churn on the code. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: remove header crm-regs-imx5.hShawn Guo2014-07-181-1/+44
| | | | | | | Most of the macros in crm-regs-imx5.h are used nowhere. Let's move the needed ones into the C files, and remove the header. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: call mxc_timer_init_dt() on imx51Shawn Guo2014-07-181-1/+1
| | | | | | | Since i.MX51 supports DT only, it's more appropriate to call mxc_timer_init_dt() than mxc_timer_init() to initialize timer. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: drop arguments from mx5_clocks_common_init()Shawn Guo2014-07-181-10/+8
| | | | | | | | | The function mx5_clocks_common_init() was created with a number of arguments to pass oscillator clock rate in non-DT boot. Since i.MX5 is DT only platform, the arguments can be dropped, and the clock rate can just be retrieved from device tree. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx5: make mx51_clocks_init() a DT callShawn Guo2014-07-181-13/+3
| | | | | | | Since i.MX51 becomes a DT only platform, we can make mx51_clocks_init() a DT call and save function mx51_clocks_init_dt() now. Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: imx: factor device tree timer initializationGilles Chanteperdrix2014-04-301-14/+4
| | | | | Signed-off-by: Gilles Chanteperdrix <gilles.chanteperdrix@xenomai.org> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM: i.MX5: Remove outdated VPU clock lookupsPhilipp Zabel2014-04-301-2/+0
| | | | | | | | CODA7 clock lookups are now defined in the device tree. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
* ARM i.MX: remove PWM platform supportSascha Hauer2014-03-051-2/+0
| | | | | | | | As the i.MX pwm driver is devicetree only, remove the platform support for this device. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM i.MX5: fix obvious typo in ldb_di0_gate clk definitionLothar Waßmann2013-12-311-1/+1
| | | | | | | | | ldb_di0_gate is registerd with the clk index of IMX5_CLK_LDB_DI1_GATE, thus the DI0 interface will be turned off inadvertently during boot. Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM i.MX5: set CAN peripheral clock to 24 MHz parentMarc Kleine-Budde2013-12-311-0/+3
| | | | | | | | | | | | This patch sets the parent of CAN peripheral clock (a.k.a. CPI clock) to the lp_apm clock, which has a rate of 24 MHz. In the CAN world a base clock with multiple of 8 MHz is suited best for all CIA recommented bit rates. Without this patch the CAN peripheral clock on i.MX53 has a rate of 66.666 MHz which produces quite large bit rate errors. Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM i.MX5: fix "shift" value for lp_apm_sel on i.MX50 and i.MX53Marc Kleine-Budde2013-12-311-2/+6
| | | | | | | | | | According to the i.MX50 Rev. 1 and i.MX53 Rev. 2.1 datasheet the lp_apm_sel is bit 10 in the CCM_CCSR register not bit 9. On the i.MX51 it's bit 9. This patch fixes this issue. Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: imx: imx53: Add SATA PHY clockMarek Vasut2013-12-311-0/+1
| | | | | | | | | | | | | Add SATA PHY clock which are derived from the USB PHY1 clock. Note that this patch derives the SATA PHY clock from USB PHY1 clock gate so that the SATA driver can ungate both the SATA PHY clock and USB PHY1 clock for the SATA to work correctly. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Richard Zhu <r65037@freescale.com> Cc: Tejun Heo <tj@kernel.org> Cc: Linux-IDE <linux-ide@vger.kernel.org> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: imx5: introduce DT includes for clock providerLucas Stach2013-12-311-414/+372
| | | | | | | | Use clock defines in order to make devicetrees more human readable. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: i.MX5x: Add SAHARA clock for i.MX5x CPUsAlexander Shiyan2013-12-091-1/+2
| | | | | | | Patch adds missing Security Accelerator (SAHARA) clock for i.MX5x CPUs. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM i.MX53: remove duplicated include from clk-imx51-imx53.cWei Yongjun2013-12-091-1/+0
| | | | | | | Remove duplicated include. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: imx: add clocking support code for the IMX50 SoCGreg Ungerer2013-12-091-0/+58
| | | | | | | | Add code to support the specific clock tree of the Freescale IMX50 SoC. It can use much of the common IMX51/IMX53 clocking code. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: mach-imx: clk-imx51-imx53: Retrieve base address and irq from dtFabio Estevam2013-10-211-4/+11
| | | | | | | | As mx53 is a dt-only SoC, we should retrieve the gpt base address and irq from the device tree, instead of using the old MX53_IO_ADDRESS method. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* Merge remote-tracking branch 'shesselba/clk-of-init-v2_for-3.13' into imx/socShawn Guo2013-10-211-19/+10
|\
| * ARM: imx: remove custom .init_time hookSebastian Hesselbarth2013-09-291-19/+10
| | | | | | | | | | | | | | | | With arch/arm calling of_clk_init(NULL) from time_init(), we can now remove custom .init_time hooks. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: Shawn Guo <shawn.guo@linaro.org>
* | Merge tag 'pm+acpi-3.12-rc2' of ↵Linus Torvalds2013-09-201-1/+1
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm Pull ACPI and power management fixes from Rafael Wysocki: 1) Four fixes for cpufreq regressions introduced by the changes that removed Device Tree parsing for CPU device nodes from cpufreq drivers from Sudeep KarkadaNagesha. 2) Two fixes for recent cpufreq regressions introduced by changes related to the preservation of sysfs attributes over system suspend/resume cycles from Viresh Kumar. 3) Fix for ACPI-based wakeup signaling in the PCI subsystem that fails to stop PME polling for devices put into the D3cold power state from Rafael J Wysocki. 4) Fix for bad interactions between cpufreq and udev on systems supporting intel_pstate where acpi-cpufreq is available as well from Yinghai Lu. * tag 'pm+acpi-3.12-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: cpufreq: return EEXIST instead of EBUSY for second registering PCI / ACPI / PM: Clear pme_poll for devices in D3cold on wakeup ARM: shmobile: change dev_id to cpu0 while registering cpu clock ARM: i.MX: change dev_id to cpu0 while registering cpu clock cpufreq: imx6q-cpufreq: assign cpu_dev correctly to cpu0 device cpufreq: cpufreq-cpu0: assign cpu_dev correctly to cpu0 device cpufreq: unlock correct rwsem while updating policy->cpu cpufreq: Clear policy->cpus bits in __cpufreq_remove_dev_finish()
| * | ARM: i.MX: change dev_id to cpu0 while registering cpu clockSudeep KarkadaNagesha2013-09-191-1/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | Currently all clkdev registration use "cpufreq-cpu0.0" as dev_id for cpu clock which refers to virtual platform device. It needs to be "cpu0" instead which is actual cpu0 device id. This patch changes the dev_id from "cpufreq-cpu0.0" to "cpu0". Reported-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Sudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
* | ARM: mach-imx: clk-imx51-imx53: Fix 'spdif1_pred' clock registrationFabio Estevam2013-09-171-1/+1
|/ | | | | | | | | | | | | | | | | | | | | Since commit beb2d1c1ba (ARM i.MX5: Add S/PDIF clocks), the following clock error appears on mx51: TrustZone Interrupt Controller (TZIC) initialized i.MX51 clk 180: register failed with -17 i.MX5 clk 180: register failed with -17 sched_clock: 32 bits at 24MHz, resolution 41ns, wraps every 178956ms CPU identified as i.MX51, silicon rev 3.0 ... Clock 180 corresponds to 'spdif1_podf' and this clock is getting registered twice. Fix it, by properly registering the 'spdif1_pred' clock, which should not reference 'spdif1_podf'. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: imx: add ocram clock for imx53Shawn Guo2013-08-221-1/+2
| | | | | | | Add missing ocram gate clock for imx53 and also represent it in device tree ocram node. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: imx: move imx53-qsb audio codec clk lookup into DTShawn Guo2013-06-171-2/+0
| | | | | | | | | | | With device tree clk lookup support in place, we can move audio codec clk lookup for ssi_ext1 into device tree now, so that imx53_qsb_init() can be saved. Since ssi_ext2 lookup is used nowhere, it gets removed together with ssi_ext1 lookup from clk driver. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM i.MX5: Add S/PDIF clocksPhilipp Zabel2013-06-171-1/+27
| | | | | | | | | This patch adds the S/PDIF clocks for i.MX51 and i.MX53. Tested on i.MX53. The i.MX51 has a second set of spdif_root clock dividers, and on i.MX53 there is an additional input to the spdif_xtal mux. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM i.MX53: Add SATA clockSascha Hauer2013-06-171-1/+2
| | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* ARM: i.MX5: Allow DT clock providersMartin Fuzzey2013-06-171-36/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | Currently clock providers defined in the DT are not registered on i.MX5 platforms since of_clk_init() is not called. This is not a problem for the SOC's own clocks, which are registered in code, but prevents the DT being used to define clocks for external hardware. Fix this by calling of_clk_init() and actually using the DT to obtain the 4 SOC fixed clocks. These are already defined in the DT but were previously just used to manually obtain the rate. Fall back to the old scheme for non DT platforms. Since the same method may be useful for other i.MX platforms implement the imx_obtain_fixed_clock() function in common code. Actually changing other i.MX platforms to use this should be done later by someone with access to the appropriate hardware. Signed-off-by: Martin Fuzzey <mfuzzey@parkeon.com> Tested-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* Merge tag 'soc-for-linus-3' of ↵Linus Torvalds2013-05-071-16/+59
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC platform updates (part 3) from Arnd Bergmann: "This is the third and smallest of the SoC specific updates. Changes include: - SMP support for the Xilinx zynq platform - Smaller imx changes - LPAE support for mvebu - Moving the orion5x, kirkwood, dove and mvebu platforms to a common "mbus" driver for their internal devices. It would be good to get feedback on the location of the "mbus" driver. Since this is used on multiple platforms may potentially get shared with other architectures (powerpc and arm64), it was moved to drivers/bus/. We expect other similar drivers to get moved to the same place in order to avoid creating more top-level directories under drivers/ or cluttering up the messy drivers/misc/ even more." * tag 'soc-for-linus-3' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (50 commits) ARM: imx: reset_controller may be disabled ARM: mvebu: Align the internal registers virtual base to support LPAE ARM: mvebu: Limit the DMA zone when LPAE is selected arm: plat-orion: remove addr-map code arm: mach-mv78xx0: convert to use the mvebu-mbus driver arm: mach-orion5x: convert to use mvebu-mbus driver arm: mach-dove: convert to use mvebu-mbus driver arm: mach-kirkwood: convert to use mvebu-mbus driver arm: mach-mvebu: convert to use mvebu-mbus driver ARM i.MX53: set CLK_SET_RATE_PARENT flag on the tve_ext_sel clock ARM i.MX53: tve_di clock is not part of the CCM, but of TVE ARM i.MX53: make tve_ext_sel propagate rate change to PLL ARM i.MX53: Remove unused tve_gate clkdev entry ARM i.MX5: Remove tve_sel clock from i.MX53 clock tree ARM: i.MX5: Add PATA and SRTC clocks ARM: imx: do not bring up unavailable cores ARM: imx: add initial imx6dl support ARM: imx1: mm: add call to mxc_device_init ARM: imx_v4_v5_defconfig: Add CONFIG_GPIO_SYSFS ARM: imx_v6_v7_defconfig: Select CONFIG_PERF_EVENTS ...
| * ARM i.MX53: set CLK_SET_RATE_PARENT flag on the tve_ext_sel clockPhilipp Zabel2013-04-121-2/+2
| | | | | | | | | | | | | | | | | | Use imx_clk_mux_flags to set the appropriate flags for the TVE selector clock. This is needed so tve_clk rate changes can propagate up to pll4_sw. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * ARM i.MX53: tve_di clock is not part of the CCM, but of TVEPhilipp Zabel2013-04-121-2/+1
| | | | | | | | | | | | | | | | | | Remove the tve_di clock from the CCM clock tree. It will be provided by the Television Encoder driver, as this clock is an output signal of the TVE module. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * ARM i.MX53: make tve_ext_sel propagate rate change to PLLPhilipp Zabel2013-04-121-2/+2
| | | | | | | | | | | | | | | | This is needed so the Television Encoder driver can set the rate on tve_clk and have it propagated up to pll4_sw. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * ARM i.MX53: Remove unused tve_gate clkdev entryPhilipp Zabel2013-04-121-1/+0
| | | | | | | | | | Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * ARM i.MX5: Remove tve_sel clock from i.MX53 clock treePhilipp Zabel2013-04-121-2/+3
| | | | | | | | | | | | | | On i.MX53, there is only tve_ext_sel. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * ARM: i.MX5: Add PATA and SRTC clocksSascha Hauer2013-04-121-0/+3
| | | | | | | | | | | | | | | | This adds the clock gates and the binding documentation for PATA and SRTC. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * ARM: i.MX53 Add the cko1, cko2 clock outputs.Martin Fuzzey2013-04-121-0/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | These two clocks connect to external pins and can be muxed to various internal clocks. They are typically used either for debugging or to provide clocks to external chips (eg audio codecs). Currently only the selectable clocks that already exist in the clock tree have been added. Signed-off-by: Martin Fuzzey <mfuzzey@parkeon.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * ARM i.MX53: fix ldb di divider and selector clocksPhilipp Zabel2013-04-121-6/+6
| | | | | | | | | | | | | | | | Use imx_clk_mux_flags and imx_clk_divider_flags to set the appropriate flags for the LDB display interface divider and selector clocks. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
| * ARM i.MX53: Add GPU clocks to clock treePhilipp Zabel2013-04-121-1/+8
| | | | | | | | | | | | | | | | This patch adds the missing GPU2D and GPU3D mux and gate clocks, and the graphics arbiter gate clock. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* | ARM: imx5 DT init cpufreq-cpu0 deviceMarkus Pargmann2013-04-091-1/+1
| | | | | | | | | | | | | | | | Add cpufreq-cpu0 platform device for imx5 DT init and register the clock for imx5. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* | ARM i.MX5: Move IPU clock lookups into device treePhilipp Zabel2013-04-091-7/+0
|/ | | | | Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
OpenPOWER on IntegriCloud