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* Add workaround to ignore MC channel hangs for Swift bringupChristian Geddes2019-08-091-1/+1
| | | | | | | | | | | | | | | | | Using the gemini cards we have been detecting channel hangs which are actually just a result of the gemini cards being slow. To work around this for now we will disable the channel hang checks for the memory controller. Change-Id: Ic21dca4c207140fab8d91b5f1f1a20e6670494cc Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/81471 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Roland Veloz <rveloz@us.ibm.com> Reviewed-by: Matt Derksen <mderkse1@us.ibm.com> Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
* Secure Boot: Clear XBUS FIR bits after SMP enabledNick Bofferding2018-07-211-13/+47
| | | | | | | | | | | | | | | | | | | Previously, XBUS link training kept track of bad lanes before and after the link training procedure, so as to clear FIR bits for old problems. This violates secure boot restrictions, so this change relocates the FIR bit clearing to after the SMP has been built Change-Id: I8f180801d98d693beb04a890936bb07f9c977dfb CQ: SW437852 Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/62629 Reviewed-by: ILYA SMIRNOV <ismirno@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/63093
* Defer handling attentions on non-master proc until after SMP is upDan Crowell2018-05-301-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | The current code enables PRD/Attention Handling on the slave processors as soon as we get the SBE started (clocks running). This is a problem because most of the FIR regs are blacklisted such that we cannot write them until after the SMP is up and we are using xscom. This restriction will lead to an infinite loop in PRD if we get a recoverable attention on the slave proc. The fix is to defer all of the attention handling on the slave procs until after the SMP is up. We will move the enabled from istep 8.5 host_attnlisten_proc to the end of istep 10.1 proc_build_smp. Note that this makes 8.5 a complete NOOP. Change-Id: I1b6542efe2cd14717d7fa55d01327121027c6862 CQ: SW429438 Backport: yes Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/59268 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Zane C. Shelley <zshelle@us.ibm.com> Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com>
* Add option to masterProcChipTargetHandle() to return functional chipMike Baiocchi2018-05-181-23/+40
| | | | | | | | | | | | | | | | | | | | | This commit adds an option to the two masterProcChipTargetHandle() functions to only look for and return a functional master proc chip as necessary with the issue in Defect SW424528. The default behavior of these functions - where the functionality is not checked - remains the same. Once use of these functions has also been updated to use this new option. Change-Id: I37049d2cb9299a9404b57d85031a364bdb257c82 CQ:SW424528 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/58920 Reviewed-by: Nicholas E. Bofferding <bofferdn@us.ibm.com> Reviewed-by: Marshall J. Wilks <mjwilks@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Sachin Gupta <sgupta2m@in.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Secure Boot: Open up Hostboot VMM untrusted RO window on non-master procsNick Bofferding2018-01-251-2/+32
| | | | | | | | | | | | | | | | | | After the SMP is built, open up untrusted, read-only SBE window on non-master processors covering the Hostboot VMM range, so that Hostboot dump and attention handling can be done via any processor chip. Change-Id: I2b276fa7ad38b8a1f58357c8968a2f7ed7346c1f CQ: SW414923 Backport: release-fips910 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52561 Reviewed-by: Stephen M. Cprek <smcprek@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Secure Boot: Blacklist: Init PSI bridge BAR and FSP BAR properly for securityNick Bofferding2017-11-301-73/+1
| | | | | | | | | | | | | | Change-Id: I96639c0e61a101170802ba9a96cd785d0388e985 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/50057 Reviewed-by: Stephen M. Cprek <smcprek@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Reviewed-by: Marshall J. Wilks <mjwilks@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Secure Boot: Enable PSI interrupts after XSCOM switchoverNick Bofferding2017-11-281-15/+13
| | | | | | | | | | | | Change-Id: I07f01b3c174373681f11686d825f74060b36f780 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/49912 Reviewed-by: Stephen M. Cprek <smcprek@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Michael Baiocchi <mbaiocch@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Move interrupt initialization after SMP is completely upDan Crowell2016-11-011-9/+14
| | | | | | | | | | | Change-Id: I0fee07fed1448c92ef517762f6b2795b0eee7ecb Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/32003 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Matthew A. Ploetz <maploetz@us.ibm.com>
* Multi-Proc Interrupt Support with Remote LSIsBill Hoffa2016-10-071-5/+13
| | | | | | | | | | | Change-Id: I8a981628cd3adc54ba581deb0ce8afb183febef3 RTC: 150562 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/29719 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Dean Sanner <dsanner@us.ibm.com> Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Changes for P9 SBE - Enable/Remove Istep calls/processingMarty Gloff2016-09-031-13/+70
| | | | | | | | | | | | | | | | | | | | | | 3) Clean up TODO's in isteps 08, 09, and 10 In istep08 enable resolveProcessorSbeSeeproms call from call_host_slave_sbe_config.C and remove findSBEInPnor call and other processing from call_proc_check_slave_sbe_seeprom_complete.C. In istep09 remove updateProcessorSbeSeeproms call and nest frequency processing from call_fabric_erepair.C. In istep10 enable updateProcessorSbeSeeproms call from call_host_slave_sbe_update.C and enable loop to set use of xscom in call_proc_build_smp.C. Change-Id: I79237f530738e3088d1b3aedafdc6ad1139d21a8 RTC: 156597 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/26801 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Enable p9_build_smp hardware procedure call in call_proc_build_smpMatt Derksen2016-08-221-258/+45
| | | | | | | | | | | Change-Id: Icb710fce7f82f6f079982d975132543e72d5f7d8 RTC:158758 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/28239 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Reviewed-by: Martin Gloff <mgloff@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: William G. Hoffa <wghoffa@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Hack to set FSP BAR on non-master procsDan Crowell2016-07-211-37/+53
| | | | | | | | | | | | | | Force a scom to set FSPBAR until the interrupt code handles it. CQ: SW358694 Change-Id: I329c4be9c7c8e53ca6ab55bcd07009c6230faa13 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/27234 Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com> Reviewed-by: Thi N. Tran <thi@us.ibm.com> Reviewed-by: Matthew A. Ploetz <maploetz@us.ibm.com>
* Set + enable PSIHB BAR reg on slave procsBill Hoffa2016-05-271-0/+80
| | | | | | | | | | | Change-Id: I4e191550f40759bfaea7bf0d5d9969c2619dbf44 CQ:SW353930 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25016 Tested-by: Jenkins Server Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com> Tested-by: FSP CI Jenkins Reviewed-by: Prachi Gupta <pragupta@us.ibm.com> Reviewed-by: Matthew A. Ploetz <maploetz@us.ibm.com>
* Use SBE for scoms to slave chipsMatt Derksen2016-05-041-6/+6
| | | | | | | | | | | Change-Id: I31a33c62ae502d8045882a1a4df5bcaf9f2f34ac RTC:132655 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23785 Tested-by: Jenkins Server Reviewed-by: Andrew J. Geissler <andrewg@us.ibm.com> Tested-by: FSP CI Jenkins Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com> Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* Update constants and comments for P9 PIR formatDan Crowell2016-02-291-3/+3
| | | | | | | | | | | | | | | Implemented a set of macros and constants that can be used everywhere to translate a PIR into its component parts and pull out individual pieces of data from a complete PIR. Also added and updated the references to the old ATTR_FABRIC_NODE_ID with ATTR_FABRIC_GROUP_ID. Change-Id: If9735f53940e5849a648729e4bf8ca0cfbb09f6e RTC: 88055 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/706 Tested-by: Jenkins Server Reviewed-by: Daniel M. Crowell <dcrowell@us.ibm.com>
* P9 Isteps: Created directory structure for istep 10 wrappersPrachi Gupta2015-12-111-0/+299
Change-Id: I6ae2116f19ec75641ee0f27c7295f774b4c71734 RTC:137652 Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/21461 Tested-by: Jenkins Server Reviewed-by: A. Patrick Williams III <iawillia@us.ibm.com>
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